Method and system for determining the capacity of a test solid state drive, electronic device and storage medium

Abstract

The present application relates to a solid state disk capacity determination method, system, electronic equipment and storage medium for testing, comprising: obtaining the expected plugging times N of the connector of the solid state disk to be tested and test parameters, the test parameters including test write amount W, data block size B and read-write mode M; determining the write amplification factor WA according to the alignment degree of the data block size B and the NAND flash erase block size EB and the read-write mode M; determining the total write amount of the NAND flash according to W_nand=N*W*WA; determining the minimum capacity of the solid state disk for testing according to C_min=(N*W*WA) / (P / E*alpha); and outputting the recommended capacity which is not less than the minimum capacity. The present application establishes a quantitative calculation model between the test parameters and the physical life of the NAND flash, realizes the accurate determination of the solid state disk capacity required for comprehensive reliability testing, effectively reduces the test hardware cost, and improves the feasibility and economy of the comprehensive reliability testing.

Description

Technical Field

[0001] This invention relates to the field of solid-state drive (SSD) testing technology, and in particular to a method, system, electronic device, and storage medium for determining the capacity of a test SSD used in comprehensive reliability testing of SSD connector plugging / unplugging and non-volatile memory read / write operations. Background Technology

[0002] Solid-state drives (SSDs) are the core storage medium in modern servers and data centers, and their reliability directly affects the availability of the entire computing system. In the production verification and reliability evaluation of SSDs, connector insertion / removal reliability and non-volatile memory read / write reliability are two key testing dimensions.

[0003] In traditional testing solutions, these two types of tests are typically performed independently: connector testing uses dedicated insertion / removal testing equipment, while non-volatile memory testing uses a separate read / write testing platform. However, this separate testing approach has the following drawbacks: First, the two independent testing processes significantly increase testing time and hardware investment costs; second, it cannot reproduce the coupled aging stress of frequent hot-swapping of SSDs and continuous business writes after power-on in real data center operation and maintenance scenarios, and cannot characterize the coupled degradation pattern of simultaneous mechanical wear of connectors and electrical loss of non-volatile memory; third, the two types of tests use different samples, making it impossible to obtain complete failure evolution data of a single SSD under the dual stress of insertion / removal and read / write operations.

[0004] Currently, there is no industry-standard method for determining SSD capacity in this scenario of combined reliability testing involving connector plugging / unplugging and non-volatile memory read / write operations. Testers typically rely on experience to estimate capacity, lacking theoretical support. Therefore, there is an urgent need for a method that can determine the optimal test SSD capacity based on test parameters. Summary of the Invention

[0005] This application provides a method, system, electronic device, and storage medium for determining the capacity of a solid-state drive for testing.

[0006] Firstly, this application provides a method for determining the capacity of a test solid-state drive (SSD), applied to a comprehensive reliability test of SSD connector insertion / removal and NAND flash memory read / write. The comprehensive reliability test employs a test process that cyclically matches a fixed capacity data write task during a single connector insertion / removal cycle. The method includes the following steps:

[0007] Obtain the expected number of insertion / removal cycles N of the solid-state drive connector under test, the test parameters, and the erase block size EB, the maximum number of erase / write cycles P / E, and the reserved space factor α of the NAND flash memory of the solid-state drive under test. The test parameters include the amount of data written W, the data block size B, and the read / write mode M corresponding to a single insertion / removal cycle. The write amplification factor WA is determined based on the alignment degree between the data block size B and the erase block size EB, and the read / write mode M. The total estimated amount of NAND flash memory written during the test period is determined based on the expected number of insertion / removal cycles N, the amount of data written W corresponding to a single insertion / removal cycle, and the write amplification factor WA. The minimum capacity C_min of the solid-state drive to be tested is determined based on the total write volume estimate W_nand, the maximum number of erase / write cycles P / E, and the reserved space factor α. The recommended capacity C_recommended is output, and the recommended capacity C_recommended is not less than the minimum capacity C_min of the solid-state drive under test.

[0008] In conjunction with the first aspect, in one possible implementation, determining the write amplification factor WA based on the alignment degree between the data block size B and the erase block size EB, and the read / write mode M, specifically includes: The basic write amplification factor WA_base is determined based on the alignment between the data block size B and the erase block size EB. When the data block size B is aligned with the NAND flash erase block size EB, the basic write amplification factor WA_base = 1. When the data block size B is not aligned with the erase block size EB, the basic write amplification factor WA_base = ceil(EB / B). The final write amplification factor WA is determined according to the read / write mode M; when the read / write mode M is sequential write, WA = WA_base; when the read / write mode M is random write, WA = WA_base × β, where β is a random factor, and the value range of the random factor is 1.5 to 4.

[0009] In conjunction with the first aspect, in one possible implementation, the formula for determining the estimated total write volume W_nand of the NAND flash memory during the test period based on the expected number of insertion / removal cycles N, the data write volume W corresponding to a single insertion / removal cycle, and the write amplification factor WA is as follows: W_nand=N×W×WA.

[0010] In conjunction with the first aspect, in one possible implementation, the formula for determining the minimum capacity C_min of the solid-state drive under test based on the estimated total write volume W_nand, the maximum number of erase / write cycles P / E, and the reserved space factor α is as follows: C_min=(N×W×WA) / (P / E×α), where the reserved space factor α ranges from 1.07 to 1.5.

[0011] In conjunction with the first aspect, in one possible implementation, the expected number of mating / unmating cycles N of the solid-state drive connector under test is obtained in the following manner: The actual number of usable insertions and removals is calculated based on the measured data of the spring deformation and contact resistance of the solid-state drive connector under test using a lifespan model.

[0012] In conjunction with the first aspect, in one possible implementation, the method for determining the capacity of the test solid-state drive further includes a lifespan synchronization optimization step: When the calculated minimum capacity C_min of the solid-state drive under test exceeds the preset capacity threshold, at least one of the test parameters is adjusted, and the minimum capacity C_min of the solid-state drive under test is recalculated based on the adjusted test parameters until the recalculated minimum capacity C_min of the solid-state drive under test falls into the preset capacity threshold.

[0013] In conjunction with the first aspect, in one possible implementation, adjusting the test parameters includes: Increase the data block size B, and trigger the recalculation of the write amplification factor WA and the minimum capacity C_min of the solid-state drive under test with each increment, until the data block size B is aligned with the erase block size EB, or the recalculated C_min falls into the preset capacity threshold.

[0014] Secondly, this application provides a system for determining the capacity of a test solid-state drive, used to execute the method for determining the capacity of a test solid-state drive as described in any one of the above claims, including: The parameter acquisition module is used to acquire the expected number of insertion and removal cycles N of the solid-state drive connector under test, the test parameters, and the erase block size EB, the maximum number of erase / write cycles P / E, and the reserved space factor α of the NAND flash memory of the solid-state drive under test. The test parameters include the amount of data written W, the data block size B, and the read / write mode M corresponding to a single insertion and removal cycle. The write amplification calculation module is used to calculate the write amplification factor WA based on the alignment degree between the data block size B and the NAND flash erase block size EB, and the read / write mode M. The capacity calculation module is used to determine the estimated total write volume W_nand of the NAND flash memory during the test based on the expected number of insertion / removal cycles N, the data write volume W corresponding to the single insertion / removal cycle, and the write amplification factor WA, and to determine the minimum capacity C_min of the solid-state drive to be tested based on the estimated total write volume W_nand, the upper limit of erase / write cycles P / E, and the reserved space factor α. The output module is used to output a standardized recommended capacity that is not less than the minimum capacity C_min of the solid-state drive under test; The optimization and adjustment module is used to adjust the test parameters and feed them back to the parameter acquisition module for recalculation when the minimum capacity C_min of the solid-state drive under test exceeds the preset capacity range.

[0015] Thirdly, this application provides an electronic device, including a memory, a processor, and an output interface; The memory stores computer programs that can run on a processor; When the processor executes the computer program, it implements all the steps of any of the above-described methods; The output interface is used to output the calculated recommended capacity of the solid-state drive.

[0016] Fourthly, this application provides a computer-readable storage medium having a computer program stored thereon, characterized in that, when the computer program is executed by a processor, it implements all the steps of the method for determining the capacity of a test solid-state drive as described in any one of the above-mentioned methods.

[0017] Compared with existing technologies, this invention creatively establishes a quantitative calculation model between the expected number of connector insertion / removal cycles, the amount of data written per single insertion / removal cycle, the write amplification factor, the upper limit of NAND flash memory erase / write lifespan, and the reserved space factor. For the first time, it achieves standardized, quantitative, and accurate solution for the capacity of the solid-state drive used for testing in the comprehensive reliability test scenario of connector insertion / removal and NAND flash memory read / write coupling. It can accurately match the lifespan of connector durability testing and NAND flash memory durability testing, solve the problem of invalid testing caused by inappropriate capacity in comprehensive reliability testing, and reasonably control the investment of test resources while ensuring the validity of test results. Attached Figure Description

[0018] Figure 1 A flowchart illustrating a method for determining the capacity of a test solid-state drive provided in an embodiment of this application; Figure 2 This is a schematic block diagram of a system for determining the capacity of a solid-state drive for testing, provided in an embodiment of this application. Detailed Implementation

[0019] The technical solution of the present invention will now be clearly and completely described with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0020] As servers and data centers continue to demand higher reliability from storage systems, factory quality inspection and engineering reliability verification of solid-state drives (SSDs) have become essential steps. SSD reliability primarily involves two dimensions: firstly, the mechanical reliability of the connectors, which characterizes the SSD's ability to maintain good electrical contact with the server motherboard or hard drive backplane during repeated insertion and removal, typically measured by the rated number of insertions and removals; secondly, the media reliability of the non-volatile memory (NAND flash memory), which characterizes the flash memory chips' ability to maintain data integrity and read / write performance after repeated erase and write cycles, typically measured by the maximum number of P / E erase cycles as the core lifespan constraint.

[0021] In existing reliability verification systems, connector insertion / removal endurance testing and NAND flash memory read / write endurance testing are conducted independently, relying on different equipment and SSD samples. This separate testing model has significant drawbacks: the dispersed testing procedures lead to higher labor and equipment costs; it cannot reproduce the degradation process of the superimposed coupling of mechanical insertion / removal stress and flash memory read / write stress under real-world hot-swappable operation and maintenance scenarios in data centers, making it difficult to characterize the linked degradation patterns of connector contact deterioration, firmware error correction retry, and additional flash memory write losses; furthermore, the use of different samples for the two types of tests makes it impossible to obtain complete failure evolution data of a single SSD under combined stress. For comprehensive reliability testing scenarios involving connector and flash memory coupling, the industry currently lacks a standardized and quantifiable method for determining the capacity of test SSDs. Relying solely on engineering experience for rough selection easily leads to problems such as selecting too small a capacity, causing premature exhaustion of NAND flash memory's erase / write life and test interruptions, or selecting too large a capacity, resulting in redundant and wasteful test materials. To address these issues, this invention proposes a method, system, electronic equipment, and storage medium for determining the capacity of solid-state drives (SSDs) for testing, enabling precise quantitative selection of SSD capacity for comprehensive reliability testing scenarios.

[0022] Example 1 This embodiment provides a method for determining the capacity of a solid-state drive (SSD) for testing, applied to a comprehensive reliability test scenario involving SSD connector plugging / unplugging and NAND flash memory read / write coupling. This comprehensive reliability test employs a test process of matching a single connector plugging / unplugging cycle with a fixed-capacity data write task. That is, after one complete plugging / unplugging cycle, a fixed-amount data write operation is performed, then data integrity is verified and relevant indicators are recorded, before entering the next plugging / unplugging cycle. This process is repeated until all N plugging / unplugging cycles are completed. The execution entity of this method can be a test host computer, an embedded test controller, or other test equipment with computing capabilities.

[0023] Combination Figure 1 As shown, the method for determining the capacity of a test solid-state drive provided in this embodiment includes the following steps S101 to S105.

[0024] S101. Obtain the expected number of insertions and removals N of the solid-state drive connector to be tested, the test parameters, and the erase block size EB, the maximum number of erase / write cycles P / E, and the reserved space factor α of the NAND flash memory of the solid-state drive to be tested. The test parameters include the amount of data written in a single insertion / removal cycle W, the data block size B, and the read / write mode M.

[0025] In this step, the expected number of mating cycles N represents the total number of connector mating cycles planned to be performed in the comprehensive reliability test. Its value determines the total test duration and the total number of writes. The value of N is usually determined based on the rated lifespan of the solid-state drive connector under test or the actual needs of engineering verification. Specifically, the expected number of mating cycles N for the solid-state drive connector under test can be obtained in any of the following ways: Reading the rated mating life value specified in the connector's datasheet, for example, if the datasheet for a certain type of M.2 connector specifies a rated mating life of 5000 cycles, then N can be 5000; Calculating the actual usable number of mating cycles based on measured data of the connector's spring deformation and contact resistance using a lifespan model, i.e., in actual engineering testing, by measuring the mechanical deformation curve of the connector's spring and the degradation trend of its contact resistance using precision instruments, and calculating the actual usable number of mating cycles under specific electrical performance boundary conditions; Receiving a preset number of mating cycles manually input by the user, i.e., the user directly specifies the expected number of mating cycles N according to the test plan, for example, in an accelerated aging test scenario, the user may want to set N=10000 cycles to examine the connector's degradation behavior under extreme cycles.

[0026] The data write volume W for a single plug-in / plug-out cycle represents the amount of data written to the SSD under test after each plug-in / plug-out cycle, and its unit can be megabytes (MB), gigabytes (GB), or the number of logical blocks. The data block size B is the size of the data block for each I / O operation (e.g., B = 4KB, 64KB, or 128KB). The read / write mode M indicates the type of write operation, including sequential write mode and random write mode. In sequential write mode, the written data is contiguous in the logical address space; in random write mode, the logical addresses of the written data are randomly distributed.

[0027] S102. Determine the write amplification factor WA based on the alignment degree between the data block size B and the erase block size EB, and the read / write mode M.

[0028] In this step, the write amplification factor (WA) is a core concept in NAND flash memory management. It is the ratio between the actual physical write volume performed inside the NAND flash memory (including additional writes generated by flash memory management operations such as garbage collection and wear leveling) and the logical write volume requested by the host. In comprehensive reliability testing, since the write operation after each insertion / removal cycle directly affects the NAND flash memory, accurately estimating the write amplification factor is crucial for calculating the actual total write volume of the NAND flash memory.

[0029] The method for determining the write amplification factor WA in this step specifically includes: determining the base write amplification factor WA_base based on the alignment degree between the data block size B and the erase block size EB, which can be categorized into the following two scenarios: Scenario 1: When the data block size B is aligned with the NAND flash erase block size EB, that is, B is an integer multiple of EB or EB is an integer multiple of B, the boundary of the data block written by the host matches the physical boundary of the NAND flash erase block well. The flash controller does not need to perform additional read-write merging operations when performing write operations, and the garbage collection efficiency is high. In this case, the basic write amplification factor WA_base=1.

[0030] Scenario 2: When the data block size B is not aligned with the NAND flash erase block size EB (i.e., B is neither an integer multiple of EB nor EB is an integer multiple of B), the boundary of the data block written by the host is offset from the physical boundary of the NAND flash erase block. The flash controller needs to perform data merging and remapping when managing the flash memory space, resulting in additional write overhead. In this case, the base write amplification factor WA_base = ceil(EB / B), where ceil is the floor function. For example, if EB = 16MB and B = 6MB, then WA = ceil(16 / 6) = ceil(2.67) = 3.

[0031] The final write amplification factor WA is then determined based on the read / write mode M. When the read / write mode M is sequential write, WA = WA_base. When the read / write mode M is random write, since random writes significantly increase the frequency and overhead of garbage collection, the write amplification factor is further multiplied by the randomness factor β, which ranges from 1.5 to 4. The randomness factor β represents the additional write amplification brought about by random writes, and its value mainly depends on the NAND flash memory's reserved space factor α: the larger the reserved space, the lower the garbage collection competition pressure, and the lower the additional write amplification introduced by random writes; the smaller the reserved space, the higher the fragmentation cleanup overhead, and the larger the value of the randomness factor β.

[0032] 1) When the reserved space factor α≥1.5, the reserved space is sufficient, there are a large number of free blocks for waste recycling, the waste recycling and relocation costs are low, and the value of β is 1.5-2.0.

[0033] 2) When the reserved space factor α is set to 1.07, which is typical for consumer-grade SSDs, garbage collection is under moderate pressure, and the recommended value for β is 2.0.

[0034] 3) When the reserved space factor is 1.10≤α≤1.20, the reserved space ratio is limited, the idle block resources are scarce, garbage collection is triggered frequently, and the fragment relocation cost increases significantly. The value of β is 3.0-4.0.

[0035] By using the above-mentioned hierarchical determination rules, the basic write amplification factor WA_base is first determined based on the alignment relationship, and then the final write amplification factor WA is estimated by superimposing a random factor based on the read and write modes. This makes the estimation of the write amplification factor WA both theoretically based and flexibly adaptable to different write modes, thereby improving the accuracy of subsequent capacity calculations.

[0036] S103. Determine the estimated total write volume W_nand of the NAND flash memory during the test period based on the expected number of insertion / removal cycles N, the data write volume W corresponding to the single insertion / removal cycle, and the write amplification factor WA.

[0037] In this step, the formula for calculating the total write volume W_nand of the NAND flash memory during the test is: W_nand=N×W×WA The physical meaning of this formula is as follows: During the entire comprehensive reliability test, the connector undergoes N insertion / removal cycles. After each cycle, W data is written to the NAND flash memory. However, due to the write amplification effect, the actual physical write volume performed inside the NAND flash memory is W multiplied by WA. Therefore, the total physical write volume of the NAND flash memory during the entire test cycle is N×W×WA. N×W is the total pure logical write volume from the host side perspective, multiplied by the write amplification factor WA to obtain the actual physical write volume inside the NAND flash memory. For example, if N=5000 cycles, W=10GB, and WA=2, then W_nand=5000×10×2=100000GB≈97.66TB, meaning that the NAND flash memory needs to withstand approximately 97.66TB of physical write volume during the test.

[0038] S104. Determine the minimum capacity C_min of the solid-state drive to be tested based on the total write volume estimate W_nand, the maximum number of erase / write cycles P / E, and the reserved space factor α.

[0039] In this step, the Program / Erase (P / E) ratio, the maximum number of write cycles a NAND flash memory cell can withstand while maintaining data integrity, is a core lifetime indicator. The specific P / E value depends on the type of NAND flash memory; for example, SLC flash memory typically has a P / E value of approximately 100,000 cycles, MLC flash memory approximately 3,000 to 10,000 cycles, and TLC flash memory approximately 1,000 to 3,000 cycles. In this method, the P / E value is a known physical parameter of the NAND flash memory and can be obtained by consulting the flash memory cell's datasheet.

[0040] The reserved space factor α provides redundant space for wear leveling of NAND flash memory, characterizing the proportion of reserved space in the solid-state drive (SSD) relative to the user-available capacity. Reserved space is invisible storage space reserved by the SSD controller for flash memory management tasks such as garbage collection, wear leveling, and bad block management. In this embodiment, the value of α ranges from 1.07 to 1.5. A value of 1.07 corresponds to approximately 7% reserved space, meaning the user-available space accounts for approximately 97% of the total physical capacity; a value of 1.5 corresponds to approximately 33% reserved space, meaning the user-available space accounts for approximately 67% of the total physical capacity. The introduction of α ensures that the calculated C_min is not a theoretically sufficient value, but rather an engineering-practical value that includes safety redundancy, effectively reducing the risk of premature aging caused by uneven wear.

[0041] In this step, the formula for calculating the minimum capacity C_min of the solid-state drive to be tested is: C_min=(N×W×WA) / (P / E×α) The physical meaning of this formula is: the total write volume estimate W_nand divided by the safe write volume that a single erase / write block can withstand over its lifespan (i.e., P / E×α) gives the minimum number of erase blocks required, which, when multiplied by the single block capacity, is the minimum capacity. By introducing a reserved space factor α, it can be ensured that even under the most demanding write conditions, the erase / write lifespan of the NAND flash memory is still sufficient to cover the entire test cycle.

[0042] For example: if N=5000 times, W=10GB, WA=2, P / E=3000, α=1.1, then: C_min=(5000×10×2) / (3000×1.1)≈30.3GB, that is, at least one solid-state drive with a capacity of about 30.3GB or more is needed to ensure that the NAND flash memory will not fail before the connector due to being exhausted by erasing and writing during 5000 insertion and removal cycles with data writing.

[0043] Step S105: Output the recommended capacity C_recommended, wherein the recommended capacity C_recommended is not less than the minimum capacity C_min.

[0044] In this step, since SSD capacities are typically provided in standardized specifications (such as 128GB, 256GB, 512GB, 1TB, 2TB, etc.), the recommended capacity C_recommended is output as follows: select the minimum value not less than C_min from the standardized capacity specifications as the recommended capacity C_recommended. For example, if C_min = 380GB, then the recommended capacity C_recommended can be selected as 512GB.

[0045] In one possible implementation, the method further includes a lifetime synchronization optimization step S106.

[0046] S106. When the calculated minimum capacity C_min of the solid-state drive under test exceeds the preset capacity threshold, adjust at least one of the test parameters, and recalculate the minimum capacity C_min of the solid-state drive under test based on the adjusted test parameters, until the recalculated minimum capacity C_min of the solid-state drive under test falls into the preset capacity threshold.

[0047] This step is triggered when the minimum capacity C_min of the SSD to be tested calculated in step S104 exceeds the preset capacity threshold. When it is detected that C_min is too large, that is, according to the current test parameter configuration, the required SSD capacity exceeds the reasonable range, at least one of the test parameters is automatically adjusted and fed back to step S101 to re-execute the calculation until the adjusted C_min falls into the target capacity range.

[0048] The core concept of the lifespan synchronization optimization step is to synchronize the mechanical insertion / removal lifespan of the connector with the erase / write lifespan of the NAND flash memory in terms of capacity. When the calculated minimum capacity C_min exceeds the preset capacity threshold, it indicates that under the current test parameter combination, the connector insertion / removal lifespan N is much greater than the available erase / write lifespan of the NAND flash memory (relative to the available capacity), meaning that there is a significant asynchrony between the mechanical degradation curve of the connector and the media degradation curve of the NAND flash memory. At this point, simply increasing the SSD capacity to match the connector lifespan is not economically feasible; it is necessary to recalibrate the synchronization of the two degradation curves by adjusting the test parameters.

[0049] In one possible implementation, adjusting the test parameters specifically includes: gradually increasing the data block size B in preset increments, and triggering a recalculation of the write amplification factor WA and the minimum capacity C_min of the SSD under test after each increment, until the data block size B equals the erase block size EB, or the recalculated C_min falls within the preset capacity threshold. For example, if B = 2MB and EB = 16MB, then WA = ceil(16 / 2) = 8, and C_min is relatively large; if the data block size is adjusted to B = 16MB, then B and EB are perfectly aligned, WA = 1, the estimated total write volume W_nand is reduced to 1 / 8 of the original, and the corresponding C_min is also reduced accordingly. The engineering rationale for this adjustment strategy is that it adjusts the write parameters on the test software side, without changing the physical test objects (connectors and NAND flash memory), thus not affecting the validity of the test results.

[0050] Besides increasing the data block size B, other test parameters can be adjusted according to actual needs. For example, the amount of data written in a single test W can be appropriately reduced, or the read / write mode M can be changed from random write to sequential write to eliminate the amplification effect of the random factor β. The above adjustments can be made individually or in combination, with the goal of making the adjusted C_min fall within an acceptable target capacity range.

[0051] The lifespan synchronization optimization step enables the method of this invention not only to calculate the theoretically required SSD capacity, but also to actively guide the optimization and adjustment of test parameters. This minimizes the cost of test hardware while ensuring the effectiveness of the test, and achieves bidirectional adaptation between connector lifespan and NAND flash memory lifespan, rather than one-way passive matching.

[0052] The method provided in this embodiment systematically incorporates the number of connector insertion / removal cycles (N), test parameters (W, B, M), and the physical characteristics of the NAND flash memory (EB, P / E, reserved space) into a unified quantitative calculation framework. This enables the precise determination of the minimum and recommended SSD capacity required for comprehensive reliability testing. Furthermore, by introducing a lifespan synchronization optimization mechanism, test parameters can be automatically adjusted when the capacity exceeds the feasibility boundary. This achieves timing synchronization between connector mechanical degradation and NAND flash memory media degradation, improving the engineering feasibility and economy of the comprehensive reliability testing scheme.

[0053] Example 2 The following is combined with Figure 2 The system provided in this embodiment will be described in detail.

[0054] Figure 2 This is a schematic block diagram of a system for determining the capacity of a solid-state drive for testing, provided in this embodiment. Figure 2As shown, the system includes: a parameter acquisition module 210, a write amplification calculation module 220, a capacity calculation module 230, an output module 240, and an optimization and adjustment module 250.

[0055] The parameter acquisition module 210 is used to acquire the expected number of mating / removal cycles N of the connector and test parameters, including the single test write volume W, data block size B, and read / write mode M. The parameter acquisition module 210 can acquire the expected number of mating / removal cycles N in any of the following ways: reading the rated mating / removal life value from a preset SSD connector specification database; receiving measured data transmitted from external testing instruments (such as a spring deformation measuring instrument or a contact resistance tester) and calculating the actual usable number of mating / removal cycles based on a built-in life calculation model; or receiving a preset number of mating / removal cycles manually entered by the user on the interactive interface. The test parameters (W, B, M) can be entered by the user through the configuration interface or loaded from a preset test scheme template.

[0056] The write amplification calculation module 220, connected to the parameter acquisition module 210, is used to calculate the write amplification factor WA based on the alignment between the data block size B and the NAND flash erase block size EB, and the read / write mode M. The write amplification calculation module 220 internally stores typical or user-configured values ​​of the NAND flash erase block size EB and embeds the WA calculation logic described in Example 1. Specifically: when B and EB are aligned, WA = 1; when B and EB are not aligned, WA = ceil(EB / B); when M is random write, WA is multiplied by a random factor β. After calculation, the write amplification calculation module 220 outputs the WA value to the capacity calculation module 230.

[0057] The capacity calculation module 230, connected to the parameter acquisition module 210 and the write amplification calculation module 220, calculates the estimated total write volume W_nand of the NAND flash memory based on W_nand = N × W × WA, and calculates the minimum capacity C_min of the test solid-state drive based on the estimated total write volume, the maximum number of erase / write cycles (P / E), and the reserved space factor α. The capacity calculation module 230 internally stores a database of typical P / E values ​​for different types of NAND flash memory (e.g., SLC P / E = 100000, MLC P / E = 3000~10000, TLC P / E = 1000~3000), and allows users to select the corresponding P / E value according to the actual type of flash memory used. The reserved space factor α can be configured by the user; if not configured, the default value α = 1.07 is used. After calculating the minimum capacity according to the formula C_min=(N×W×WA) / (P / E×α), the capacity calculation module 230 outputs the calculation result to the output module 240 and the optimization adjustment module 250.

[0058] Output module 240, connected to capacity calculation module 230, is used to output a standardized recommended capacity that is not less than the minimum capacity C_min. Output module 240 internally maintains a list of standardized SSD capacity specifications (such as 64GB, 128GB, 256GB, 512GB, 1TB, 2TB, 4TB, etc.). Its working logic is as follows: it receives the C_min value transmitted by capacity calculation module 230, iterates through the standardized capacity specification list, selects the first capacity specification not less than C_min as the recommended capacity C_recommended, and outputs C_recommended to the display interface or generates a test configuration report. For example, if C_min = 380GB, output module 240 selects 512GB as the recommended capacity.

[0059] The optimization and adjustment module 250 is connected to both the parameter acquisition module 210 and the capacity calculation module 230. It adjusts test parameters and feeds them back to the parameter acquisition module 210 for recalculation when the minimum capacity exceeds a preset capacity range. The working logic of the optimization and adjustment module 250 is as follows: It receives the C_min value transmitted by the capacity calculation module 230 and compares C_min with a preset capacity threshold C_threshold (C_threshold can be set by the user based on the test budget and available hardware configuration, for example, 512GB or 1TB). If C_min ≤ C_threshold, it indicates that the capacity requirement under the current parameter combination is within the feasible range, and the system directly outputs the recommended capacity. If C_min > C_threshold, it indicates that the capacity requirement exceeds the feasible boundary, and the optimization and adjustment module 250 triggers the parameter adjustment process. The adjustment strategies include at least one of the following: increasing the data block size B (making the ratio of B to EB approach 1), reducing the single test write volume W, and switching the read / write mode M from random write to sequential write. The adjusted parameters are fed back to the parameter acquisition module 210, triggering a new round of capacity calculation until C_min converges to the target capacity range.

[0060] The system provided in this embodiment, through a modular architecture design, decouples functions such as test parameter acquisition, write amplification calculation, capacity calculation, standardized output, and optimization adjustment into five independent modules. Each module has clearly defined functional boundaries and data interfaces, facilitating system maintenance, upgrades, and expansion. Furthermore, through the feedback closed-loop design of the optimization adjustment module, the system possesses automated parameter iterative optimization capabilities.

[0061] Example 3 This embodiment provides an electronic device for executing the method for determining the capacity of a test solid-state drive described in Embodiment 1. The electronic device includes a memory, a processor, and an output interface. The processor is connected to both the memory and the output interface via a bus.

[0062] The memory is used to store computer programs that can run on the processor, as well as intermediate data generated during operation. The memory may include volatile memory (such as DRAM, SRAM) and / or non-volatile memory (such as NAND flash memory, NOR flash memory). The computer program contains instruction code for performing the steps of the test solid-state drive capacity determination method described in Embodiment 1.

[0063] The processor executes a computer program stored in memory to implement all the method steps described in Example 1, including: obtaining the expected number of insertions / removals N and test parameters (W, B, M); determining the write amplification factor WA based on the alignment of B and EB and M; calculating the estimated total write volume according to the formula W_nand=N×W×WA; calculating the minimum capacity according to the formula C_min=(N×W×WA) / (P / E×α); and optionally performing a lifetime synchronization optimization step.

[0064] The output interface is used to output the calculated recommended SSD capacity C_recommended. The output interface may include at least one of the following: a display screen for visually presenting the recommended capacity to the user; a communication interface (such as USB, Ethernet, Wi-Fi) for sending the recommended capacity to an external test management system or host computer via data packets; and a printer interface for writing the recommended capacity into the test plan report and printing it.

[0065] Example 4 This embodiment provides a computer-readable storage medium storing a computer program thereon. When executed by a processor, the computer program implements all the steps of the method for determining the capacity of a test solid-state drive described in Embodiment 1. The computer-readable storage medium includes, but is not limited to, various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0066] In summary, this invention creatively establishes a quantitative calculation model relating the expected number of connector insertion / removal cycles N, the write volume W per insertion / removal, the write amplification factor WA, the NAND flash memory erase / write limit P / E, and the reserved space factor α. This is the first time a standardized quantitative solution has been achieved for SSD capacity testing under a comprehensive reliability testing scenario involving connector insertion / removal and flash memory read / write coupling. Furthermore, this invention fully considers the objective impact of NAND flash memory write amplification loss, combining the alignment and matching relationship between data block B and erase block EB, and the hierarchical estimation of the read / write mode M to accurately estimate the write amplification factor WA. This ensures that the actual write volume measurement of the flash memory throughout the entire cycle closely matches real aging conditions, largely avoiding the shortcomings of traditional empirical estimations that lead to underestimation of capacity, resulting in test interruptions, or overestimation of capacity, leading to waste of test material resources. Simultaneously, the introduction of the reserved space factor α provides sufficient redundant space for flash memory wear equalization and garbage collection, preventing premature failure due to uneven local erase / write operations and ensuring the stability and reliability of the flash memory medium throughout the entire testing process. Based on the technical solution of this invention, the consumption rhythm of the mechanical endurance life of the connector and the erase and write life of NAND flash memory can be accurately matched, so that the two types of devices reach the life boundary at the same time. This avoids invalid tests caused by improper capacity selection in comprehensive reliability testing. Under the premise of strictly ensuring the authenticity and validity of test data and the completeness of test procedures, the hardware investment cost of SSD test samples is greatly reduced, and the overall economy and testing efficiency of batch reliability verification are improved.

[0067] It should be emphasized that the above are merely preferred embodiments of the present invention and are not intended to limit the present invention in any way. Any simple modifications, equivalent changes and alterations made to the above embodiments based on the technical essence of the present invention shall still fall within the scope of the technical solution of the present invention.

Claims

1. A method for determining the capacity of a solid-state drive (SSD) for testing, applied to a comprehensive reliability test of SSD connector insertion / removal and NAND flash memory read / write operations, characterized in that... The method includes the following steps: Obtain the expected number of insertion / removal cycles N of the solid-state drive connector under test, the test parameters, and the erase block size EB, the maximum number of erase / write cycles P / E, and the reserved space factor α of the NAND flash memory of the solid-state drive under test. The test parameters include the amount of data written W, the data block size B, and the read / write mode M corresponding to a single insertion / removal cycle. The write amplification factor WA is determined based on the alignment between the data block size B and the erase block size EB, and the read / write mode M. The total estimated amount of NAND flash memory written during the test period is determined based on the expected number of insertion / removal cycles N, the amount of data written W corresponding to a single insertion / removal cycle, and the write amplification factor WA. The minimum capacity C_min of the solid-state drive to be tested is determined based on the total write volume estimate W_nand, the maximum number of erase / write cycles P / E, and the reserved space factor α. The recommended capacity C_recommended is output, and the recommended capacity C_recommended is not less than the minimum capacity C_min of the solid-state drive under test.

2. The method for determining the capacity of a solid-state drive for testing according to claim 1, characterized in that, The step of determining the write amplification factor WA based on the alignment between the data block size B and the erase block size EB, and the read / write mode M, specifically includes: The basic write amplification factor WA_base is determined based on the alignment between the data block size B and the erase block size EB. When the data block size B is aligned with the NAND flash erase block size EB, the basic write amplification factor WA_base = 1. When the data block size B is not aligned with the erase block size EB, the basic write amplification factor WA_base = ceil(EB / B). The final write amplification factor WA is determined according to the read / write mode M; when the read / write mode M is sequential write, WA = WA_base; when the read / write mode M is random write, WA = WA_base × β, where β is a random factor, and the value of the random factor ranges from 1.5 to 4.

3. The method for determining the capacity of a test solid-state drive according to claim 1, characterized in that, The formula for determining the estimated total write volume W_nand of the NAND flash memory during the test period based on the expected number of insertion / removal cycles N, the data write volume W corresponding to a single insertion / removal cycle, and the write amplification factor WA is as follows: W_nand=N×W×WA.

4. The method for determining the capacity of a test solid-state drive according to claim 3, characterized in that, The formula for determining the minimum capacity C_min of the solid-state drive under test based on the estimated total write volume W_nand, the maximum number of erase / write cycles P / E, and the reserved space factor α is as follows: C_min=(N×W×WA) / (P / E×α) The reserved space factor α in the formula ranges from 1.07 to 1.

5.

5. The method for determining the capacity of a test solid-state drive according to claim 1, characterized in that, The expected number of mating / unmating cycles N of the solid-state drive connector under test is obtained in the following way: The actual number of usable insertions and removals is calculated based on the measured data of the spring deformation and contact resistance of the solid-state drive connector under test using a lifespan model.

6. The method for determining the capacity of a test solid-state drive according to claim 1, characterized in that, It also includes lifespan synchronization optimization steps: When the calculated minimum capacity C_min of the solid-state drive under test exceeds the preset capacity threshold, at least one of the test parameters is adjusted, and the minimum capacity C_min of the solid-state drive under test is recalculated based on the adjusted test parameters until the recalculated minimum capacity C_min of the solid-state drive under test falls into the preset capacity threshold.

7. The method for determining the capacity of a test solid-state drive according to claim 6, characterized in that, The adjustment of the test parameters includes: Increase the data block size B, and trigger the recalculation of the write amplification factor WA and the minimum capacity C_min of the solid-state drive under test with each increment, until the data block size B is aligned with the erase block size EB, or the recalculated minimum capacity C_min of the solid-state drive under test falls into the preset capacity threshold.

8. A system for determining the capacity of a test solid-state drive, used to execute the method for determining the capacity of a test solid-state drive as described in any one of claims 1 to 7, characterized in that, include: The parameter acquisition module is used to acquire the expected number of insertion and removal cycles N of the solid-state drive connector under test, the test parameters, and the erase block size EB, the maximum number of erase / write cycles P / E, and the reserved space factor α of the NAND flash memory of the solid-state drive under test. The test parameters include the amount of data written W, the data block size B, and the read / write mode M corresponding to a single insertion and removal cycle. The write amplification calculation module is used to calculate the write amplification factor WA based on the alignment degree between the data block size B and the NAND flash erase block size EB, and the read / write mode M. The capacity calculation module is used to determine the estimated total write volume W_nand of the NAND flash memory during the test based on the expected number of insertion / removal cycles N, the data write volume W corresponding to the single insertion / removal cycle, and the write amplification factor WA, and to determine the minimum capacity C_min of the solid-state drive to be tested based on the estimated total write volume W_nand, the upper limit of erase / write cycles P / E, and the reserved space factor α. The output module is used to output a standardized recommended capacity that is not less than the minimum capacity C_min of the solid-state drive under test; The optimization and adjustment module is used to adjust the test parameters and feed them back to the parameter acquisition module for recalculation when the minimum capacity C_min of the solid-state drive under test exceeds the preset capacity range.

9. An electronic device, characterized in that, This includes memory, processor, and output interfaces; The memory stores computer programs that can run on a processor; When the processor executes the computer program, it implements all the steps of the method according to any one of claims 1 to 7; The output interface is used to output the calculated recommended capacity of the solid-state drive.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by the processor, it implements all the steps of the method for determining the capacity of a test solid-state drive as described in any one of claims 1 to 7.

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