A pre-trained language model Verilog code automatic repair and feedback generation method based on data flow guidance

CN123030215APending Publication Date: 2026-11-03BEIHANG UNIV
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Patent Information

Application Number
CN202611203536.2
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2026-08-10
Publication Date
2026-11-03

AI Technical Summary

Technical Problem

In teaching scenarios using the hardware description language Verilog, existing technologies struggle to effectively integrate concurrency features and data flow information, leading to difficulties in code repair for beginners and a lack of interpretable feedback generation and filtering mechanisms.

Method used

By extracting signal feature models through data stream parsing, constructing signal feature matching and recursive pre-repair, generating candidate patches by combining pre-trained language models, and generating structured feedback based on the repair process, we can achieve accurate repair and interpretable guidance.

Benefits of technology

It significantly improves the fix rate and efficiency of Verilog code, provides targeted root cause analysis of errors and actionable fix guidance, and enhances the learning effect for beginners.

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Abstract

The application provides a Verilog code automatic repair and feedback generation method based on a pre-training language model of data flow guidance, and is used in the technical fields of computer-aided education, automatic program repair and the like. The method of the application performs data flow analysis on a program, constructs a signal feature model containing signal attributes, a data flow tree and a direct dependent signal set, matches the signal feature model of an error program with signal feature models in a historical correct program set, performs recursive matching on the data dependency relationship of the program, locates a semantic error sub-tree, performs recursive pre-repair on the error data flow tree by using a correct program, masks signal names in the data flow tree of the pre-repaired program, generates a candidate patch by using a pre-training language model, and generates a teaching feedback with a score based on repair process information. The application can realize automatic repair and auxiliary learning guidance of a Verilog program, and achieves the effect of significantly improving the repair rate.
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Description

Technical Field

[0001] This invention belongs to the field of computer-aided education technology and relates to Automatic Program Repair (APR) technology. Specifically, it relates to a method for automatic repair and intelligent feedback generation of Verilog code based on data flow analysis-guided pre-trained language models for beginners of Hardware Description Language (HDL). Background Technology

[0002] With the development of hardware design education, hardware description languages ​​such as Verilog have become core teaching content in university courses on computer organization and digital logic. While their inherent concurrent execution characteristics can accurately simulate the parallel behavior of hardware, they also bring unique challenges to code debugging for beginners.

[0003] Existing APR (Automatic Repair) techniques mainly encompass approaches such as spectrum-based, template-based, constraint-based, heuristic search, and deep learning. Spectrum-based methods locate faults by calculating skepticism scores through coverage tests; their accuracy depends on the quality of the test suite, but in educational settings, beginner code often fails all test cases, leading to ineffective fault localization. Template-based methods utilize predefined templates to match defects, but traditional template construction requires significant manual labor, and templates obtained through mining are often limited to local code changes, making it difficult to adapt to broader code contexts. Constraint-based methods generate patches through constraint solving, but this significantly increases the complexity of constraint generation and solving when the test suite is large. Heuristic methods iteratively modify within the Abstract Syntax Tree (AST) search space to find fixes, but the probability of generating useful fixes is low and the process is time-consuming; furthermore, ASTs perform poorly in handling Verilog's concurrency characteristics. In recent years, methods based on pre-trained language models have treated code repair as a natural language processing task, showing great potential. However, they face challenges in educational settings due to limited computational resources and fail to effectively integrate Verilog's concurrency characteristics and data flow information during the fault localization phase, making it difficult to guarantee repair accuracy and efficiency when directly applied to teaching scenarios.

[0004] In terms of feedback generation, existing tools can be categorized into three types: static, dynamic, and deep learning. Static feedback tools generate suggestions by statically analyzing code structure and syntax, quickly generating feedback without running the code. Dynamic feedback tools provide more comprehensive feedback by running the code and analyzing its behavior, but their performance is limited by the quality of the test suite, and beginners' code often fails basic tests, resulting in the inability to generate effective feedback. Deep learning-based feedback generation systems utilize neural network models to analyze code, handling complex code features and providing personalized feedback, but their development and training require a large amount of data and computing resources, and the accuracy and interpretability of the generated feedback still need further verification. More importantly, existing APR tools generally lack a feedback generation mechanism tightly integrated with the remediation process, failing to provide beginners with targeted root cause analysis and actionable remediation guidance based on specific remediation operations, and also lacking a feedback filtering mechanism, easily leading to information overload.

[0005] In summary, existing technologies lack effective and precise repair methods that integrate concurrency characteristics and data flow information, making it difficult to address the repair needs and resource constraints of low-quality code from beginners. Furthermore, they lack interpretable feedback generation and filtering mechanisms based on the repair process. Summary of the Invention

[0006] This invention proposes an automatic repair and feedback generation method for Verilog code based on a data flow-guided pre-trained language model. It aims to address issues in introductory teaching of hardware description languages, such as the difficulty in automatically locating and repairing Verilog code errors caused by concurrency, the poor adaptability of existing repair tools to low-quality code from beginners, and the lack of interpretable teaching feedback. The method automatically extracts the signal data flow features of correct code and constructs a feature model containing a dependency network. It then performs similarity matching and recursive pre-repair between the signal feature models of erroneous and correct code. Combined with the mask prediction capability of the pre-trained language model, it generates candidate patches and generates graded teaching feedback based on the repair process information. This allows beginners to receive accurate code repair and interpretable learning guidance.

[0007] This invention proposes a method for automatic repair and feedback generation of Verilog code based on data flow guidance for pre-trained language models, comprising the following steps:

[0008] Step 1: Parse the input program's data flow, extracting the data flow information for each output signal. Construct a signal feature model for each output signal, including signal attributes, a data flow tree, and a set of directly dependent signals. Then, calculate the similarity between this model and the signal feature models in the historical correct program set. Based on the similarity, establish a matching relationship between each output signal of the input program and its corresponding output signal in the correct program. A pre-set similarity matching threshold is used; two signals are considered a match only when the similarity of their signal feature models exceeds this threshold. The data flow tree of the output signal is rooted at the logical operation of that output signal, and its leaf nodes are the basic input signals and constants that the output signal depends on.

[0009] Step 2: Based on the matching results of the input program and the output signal of the correct program in Step 1, recursively match the data dependencies of the input program, locate the semantic error subtree of the input program, and use the correct program to recursively pre-repair the error data stream tree.

[0010] Step 3: Mask the signal names in the dataflow tree of the correct program used for pre-repair, generate a mask code sequence for the correct program used for pre-repair, and input it into the pre-trained language model to predict the mask at each position. During prediction, beam search is used to generate multiple candidate patches, and the effective repair scheme is selected through compilation checks and test suite verification. Test cases are executed on the input program after patching by the pre-trained language model. If at least one candidate patch passes all test cases, the input erroneous program is determined to be successfully repaired, and the patch is marked as a valid repair.

[0011] Step 4: Based on the error types and repair operations identified during the repair process, automatically generate structured feedback information and filter and output the optimal feedback through a comprehensive scoring mechanism.

[0012] Step 2 includes: recursively matching and repairing the data dependencies of each matched signal pair (v,u): determining whether the direct dependencies of the input program output signal v and the correct program output signal u are both matched; if so, continuing to recursively match the data dependencies of each matched pair of direct dependencies of v and u; otherwise, if signal v lacks a direct dependency of signal u, inserting the missing direct dependency x of signal u in the correct program and the data stream tree of x into the input program.

[0013] For each signal pair (a, b) to be repaired, the data stream tree of signal b in the correct program is used to pre-repair the data stream tree of signal a in the input program. This includes: if the root nodes of the data stream tree of signal a and the data stream tree of signal b do not match, the data stream tree of signal a is directly replaced by the data stream tree of signal b; if the root nodes match, the similarity of the subtrees and the repair operation are recursively calculated. The repair operation means that when the similarity of the subtrees is lower than a preset threshold, the subtree of signal a is replaced by the corresponding subtree of signal b.

[0014] In step 3, a partial masking strategy is used to mask and replace the signal names in the data stream tree, including: masking and replacing only the signal names in the data stream tree, while fully preserving all Verilog keywords, operators, and syntax structures; not masking explicitly defined global signals; and for signals that exceed the similarity threshold, directly replacing the signal name with the corresponding signal name in the input program, instead of replacing it with a mask.

[0015] The advantages and positive effects of this invention are as follows:

[0016] (1) The present invention introduces a method for error location and repair based on data flow tree. The error location is located by comparing the data flow trees between correct and incorrect code, and the data flow tree is repaired by replacing the subtree, thus completing the code repair.

[0017] (2) The method of the present invention introduces a signal feature model matching method based on signal name mapping. By standardizing and mapping the signals to a unified identifier according to the order of their first appearance, the interference of naming style differences on structural similarity calculation is eliminated, and the accurate comparison of signal logical structure under Verilog concurrent semantics is realized, providing a reliable matching basis for subsequent repair.

[0018] (3) The present invention proposes a pre-repair method that integrates partial masking strategies. By masking only the signal name, retaining keywords and explicitly defining the signal, and directly performing replacement instead of masking prediction on signals with highly similar features, the method reduces the prediction burden of the pre-trained language model while retaining sufficient contextual information, thereby improving the repair accuracy and efficiency.

[0019] (4) The method of the present invention introduces a multi-dimensional feedback generation and scoring and screening mechanism based on repair process information. It identifies error types and generates structured feedback based on data dependence and data flow dimensions, and performs comprehensive scoring and screening by combining the scale of repair operation and functional impact. It realizes interpretable feedback output that is closely integrated with the repair process, and provides beginners with targeted error root cause analysis and operable repair guidance. Attached Figure Description

[0020] Figure 1This is a flowchart illustrating the automatic repair and feedback generation method for pre-trained language model Verilog code based on data flow guidance according to the present invention.

[0021] Figure 2 This is a flowchart of signal feature similarity calculation according to an embodiment of the present invention;

[0022] Figure 3 This is a flowchart of the signal name mapping strategy according to an embodiment of the present invention;

[0023] Figure 4 The figure shows the experimental results comparing the method of this invention with those of STRIDER. Detailed Implementation

[0024] The technical solution of the present invention will be described below with reference to the accompanying drawings and embodiments.

[0025] This invention provides an automatic Verilog code repair and feedback generation method based on a data flow-guided pre-trained language model. It employs data flow feature extraction and structured matching techniques, combined with a feedback generation mechanism driven by mask prediction and repair processes using a pre-trained language model. By automatically extracting signal-level data flow features from a correct reference program, a signal feature model containing dependent networks is constructed. This model is then recursively matched and pre-repaired with the erroneous program, generating a partial mask sequence which is then fed into the pre-trained language model for accurate patch generation. Furthermore, interpretable instructional feedback is generated using the error types and operational information identified during the repair process, achieving automatic Verilog code repair and assisted learning guidance, significantly improving the repair rate. Compared to STRIDER, this invention's method achieves a 17.65% improvement in absolute repair rate on the CirFix dataset, and is 12.46 times faster in terms of repair efficiency. STRIDER is an automated method for locating and repairing Verilog functional bugs, and is currently considered the best traditional method in the field of non-large language models.

[0026] An overall implementation flow of the method of the present invention is as follows: Figure 1 As shown, it includes the following 4 steps.

[0027] Step 1: Data Flow Parsing and Signal Feature Model Construction and Matching. Execute steps 1.1 and 1.2 on the program to construct signal feature models for all output signals in the program. The signal feature models constructed by the correct program are stored in the historical correct program set. Step 1.3 matches the signal feature models of all output signals of the currently input program with the models in the historical correct program set.

[0028] Step 1.1, Data Flow Parsing. For the currently input error program, the extended Pyverilog tool is first used to parse all output signals to obtain the attributes and data flow tree of each signal. The signal attributes include the signal name, signal width, and signal type. The Pyverilog tool constructs a data flow tree independently for each output signal. The root node of the tree directly determines the logical operation of the output signal. The leaf nodes of the tree are the basic input signals and constants that the output signal depends on, and the intermediate nodes describe the combinational logic relationships between them. Logical operations include, for example, conditional branches or arithmetic operations.

[0029] Step 1.2, Data dependency construction and signal feature model construction.

[0030] For each output signal *v* of the current input program, a depth-first search algorithm is used to traverse the signal's dataflow tree, identifying the signals corresponding to all leaf nodes. These signals are defined as direct dependencies of the output signal *v*, forming a set of direct dependencies. This set reflects the lowest-level input source of signal *v* in the hardware logic and represents the set of signals directly involved in the state changes of signal *v*. Then, dataflow parsing and dependency construction are recursively performed on these dependent signals until no new signals are processed, resulting in signal feature models for all direct or indirect dependencies. Finally, the signal feature model constructed for each signal includes the set of direct dependencies, the dataflow tree, and signal attributes. Traditional methods based on Abstract Syntax Trees (ASTs) cannot effectively express the concurrency relationships of assignment statements in Verilog, while dataflow trees directly depict how signal values ​​are calculated from other signals, reflecting the actual hardware circuit logic to a certain extent.

[0031] Step 1.3, similarity calculation of signal feature models.

[0032] Following steps 1.1 and 1.2, signal feature models for all output signals in the program are constructed. Then, the similarity between each output signal of the current erroneous program and each output signal of the corresponding correct program in the historical correct program set is calculated one by one. The calculation process for the similarity of the signal feature models of the same signal in the two programs is as follows: First, a matching relationship is established between the directly dependent signals of the two signals. Then, the signal feature similarity between the matched signals is calculated. Subsequently, the signal feature similarity of the directly dependent signals is accumulated, and the data flow tree similarity between the two signals is added to obtain the similarity of the signal feature models of the same signal in the two programs. The overall process is as follows: Figure 2 As shown.

[0033] When calculating the feature model similarity of the same signal between the erroneous and correct programs, the directly dependent signals of the two programs are first matched. If the number of dependent signals is different, a structural penalty term is introduced. ) to be corrected, among which and These represent the number of directly dependent signals in the signal feature model of the signal in the erroneous and correct programs, respectively. Then, each directly dependent signal is traversed, and a depth-first search is used to recursively calculate the similarity between the signal features of the directly dependent signals to establish a matching relationship.

[0034] Then, based on the matching relationship between dependent signals, the similarity between dependent signals is accumulated. Next, the dataflow trees of the two feature models are compared to obtain the similarity between the dataflow trees. Finally, the similarity between the final signal feature models is obtained by combining the dependency signal similarity, dataflow tree similarity, and structural penalty term.

[0035] When calculating the similarity of data flow trees, the Zhang-Shasha algorithm is used to calculate the edit distance of the data flow trees, which is then converted into a similarity score. For two data flow trees... Edit distance converted to similarity The calculation formula is:

[0036] ;

[0037] Among them, through The function calculates the total number of nodes in the data stream tree. This process, known as the "distance editing" process, provides a precise matching basis for subsequent pre-repair.

[0038] To address the over-repair issue caused by excessively large edit distances due to differences in signal names when calculating edit distance, a signal name mapping strategy is employed. This strategy standardizes signal names according to their first occurrence order, mapping them to a unified identifier. This ensures that signals with different names receive consistent representation, thus eliminating the interference of naming style differences on similarity calculations. For example... Figure 3 As shown, the signal name mapping strategy follows the depth-first traversal order of the data flow tree. When a signal appears for the first time, its name is replaced with a standardized mapping name, and the number of dependent signals in the signal feature model is counted by a counter.

[0039] Step 1.4: Establish signal pairing relationships.

[0040] Extract all output signals from the erroneous program and the historical correct program set. Using the similarity algorithm in step 1.3, match the output signal v of each erroneous program with the corresponding output signal u of the correct program with the highest similarity, and establish a pairing mapping table. In this embodiment of the invention, a similarity matching threshold is preset; only when the similarity exceeds this threshold is the two signals considered matched. After matching, signal pairs whose highest similarity does not meet the matching threshold need to be repaired.

[0041] Step 2: Pre-repair based on data flow.

[0042] Step 2.1, data dependency repair.

[0043] Based on the signal pairing relationships obtained in step 1, data dependency repair is performed on the output signals of the input program and the correct program. For each matched output signal pair (v, u), the direct dependencies of the output signal v of the incorrect program and the output signal u of the correct program are recursively matched and repaired. The recursive matching and pre-repair of the currently matched signal pair (v, u) includes: if the direct dependencies of the two signals v and u are matched, then the recursive matching and pre-repair is performed again on each matched signal pair; if signal v lacks a direct dependency of signal u, it means that signal v lacks a necessary dependency signal, then the direct dependency of the missing signal u in the correct program and its subtree are inserted into the incorrect program.

[0044] Dependencies form the skeleton of a data flow; if a signal lacks a necessary dependency, a correct data flow tree cannot be obtained. By recursively repairing dependencies, the correctness of the data flow tree is ensured.

[0045] Step 2.2, Data Flow Tree Pre-repair. For each signal pair (a, b) to be repaired, the data flow tree of signal b in the correct program is used to pre-repair the data flow tree of signal a in the incorrect program.

[0046] Data flow tree repair employs a top-down, recursive traversal strategy. The erroneous data flow tree to be repaired and the correct data flow tree are respectively represented by... and Indicates. If and If the root node does not match, the error is considered severe, and the erroneous dataflow tree is directly replaced with the correct one. If the root node matches, the subtree similarity is recursively calculated. If the similarity is below a preset threshold, the entire dataflow tree is replaced; otherwise, the recursive repair continues.

[0047] Step 3: Generate a mask sequence using a partial masking strategy, and generate patches based on a pre-trained language model.

[0048] Because during the repair process, it may be necessary to... Introducing non-existent signals causes subsequent compilation errors. Therefore, a partial masking strategy is adopted to generate mask sequences for prediction by the pre-trained language model. This partial masking strategy only masks the signal names, retaining Verilog keywords such as `if`, `assign`, and `always`. It does not mask explicitly defined signals in each module, such as clock signals (`clk`), input signals, output signals, and reset signals (`rst`), because these signals are explicitly defined at the module interface and do not require model prediction. Furthermore, for signals with highly similar features, the system directly replaces the signal names in the correct code snippet with the corresponding signal names in the erroneous program instead of replacing them with masks, avoiding unnecessary model calls.

[0049] The mask sequence generated in step 2 is input into a pre-trained language model; in this embodiment, the CodeBERT model is used. This model is based on the Transformer architecture and pre-trained using a masked language model (MLM) task, enabling it to understand program code context and predict missing tokens. During the inference phase, the model predicts each mask position sequentially from left to right. During prediction, beam search is used to generate five high-quality candidate patches, retaining multiple candidate paths to generate diverse repair solutions. Beam search is a commonly used search algorithm in sequence generation tasks. Traditional search algorithms, such as depth-first search or breadth-first search, traverse all possible solution spaces to find the optimal solution. While these algorithms can find the optimal result, they are time-consuming and inefficient. Greedy search, on the other hand, only selects the token with the highest probability each time, easily getting trapped in local optima. Beam search retains multiple candidate paths, generating diverse repair solutions and increasing the probability of passing the final test.

[0050] After the patch is generated, if at least one candidate patch passes all test cases, the bug is considered to have been successfully fixed, and the patch is marked as "effective fix".

[0051] Step 4: Generation of structured teaching feedback.

[0052] During the repair process, errors can be categorized into data dependency errors and data flow errors based on the stage at which they occur. Data flow errors can be further divided into three primary types: branching errors, definition errors, and assignment errors. Each of these primary types has various secondary types of errors, as detailed in Table 1.

[0053] Table 1 Error Type Classification

[0054]

[0055] Based on the error type, different feedback templates are designed to generate natural language feedback.

[0056] For data dependency errors, this type of error only has a signal name and no clear error location, so the feedback template is [signal name] + [error type].

[0057] For branch errors, since they contain the specific branch code location, the template is [signal name] + [error location] + [secondary error type]. Assignment errors are similar, with the template being [signal name] + [error location] + [secondary error type].

[0058] The error definition does not specify the location of the error; it only needs to specify the signal and the specific attributes of the error definition. Therefore, the template is [signal name] + [secondary error type].

[0059] Since a single repair process may involve multiple errors, it will generate multiple feedback messages. To avoid overwhelming beginners with too much information at once and causing cognitive strain, this invention designs a comprehensive scoring mechanism. It calculates a score for each feedback message and ultimately outputs only the top 5 highest-scoring messages. The formula for calculating the feedback score is as follows: ,in The scale of the repair can be determined based on the size of the data stream tree being repaired. This indicates the score corresponding to the error type.

[0060] The results indicate that:

[0061] To verify the repair effect of this invention, STRIDER was selected as the baseline method, and a comparison was performed on the public dataset CirFix, which contains 17 faulty procedures. The results are as follows: Figure 4 As shown in the figure. Experimental results show that the absolute repair rate of the present invention reaches 94.11%, which is 17.65% higher than that of STRIDER. In terms of repair efficiency, the average repair time of the present invention is 12.46 times faster than that of STRIDER.

[0062] Except for the technical features described in the specification, all other technologies are known to those skilled in the art. Descriptions of well-known components and technologies are omitted in this invention to avoid redundancy and unnecessary limitation. The embodiments described above do not represent all embodiments consistent with this application. Various modifications or variations that can be made by those skilled in the art without creative effort based on the technical solutions of this invention are still within the protection scope of this invention.

[0063] In general, the various exemplary embodiments of this disclosure can be implemented in hardware or dedicated circuitry, software, firmware, logic, or any combination thereof. Some aspects can be implemented in hardware, while others can be implemented in firmware or software executed by a controller, microprocessor, or other computing device. When aspects of embodiments of this disclosure are illustrated or described as block diagrams, flowcharts, or using some other graphical representation, it will be understood that the blocks, apparatuses, systems, techniques, or methods described herein can be implemented as non-limiting examples in hardware, software, firmware, dedicated circuitry or logic, general-purpose hardware or controllers or other computing devices, or some combination thereof.

Claims

1. A method for automatic repair and feedback generation of Verilog code based on data flow-guided pre-trained language models, characterized in that, Includes the following steps: Step 1: Perform data stream parsing on the input program, construct signal feature models for all output signals in the program, and then calculate the similarity between these models and the signal feature models in the historical correct program set. Based on the similarity, match each output signal of the input program with the corresponding output signal of the correct program. A similarity matching threshold is preset; the two signals are only considered to be matched when the similarity between the signal feature models of the two signals exceeds the threshold. The signal feature model includes the signal's attributes, a data flow tree, and a set of directly dependent signals; wherein, the data flow tree of the output signal takes the logical operation that directly determines the output signal as its root node, and the leaf nodes of the tree are the basic input signals and constants that the output signal depends on. Step 2: Based on the matching relationship between the output signals of the input program and the correct program, recursively match the data dependencies of the input program, locate the semantic error subtree of the input program, and use the correct program to pre-repair the error data stream tree; Step 3: Mask the signal names in the data stream tree of the correct program used for pre-repair, generate a mask code sequence for the correct program used for pre-repair and input it into the pre-trained language model. The pre-trained language model predicts the mask at each position in the mask code sequence. During prediction, multiple candidate patches are generated through beam search. Test cases are executed on the input program after patching by the pre-trained language model. If at least one candidate patch passes all test cases, the input error program is determined to be successfully repaired, and the patch is marked as a valid repair. Step 4: Based on the error types and repair operations identified during the repair process, automatically generate structured feedback information and filter and output the optimal feedback through a comprehensive scoring mechanism.

2. The method according to claim 1, characterized in that, Step 1 includes: obtaining the attributes and data stream tree of each output signal of the input program through data stream parsing, and traversing the data stream tree to identify the direct dependent signals of each output signal.

3. The method according to claim 1, characterized in that, Step 1 includes: calculating the similarity of the signal feature models of the same signal between the input program and the corresponding program in the historical correct program set; The similarity calculation of signal feature models for the same signal in two programs includes: first, determining whether the number of directly dependent signals is the same; if not, introducing a structural penalty term. ), to modify the input program, where and The first part represents the number of directly dependent signals of the signal in the input program and the second part represents the number of directly dependent signals of the signal in the two programs. The third part represents the establishment of a matching relationship between the directly dependent signals of the signal in the two programs and the calculation of the signal feature similarity between the matched signals. The fourth part represents the sum of the structural penalty term, the signal feature similarity between the matched directly dependent signals, and the similarity of the data flow tree of the signal in the two programs, which is taken as the similarity of the signal feature model of the signal in the two programs.

4. The method according to claim 1 or 3, characterized in that, Step 1 includes: when calculating the similarity of signal feature models, a signal name mapping strategy is adopted to make signals with different names have consistent representations; the signal name mapping strategy refers to mapping the names of the same signals to a standardized identifier according to the order in which the signals appear.

5. The method according to claim 1, characterized in that, Step 2 includes: For each matched signal pair (v, u), recursively match and repair the data dependencies: determine whether the direct dependencies of the input program's output signal v and the correct program's output signal u are matched. If so, continue recursively matching the data dependencies of each matched pair of direct dependencies of v and u. Otherwise, if signal v lacks a direct dependency of signal u, insert the missing direct dependency x of signal u in the correct program and the data stream tree of x into the input program. For each signal pair (a, b) to be repaired, the data stream tree of signal b in the correct program is used to pre-repair the data stream tree of signal a in the input program. This includes: if the root nodes of the data stream tree of signal a and the data stream tree of signal b do not match, the data stream tree of signal a is directly replaced by the data stream tree of signal b; if the root nodes match, the similarity of the subtrees and the repair operation are recursively calculated. The repair operation means that when the similarity of the subtrees is lower than a preset threshold, the subtree of signal a is replaced by the corresponding subtree of signal b.

6. The method according to claim 1, characterized in that, In step 3, a partial masking strategy is used to mask and replace the signal names in the data stream tree, including: masking and replacing only the signal names in the data stream tree, while fully preserving all Verilog keywords, operators, and syntax structures; not masking explicitly defined global signals; and for signals that exceed the similarity threshold, directly replacing the signal name with the corresponding signal name in the input program, instead of replacing it with a mask.

7. The method according to claim 1, characterized in that, Step 4 includes: Based on the stage at which the error occurs, errors are categorized into two types: data dependency errors and data flow errors. Data flow errors are further divided into three primary types: branching errors, definition errors, and assignment errors. Different feedback templates are designed for different error types to generate natural language feedback, and a score is calculated for each feedback. ,in Indicates the scale of the repair. This indicates the score corresponding to the error type.