Light-emitting field effect transistor neuro-morphic display device and preparation method and application thereof

Abstract

The application discloses a light-emitting field effect transistor (LEFET) neuromorphic display device, a preparation method and application thereof. The device comprises a storage functional layer, a tunneling layer, a semiconductor charge transport layer and a light-emitting unit arranged in sequence from bottom to top. The neuromorphic display device is a close coupling of neuromorphic technology and display technology, and is expected to break through the bottleneck of traditional display technology. The application realizes the interactive mapping of optical signals and electrical signals through a synaptic weight regulation mechanism, promotes the transformation of display technology from static output to dynamic self-adaptation, and establishes a "perception-decision-response" closed-loop technology for intelligent display. The neuromorphic display device provides a brand-new device architecture, and will promote the development of a "sensing, storage, calculation and display" integrated system. The construction of a device with excellent comprehensive performance lays a theoretical and technical foundation for the next generation of intelligent display technology, and is expected to promote the innovative development of the cross field of organic electronics and artificial intelligence.

Description

Technical Field

[0001] This invention belongs to the field of electroluminescent devices, specifically relating to a neuromorphic display device based on a light-emitting field-effect transistor, its fabrication method, and its application. Background Technology

[0002] Neuromorphic display is a product of the organic integration of neuromorphic technology and display technology. Drawing inspiration from biological sensory systems (vision, touch, etc.), neuromorphic technology efficiently and with low power consumption completes information generation, storage, processing, addressing-driven interaction, and light-emitting display. This aims to overcome the shortcomings of traditional display technologies in terms of integration, processing speed, layout and wiring, and power consumption, and endows display devices with learning and thinking capabilities, giving them certain data processing capabilities and stronger environmental adaptability. It is considered one of the most promising approaches to breaking through the bottlenecks of display technology. Currently, researchers have implemented neuromorphic display functions based on light-emitting diodes (LEDs) or by connecting nanogenerators and memristors in series with LEDs. However, stereoscopic integrated display technology based on memristors or thin-film transistor backplanes driving organic light-emitting diodes suffers from complex fabrication processes and high costs. Therefore, developing novel device architectures with intrinsic "sensing, storage, computing, and display" integration is an essential path to breaking through the bottlenecks of intelligent display technology.

[0003] Light-emitting transistors (LEDs) are miniaturized and revolutionary organic optoelectronic devices that integrate the switching and current signal amplification functions of organic field-effect transistors (OFETs) and the light-emitting display functions of organic light-emitting diodes (OLEDs). They have advantages such as simplified fabrication processes, multi-functional integration, and high photoelectric conversion efficiency. Therefore, building integrated "sensing, storage, computing, and display" functional devices based on LEDs is expected to break the physical boundaries between the sensing module, driving module, and display module in traditional display technology, achieving close coupling, complementary advantages, and collaborative work among them, and constructing an intelligent, efficient, and energy-saving neuromorphic display system. Summary of the Invention

[0004] The present invention provides a neuromorphic display device, comprising a storage function layer, a tunneling layer and a semiconductor charge transport layer arranged sequentially from bottom to top.

[0005] According to an embodiment of the present invention, the device further includes a light-emitting unit disposed on a semiconductor charge transport layer.

[0006] According to an embodiment of the present invention, the color of the light-emitting unit is adjustable.

[0007] According to an embodiment of the present invention, the device further includes a dielectric layer disposed below the storage functional layer.

[0008] According to an embodiment of the present invention, the device further includes a gate electrode disposed beneath the dielectric layer.

[0009] According to an embodiment of the present invention, the device further includes a source electrode disposed on a semiconductor charge transport layer.

[0010] According to an embodiment of the present invention, the device further includes a drain electrode disposed on a semiconductor charge transport layer or a light-emitting unit.

[0011] According to an embodiment of the present invention, the light-emitting unit includes a charge buffer layer and a light-emitting layer.

[0012] According to an embodiment of the present invention, the light-emitting unit may further include an electron transport layer and / or a hole transport layer. In one embodiment of the present invention, the light-emitting unit includes a charge buffer layer, a hole transport layer, a light-emitting layer, and an electron transport layer arranged sequentially from bottom to top.

[0013] In one embodiment of the present invention, the light-emitting unit includes a charge buffer layer, a light-emitting layer and an electron transport layer arranged sequentially from bottom to top.

[0014] According to an exemplary embodiment of the present invention, the neuromorphic display device specifically includes: Gate electrode; A dielectric layer located above the gate electrode; A storage layer located above the dielectric layer; A tunneling layer located above the storage function layer; A semiconductor charge transport layer located above the tunneling layer; The source electrode and charge buffer layer are located above the semiconductor charge transport layer; A hole transport layer located above the charge buffer layer; A light-emitting layer located above the hole transport layer; An electron transport layer located above the light-emitting layer; The drain electrode is located above the electron transport layer.

[0015] According to an exemplary embodiment of the present invention, the neuromorphic display device specifically includes: Gate electrode; A dielectric layer located above the gate electrode; A storage layer located above the dielectric layer; A tunneling layer located above the storage function layer; A semiconductor charge transport layer located above the tunneling layer; The source electrode and charge buffer layer are located above the semiconductor charge transport layer; A light-emitting layer located above the charge buffer layer; An electron transport layer located above the light-emitting layer; The drain electrode is located above the electron transport layer.

[0016] According to an exemplary embodiment of the present invention, the neuromorphic display device specifically includes: Gate electrode; A dielectric layer located above the gate electrode; A storage layer located above the dielectric layer; A tunneling layer located above the storage function layer; A semiconductor charge transport layer located above the tunneling layer; The source electrode and drain electrode are located above the semiconductor charge transport layer.

[0017] According to an embodiment of the present invention, the neuromorphic display device is a neuromorphic display device that integrates the functions of "sensing, storage, calculation and display".

[0018] According to an embodiment of the present invention, the gate electrode is selected from any one or more of the following substances: metals, such as aluminum, magnesium, calcium, gold, potassium, molybdenum, silver, titanium, nickel, indium, yttrium, lithium, tin, gadolinium, iron, and lead; alloys of the aforementioned metals; multilayer materials, such as LiF / Al, LiO2 / Al, or LiF / Al / Ag; and metal oxides, such as ITO, IZO, and MoO. x wait.

[0019] According to an embodiment of the present invention, the dielectric layer can be made of inorganic and / or organic materials. Preferably, the thickness of the dielectric layer is between 10 and 800 nm.

[0020] Furthermore, the organic material is selected from one or more of the following substances: PVA, CYTOP, and PMMA, etc.

[0021] Furthermore, the inorganic material is selected from one or more of the following substances: Al2O3, SiO2.

[0022] According to an embodiment of the present invention, the storage functional layer has excellent charge storage performance and includes an organic storage functional layer and an inorganic storage functional layer.

[0023] In some embodiments, the material of the organic storage functional layer is selected from one or more of the following substances: organic small molecule materials, organic polymer materials, and organic two-dimensional materials; the material of the inorganic storage functional layer is selected from one or more of the following substances: inorganic two-dimensional materials and organic-inorganic hybrid materials, metal nanoparticles and / or metal oxide nanoparticles.

[0024] Preferably, the metal nanoparticles and / or metal oxide nanoparticles are selected from one or more of the following substances: Au nanoparticles, Ag nanoparticles, Pt nanoparticles, Fe nanoparticles, FePt nanoparticles, CoFe2O4 nanoparticles, HfO2 nanoparticles, TiO2 nanoparticles, NiO nanoparticles, Fe3O4, Fe2O3 nanoparticles, MnO2 nanoparticles, and Co3O4 nanoparticles.

[0025] Preferably, the organic small molecule material is selected from one or more of the following substances: diarylethene derivatives, quinone molecules, azobenzene derivatives, tetrathiofulvalene (TTF) and its derivatives, viologen derivatives, porphyrin / phthalocyanine derivatives, rotaxanes and sesquicarbons, etc.

[0026] Preferably, the organic polymer material is selected from one or more of the following substances: polymers containing azobenzene, polymers containing diarylene, spiropyran copolymers, polymer composites containing fullerene / nanoparticles, block copolymers, polyvinylidene fluoride (PVDF) and its copolymers (such as P(VDF-TrFE)), polytrifluoroethylene, ferroelectric polymers such as trifluoroethylene copolymer P(VDF-TrFE), phase change polymers containing chalcogens, and polymer electrets (PVA, PS, PVP, PVPyr), etc.

[0027] Preferably, the organic two-dimensional material is selected from one or more of the following substances: metal-organic framework materials, covalent organic framework materials, and hydrogen-bonded organic framework materials.

[0028] Preferably, the inorganic two-dimensional material is selected from one or more of the following substances: graphene oxide, reduced graphene oxide, transition metal dichalcogenides (TMDCs, MX2), graphene, carbides and nitrides (MXenes), hexagonal boron nitride, layered double hydroxides (LDHs, such as NiFe-LDH), and black phosphorus.

[0029] Preferably, the organic-inorganic hybrid material is selected from one or more of the following substances: coordination polymers and perovskites.

[0030] According to an embodiment of the present invention, the material of the tunneling layer includes at least one of polystyrene (PS), polymethyl methacrylate (PMMA), and polyvinyl alcohol (PVA).

[0031] Preferably, the thickness of the tunneling layer is between 10 and 20 nm.

[0032] According to an embodiment of the present invention, the material of the semiconductor charge transport layer includes p-type charge transport semiconductor material, n-type charge transport semiconductor material, and bipolar charge transport semiconductor material.

[0033] Preferably, the p-type transmission semiconductor material is selected from one or more of the following substances: 2,6-bis(p-hexylbenzene)anthracene (C6-DPA), 2,7-dioctyl[1]benzothiophene[3,2-b]benzothiophene (C8-BTBT), 2,6-dinaphthylanthracene (dNaAnt), 2,6-bis(p-octylhexylbenzene)anthracene (C8-DPA), 2,6-bis(p-decylbenzene)anthracene (C8-DPA), C8-dioctyl[1]benzothiophene[3,2-b]benzothiophene (C8-BTBT), 2,6-dinaphthylanthracene (dNaAnt), 2,6-bis(p-octylhexylbenzene)anthracene (C8-DPA), 2,6-bis(p-dec ... 10 -DPA), 2,6-diphenylanthracene (DPA), poly(3-hexylthiophene) (P3HT), 9,9-di-n-octylfluorene-benzothiadiazole copolymer (F8BT), poly[2,5-(2-octyldodecyl)-3,6-dionepyrrolopyrrole-alt-5,5-(2,5-di(thiophen-2-yl)thiopheno[3,2-b]thiophene)] (DPP-DTT), 6,13-bis(triisopropylsilylethynyl)pentabenzene (TIPS-pentabenzene), Pentacene, 2-phenyl-5-[4'-(5''-phenyl-2''-thiophenyl)phenyl]thiophene, tin-based sulfides and copper-based sulfides.

[0034] Preferably, the n-type transmission semiconductor material is selected from one or more of the following substances: N,N'-di(tetrazyl)-3,4,9,10-perylenetetracarboxylic acid diimide, indium oxide, indium gallium zinc oxide, zinc oxide, N,N'-bis(n-octyl)-1,6,7,12-tetra(4-cyanophenoxy)-3,4,9,10-perylenetetracarboxylic acid diimide, N,N'-bis(2-hexyldecyl)-2,6-bis(trimethylsilylethynyl)-1,4,5,8-naphthalenetetracarboxylic acid diimide, 3,6-bis(5-(4-cyanophenyl)thiophen-2-yl)-2,5-bis(2-ethylhexyl)-2,5-dihydropyrrolo[3,4-c]pyrrole-1,4-dione, 5'-(1,2-dihydromethylene

[60] fullerene-C 60 -I h )-[1,1':4',1''-terphenyl]-2,2''-diyl)bis[benzo[d]thiophene], poly{[N,N'-bis(2-octyldodecyl)-1,4,5,8-naphthalenedimide-2,6-diyl]-alt-5,5'-(2,2'-bithiophene)}, poly{[N,N'-bis(octadecyl)-3,4,9,10-perylenediimide-1,6,7,12- [Tetrayl]-alt-2,5-thiophene}, poly(benzo[1,2-d:4,5-d']bisimidazolebenzophenanthrene-2,6-diyl) and poly{[4,8-bis(5-(2-ethylhexyl)thiophene-2-yl)benzo[1,2-b:4,5-b']dithiophene]-alt-[5,6-difluoro-4,7-bis(4-hexylthiophene-2-yl)-2,1,3-benzothiadiazole]}.

[0035] Preferably, the bipolar transmission semiconductor material is selected from one or more of the following substances: polypyrrolopyrroledione-tetrathiophene (PDPP-4T), poly[{2,5-bis(2-hexyldecyl)-2,3,5,6-tetrahydro-3,6-dionepyrrolo[3,4-c]pyrrole-1,4-diyl}-alternating-{[2,2'-(1,4-phenylene)bisthiophene]-5,5'-diyl}], poly[(dithiophene)-alternating-(2,5-bis(2-octyldodecyl)-3,6-bis(thienyl)-pyrrolopyrroledione)], poly(3-hexylthiophene) (P3HT), 9,9-di-n-octylfluorene-benzothiadiazole copolymer (F8BT).

[0036] Furthermore, the preferred semiconductor charge transport layer material has a carrier mobility of not less than 0.1 cm⁻¹. 2 V -1 s -1 .

[0037] According to an embodiment of the present invention, the charge buffer layer can be made of inorganic semiconductor materials and / or organic semiconductor materials. Preferably, the charge buffer layer is made of any one or more of the following materials: 4,4'-cyclohexylbis[N,N-di(4-methylphenyl)aniline] (TAPC) and N,N'-diphenyl-N,N'-(1-naphthyl)-1,1'-biphenyl-4,4'-diamine (NPB).

[0038] Furthermore, the mobility of the charge buffer layer is 2-5 orders of magnitude smaller than that of the semiconductor charge transport layer.

[0039] Furthermore, the light-emitting layer can be prepared from a light-emitting material with a known light-emitting mechanism in the art, for example, the light-emitting material is selected from one or more of fluorescent materials, phosphorescent materials and thermally active delayed fluorescence materials.

[0040] Preferably, the fluorescent material is selected from one or more of 2'-(diphenylphospho)-1-phenyl-1H-spiro[9,9'-fluorene] (POSTF), tris(8-hydroxyquinoline)aluminum (Alq3), 9,10-diphenylanthracene (ADP), 1,1'-(2,5-dimethyl-1,4-phenylene)dipyrene (DMPPP), 5,6,11,12-tetraphenyl[C]fluorene (Rubrene), 4,4',4''-tris(1-pyrene)triphenylamine (TPyPA), and 9-(10-phenylanthracene-9-yl)spiro[benzo[C]fluorene-7,9'-fluorene (BH-9PA).

[0041] Preferably, the phosphorescent material is selected from one or more of the following: bis(1-phenyl-isoquinoline)(acetylacetone)iridium(III) (Ir(piq)2acac), bis(2,3-diphenylquinoxaloline)iridium(Ir(mphmq)2tmd), tris(2-phenylpyridine)iridium(Ir(ppy)3), bis(2-phenylpyridine-C2,N)iridium(Ir(ppy)2(acac)), and iridium(III)tris[N,N'-diphenylbenzimidazole-2-ylidene-C2,C2'] (Ir(dpbic)3).

[0042] Preferably, the thermally active delayed fluorescence material is selected from tert-butyl-2,12-bis(4-tert-butylphenyl)-5,9-dihydro-5,9-diaza-13b-boronnaphthalene[3,2,1-de]anthracene. t -DABNA), 3,5-bis(9H-carbazol-9-yl)benzonitrile (3,5-2CzBN), 9-[3-(9H-carbazol-9-yl)phenyl]-9H-carbazol-3-nitrile (mCPCN), dihydroacenaphthene-nitrogen heterocyclic compounds (tCzphB-Fl), 10-(4-(4,6-diphenyl-1,3,5-triazol-2-yl)phenyl)-9,9-dimethyl-9,10-dihydroacridine (DMAC-TRZ), 5-(3-(9-phenyl-9-yl)... One or two of the following: H-carbazole-3-yl)phenyl)-5H-pyrido[3,2-B]indole (DCb-PCz), 9,9'-(5-(4,6-diphenyl-1,3,5-triazin-2-yl)-1,3-phenylene)bis(9Hcarbazole) (DCzTRZ), 9-(4-(4,6-diphenylpyrimidin-2-yl)phenyl)-9H-carbazole (Cz-Ph-DRZ), and (N-phenoxazine)phenyl]sulfone (PXZ-DPS).

[0043] Furthermore, the light emitted by the light-emitting unit has a spectrum between 390 nm and 780 nm.

[0044] For example, the light-emitting layer can be formed from a single light-emitting material or from a guest material doped with a host material. In this invention, the term "doping" refers to doping a guest material into a host material, wherein the mass of the guest material is less than 30 wt% of the host material, and the guest material and the host material are different.

[0045] According to an embodiment of the present invention, the single luminescent material is preferably Alq3, DPA, or dNaAnt; the guest dopant in the guest dopant host material can be one or more substances, and the host material can be a single substance or a mixture.

[0046] For example, the guest doped material is preferably t-DABNA, 9,9'-(5-(4,6-diphenyl-1,3,5-triazin-2-yl)-1,3-phenylene)bis(9H-carbazole), 1-(4,6-diphenyl-1,3,5-triazin-2-yl)-1H-phenoxazine, tCzphB-Fl, 1,4-bis(10-phenylanthracene-9-yl)benzene (BD1), 2,6-bis(9H-carbazole-9-yl)-4-phenylpyridine-3,5-dicarboxynitrile, dinaphthalene Perylene, 3,6-dibenzoyl-4,5-di(1-methyl-9-phenyl-9H-carbazolyl)-2-ethynylbenzylnitrile, bis(dimethyl-dihydroacrylidinephenylsulfone) (DMAC-DPS), 2,6-di(9H-carbazol-9-yl)-4-phenylpyridine-3,5-dicarboxynitrile, bis[2-(5-cyano-4,6-difluorophenyl)pyridine-C2,N)]pyridinecarboxyiridium (FCNirPic), 9-[2,3-bis(9H-carbazol-9-yl)-5 -(diphenyl-1,3,5-triazin-2-yl)phenyl]-9H carbazole, iridium(III)bis[(2,3,4-difluorophenyl)-pyridine-N,C2']pyridinecarboxylate (Ir(tfpd)2pic), 1-(4-(4,6-diphenyl-1,3,5-triazin-2-yl)phenyl)-1H-spiro[[idine-9,9'-fluorene, Ir(mphmq)2tmd, 4,4'-bis[4-(di-p-toluene)]-9H carbazole, iridium(III)bis[(2,3,4-difluorophenyl) ...), 1-(4,4'-bis[4-(di-p-toluene)]-9H carbazole, iridium(III)bis[(2,3,4-difluorophenyl)-N,C2']pyridinecarboxylate (Ir(tfpd)2pic), 1-(4,6-diphenyl-1,3,5-triazin-2-yl)phenyl)-1H-spiro[[ [[4,6-diphenyl-1,3,5-triazin-2-yl]biphenyl (DPAVBi), TTPA, 9,9'-(5-(4,6-diphenyl-1,3,5-triazin-2-yl)-1,3-phenyl)bis(9H-carbazole) (DCzTrz), 10-(4-(4,6-diphenyl-L-1,3,5-triazin-2-yl)phenyl)-10-hydro-phenoxazine, 5,5-dibromo-4,4-tetracosyl-2,2-bithiophene (fac-Ir(dp)] bic)3), Ir(ppy)3, 5,10-bis(4-(9H-carbazole-9-yl)-2,6-dimethylphenyl)-5,10-dihydroboronanthracene, tris[2-(p-tolyl)pyridine]iridium(III) (Ir(mppy)3), 5,10-bis(4-(3,6-di-tert-butyl-9H-carbazole-9-yl)-2,6-dimethylphenyl)-5,10-dihydroboronanthracene, Ir(ppy)2acac , bis(2-(naphthyl-2-yl)pyridine)(acetylacetone)iridium(III)(Ir(npy)2acac), bis(4-(9,9-dimethyl-acetyl-10(9H)-yl)phenyl)methyl ketone, tris[2-(3-methyl-2-pyridyl)phenyl]iridium(Ir(3mppy)3), TXO-PHCZ, bis(2-(3,5-dimethylphenyl)quinoline-C2,N')(acetylacetone)iridium(III) (Ir(dmpq)2acac), 2,6-bis[4-diphenylaminophenyl]-9,One or more of the following: 10-anthraquinone, bis(2-(2'-benzothiophene)-pyridine-N,C3')iridium(acetylacetone) (Ir(btp)2(acac)), 4-(dicyanomethylene)-2-methyl-6-[2-(2,3,6,7-tetrahydro-1H,5H-benzo[ij]quinazin-9-yl)vinyl]-4H-pyran (DCM2), 5,6,11,12-tetraphenylbenzotetraphenyl (Rubrene), tris(2-(3,5-dimethylphenyl)quinoline-C2,N')iridium(III) (Ir(dmpq)3), and 2,8-di-tert-butyl-5,11-bis(4-tert-butylphenyl)-6,12-diphenylbenzotetraphenyl (TBRb); For example, the preferred host materials are 3,3′-bis(9H-carbazole-9-yl)biphenyl, 9,9′-(1,3-phenyl)bis-9H-carbazole (mCP), bis[2-((oxo)diphenylphosphino)phenyl] ether (DPEPO), 4,4′-bis(9-carbazole)biphenyl, 4,4′-bis(2,2-diphenyl-vinyl-1-yl)-4,4′-dimethylphenyl (p-DMDPVBi), 4,4′-bis(2,2-stilbene)-1,1′-biphenyl (DPVBi), 2-tert-butyl-9,10-bis(2-naphthyl)anthracene (TBADN), diphenyl[4-(triphenylsilyl)phenyl]phosphine oxide (TSPO1), 3-(3-(9H-carbazole-9-yl)phenyl)benzofuran[2,3-b]pyridine (PCz-BFP), 2, 4,6-Tris[3-(diphenylphosphino)phenyl]-1,3,5-triazole (PO-T2T), 2,4,6-tris(3-(carbazole-9-yl)phenyl)-1,3,5-triazine (TCPZ), 4,4'-bis(triphenylsilyl)-1,1'-biphenyl (BSB), 2,7-bis[9,9-di(4-methylphenyl)fluorene-2-yl]-9,9-di(4-methyl)fluorene-2-yl] One or more of the following: 3',3'',3'''-(1,3,5-triazine-2,4,6-triyl)tris(([1,1'-biphenyl]-3-nitrile))(CN-T2T) and 10-(4-(4,6-diphenyl-1,3,5-triazol-2-yl)phenyl)-9,9-dimethyl-9,10-dihydroacridine (DMAC-TRZ).

[0047] According to an embodiment of the present invention, a hole transport layer refers to a layer formed of material used for hole transport, wherein its highest occupied molecular orbital (HOMO) energy level matches the HOMO energy level of adjacent layers to facilitate hole injection and transport. The hole transport layer material includes, but is not limited to, aromatic amine compounds, carbazole compounds, and their derivatives.

[0048] According to embodiments of the present invention, an electron transport layer refers to a layer formed of material used for electron transport, wherein its lowest unoccupied molecular orbital (LUMO) energy level matches the LUMO energy level of the adjacent layer to facilitate electron injection and transport. The electron transport layer material includes, but is not limited to, compounds containing electron-deficient heterocycles, such as small organic molecules or polymers containing pyridine, triazine, triazole, oxadiazole, imidazole, phospho groups, etc.

[0049] In one embodiment of the present invention, each functional layer in the light-emitting unit can be prepared by vacuum evaporation or spin coating. For example, the spin coating speed can be 1000~5000 rpm, such as 3000 rpm; the spin coating time can be 10s~300s, such as 1 minute.

[0050] In one embodiment of the present invention, the light-emitting unit comprises, from bottom to top, a charge buffer layer (thickness of 10-100 nm, for example 40 nm; material selected from 4,4'-cyclohexylbis[N,N-di(4-methylphenyl)aniline](TAPC)), a hole transport layer (thickness of 5-20 nm, for example 10 nm; material selected from 7,7,8,8-tetrasubstituted spiroxazinofo[1,3]oxazin-2-tetracarboxylic acid (TcTa)), and a light-emitting layer (thickness of 10-50 nm, for example 20 nm; material selected from Ir(ppy)3 and CBP, preferably Ir(ppy)3). The CBP consists of a molar ratio of (5~20%):(80~95%), for example, 10%:90%, and an electron transport layer (thickness of 10~100nm, for example, 40nm; material selected from [2,4,6-trimethyl-3-(3-pyridyl)phenyl]borane (3TPYMB)).

[0051] In one embodiment of the present invention, the light-emitting unit is composed of a charge buffer layer (material selected, for example, from poly(4-butyl-N,N-diphenylaniline) (PTPD)), a light-emitting layer (material selected, for example, from polyvinylcarbazole (PVK) and Ir(ppy)2acac, preferably with a molar ratio of PVK to Ir(ppy)2acac of (5~20%):(80~95%), for example 10%:90%), and an electron transport layer (material selected, for example, from 1,3,5-tris[(3-pyridyl)-3-phenyl]benzene (TmPyPB)).

[0052] According to an embodiment of the present invention, the source electrode and the drain electrode are independent of each other and include, but are not limited to, one or more of the following substances: multilayer materials (e.g., LiF / Al / Ag, LiF / Al or LiO2 / Al), metals (e.g., gold, silver, aluminum, nickel, iron, tin, lead, calcium, sodium, potassium, titanium, indium, yttrium, lithium or gadolinium).

[0053] According to embodiments of the present invention, the preparation methods of the storage functional layer include, but are not limited to: spin coating, solution shearing, interface-assisted methods (solid-gas interface, solid-liquid interface, liquid-liquid interface, gas-liquid interface) and vacuum coating.

[0054] According to an exemplary embodiment of the present invention, the method for preparing the storage functional layer is selected from one of the following methods: Method 1: Prepare a solution of a certain concentration of the material for the storage functional layer, and spin-coat it onto the dielectric layer to obtain the storage functional layer; Method 2: Dissolve the material of the storage functional layer in an organic solvent, drop the resulting solution onto a support substrate with a dielectric layer, and shear the dropped solution into a film by controlling the speed of the scraper to obtain the storage functional layer; Method 3: Dissolve the material of the storage functional layer in an organic solvent, drop the resulting solution onto a support substrate with a dielectric layer, allow the solvent to evaporate, and form a film at the solid-gas interface / solid-liquid interface to obtain the storage functional layer; or drop the resulting solution onto the surface of water, wait for the solvent to completely evaporate, and obtain the storage functional layer at the gas-liquid interface, then transfer it to the support substrate with a dielectric layer; or add an organic solution containing the storage functional layer material in an amount equal to the volume of water onto the surface of water, let it stand for a period of time, obtain the storage functional layer at the liquid-liquid interface, and then transfer it to the support substrate with a dielectric layer. Method 4: In the vapor deposition chamber, the storage functional layer is obtained by depositing the material of the storage functional layer on the substrate with the dielectric layer through vacuum evaporation deposition.

[0055] According to an embodiment of the present invention, the tunneling layer is spin-coated onto the storage functional layer using a spin coating method.

[0056] According to embodiments of the present invention, the methods for preparing the semiconductor charge transport layer include, but are not limited to: physical vapor transport, spin coating, vacuum evaporation deposition, solution epitaxial growth, and solution shearing.

[0057] According to an exemplary embodiment of the present invention, the method for fabricating the semiconductor charge transport layer is selected from one of the following methods: Method 1: Place the semiconductor charge transport layer material and substrate, which are placed in a quartz boat, into a tube furnace, set the temperature, and after the set program is completed, remove the substrate to obtain a semiconductor crystal, and transfer it onto the tunneling layer. Method 2: Dissolve the semiconductor charge transport layer material in an organic solvent and spin-coat it onto the tunneling layer. Method 3: In the evaporation chamber, a semiconductor charge transport layer material is deposited on the tunneling layer by vacuum evaporation deposition. Method 4: Dissolve the semiconductor charge transport layer material in an organic solvent, drop the resulting organic solution onto the water surface to spread it evenly, and after the solvent evaporates, obtain a semiconductor material film, which is then transferred onto the tunneling layer to complete the preparation of the semiconductor charge transport layer. Method 5: Dissolve the material of the semiconductor charge transport layer in an organic solvent, drop the resulting semiconductor solution onto the tunneling layer, and slowly shear the semiconductor thin film transport layer by controlling the shearing speed of the scraper.

[0058] According to an embodiment of the present invention, the source electrode and the drain electrode may be selected from at least one of vacuum evaporation, electron beam deposition, magnetron sputtering and inkjet printing.

[0059] According to an embodiment of the present invention, when a continuous optical pulse or electrical pulse is applied to the obtained device, the device exhibits volatile or non-volatile storage / emission behavior.

[0060] According to embodiments of the present invention, volatile or non-volatile storage / emission behavior is further combined with neuromorphic technology to achieve neuromorphic display functionality.

[0061] The present invention also provides a method for fabricating the above-mentioned neuromorphic display device, comprising fabricating a storage functional layer, a tunneling layer and a semiconductor charge transport layer sequentially from bottom to top.

[0062] According to an embodiment of the present invention, the fabrication method further includes fabricating a light-emitting unit on a semiconductor charge transport layer.

[0063] According to an embodiment of the present invention, the fabrication method further includes fabricating a dielectric layer below the storage functional layer.

[0064] According to an embodiment of the present invention, the fabrication method further includes fabricating a source electrode on the semiconductor charge transport layer.

[0065] According to an embodiment of the present invention, the fabrication method further includes fabricating a drain electrode on the semiconductor charge transport layer or on the light-emitting unit.

[0066] According to an embodiment of the present invention, the preparation method further includes preparing a gate electrode.

[0067] The beneficial effects of this invention are: (1) The neuromorphic display device described in this invention is a close coupling of neuromorphic technology and display technology, and is expected to break through the bottleneck of traditional display technology; (2) The neuromorphic display device described in this invention realizes the interactive mapping of optical signals and electrical signals through the synaptic weight control mechanism, promotes the transformation of display technology from static output to dynamic adaptation, and establishes the "perception-decision-response" closed-loop technology of intelligent display.

[0068] (3) The neuromorphic display device described in this invention provides a novel device architecture, which will promote the development of integrated systems that combine sensing, storage, computing, and display. The construction of a device with excellent comprehensive performance lays the theoretical and technical foundation for the next generation of intelligent display technology, and is expected to promote innovative development in the intersection of organic electronics and artificial intelligence. Attached Figure Description

[0069] Figure 1 (A), (B), and (C) are schematic diagrams of the structure of a neuromorphic display device with horizontal transmission and vertical top emission, horizontal transmission and horizontal top emission, and horizontal transmission and vertical bottom emission, respectively.

[0070] Figure 2 In the middle, (A), (B), and (C) are the current and brightness transfer curves and luminescence photographs of the neuromorphic display device prepared based on Example 1, respectively.

[0071] Figure 3 In the middle, (A), (B), and (C) are the current and brightness transfer curves and luminescence photographs of the neuromorphic display device prepared based on Example 2, respectively.

[0072] Figure 4 In the middle, (A), (B), and (C) are the current and brightness transfer curves and luminescence photographs of the neuromorphic display device prepared based on Example 3, respectively.

[0073] Figure 5 The diagram shows the simulated effect of synaptic plasticity function of the neuromorphic display device in Example 2; where (A) is a diagram showing the change of current and brightness over time under a single pulse; (B) is a photograph of the device emitting light at different times after the pulse is applied; and (C) is a diagram showing the variation of brightness and photocurrent under a double pulse. Detailed Implementation

[0074] The present invention will be further illustrated below with reference to specific embodiments. It should be understood that these embodiments are for illustrative purposes only and are not intended to limit the scope of protection of the present invention. Furthermore, it should be understood that after reading the disclosure of this invention, those skilled in the art can make various modifications or alterations to the present invention, and these equivalent forms also fall within the scope of protection defined by this invention.

[0075] Unless otherwise specified, the experimental methods used in the following examples are conventional methods; unless otherwise specified, the reagents and materials used in the following examples are commercially available.

[0076] Example 1 The neuromorphic display device is fabricated using a vacuum evaporation method, as follows: 1) Gate electrode treatment for bottom-emitting devices: The glass / ITO substrate was sequentially sonicated for 10 minutes each in hexane, chloroform, and isopropanol solvents, then rapidly dried with nitrogen gas, and cleaned for 10 minutes in an O2 plasma cleaner (80 W) to remove residual organic solvents and make the substrate hydrophilic. ITO was used as the gate electrode in this example.

[0077] 2) Fabrication of the dielectric layer: PVA solid was dissolved in deionized water and stirred thoroughly (800 rpm) to obtain a concentration of 58 mg / mL. -1 Before spin coating, a 50% glutaraldehyde aqueous solution was added to the PVA solution at a volume ratio of 1:80 to the glutaraldehyde aqueous solution.

[0078] Spin-coat the prepared Crosslinked-PVA solution (C-PVA) onto the pre-treated ITO substrate (4200 rpm, 1 minute) and anneal at 100°C for 90 minutes. Then spin-coat the C-PVA with CYTOP dilution (purchased directly) onto the substrate (5000 rpm, 1 minute) and anneal at 100°C for 30 minutes.

[0079] 3) Fabrication of the storage functional layer: A 5 nm thick gold nanoparticle (Au) was deposited on the substrate obtained in step 2) using a vacuum deposition machine as a storage functional layer.

[0080] 4) Preparation of the tunneling layer: An organic solution of PMMA / PS (PMMA and PS concentrations of 6 mg / mL, solvent: chlorobenzene) was prepared and a PMMA / PS tunneling layer with a thickness of 10 nm was spin-coated onto the storage functional layer by spin coating (4000 rpm, 1 min). After spin coating, annealing was performed at 80 °C for 2 h.

[0081] 5) Fabrication of the charge transport layer C8-BTBT: The metal mask is fixed to the substrate prepared in step 4), and a 50 nm thick C8-BTBT is evaporated on it using a vacuum coating machine.

[0082] 6) Fabrication of the source electrode: Replace the mask and fix it with the substrate prepared in step 5). Then, use a vacuum deposition machine to sequentially deposit 2 nm of MoO3 and 40 nm of Au as source electrodes on it.

[0083] 7) Fabrication of light-emitting units In this embodiment, the light-emitting unit includes a charge buffer layer TAPC, a hole transport layer 7,7,8,8-tetrasubstituted spiroxazino[1,3]oxazin-2-tetracarboxylic acid (TcTa), a light-emitting layer 10%Ir(ppy)3:90%CBP (10% Ir(ppy)3:90%CBP means that the molar ratio of Ir(ppy)3 to CBP is 10%:90%), and an electron transport layer tris[2,4,6-trimethyl-3-(3-pyridyl)phenyl]borane (3TPYMB). The specific process flow is as follows: Replace the mask and fix it with the substrate prepared in step 6). Then, use a vacuum coating machine to sequentially thermally deposit TAPC with a thickness of 40 nm, TcTa with a thickness of 10 nm, 10% Ir(ppy)3:90% CBP with a thickness of 20 nm, and 3TPYMB with a thickness of 40 nm.

[0084] 7) Fabrication of the drain electrode: Replace the mask and fix it with the substrate prepared in step 6). Then, use a vacuum deposition machine to sequentially deposit 0.5 nm thick LiF, 1 nm thick Al, and 35 nm thick Ag as drain electrodes on it to complete the fabrication of the neuromorphic display device.

[0085] Performance testing and characterization of neuromorphic display devices: In a nitrogen atmosphere within a glove box, the storage behavior of the device was tested. The system also tested the charge transport behavior of the device under pulsed light / electric stimulation and simulated various functions of neuronal / synaptic plasticity, such as double-pulse facilitation (PPF), pulse timing-dependent plasticity (STDP), and pulse frequency / number / width-dependent plasticity, achieving light emission from a transistor driven by postsynaptic current. Based on this, a synaptic weight-luminescence intensity mapping model was established. The weights output by the neural network directly drive the light-emitting units point-to-point, constructing light-emitting pixels whose grayscale is controlled by weight conductance, thus achieving dynamic image display based on grayscale levels. By analyzing the electrical and optical characteristics of the device and rationally incorporating algorithmic models, a prototype system integrating retinal-like sensing, storage, processing, and display was constructed, realizing neural-like encoding and adaptive intelligent display of dynamic visual information.

[0086] Figure 2 In Figures (A), (B), and (C), the current and brightness transfer curves and emission photographs of the neuromorphic display device prepared based on Example 1 are shown. The results indicate that the device of the present invention exhibits a clear storage window, and the storage window increases with increasing gate voltage, which is a prerequisite and key to realizing neuromorphic display.

[0087] Example 2: Preparation of a neuromorphic display device based on a solution method (semiconductor charge transport layer mainly composed of organic polymer semiconductors) 1) Fabrication of the gate electrode and dielectric layer of the top-emitting device: The Si / SiO2 substrate was cleaned using a hydrogen peroxide (30% concentration) and concentrated sulfuric acid (98% concentration) solution with a volume ratio of approximately 1:2 (heated in an electric furnace and boiled for 15 minutes). Afterward, it was ultrasonicated for 10 minutes each in deionized water, acetone, and isopropanol, and then rapidly dried with nitrogen gas to obtain the Si / SiO2 substrate for later use. Si was used as the gate electrode, and SiO2 as the dielectric layer.

[0088] 2) Fabrication of the storage functional layer: Polymer storage materials mainly include covalent organic framework films and metal-organic framework films. Taking the film prepared by reacting 1,3,5-tris(4-aminophenyl)benzene (TAPB) with 2,5-dioctyloxy-terephthalaldehyde (OTPA) as an example, the specific preparation process is as follows: 1 mg of tapioca starch (TAPB) was dissolved in 1 mL of chloroform to obtain a tapioca starch solution, and 1 mg of OTPA was dissolved in 1 mL of N,N-dimethylformamide (DMF) to obtain an OTPA solution. The tapioca starch and OTPA solutions were then mixed to achieve a molar ratio of 3:2. A cleaned LB tank was filled with water. 60 µL of the tapioca starch and OTPA mixture was slowly added dropwise to the surface of the water in the cleaned Langmuir-Blodgett (LB) tank using a microsyringe. After the solvent evaporated for 30 min, the sluice gate was compressed at a rate of 2.98 mm / min until the surface pressure reached 3 mN / m. Compression was stopped, and 350 µL of 98% acetic acid was added dropwise. After standing at room temperature for 12 hours, the mixture was transferred to the Si / SiO2 substrate obtained in step 1) at a rate of 0.5 mm / min using either a horizontal (Langmuir-Schaefer transfer method) or a vertical (Langmuir-Blodgett transfer method).

[0089] 3) Preparation of the tunneling layer: Prepare an organic solution of PMMA / PS (PMMA and PS concentrations are both 6 mg / mL) (solvent is chlorobenzene), and spin-coat the PMMA / PS tunneling layer onto the storage functional layer by spin coating (4000 rpm, 1 min) with a thickness of 10-20 nm. After spin coating, perform annealing treatment at 80 ℃ for 2 h.

[0090] 4) Fabrication of the charge transport layer PDPP-4T: A solution of the organic charge transport layer polypyrrolopyrroledione-tetrathiophene (PDPP-4T) (concentration 5 mg / mL) was prepared (using chloroform as solvent) and uniformly deposited on the substrate treated in step 3) by spin coating (1000 rpm, 1 min) to a thickness of 50 nm. Subsequently, a thermal annealing treatment was performed at 120 °C for 10 min.

[0091] 5) Fabrication of the source electrode: The mask is fixed to the substrate prepared in step 4), and Au with a thickness of 40 nm is deposited on it as the source electrode using a vacuum deposition machine.

[0092] 6) Fabrication of the light-emitting unit: In this embodiment, the light-emitting unit includes, from bottom to top, a charge buffer layer poly(4-butyl-N,N-diphenylaniline) (PTPD), a light-emitting layer PVK:Ir(ppy)2acac, and an electron transport layer 1,3,5-tris[(3-pyridyl)-3-phenyl]benzene (TmPyPB). The specific process flow is as follows: Prepare 5 mg / mL PTPD in chloroform, PVK and Ir(ppy)2acac in chloroform (concentration 5 mg / mL, total mass of PVK and Ir(ppy)2acac 5 mg, molar ratio of PVK to Ir(ppy)2acac 1:9), and TmPyPB in chloroform. Spin-coating the PTPD solution, PVK:Ir(ppy)2acac solution, and TmPyPB solution onto the substrate prepared in step 5) sequentially using a spin-coating method (spin-coating speed 3000 rpm, spin-coating time 1 minute).

[0093] 7) Fabrication of the drain electrode: The mask is fixed to the substrate prepared in step 6), and 0.5 nm thick LiF, 1 nm thick Al, and 35 nm thick Ag are sequentially deposited on it using a vacuum deposition machine as drain electrodes to complete the fabrication of the neuromorphic display device.

[0094] Figure 3 In Figures (A), (B), and (C), the current and brightness transfer curves and emission photographs of the neuromorphic display device prepared based on Example 2 are shown. The results indicate that the device in this embodiment exhibits a clear storage window, which increases with increasing gate voltage, and is a prerequisite and key to realizing neuromorphic display.

[0095] Figure 5The diagram shows the simulation effect of synaptic plasticity function of the neuromorphic display device in Example 2. (A) shows the change of current and brightness over time under a single pulse; (B) shows the device's emission at different times after the pulse is applied; and (C) shows the double-pulse dissimilarity diagram of brightness and photocurrent (two consecutive pulses are applied to the device, and the peak value of the second pulse is divided by the peak value of the first pulse to obtain the double-pulse dissimilarity index (PPF / PPB), where PPF is the ratio of device current and PPB is the ratio of device brightness). The results show that the constructed neuromorphic display device successfully simulates human synaptic function.

[0096] Example 3: Fabrication of a neuromorphic display device based on physical / chemical vapor transport method (the semiconductor charge transport layer is mainly composed of high-mobility, high-luminescence semiconductors). 1) Cleaning and modification of Si / SiO2 substrate: The Si / SiO2 substrate was cleaned using a hydrogen peroxide (30% concentration) and concentrated sulfuric acid (98% concentration) in a volume ratio of approximately 1:2 (heated in an electric furnace and boiled for 15 minutes). Afterward, it was ultrasonically cleaned in deionized water, acetone, and isopropanol for 10 minutes each, and then rapidly dried with nitrogen gas. Si was used as the gate electrode, and SiO2 as the dielectric layer.

[0097] The substrate was cleaned for 10 minutes in an O2plasma cleaner (80 W) to remove residual organic solvents and make it hydrophilic. After removal from the O2plasma cleaner, it was dried in a 90°C oven for 90 minutes. Finally, a drop of octadecyltrichlorosilane (OTS) was placed in the center of the culture dish containing the Si / SiO2 substrate using a capillary tube. The culture dish was then heated in a 120°C oven for 120 minutes and allowed to cool naturally. Finally, the substrate was sonicated in hexane, chloroform, and isopropanol for 10 minutes each, and then rapidly dried with nitrogen gas.

[0098] 2) Fabrication of the storage functional layer: Same as in Example 2 3) Preparation of the tunneling layer: An organic solution (chlorobenzene) of PMMA / PS (concentration of 6 mg / mL) was prepared, and a PMMA / PS tunneling layer with a thickness of 10-20 nm was spin-coated onto the storage functional layer by spin coating (4000 rpm for 1 minute). After spin coating, annealing was performed at 80℃ for 2 h.

[0099] 4) Fabrication of a high-mobility, high-luminescence organic charge transport layer: The high-mobility, high-luminescence material 2,6-diphenylanthracene and the substrate prepared in step 3 were placed on both sides of a quartz tube, respectively. The tube was kept at 200 °C for 3 hours. After the program was completed, the tube was allowed to cool down naturally and then removed for use.

[0100] 5) Fabrication of source and drain electrodes: Gold electrodes (100 nm thick) are deposited on the semiconductor crystal prepared in step 4) to serve as source and drain electrodes, thus completing the fabrication of the device.

[0101] Figure 4 In Figures (A), (B), and (C), the current and brightness transfer curves and emission photographs of the neuromorphic display device prepared based on Example 3 are shown. The results indicate that the device of the present invention exhibits a clear storage window, and the storage window increases with increasing gate voltage, which is a prerequisite and key to realizing neuromorphic display.

[0102] The embodiments of the present invention have been described above. However, the present invention is not limited to these embodiments. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A neuromorphic display device, characterized in that, It includes a storage function layer, a tunneling layer, and a semiconductor charge transport layer arranged sequentially from bottom to top.

2. The device as described in claim 1, characterized in that, The device also includes a light-emitting unit disposed on a semiconductor charge transport layer. Preferably, the light-emitting unit includes a charge buffer layer and a light-emitting layer; preferably, the light-emitting unit may further include an electron transport layer and / or a hole transport layer. Preferably, the device further includes a dielectric layer disposed below the storage functional layer. Preferably, the device further includes a gate electrode disposed beneath the dielectric layer. Preferably, the device further includes a source electrode disposed on a semiconductor charge transport layer. Preferably, the device further includes a drain electrode disposed on the semiconductor charge transport layer or the light-emitting unit.

3. The device as described in claim 1 or 2, characterized in that, The gate electrode is selected from any one or more of the following materials: semiconductors (e.g., silicon), metals (e.g., aluminum, magnesium, calcium, gold, potassium, molybdenum, silver, titanium, nickel, indium, yttrium, lithium, tin, gadolinium, iron, and lead), alloys of metals, multilayer materials (e.g., LiF / Al, LiO2 / Al, or LiF / Al / Ag), and metal oxides (e.g., ITO, IZO, MoO). x wait).

4. The device according to any one of claims 1-3, characterized in that, The dielectric layer is made of inorganic and / or organic materials. Preferably, the thickness of the dielectric layer is between 10 and 800 nm. Preferably, the organic material is selected from one or more of the following substances: PVA, CYTOP, and PMMA, etc. Preferably, the inorganic material is selected from one or more of the following substances: Al2O3, SiO2.

5. The device according to any one of claims 1-4, characterized in that, The storage function layer includes an organic storage function layer and an inorganic storage function layer; The material of the organic storage functional layer is selected from one or more of the following substances: organic small molecule materials, organic polymer materials, and organic two-dimensional materials; The material of the inorganic storage functional layer is selected from one or more of the following substances: inorganic two-dimensional materials and organic-inorganic hybrid materials, metal nanoparticles and / or metal oxide nanoparticles. Preferably, the metal nanoparticles and / or metal oxide nanoparticles are selected from one or more of the following substances: Au nanoparticles, Ag nanoparticles, Pt nanoparticles, Fe nanoparticles, FePt nanoparticles, CoFe2O4 nanoparticles, HfO2 nanoparticles, TiO2 nanoparticles, NiO nanoparticles, Fe3O4, Fe2O3 nanoparticles, MnO2 nanoparticles, and Co3O4 nanoparticles. Preferably, the organic small molecule material is selected from one or more of the following substances: diarylethene derivatives, quinone molecules, azobenzene derivatives, tetrathiofulvalene (TTF) and its derivatives, viologen derivatives, porphyrin / phthalocyanine derivatives, rotaxanes and sesquicarbons, etc. Preferably, the organic polymer material is selected from one or more of the following substances: polymers containing azobenzene, polymers containing diarylethylene, spiropyran copolymers, polymer composites containing fullerene / nanoparticles, block copolymers, polyvinylidene fluoride (PVDF) and its copolymers (such as P(VDF-TrFE)), polytrifluoroethylene, ferroelectric polymers such as trifluoroethylene copolymer P(VDF-TrFE), phase change polymers containing chalcogens, and polymer electrets (PVA, PS, PVP, PVPyr), etc. Preferably, the organic two-dimensional material is selected from one or more of the following substances: metal-organic framework materials, covalent organic framework materials, and hydrogen-bonded organic framework materials. Preferably, the inorganic two-dimensional material is selected from one or more of the following substances: graphene oxide, reduced graphene oxide, transition metal dichalcogenides (TMDCs, MX2), graphene, carbides and nitrides (MXenes), hexagonal boron nitride, layered double hydroxides (LDHs, such as NiFe-LDH), and black phosphorus. Preferably, the organic-inorganic hybrid material is selected from one or more of the following substances: coordination polymers and perovskites.

6. The device according to any one of claims 1-5, characterized in that, The tunneling layer is made of at least one of polystyrene (PS), polymethyl methacrylate (PMMA), and polyvinyl alcohol (PVA). Preferably, the thickness of the tunneling layer is between 10 and 20 nm.

7. The device according to any one of claims 1-6, characterized in that, The materials of the semiconductor charge transport layer include p-type charge transport semiconductor materials, n-type charge transport semiconductor materials, and bipolar charge transport semiconductor materials. Preferably, the p-type transmission semiconductor material is selected from one or more of the following substances: 2,6-bis(p-hexylbenzene)anthracene (C6-DPA), 2,7-dioctyl[1]benzothiophene[3,2-b]benzothiophene (C8-BTBT), 2,6-dinaphthylanthracene (dNaAnt), 2,6-bis(p-octylhexylbenzene)anthracene (C8-DPA), 2,6-bis(p-decylbenzene)anthracene (C8-DPA), C8-dioctyl[1]benzothiophene[3,2-b]benzothiophene (C8-BTBT), 2,6-dinaphthylanthracene (dNaAnt), 2,6-bis(p-octylhexylbenzene)anthracene (C8-DPA), 2,6-bis(p-dec ... 10 -DPA), 2,6-diphenylanthracene (DPA), poly(3-hexylthiophene) (P3HT), 9,9-di-n-octylfluorene-benzothiadiazole copolymer (F8BT), poly[2,5-(2-octyldodecyl)-3,6-dionepyrrolopyrrole-alt-5,5-(2,5-di(thiophen-2-yl)thiopheno[3,2-b]thiophene)] (DPP-DTT), 6,13-bis(triisopropylsilylethynyl)pentabenzene (TIPS-pentabenzene), Pentacene, 2-phenyl-5-[4'-(5''-phenyl-2''-thiophenyl)phenyl]thiophene, tin-based sulfides and copper-based sulfides. Preferably, the n-type transmission semiconductor material is selected from one or more of the following substances: N,N'-di(tetrazyl)-3,4,9,10-perylenetetracarboxylic acid diimide, indium oxide, indium gallium zinc oxide, zinc oxide, N,N'-bis(n-octyl)-1,6,7,12-tetra(4-cyanophenoxy)-3,4,9,10-perylenetetracarboxylic acid diimide, N,N'-bis(2-hexyldecyl)-2,6-bis(trimethylsilylethynyl)-1,4,5,8-naphthalenetetracarboxylic acid diimide, 3,6-bis(5-(4-cyanophenyl)thiophen-2-yl)-2,5-bis(2-ethylhexyl)-2,5-dihydropyrrolo[3,4-c]pyrrole-1,4-dione, 5'-(1,2-dihydromethylene[60]fullerene-C 60 -I h )-[1,1':4',1''-terphenyl]-2,2''-diyl)bis[benzo[d]thiophene], poly{[N,N'-bis(2-octyldodecyl)-1,4,5,8-naphthalenedimide-2,6-diyl]-alt-5,5'-(2,2'-bithiophene)}, poly{[N,N'-bis(octadecyl)-3,4,9,10-perylenediimide-1,6,7,12- [Tetrayl]-alt-2,5-thiophene}, poly(benzo[1,2-d:4,5-d']bisimidazolebenzophenanthrene-2,6-diyl) and poly{[4,8-bis(5-(2-ethylhexyl)thiophene-2-yl)benzo[1,2-b:4,5-b']dithiophene]-alt-[5,6-difluoro-4,7-bis(4-hexylthiophene-2-yl)-2,1,3-benzothiadiazole]}. Preferably, the bipolar transmission semiconductor material is selected from one or more of the following substances: polypyrrolopyrroledione-tetrathiophene (PDPP-4T), poly[{2,5-bis(2-hexyldecyl)-2,3,5,6-tetrahydro-3,6-dionepyrrolo[3,4-c]pyrrole-1,4-diyl}-alternating-{[2,2'-(1,4-phenylene)bisthiophene]-5,5'-diyl}], poly[(dithiophene)-alternating-(2,5-bis(2-octyldodecyl)-3,6-bis(thienyl)-pyrrolopyrroledione)], poly(3-hexylthiophene) (P3HT), 9,9-di-n-octylfluorene-benzothiadiazole copolymer (F8BT).

8. The device according to any one of claims 1-7, characterized in that, The charge buffer layer can be made of inorganic semiconductor materials and / or organic semiconductor materials. Preferably, the charge buffer layer is prepared from one or more selected from 4,4'-cyclohexylbis[N,N-di(4-methylphenyl)aniline] (TAPC) and N,N'-diphenyl-N,N'-(1-naphthyl)-1,1'-biphenyl-4,4'-diamine (NPB). Preferably, the material of the light-emitting layer is selected from one or more of quantum dots, perovskites, fluorescent materials, phosphorescent materials, and thermally active delayed fluorescence materials. Preferably, the fluorescent material is selected from one or more of 2'-(diphenylphospho)-1-phenyl-1H-spiro[9,9'-fluorene] (POSTF), aluminum octahydroxyquinoline (Alq3), 9,10-bisphenylanthracene (ADP), 1,1'-(2,5-dimethyl-1,4-phenylene)dipyrene (DMPPP), 5,6,11,12-tetraphenyl[C]fluorene (Rubrene), 4,4',4''-tris(1-pyrene)triphenylamine (TPyPA), and 9-(10-phenylanthracene-9-yl)spiro[benzo[C]fluorene-7,9'-fluorene (BH-9PA). Preferably, the phosphorescent material is selected from 3-(4-(9H-carbazol-9-yl)phenyl)-9-(4,6-diphenyl-1,3,5-triazin-2-yl)-9H-carbazole (CPCBPTz), bis(1-phenyl-isoquinoline)(acetylacetone)iridium(III) (Ir(piq)2acac), 2,6-bis(9-carbazolyl)pyridine (PYD-2Cz), bis(2,3-diphenylquinoxaline)iridium acetylacetone (Ir(mphmq)2tmd), 1,1 One or more of ':3',1''-terphenyl-4,4''-dimethylbis(diphenylphosphine oxide) (BPOPB), tri(2-phenylpyridine)iridium (Ir(ppy)3), 2,6-bis(9-carbazolyl)pyridine (PYD-2Cz), bis(2-phenylpyridine-C2,N)iridium acetylacetonate (Ir(ppy)2(acac)) and iridium(III)tri[N,N'-diphenylbenzimidazole-2-ylidene-C2,C2'] (Ir(dpbic)3). Preferably, the thermally active delayed fluorescence material is selected from di[2-((oxo)diphenylphosphino)phenyl] ether (DPEPO), 4,4',4''-tris(carbazole-9-yl)triphenylamine (TcTa), 4,4'-(9H,9'H-3,3'-bicarbazole-9,9'-diyl)bis(N,N-diphenylaniline) (BCzTPA), tert-butyl-2,12-bis(4-tert-butylphenyl)-5,9-dihydro-5,9-diaza-13b-boronnaphthalene[3,2,1-de]anthracene ( t -DABNA), 2,8-bis(diphenylphospho)dibenzo[B,D]furan (PPF), 3,5-bis(9H-carbazole-9-yl)benzonitrile (3,5-2CzBN), 9-[3-(9H-carbazole-9-yl)phenyl]-9H-carbazole-3-nitrile (mCPCN), di[2-((oxo)diphenylphosphino)phenyl] ether (DPEPO), dihydroacenaphthene-nitrogen heterocyclic compounds (tCzphB-Fl), 9-(4-(10-phenylanthracene-9-yl)phenyl)-9H-carbazole (CzPA), 4,4'-bis(9-carbazole)biphenyl (CBP), 10-(4-(4,6-diphenyl-1,3,5-triazol-2-yl)phenyl)-9,9-dimethyl-9,10-dihydroacridine (D One or two of the following: MAC-TRZ), 5-(3-(9-phenyl-9H-carbazole-3-yl)phenyl)-5H-pyrido[3,2-B]indole (DCb-PCz), 2,6-bis(9-carbazole)pyridine (PYD-2Cz), 9,9'-(5-(4,6-diphenyl-1,3,5-triazin-2-yl)-1,3-phenylene)bis(9Hcarbazole) (DCzTRZ), 9-(4-(4,6-diphenylpyrimidin-2-yl)phenyl)-9H-carbazole (Cz-Ph-DRZ), 4,4'-(9H,9'H-3,3'-bicarbazole-9,9'-diyl)bis(N,N-diphenylaniline) (BCzTPA), and (N-phenoxazine)phenyl]sulfone (PXZ-DPS). Preferably, the light-emitting layer can be formed from a single light-emitting material or from a guest material doped with a host material. Preferably, the single luminescent material is Alq3, DPA, or dNaAnt; the guest dopant in the guest dopant host material can be one or more substances, and the host material can be a single substance or a mixture. For example, the guest doped material is preferably t -DABNA, 9,9'-(5-(4,6-diphenyl-1,3,5-triazin-2-yl)-1,3-phenylene)bis(9H-carbazole), 1-(4,6-diphenyl-1,3,5-triazin-2-yl)-1H-phenoxazine, tCzphB-Fl, 1,4-bis(10-phenylanthracene-9-yl)benzene (BD1), 2,6-bis(9H-carbazole-9-yl)-4-phenylpyridine-3,5-dicarboxynitrile, BDAVBi Perylene, 3,6-dibenzoyl-4,5-di(1-methyl-9-phenyl-9H-carbazolyl)-2-ethynylbenzylnitrile, bis(dimethyl-dihydroacrylidinephenylsulfone) (DMAC-DPS), 2,6-di(9H-carbazol-9-yl)-4-phenylpyridine-3,5-dicarboxynitrile, bis[2-(5-cyano-4,6-difluorophenyl)pyridine-C2,N)]pyridinecarboxyiridium (FCNirPic), 9-[2,3-bis(9H-carbazol-9-yl)-5 -(diphenyl-1,3,5-triazin-2-yl)phenyl]-9H carbazole, iridium(III)bis[(2,3,4-difluorophenyl)-pyridine-N,C2']pyridinecarboxylate (Ir(tfpd)2pic), 1-(4-(4,6-diphenyl-1,3,5-triazin-2-yl)phenyl)-1H-spiro[[idine-9,9'-fluorene, Ir(mphmq)2tmd, 4,4'-bis[4-(di-p-toluene)]-9H carbazole, iridium(III)bis[(2,3,4-difluorophenyl) ...), 1-(4,4'-bis[4-(di-p-toluene)]-9H carbazole, iridium(III)bis[(2,3,4-difluorophenyl)-N,C2']pyridinecarboxylate (Ir(tfpd)2pic), 1-(4,6-diphenyl-1,3,5-triazin-2-yl)phenyl)-1H-spiro[[ [[4,6-diphenyl-1,3,5-triazin-2-yl]biphenyl (DPAVBi), TTPA, 9,9'-(5-(4,6-diphenyl-1,3,5-triazin-2-yl)-1,3-phenyl)bis(9H-carbazole) (DCzTrz), 10-(4-(4,6-diphenyl-L-1,3,5-triazin-2-yl)phenyl)-10-hydro-phenoxazine, 5,5-dibromo-4,4-tetracosyl-2,2-bithiophene (fac-Ir(dp)] bic)3), Ir(ppy)3, 5,10-bis(4-(9H-carbazole-9-yl)-2,6-dimethylphenyl)-5,10-dihydroboronanthracene, tris[2-(p-tolyl)pyridine]iridium(III) (Ir(mppy)3), 5,10-bis(4-(3,6-di-tert-butyl-9H-carbazole-9-yl)-2,6-dimethylphenyl)-5,10-dihydroboronanthracene, Ir(ppy)2acac , bis(2-(naphthyl-2-yl)pyridine)(acetylacetone)iridium(III)(Ir(npy)2acac), bis(4-(9,9-dimethyl-acetyl-10(9H)-yl)phenyl)methyl ketone, tris[2-(3-methyl-2-pyridyl)phenyl]iridium(Ir(3mppy)3), TXO-PHCZ, bis(2-(3,5-dimethylphenyl)quinoline-C2,N')(acetylacetone)iridium(III) (Ir(dmpq)2acac), 2,6-bis[4-diphenylaminophenyl]-9,One or more of the following: 10-anthraquinone, bis(2-(2'-benzothiophene)-pyridine-N,C3')iridium(acetylacetone) (Ir(btp)2(acac)), 4-(dicyanomethylene)-2-methyl-6-[2-(2,3,6,7-tetrahydro-1H,5H-benzo[ij]quinazin-9-yl)vinyl]-4H-pyran (DCM2), 5,6,11,12-tetraphenyl-4-benzoxene (Rubrene), tris(2-(3,5-dimethylphenyl)quinoline-C2,N')iridium(III) (Ir(dmpq)3), and 2,8-di-tert-butyl-5,11-bis(4-tert-butylphenyl)-6,12-diphenyl-4-benzoxene (TBRb); For example, preferred host materials include 3,3′-bis(9H-carbazole-9-yl)biphenyl (mCBP), 9,9′-(1,3-phenyl)bis-9H-carbazole (mCP), bis[2-((oxo)diphenylphosphino)phenyl] ether (DPEPO), 4,4′-bis(9-carbazole)biphenyl (CBP), 4,4′-bis(2,2-diphenyl-vinyl-1-yl)-4,4′-dimethylphenyl (p-DMDPVBi), 4,4′-bis(2,2-stilbeneyl)-1,1′-biphenyl (DPVBi), and 2-tert-butyl-9,10-bis(2-naphthyl)anthracene. (TBADN), diphenyl[4-(triphenylsilyl)phenyl]oxyphosphine (TSPO1), 3-(3-(9H-carbazol-9-yl)phenyl)benzofuran[2,3-b]pyridine (PCz-BFP), 2,4,6-tris[3-(diphenylphosphoxy)phenyl]-1,3,5-triazole (PO-T2T), 2,4,6-tris(3-(carbazol-9-yl)phenyl)-1,3,5-triazine (TCPZ), 4,4'-bis(triphenylsilyl)-1,1'-biphenyl (BSB), 2,7-bis[9,9-di(4-methylphenyl)fluorene-2-yl] One or more of 9,9-di(4-methylphenyl)fluorene (TDAF), 3',3'',3'''-(1,3,5-triazine-2,4,6-triyl)tris(([1,1'-biphenyl]-3-nitrile))(CN-T2T) and 10-(4-(4,6-diphenyl-1,3,5-triazol-2-yl)phenyl)-9,9-dimethyl-9,10-dihydroacridine (DMAC-TRZ).

9. The device according to any one of claims 1-8, characterized in that, The method for preparing the storage functional layer is selected from one of the following methods: Method 1: Prepare a solution of a certain concentration of the material for the storage functional layer, and spin-coat it onto the dielectric layer to obtain the storage functional layer; Method 2: Dissolve the material of the storage functional layer in an organic solvent, drop the resulting solution onto a support substrate with a dielectric layer, and shear the dropped solution into a film by controlling the speed of the scraper to obtain the storage functional layer; Method 3: Dissolve the material of the storage functional layer in an organic solvent, drop the resulting solution onto a support substrate with a dielectric layer, allow the solvent to evaporate, and form a film at the solid-gas interface / solid-liquid interface to obtain the storage functional layer; or drop the resulting solution onto the surface of water, wait for the solvent to completely evaporate, and obtain the storage functional layer at the gas-liquid interface, then transfer it to the support substrate with a dielectric layer; or add an organic solution containing the storage functional layer material in an amount equal to the volume of water onto the surface of water, let it stand for a period of time, obtain the storage functional layer at the liquid-liquid interface, and then transfer it to the support substrate with a dielectric layer. Method 4: In the vapor deposition chamber, the storage functional layer is obtained by depositing the material of the storage functional layer on the substrate with the dielectric layer through vacuum evaporation deposition. Preferably, the tunneling layer is spin-coated onto the storage functional layer using a spin coating method. Preferably, the method for fabricating the semiconductor charge transport layer is selected from one of the following methods: Method 1: Place the semiconductor charge transport layer material and substrate, which are placed in a quartz boat, into a tube furnace, set the temperature, and after the set program is completed, remove the substrate to obtain a semiconductor crystal, and transfer it onto the tunneling layer. Method 2: Dissolve the semiconductor charge transport layer material in an organic solvent and spin-coat it onto the tunneling layer. Method 3: In the evaporation chamber, a semiconductor charge transport layer material is deposited on the tunneling layer by vacuum evaporation deposition. Method 4: Dissolve the semiconductor charge transport layer material in an organic solvent, drop the resulting organic solution onto the water surface to spread it evenly, and after the solvent evaporates, obtain a semiconductor material film, which is then transferred onto the tunneling layer to complete the preparation of the semiconductor charge transport layer. Method 5: Dissolve the material of the semiconductor charge transport layer in an organic solvent, drop the resulting semiconductor solution onto the tunneling layer, and slowly shear the semiconductor thin film transport layer by controlling the shearing speed of the scraper.

10. A method for fabricating the neuromorphic display device according to any one of claims 1-9, characterized in that, The fabrication method includes fabricating a storage functional layer, a tunneling layer, and a semiconductor charge transport layer sequentially from bottom to top. Preferably, the fabrication method further includes fabricating a light-emitting unit on the semiconductor charge transport layer. Preferably, the preparation method further includes preparing a dielectric layer below the storage functional layer. Preferably, the fabrication method further includes fabricating a source electrode on the semiconductor charge transport layer. Preferably, the fabrication method further includes fabricating a drain electrode on the semiconductor charge transport layer or on the light-emitting unit. Preferably, the preparation method further includes preparing a gate electrode.

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