amplification circuit

Abstract

An amplification circuit (10) is provided with: a 90° hybrid circuit (51 and 52) having output terminals (51b and 51c); power amplifiers (21, 22 and 23); switches (41) and (42); and a combining circuit (30) having input terminals (30a and 30b), the output terminal (51b) being connected to a selection terminal (41b), the output terminal (51c) being connected to an input terminal of the power amplifier (22), the output terminal (52b) being connected to a selection terminal (41c), the output terminal (52c) being connected to an input terminal of the power amplifier (23), the common terminal (41a) being connected to an input terminal of the power amplifier (21), the output terminal of the power amplifier (21) being connected to the input terminal (30a), the output terminal of the power amplifier (22) being connected to a selection terminal (42b), the output terminal of the power amplifier (23) being connected to a selection terminal (42c), and the common terminal (42a) being connected to the input terminal (30b).

Description

Technical Field

[0001] This invention relates to an amplifier circuit. Background Technology

[0002] Patent Document 1 discloses a high-frequency module (amplifier circuit) supporting multiple frequency bands, which includes a first power amplifier for amplifying a transmitted signal in a first frequency band and a second power amplifier for amplifying a transmitted signal in a second frequency band. The first power amplifier and the second power amplifier are both differential amplifiers, each composed of two amplifying elements with different phases.

[0003] Existing technical documents

[0004] Patent documents

[0005] Patent Document 1: Japanese Patent Application Publication No. 2021-158569 Summary of the Invention

[0006] The problem the invention aims to solve

[0007] However, in the amplifier circuit disclosed in Patent Document 1, two amplification elements are configured for each frequency band. Therefore, the more the number of frequency bands in the multi-band system increases, the more it hinders the miniaturization of the amplifier circuit.

[0008] The present invention was made to solve the above-mentioned problems, and its purpose is to provide a miniaturized amplifier circuit that supports multiple frequency bands.

[0009] Solution for solving the problem

[0010] To achieve the above objectives, one aspect of the present invention includes an amplifier circuit comprising: a first 90° mixing circuit having a first input terminal, a first output terminal, and a second output terminal; a second 90° mixing circuit having a second input terminal, a third output terminal, and a fourth output terminal; a first power amplifier, a second power amplifier, and a third power amplifier; a first switch having a first common terminal, a first selection terminal, and a second selection terminal; a second switch having a second common terminal, a third selection terminal, and a fourth selection terminal; and a combining circuit having a third input terminal, a fourth input terminal, and a fifth output terminal, wherein the first output terminal is connected to the first selection terminal, the second output terminal is connected to the input terminal of the second power amplifier, the third output terminal is connected to the second selection terminal, the fourth output terminal is connected to the input terminal of the third power amplifier, the first common terminal is connected to the input terminal of the first power amplifier, the output terminal of the first power amplifier is connected to the third input terminal, the output terminal of the second power amplifier is connected to the third selection terminal, the output terminal of the third power amplifier is connected to the fourth selection terminal, and the second common terminal is connected to the fourth input terminal.

[0011] Additionally, one embodiment of the present invention includes an amplifier circuit comprising: a first 90° mixing circuit having a first input terminal, a first output terminal, and a second output terminal; a second 90° mixing circuit having a second input terminal, a third output terminal, and a fourth output terminal; a first power amplifier, a second power amplifier, and a third power amplifier; a first switch having a first common terminal, a first selection terminal, and a second selection terminal; a second switch having a second common terminal, a third common terminal, a third selection terminal, a fourth selection terminal, and a fifth selection terminal; and a combining circuit having a third input terminal, a fourth input terminal, and a fifth output terminal, wherein the first output terminal is connected to the first selection terminal, the second output terminal is connected to the input terminal of the second power amplifier, the third output terminal is connected to the second selection terminal, the fourth output terminal is connected to the input terminal of the third power amplifier, the first common terminal is connected to the input terminal of the first power amplifier, the output terminal of the first power amplifier is connected to the fourth selection terminal, the output terminal of the second power amplifier is connected to the third selection terminal, the output terminal of the third power amplifier is connected to the fifth selection terminal, the second common terminal is connected to the third input terminal, and the third common terminal is connected to the fourth input terminal.

[0012] The effects of the invention

[0013] According to the present invention, a miniaturized amplifier circuit supporting multiple frequency bands can be provided. Attached Figure Description

[0014] Figure 1 This is a circuit structure diagram of the amplifier circuit, high-frequency circuit, and communication device involved in Embodiment 1.

[0015] Figure 2 This is a diagram showing examples of the circuit structure of a low-pass filter and a high-pass filter.

[0016] Figure 3A This is a diagram showing the circuit state when the amplifier circuit involved in Embodiment 1 transmits in frequency band A.

[0017] Figure 3B This is a diagram showing the circuit state when the amplifier circuit involved in Embodiment 1 transmits in frequency band B.

[0018] Figure 4 This is the circuit structure diagram of the amplifier circuit involved in the modified example.

[0019] Figure 5 This is a circuit structure diagram of the amplifier circuit involved in Example 2.

[0020] Figure 6 This is a circuit structure diagram of the amplifier circuit involved in Example 3.

[0021] Figure 7 This is a circuit diagram of the amplifier circuit involved in Example 4.

[0022] Figure 8A This is a diagram showing the circuit state of the amplifier circuit involved in Embodiment 4 when HB is transmitted.

[0023] Figure 8B This is a diagram showing the circuit state of the amplifier circuit involved in Embodiment 4 during MB transmission.

[0024] Figure 9A This is a diagram showing the frequency characteristics of the high-pass filter and the power amplifier when the amplifier circuit involved in Embodiment 4 transmits HB.

[0025] Figure 9B This is a diagram showing the frequency characteristics of the high-pass filter and power amplifier during MB transmission of the amplifier circuit involved in Embodiment 4.

[0026] Figure 10 This is a top view of the high-frequency circuit involved in Embodiment 1.

[0027] Figure 11 This is a top view of the high-frequency circuit involved in Embodiment 2.

[0028] Figure 12 This is a top view of the high-frequency circuit involved in Embodiment 3.

[0029] Figure 13 This is a top view of the high-frequency circuit involved in Example 4. Detailed Implementation

[0030] The embodiments of this disclosure will now be described in detail with reference to the accompanying drawings. The embodiments described below are general or specific examples. The numerical values, shapes, materials, constituent elements, arrangements of constituent elements, and connection methods shown in the following embodiments are examples and are not intended to limit the invention.

[0031] Furthermore, the figures are schematic diagrams that have been appropriately emphasized, omitted, or proportionally adjusted for the purpose of illustrating the invention, and are not necessarily strictly illustrative, sometimes differing from the actual shapes, positional relationships, and proportions. In the figures, substantially identical structures are labeled with the same reference numerals, and sometimes repeated descriptions are omitted or simplified.

[0032] In the circuit structure disclosed herein, "connection" includes not only direct connection via connection terminals and / or wiring conductors, but also electrical connection via other circuit elements. "Connected between A and B" means connected to both A and B.

[0033] Furthermore, in this disclosure, viewing the substrate from above means observing the substrate and the circuit elements mounted on the substrate by projecting them orthographically onto a plane parallel to the main surface of the substrate.

[0034] Furthermore, in the component configuration of this disclosure, "component disposed on a substrate" includes components disposed on the main surface of the substrate and components disposed within the substrate. "Component disposed on the main surface of the substrate" includes, in addition to being disposed in contact with the main surface of the substrate, components disposed above the main surface without contact with it (e.g., the component is stacked on top of other components disposed in contact with the main surface). Additionally, "component disposed on the main surface of the substrate" may also include components disposed in recesses formed on the main surface. "Component disposed within the substrate" includes, in addition to the component being encapsulated within a module substrate, components entirely disposed between two main surfaces of the substrate but with a portion of the component not covered by the substrate, and only a portion of the component disposed within the substrate.

[0035] In addition, in this disclosure, "path" refers to a transmission line consisting of wiring for high-frequency signal propagation, electrodes directly connected to the wiring, and terminals directly connected to the wiring or the electrodes.

[0036] In addition, in this disclosure, "component A is connected in series in path B" means that both the signal input terminal and the signal output terminal of component A are connected to the wiring, electrodes or terminals constituting path B.

[0037] In this invention, "terminal," "input terminal," and "output terminal" refer to the point where the conductor within an element ends. Furthermore, when the impedance of the conductors between elements is sufficiently low, a terminal can be interpreted not only as a single point but also as any point on the conductor between elements or the entire conductor.

[0038] In addition, terms such as "parallel" and "perpendicular" that indicate the relationship between elements, terms such as "rectangle" that indicate the shape of elements, and numerical ranges that do not only indicate a strict meaning but also refer to substantially equivalent ranges, such as including a few percent of error.

[0039] The "passband of a filter" is the portion of the spectrum transmitted by the filter, defined as the frequency band where the output power does not decrease by more than 3dB compared to the maximum output power. Therefore, the high-frequency and low-frequency ends of the passband of a bandpass filter are determined by the higher and lower frequencies of the two points where the output power decreases by 3dB compared to the maximum output power.

[0040] "Transmit band" refers to the frequency band used for transmitting in a communication device. "Receive band" refers to the frequency band used for receiving in a communication device. For example, in Frequency Division Duplex (FDD), different frequency bands are used as transmit and receive bands, while in Time Division Duplex (TDD), the same frequency band is used as both transmit and receive bands. Specifically, in FDD, when the communication device is installed in a cellular network user equipment (UE), the uplink operation band is used as the transmit band, and the downlink operation band is used as the receive band. Conversely, when the communication device is installed in a cellular network base station (BS), the downlink band is used as the transmit band, and the uplink band is used as the receive band.

[0041] The "pass phase" between the two terminals of a high-frequency signal is obtained by contacting the two terminals with a measuring RF probe and measuring the pass characteristics (S21 or S12) using a network analyzer.

[0042] In this invention, the phase of a high-frequency signal and the value of the phase do not only represent a strict meaning, but also refer to a range that includes substantially equivalent values, such as a difference of about 30%.

[0043] (Implementation Method)

[0044] [1 Circuit structure of amplifier circuit 10, high-frequency circuit 1 and communication device 4 involved in Embodiment 1]

[0045] Reference Figure 1 The circuit structures of the amplifier circuit 10, the high-frequency circuit 1, and the communication device 4 involved in Embodiment 1 will be described. Figure 1 This is a circuit diagram of the amplifier circuit 10, the high-frequency circuit 1, and the communication device 4 involved in Embodiment 1.

[0046] [1.1 Circuit structure of communication device 4]

[0047] First, the circuit structure of communication device 4 will be explained. For example... Figure 1 As shown, the communication device 4 involved in this embodiment includes a high-frequency circuit 1, an antenna 2, and an RF signal processing circuit (RFIC: Radio Frequency Integrated Circuit) 3.

[0048] High-frequency circuit 1 transmits high-frequency signals between antenna 2 and RFIC 3. The detailed circuit structure of high-frequency circuit 1 will be described later.

[0049] Antenna 2 is connected to the antenna connection terminal 100 of the high-frequency circuit 1 to transmit high-frequency signals output from the high-frequency circuit 1. Alternatively, antenna 2 can also receive high-frequency signals from the outside and output them to the high-frequency circuit 1.

[0050] RFIC 3 is an example of a signal processing circuit that processes high-frequency signals. Specifically, RFIC 3 processes the transmit signal input from the baseband signal processing circuit (BBIC, not shown) through up-conversion or the like, and outputs the generated transmit signal to the transmit path of high-frequency circuit 1. Alternatively, RFIC 3 can also process the receive signal input via the receive path of high-frequency circuit 1 through down-conversion or the like, and output the generated receive signal to the BBIC. Furthermore, RFIC 3 has a control unit that controls high-frequency circuit 1. Moreover, some or all of the functions of the control unit of RFIC 3 can be installed externally to RFIC 3, for example, it can be installed within the BBIC or high-frequency circuit 1.

[0051] RFIC 3 also functions as a control unit to control the power supply voltage Vcc and bias voltage Vb supplied to each amplifier in amplifier circuit 10. Specifically, RFIC 3 outputs control signals to the power supply circuit (not shown) and the bias circuit (not shown). Furthermore, the power supply circuit and bias circuit can also be configured in high-frequency circuit 1 or amplifier circuit 10. The power supply circuit supplies the power supply voltage Vcc, controlled by the aforementioned control signal, to each amplifier in amplifier circuit 10, and the bias circuit supplies the bias voltage Vb, controlled by the aforementioned control signal, to each amplifier in amplifier circuit 10.

[0052] In addition, RFIC 3 also has the function of a control unit to control the connection of switches 41, 42, 43 and 44 of the high-frequency circuit 1 based on the communication frequency band used.

[0053] Furthermore, in the communication device 4 according to this embodiment, the antenna 2 is not an essential component.

[0054] [1.2 Circuit Structure of High-Frequency Circuit 1]

[0055] Next, the circuit structure of high-frequency circuit 1 will be described. For example... Figure 1 As shown, the high-frequency circuit 1 includes an amplifier circuit 10, filters 33 and 34, switches 43 and 44, and an antenna connection terminal 100.

[0056] The amplifier circuit 10 is a circuit that amplifies the transmitted signal of frequency band A (first frequency band) input from signal input terminal 110 and the transmitted signal of frequency band B (second frequency band) input from signal input terminal 120.

[0057] Furthermore, in this disclosure, frequency band A and frequency band B refer to frequency bands predefined by standardization organizations (such as 3GPP, IEEE) for communication systems built using Radio Access Technology (RAT). In this embodiment, the communication system can be, for example, a 4G-LTE (Long Term Evolution) system, a 5G-NR (New Radio) system, or a WLAN (Wireless Local Area Network) system, but is not limited to these.

[0058] Filter 33 is connected between switches 43 and 44, allowing the transmission signal of frequency band A in the transmitted signal amplified by amplifier circuit 10 to pass through. Additionally, filter 34 is connected between switches 43 and 44, allowing the transmission signal of frequency band B in the transmitted signal amplified by amplifier circuit 10 to pass through.

[0059] Switch 43 has a common terminal 43a and selection terminals 43b and 43c. The common terminal 43a is connected to the signal output terminal 130 of amplifier circuit 10, the selection terminal 43b is connected to filter 33, and the selection terminal 43c is connected to filter 34. In this connection structure, switch 43 switches between the connection and non-connection of signal output terminal 130 and filter 33, and also switches between the connection and non-connection of signal output terminal 130 and filter 34.

[0060] Switch 44 is an example of an antenna switch, which is connected to antenna connection terminal 100 and switches between the connection and non-connection of antenna connection terminal 100 and filter 33. In addition, it switches between the connection and non-connection of antenna connection terminal 100 and filter 34.

[0061] Furthermore, the high-frequency circuit 1 may also include a receiving circuit for transmitting the received signal from the antenna 2 to the RFIC 3. In this case, the high-frequency circuit 1 may also include a low-noise amplifier and a receiving filter.

[0062] According to the circuit structure described above, the high-frequency circuit 1 can transmit high-frequency signals from either frequency band A or frequency band B.

[0063] [1.3 Circuit Structure of Amplifier Circuit 10]

[0064] Next, the circuit structure of amplifier circuit 10 will be described in detail.

[0065] like Figure 1 As shown, the amplifier circuit 10 includes amplifiers 11 and 12, power amplifiers 21, 22 and 23, a combining circuit 30, switches 41 and 42, 90° mixing circuits 51 and 52, signal input terminals 110 and 120, and a signal output terminal 130.

[0066] Signal input terminals 110 and 120 are connected to RFIC 3. Signal output terminal 130 is connected to antenna connection terminal 100 via switches 43 and 44 and filters 33 and 34. Furthermore, signal input terminals 110 and 120, signal output terminal 130, and antenna connection terminal 100 can be metal conductors such as metal electrodes and metal bumps, or they can be points (nodes) on metal wiring.

[0067] Amplifier 11 is an example of a preamplifier, with its input terminal connected to signal input terminal 110 and its output terminal connected to 90° mixing circuit 51, amplifying the high-frequency signal of frequency band A input from signal input terminal 110. Amplifier 12 is an example of a preamplifier, with its input terminal connected to signal input terminal 120 and its output terminal connected to 90° mixing circuit 52, amplifying the high-frequency signal of frequency band B input from signal input terminal 120. Alternatively, amplifiers 11 and 12 may not be included in amplifier circuit 10.

[0068] Power amplifier 21 is an example of a first power amplifier, capable of amplifying signals in frequency band A and frequency band B. Power amplifier 22 is an example of a second power amplifier, capable of amplifying signals in frequency band A. Power amplifier 23 is an example of a third power amplifier, capable of amplifying signals in frequency band B.

[0069] Amplifiers 11 and 12, and power amplifiers 21-23, each have an amplifying transistor. These amplifying transistors are, for example, bipolar transistors such as heterojunction bipolar transistors (HBTs) or field-effect transistors such as MOSFETs (Metal-Oxide-Semiconductor Field-Effect Transistors). Furthermore, when the amplifying transistor is a bipolar transistor, the input terminal of amplifiers 11 and 12 and power amplifiers 21-23 is, for example, the base terminal of the bipolar transistor, and the output terminal of amplifiers 11 and 12 and power amplifiers 21-23 is, for example, the collector terminal of the bipolar transistor. Furthermore, when the amplifying transistor is a field-effect transistor, the input terminal of amplifiers 11 and 12 and power amplifiers 21-23 is, for example, the gate terminal of the field-effect transistor, and the output terminal of amplifiers 11 and 12 and power amplifiers 21-23 is, for example, the drain terminal of the field-effect transistor.

[0070] The 90° mixing circuit 51 is an example of a first 90° mixing circuit, having an input terminal 51a, an output terminal 51b, and an output terminal 51c, configured such that the phase difference between the first output signal output from the output terminal 51b and the second output signal output from the output terminal 51c is 90°. In this embodiment, the input terminal 51a is an example of a first input terminal, the output terminal 51b is an example of a first output terminal, and the output terminal 51c is an example of a second output terminal. The phase of the second output signal output from the output terminal 51c leads the phase of the first output signal output from the output terminal 51b by 90°.

[0071] The 90° mixing circuit 52 is an example of a second 90° mixing circuit, having input terminals 52a, output terminals 52b and 52c, configured such that the phase difference between the third output signal output from output terminal 52b and the fourth output signal output from output terminal 52c is 90°. In this embodiment, input terminal 52a is an example of a second input terminal, output terminal 52b is an example of a third output terminal, and output terminal 52c is an example of a fourth output terminal. The phase of the fourth output signal output from output terminal 52c leads the phase of the third output signal output from output terminal 52b by 90°.

[0072] Switch 41 is an example of a first switch, having a common terminal 41a (first common terminal), a selection terminal 41b (first selection terminal), and a second selection terminal 41c, configured to switch the connection between the common terminal 41a and the selection terminal 41b, and the connection between the common terminal 41a and the selection terminal 41c. Switch 41 is, for example, a switching circuit composed of an SPDT (Single Pole Double Throw) switch.

[0073] Switch 42 is an example of a second switch, having a common terminal 42a (second common terminal), a selection terminal 42b (third selection terminal), and a selection terminal 42c (fourth selection terminal), configured to switch the connection between the common terminal 42a and the selection terminal 42b, and the connection between the common terminal 42a and the selection terminal 42c. Switch 42 is, for example, a switching circuit composed of an SPDT switch.

[0074] The synthesis circuit 30 has an input terminal 30a (third input terminal), an input terminal 30b (fourth input terminal), and a signal output terminal 130 (fifth output terminal). It is configured to synthesize a first input signal input to the input terminal 30a and a second input signal input to the input terminal 30b, and output the synthesized fifth output signal from the signal output terminal 130.

[0075] In this embodiment, the synthesis circuit 30 includes a high-pass filter 31 and a low-pass filter 32. The high-pass filter 31 is connected between the input terminal 30a and the signal output terminal 130. The low-pass filter 32 is connected between the input terminal 30b and the signal output terminal 130. The high-pass filter 31 attenuates signals at frequencies lower than a predetermined frequency and allows signals at frequencies higher than the predetermined frequency to be transmitted with low loss. Furthermore, the high-pass filter 31 is configured to have a phase of +45° (the phase at the output terminal leads the phase at the input terminal by 45°). The low-pass filter 32 attenuates signals at frequencies higher than the predetermined frequency and allows signals at frequencies lower than the predetermined frequency to be transmitted with low loss. Furthermore, the low-pass filter 32 is configured to have a phase of -45° (the phase at the output terminal lags the phase at the input terminal by 45°).

[0076] Figure 2This is a diagram illustrating examples of circuit structures for a low-pass filter and a high-pass filter. As shown in the diagram, the low-pass filter 32 (LPF) can be, for example, any of the following structures: (1) an inductor 321 connected in series and a capacitor 322 connected between the series arm and ground; (2) an inductor 321 connected in series; or (3) a capacitor 322 connected between the series arm and ground. Similarly, the high-pass filter 31 (HPF) can be, for example, any of the following structures: (1) a capacitor 311 connected in series and an inductor 312 connected between the series arm and ground; (2) a capacitor 311 connected in series; or (3) an inductor 312 connected between the series arm and ground.

[0077] Return to Figure 1 The connection structure of amplifier circuit 10 will be explained.

[0078] Input terminal 51a is connected to the output terminal of amplifier 11, output terminal 51b is connected to selection terminal 41b, and output terminal 51c is connected to the input terminal of power amplifier 22. Input terminal 52a is connected to the output terminal of amplifier 12, output terminal 52b is connected to selection terminal 41c, and output terminal 52c is connected to the input terminal of power amplifier 23.

[0079] The common terminal 41a is connected to the input terminal of the power amplifier 21, the output terminal of the power amplifier 21 is connected to the input terminal 30a, the output terminal of the power amplifier 22 is connected to the selection terminal 42b, the output terminal of the power amplifier 23 is connected to the selection terminal 42c, and the common terminal 42a is connected to the input terminal 30b.

[0080] [1.4 Amplification Mode of Amplifier Circuit 10]

[0081] Next, the circuit states of the amplification modes that the amplifier circuit 10 can execute will be explained.

[0082] (Band A transmission mode)

[0083] The band A transmission mode is a mode in which the signal of band A is amplified and transmitted. Figure 3AThis diagram illustrates the circuit state of the amplifier circuit 10 according to Embodiment 1 when transmitting a signal in frequency band A. As shown in the diagram, when transmitting a signal in frequency band A, common terminal 41a is connected to selection terminal 41b, and common terminal 42a is connected to selection terminal 42b. Additionally, common terminal 43a is connected to selection terminal 43b, and filter 33 is connected to antenna connection terminal 100 via switch 44. Thus, the signal in frequency band A is input from signal input terminal 110, a first output signal with a phase of 0° is output from output terminal 51b, and a second output signal with a phase of +90° is output from output terminal 51c. The first output signal is amplified by power amplifier 21 via switch 41 and input as a 0° phase input signal to input terminal 30a, then becomes a +45° phase first input signal after passing through high-pass filter 31. On the other hand, the second output signal is amplified by power amplifier 22, input as a +90° phase input signal to input terminal 30b via switch 42, and then becomes a +45° phase second input signal after passing through low-pass filter 32. Then, the first input signal with a phase of +45° and the second input signal with a phase of +45° are current-synthesized at the signal output terminal 130, and the fifth output signal obtained by the synthesis is output from the signal output terminal 130.

[0084] Accordingly, in the amplifier circuit 10, the phase difference between the first output signal at the output terminal of the power amplifier 21 and the second output signal at the output terminal of the power amplifier 22 is 90°, and the phase difference between the first input signal and the second input signal at the signal output terminal 130 is 0°. Therefore, it can operate as a current-synthesizing balanced amplifier that is resistant to load variations.

[0085] (Band B transmission mode)

[0086] The band B transmission mode is a mode in which the signal of band B is amplified and transmitted. Figure 3BThis diagram illustrates the circuit state of the amplifier circuit 10 according to Embodiment 1 when transmitting a frequency band B signal. As shown in the diagram, when transmitting a frequency band B signal, common terminal 41a is connected to selection terminal 41c, and common terminal 42a is connected to selection terminal 42c. Additionally, common terminal 43a is connected to selection terminal 43c, and filter 34 is connected to antenna connection terminal 100 via switch 44. Thus, the frequency band B signal is input from signal input terminal 120, a third output signal with a phase of 0° is output from output terminal 52b, and a fourth output signal with a phase of +90° is output from output terminal 52c. The third output signal is amplified by power amplifier 21 via switch 41 and input as a 0° phase input signal to input terminal 30a, then becomes a +45° phase first input signal via high-pass filter 31. On the other hand, the fourth output signal is amplified by power amplifier 23, input as a +90° phase input signal to input terminal 30b via switch 42, and then becomes a +45° phase second input signal via low-pass filter 32. Then, the first input signal with a phase of +45° and the second input signal with a phase of +45° are current-synthesized at the signal output terminal 130, and the fifth output signal obtained by the synthesis is output from the signal output terminal 130.

[0087] Accordingly, in the amplifier circuit 10, the phase difference between the third output signal at the output terminal of the power amplifier 21 and the fourth output signal at the output terminal of the power amplifier 23 is 90°, and the phase difference between the first input signal and the second input signal at the signal output terminal 130 is 0°. Therefore, it can operate as a current-synthesizing balanced amplifier that is resistant to load variations.

[0088] Furthermore, the power amplifier 21, high-pass filter 31, and low-pass filter 32 are shared in both frequency band A transmission mode and frequency band B transmission mode. Accordingly, compared with conventional current-combining balanced amplifiers that have two power amplifiers, a high-pass filter, and a low-pass filter for frequency band A transmission mode and two power amplifiers, a high-pass filter, and a low-pass filter for frequency band B transmission mode, a miniaturized amplifier circuit 10 supporting multiple frequency bands can be provided.

[0089] [1.5 Circuit structure of amplifier circuit 10A involved in the modified example]

[0090] Next, the circuit structure of the amplifier circuit 10A involved in the modified example will be described. Figure 4This is a circuit diagram of the amplifier circuit 10A according to the modified example. As shown in the figure, the amplifier circuit 10A includes amplifiers 11 and 12, power amplifiers 21, 22 and 23, a combining circuit 30A, switches 41 and 42, 90° mixing circuits 51 and 52, signal input terminals 110 and 120, and a signal output terminal 130. The amplifier circuit 10A according to this modified example differs from the amplifier circuit 10 according to Embodiment 1 only in the structure of the combining circuit 30A. Therefore, the following description of the amplifier circuit 10A according to this modified example will omit descriptions of structures identical to those of the amplifier circuit 10 according to Embodiment 1, and will focus on the different structures.

[0091] The 90° mixing circuit 51 is an example of a first 90° mixing circuit, having an input terminal 51a, an output terminal 51b, and an output terminal 51c, configured such that the phase difference between the first output signal output from the output terminal 51b and the second output signal output from the output terminal 51c is 90°. In this modified example, the input terminal 51a is an example of a first input terminal, the output terminal 51b is an example of a first output terminal, and the output terminal 51c is an example of a second output terminal, wherein the phase of the second output signal output from the output terminal 51c leads the phase of the first output signal output from the output terminal 51b by 90°.

[0092] The 90° mixing circuit 52 is an example of a second 90° mixing circuit, having input terminals 52a, output terminals 52b and 52c, configured such that the phase difference between the third output signal output from output terminal 52b and the fourth output signal output from output terminal 52c is 90°. In this modified example, input terminal 52a is an example of a second input terminal, output terminal 52b is an example of a third output terminal, and output terminal 52c is an example of a fourth output terminal, with the phase of the fourth output signal output from output terminal 52c leading the phase of the third output signal output from output terminal 52b by 90°.

[0093] The synthesis circuit 30A has an input terminal 30a (third input terminal), an input terminal 30b (fourth input terminal), and a signal output terminal 130 (fifth output terminal). It is configured to synthesize a first input signal input to the input terminal 30a and a second input signal input to the input terminal 30b, and output the synthesized fifth output signal from the signal output terminal 130.

[0094] In this modified example, the synthesis circuit 30A includes a transformer 60, a high-pass filter 31, and a low-pass filter 32. The transformer 60 has an input-side coil and an output-side coil that are magnetically coupled to each other. The low-pass filter 32 is connected between the input terminal 30a and one end 60a of the input-side coil. The high-pass filter 31 is connected between the input terminal 30b and the other end 60b of the input-side coil. One end 60c of the output-side coil is connected to the signal output terminal 130, and the other end of the output-side coil is grounded.

[0095] In amplifier circuit 10A, when transmitting a signal in frequency band A, common terminal 41a is connected to selection terminal 41b, and common terminal 42a is connected to selection terminal 42b. Thus, the signal in frequency band A is input from signal input terminal 110, a first output signal with a phase of 0° is output from output terminal 51b, and a second output signal with a phase of +90° is output from output terminal 51c. The first output signal is amplified by power amplifier 21 via switch 41 and input as a 0° phase input signal to input terminal 30a, then becomes a -45° phase first input signal after passing through low-pass filter 32. Conversely, the second output signal is amplified by power amplifier 22, input as a +90° phase input signal to input terminal 30b via switch 42, and becomes a +135° phase second input signal after passing through high-pass filter 31. Then, transformer 60 performs voltage synthesis on the -45° phase first input signal and the +135° phase second input signal, and the synthesized fifth output signal is output from signal output terminal 130.

[0096] Accordingly, in amplifier circuit 10A, the phase difference between the first output signal at the output terminal of power amplifier 21 and the second output signal at the output terminal of power amplifier 22 is 90°, and the phase difference between the first input signal and the second input signal at the input side coil of transformer 60 is 180°. Therefore, it can operate as a voltage synthesis type balanced amplifier resistant to load variations.

[0097] Furthermore, in amplifier circuit 10A, when transmitting a signal in frequency band B, common terminal 41a is connected to selection terminal 41c, and common terminal 42a is connected to selection terminal 42c. Thus, the signal in frequency band B is input from signal input terminal 120, a third output signal with a phase of 0° is output from output terminal 52b, and a fourth output signal with a phase of +90° is output from output terminal 52c. The third output signal is amplified by power amplifier 21 via switch 41 and input as a 0° phase input signal to input terminal 30a, then becomes a -45° phase first input signal after passing through low-pass filter 32. On the other hand, the fourth output signal is amplified by power amplifier 23, input as a +90° phase input signal to input terminal 30b via switch 42, and then becomes a +135° phase second input signal after passing through high-pass filter 31. Then, voltage synthesis is performed on the first input signal with a phase of -45° and the second input signal with a phase of +135° at the signal output terminal 130, and the fifth output signal obtained by the synthesis is output from the signal output terminal 130.

[0098] Accordingly, in amplifier circuit 10A, the phase difference between the third output signal at the output terminal of power amplifier 21 and the fourth output signal at the output terminal of power amplifier 23 is 90°, and the phase difference between the first input signal and the second input signal at the input side coil of transformer 60 is 180°. Therefore, it can operate as a voltage synthesis type balanced amplifier resistant to load variations.

[0099] Furthermore, the power amplifier 21, high-pass filter 31, and low-pass filter 32 are shared in both band A and band B transmission modes. Accordingly, compared to conventional voltage-synthesizing balanced amplifiers that have two power amplifiers, a high-pass filter, and a low-pass filter for band A transmission mode and two power amplifiers, a high-pass filter, and a low-pass filter for band B transmission, a miniaturized multi-band amplifier circuit 10A can be provided.

[0100] [2. Structure of the amplifier circuit 10B involved in Embodiment 2]

[0101] Next, the circuit structure of the amplifier circuit 10B involved in Example 2 will be described. Figure 5This is a circuit diagram of the amplifier circuit 10B according to Embodiment 2. As shown in the figure, the amplifier circuit 10B includes amplifiers 11 and 12, power amplifiers 21, 22 and 23, a combining circuit 30B, switches 41 and 42, 90° mixing circuits 51 and 52, signal input terminals 110 and 120, and a signal output terminal 130. The amplifier circuit 10B according to Embodiment 2 differs from the amplifier circuit 10 according to Embodiment 1 mainly in the connection structure of switch 41 and the structure of the combining circuit 30B. Therefore, the following description of the amplifier circuit 10B according to this embodiment omits the structures identical to those in the amplifier circuit 10 according to Embodiment 1, and focuses on the different structures.

[0102] The 90° mixing circuit 51 is an example of a first 90° mixing circuit, having an input terminal 51a, output terminals 51b and 51c, configured such that the phase difference between the second output signal output from the output terminal 51b and the first output signal output from the output terminal 51c is 90°. In this embodiment, the input terminal 51a is an example of a first input terminal, the output terminal 51b is an example of a second output terminal, and the output terminal 51c is an example of a first output terminal. The phase of the second output signal output from the output terminal 51b lags behind the phase of the first output signal output from the output terminal 51c by 90°.

[0103] The 90° mixing circuit 52 is an example of a second 90° mixing circuit, having input terminals 52a, output terminals 52b and 52c, configured such that the fourth output signal output from output terminal 52b has a 90° phase difference with the third output signal output from output terminal 52c. In this embodiment, input terminal 52a is an example of a second input terminal, output terminal 52b is an example of a fourth output terminal, and output terminal 52c is an example of a third output terminal. The phase of the fourth output signal output from output terminal 52b lags behind the phase of the third output signal output from output terminal 52c by 90°.

[0104] Switch 41 is an example of a first switch, having a common terminal 41a (first common terminal), a selection terminal 41b (first selection terminal), and a second selection terminal 41c, configured to switch the connection between the common terminal 41a and the selection terminal 41b, and the connection between the common terminal 41a and the selection terminal 41c. Switch 41 is, for example, a switching circuit composed of an SPDT switch.

[0105] The synthesis circuit 30B has an input terminal 30a (third input terminal), an input terminal 30b (fourth input terminal), and a signal output terminal 130 (fifth output terminal). It is configured to synthesize a first input signal input to the input terminal 30a and a second input signal input to the input terminal 30b, and output the synthesized fifth output signal from the signal output terminal 130.

[0106] In this embodiment, the synthesis circuit 30B includes a high-pass filter 31 and a low-pass filter 32. The low-pass filter 32 is connected between the input terminal 30a and the signal output terminal 130. The high-pass filter 31 is connected between the input terminal 30b and the signal output terminal 130.

[0107] Input terminal 51a is connected to the output terminal of amplifier 11, output terminal 51c is connected to selection terminal 41b, and output terminal 51b is connected to the input terminal of power amplifier 22. Input terminal 52a is connected to the output terminal of amplifier 12, output terminal 52c is connected to selection terminal 41c, and output terminal 52b is connected to the input terminal of power amplifier 23.

[0108] The common terminal 41a is connected to the input terminal of the power amplifier 21, the output terminal of the power amplifier 21 is connected to the input terminal 30a, the output terminal of the power amplifier 22 is connected to the selection terminal 42b, the output terminal of the power amplifier 23 is connected to the selection terminal 42c, and the common terminal 42a is connected to the input terminal 30b.

[0109] In amplifier circuit 10B, when transmitting a signal in frequency band A, common terminal 41a is connected to selection terminal 41b, and common terminal 42a is connected to selection terminal 42b. Thus, the signal in frequency band A is input from signal input terminal 110, a first output signal with a phase of +90° is output from output terminal 51c, and a second output signal with a phase of 0° is output from output terminal 51b. The first output signal is amplified by power amplifier 21 via switch 41 and input as a +90° phase input signal to input terminal 30a, then becomes a +45° phase first input signal after passing through low-pass filter 32. Conversely, the second output signal is amplified by power amplifier 22, input as a 0° phase input signal to input terminal 30b via switch 42, and becomes a +45° phase second input signal after passing through high-pass filter 31. Then, the +45° phase first input signal and the +45° phase second input signal are current-synthesized at signal output terminal 130, and the synthesized fifth output signal is output from signal output terminal 130.

[0110] Accordingly, in amplifier circuit 10B, the phase difference between the first output signal at the output terminal of power amplifier 21 and the second output signal at the output terminal of power amplifier 22 is 90°, and the phase difference between the first input signal and the second input signal at signal output terminal 130 is 0°. Therefore, it can operate as a current-synthesizing balanced amplifier resistant to load variations.

[0111] Furthermore, in amplifier circuit 10B, when transmitting a signal in frequency band B, common terminal 41a is connected to selection terminal 41c, and common terminal 42a is connected to selection terminal 42c. Thus, the signal in frequency band B is input from signal input terminal 120, a third output signal with a phase of +90° is output from output terminal 52c, and a fourth output signal with a phase of 0° is output from output terminal 52b. The third output signal is amplified by power amplifier 21 via switch 41 and input as a +90° phase input signal to input terminal 30a, then becomes a +45° phase first input signal after passing through low-pass filter 32. On the other hand, the fourth output signal is amplified by power amplifier 23, input as a 0° phase input signal to input terminal 30b via switch 42, and becomes a +45° phase second input signal after passing through high-pass filter 31. Then, the +45° phase first input signal and the +45° phase second input signal are current-synthesized at signal output terminal 130, and the synthesized fifth output signal is output from signal output terminal 130.

[0112] Accordingly, in amplifier circuit 10B, the phase difference between the third output signal at the output terminal of power amplifier 21 and the fourth output signal at the output terminal of power amplifier 23 is 90°, and the phase difference between the first input signal and the second input signal at signal output terminal 130 is 0°. Therefore, it can operate as a current-synthesizing balanced amplifier resistant to load variations.

[0113] Furthermore, the power amplifier 21, high-pass filter 31, and low-pass filter 32 are shared in both band A and band B transmission modes. Accordingly, compared to conventional current-combining balanced amplifiers that have two power amplifiers, a high-pass filter, and a low-pass filter for band A transmission mode and two power amplifiers, a high-pass filter, and a low-pass filter for band B transmission, a miniaturized multi-band amplifier circuit 10B can be provided.

[0114] Furthermore, in the amplifier circuit 10B according to Embodiment 2, by changing the structure of the synthesis circuit 30B, the voltage synthesis type amplifier circuit according to the modified example of Embodiment 2 can be realized. Specifically, the synthesis circuit 30B is replaced with a synthesis circuit having the following structure. The synthesis circuit of the amplifier circuit according to the modified example of Embodiment 2 includes a transformer 60, a high-pass filter 31, and a low-pass filter 32. The transformer 60 has an input-side coil and an output-side coil that are magnetically coupled to each other. The high-pass filter 31 is connected between the input terminal 30a and one end 60a of the input-side coil. The low-pass filter 32 is connected between the input terminal 30b and the other end 60b of the input-side coil. One end 60c of the output-side coil is connected to the signal output terminal 130, and the other end of the output-side coil is grounded.

[0115] Accordingly, in the modified example of Embodiment 2, the amplifier circuit exhibits a 90° phase difference between the first output signal at the output terminal of power amplifier 21 and the second output signal at the output terminal of power amplifier 22 in frequency band A transmission mode, and a 180° phase difference between the first input signal and the second input signal at the input side coil of transformer 60. Furthermore, in frequency band B transmission mode, the 90° phase difference between the third output signal at the output terminal of power amplifier 21 and the fourth output signal at the output terminal of power amplifier 23, and a 180° phase difference between the first input signal and the second input signal at the input side coil of transformer 60. Therefore, it can operate as a voltage-synthesizing balanced amplifier resistant to load variations.

[0116] Furthermore, the power amplifier 21, high-pass filter 31, and low-pass filter 32 are shared in both band A and band B transmission modes. Accordingly, compared to conventional voltage-synthesizing balanced amplifiers that have two power amplifiers, a high-pass filter, and a low-pass filter for band A transmission mode and two power amplifiers, a high-pass filter, and a low-pass filter for band B transmission, a miniaturized amplifier circuit supporting multiple frequency bands can be provided.

[0117] [3. Structure of the amplifier circuit 10C involved in Embodiment 3]

[0118] Next, the circuit structure of the amplifier circuit 10C involved in Example 3 will be described. Figure 6 This is a circuit diagram of the amplifier circuit 10C according to Embodiment 3. As shown in the figure, the amplifier circuit 10C includes amplifiers 11 and 12, power amplifiers 21, 22 and 23, a combining circuit 30C, switches 41 and 45, 90° mixing circuits 51 and 52, signal input terminals 110 and 120, and a signal output terminal 130. Compared with the amplifier circuit 10 according to Embodiment 1, the amplifier circuit 10C according to Embodiment 3 differs in the connection structure of switch 41, the structure of switch 45, and the structure of the combining circuit 30C. Therefore, in the following description of the amplifier circuit 10C according to this embodiment, the same structures as those in the amplifier circuit 10 according to Embodiment 1 will be omitted, and the description will focus on the different structures.

[0119] Power amplifier 21 is an example of a first power amplifier, capable of amplifying signals in frequency bands A and B. Power amplifier 22 is an example of a second power amplifier, capable of amplifying signals in frequency band A. Power amplifier 23 is an example of a third power amplifier, capable of amplifying signals in frequency band B.

[0120] In this embodiment, frequency band A is, for example, a frequency band belonging to the high-frequency band group (2.4GHz-2.8GHz) used for 4G-LTE or 5G-NR (hereinafter, sometimes referred to as HB). Frequency band B is, for example, a frequency band belonging to the mid-frequency band group (1.5GHz-2.4GHz) used for 4G-LTE or 5G-NR (hereinafter, sometimes referred to as MB). In addition, the frequency band including frequency band A and frequency band B is, for example, a frequency band belonging to the mid-high frequency band group (1.5GHz-2.8GHz) used for 4G-LTE or 5G-NR (hereinafter, sometimes referred to as MHB).

[0121] The 90° mixing circuit 51 is an example of a first 90° mixing circuit, having an input terminal 51a, output terminals 51b and 51c, configured such that the phase difference between the second output signal output from the output terminal 51b and the first output signal output from the output terminal 51c is 90°. In this embodiment, the input terminal 51a is an example of a first input terminal, the output terminal 51b is an example of a second output terminal, and the output terminal 51c is an example of a first output terminal. The phase of the second output signal output from the output terminal 51b lags behind the phase of the first output signal output from the output terminal 51c by 90°.

[0122] The 90° mixing circuit 52 is an example of a second 90° mixing circuit, having input terminals 52a, output terminals 52b and 52c, configured such that the phase difference between the third output signal output from output terminal 52b and the fourth output signal output from output terminal 52c is 90°. In this embodiment, input terminal 52a is an example of a second input terminal, output terminal 52b is an example of a third output terminal, and output terminal 52c is an example of a fourth output terminal. The phase of the fourth output signal output from output terminal 52c leads the phase of the third output signal output from output terminal 52b by 90°.

[0123] Switch 41 is an example of a first switch, having a common terminal 41a (first common terminal), a selection terminal 41b (first selection terminal), and a second selection terminal 41c, configured to switch the connection between the common terminal 41a and the selection terminal 41b, and the connection between the common terminal 41a and the selection terminal 41c. Switch 41 is, for example, a switching circuit composed of an SPDT switch.

[0124] Switch 45 is an example of a second switch, having common terminals 45a (second common terminal), 45b (third common terminal), selection terminals 45c (third selection terminal), 45d (fourth selection terminal), and 45e (fifth selection terminal). It is configured to switch between connections between common terminal 45a and selection terminal 45d and between common terminal 45b and selection terminal 45c, and between common terminal 45a and selection terminal 45e and between common terminal 45b and selection terminal 45d. Switch 45 is, for example, a switching circuit constructed from a DP3T (Double Pole 3 Throw) switch.

[0125] The synthesis circuit 30C has an input terminal 30a (third input terminal), an input terminal 30b (fourth input terminal), and a signal output terminal 130 (fifth output terminal). It is configured to synthesize a first input signal input to the input terminal 30a and a second input signal input to the input terminal 30b, and output the synthesized fifth output signal from the signal output terminal 130.

[0126] In this embodiment, the synthesis circuit 30C includes a high-pass filter 31 and a low-pass filter 32. The low-pass filter 32 is connected between the input terminal 30a and the signal output terminal 130. The high-pass filter 31 is connected between the input terminal 30b and the signal output terminal 130.

[0127] Input terminal 51a is connected to the output terminal of amplifier 11, output terminal 51c is connected to selection terminal 41b, and output terminal 51b is connected to the input terminal of power amplifier 22. Input terminal 52a is connected to the output terminal of amplifier 12, output terminal 52b is connected to selection terminal 41c, and output terminal 52c is connected to the input terminal of power amplifier 23.

[0128] Common terminal 41a is connected to the input terminal of power amplifier 21. The output terminal of power amplifier 21 is connected to selection terminal 45d. The output terminal of power amplifier 22 is connected to selection terminal 45c. The output terminal of power amplifier 23 is connected to selection terminal 45e. Common terminal 45a is connected to input terminal 30a. Common terminal 45b is connected to input terminal 30b.

[0129] In amplifier circuit 10C, when transmitting a signal in frequency band A (HB), common terminal 41a is connected to selection terminal 41b, common terminal 45a is connected to selection terminal 45d, and common terminal 45b is connected to selection terminal 45c. Thus, the signal in frequency band A (HB) is input from signal input terminal 110, a first output signal with a phase of +90° is output from output terminal 51c, and a second output signal with a phase of 0° is output from output terminal 51b. The first output signal is amplified by power amplifier 21 via switch 41, and then input to input terminal 30a as a +90° input signal via switch 45. It then passes through low-pass filter 32 to become a first input signal with a phase of +45°. Conversely, the second output signal is amplified by power amplifier 22, and then input to input terminal 30b as a 0° input signal via switch 45. It then passes through high-pass filter 31 to become a second input signal with a phase of +45°. Then, the first input signal with a phase of +45° and the second input signal with a phase of +45° are current-synthesized at the signal output terminal 130, and the fifth output signal obtained by the synthesis is output from the signal output terminal 130.

[0130] Accordingly, in the amplifier circuit 10C, the phase difference between the first output signal at the output terminal of the power amplifier 21 and the second output signal at the output terminal of the power amplifier 22 is 90°, and the phase difference between the first input signal and the second input signal at the signal output terminal 130 is 0°. Therefore, it can operate as a current-synthesizing balanced amplifier resistant to load variations.

[0131] Furthermore, in the amplifier circuit 10C, when transmitting a signal in frequency band B (MB), common terminal 41a is connected to selection terminal 41c, common terminal 45a is connected to selection terminal 45e, and common terminal 45b is connected to selection terminal 45d. Thus, the signal in frequency band B (MB) is input from signal input terminal 120, a fourth output signal with a phase of +90° is output from output terminal 52c, and a third output signal with a phase of 0° is output from output terminal 52b. The third output signal is amplified by power amplifier 21 via switch 41, and then input to input terminal 30b as a 0° phase input signal via switch 45. It then becomes a first input signal with a phase of +45° via high-pass filter 31. On the other hand, the fourth output signal is amplified by power amplifier 23, and then input to input terminal 30a as a +90° phase input signal via switch 45. It then becomes a second input signal with a phase of +45° via low-pass filter 32. Then, the first input signal with a phase of +45° and the second input signal with a phase of +45° are current-synthesized at the signal output terminal 130, and the fifth output signal obtained by the synthesis is output from the signal output terminal 130.

[0132] Accordingly, in the amplifier circuit 10C, the phase difference between the third output signal at the output terminal of the power amplifier 21 and the fourth output signal at the output terminal of the power amplifier 23 is 90°, and the phase difference between the first input signal and the second input signal at the signal output terminal 130 is 0°. Therefore, it can operate as a current-synthesizing balanced amplifier resistant to load variations.

[0133] Furthermore, the power amplifier 21, high-pass filter 31, and low-pass filter 32 are shared in both band A and band B transmission modes. Accordingly, compared to conventional current-combining balanced amplifiers that have two power amplifiers, a high-pass filter, and a low-pass filter for band A transmission mode and two power amplifiers, a high-pass filter, and a low-pass filter for band B transmission, a miniaturized multi-band amplifier circuit 10C can be provided.

[0134] Furthermore, by configuring the DP3T type switch 45, the connection destination of each of the power amplifiers 21 to 23 can be selected as either the low-pass filter 32 or the high-pass filter 31 for connection.

[0135] Furthermore, in the amplifier circuit 10C according to Embodiment 3, by changing the structure of the synthesis circuit 30C, the voltage synthesis type amplifier circuit according to the modified example of Embodiment 3 can be realized. Specifically, the synthesis circuit 30C is replaced with a synthesis circuit having the following structure. The synthesis circuit of the amplifier circuit according to the modified example of Embodiment 3 includes a transformer 60, a high-pass filter 31, and a low-pass filter 32. The transformer 60 has an input-side coil and an output-side coil that are magnetically coupled to each other. The high-pass filter 31 is connected between the input terminal 30a and one end 60a of the input-side coil. The low-pass filter 32 is connected between the input terminal 30b and the other end 60b of the input-side coil. One end 60c of the output-side coil is connected to the signal output terminal 130, and the other end of the output-side coil is grounded.

[0136] Accordingly, in the modified example of Embodiment 3, the amplifier circuit exhibits a 90° phase difference between the first output signal at the output terminal of power amplifier 21 and the second output signal at the output terminal of power amplifier 22 in frequency band A transmission mode, and a 180° phase difference between the first input signal and the second input signal at the input side coil of transformer 60. Furthermore, in frequency band B transmission mode, the 90° phase difference between the third output signal at the output terminal of power amplifier 21 and the fourth output signal at the output terminal of power amplifier 23, and a 180° phase difference between the first input signal and the second input signal at the input side coil of transformer 60. Therefore, it can operate as a voltage-synthesizing balanced amplifier resistant to load variations.

[0137] Furthermore, the power amplifier 21, high-pass filter 31, and low-pass filter 32 are shared in both band A and band B transmission modes. Accordingly, compared to conventional voltage-synthesizing balanced amplifiers that have two power amplifiers, a high-pass filter, and a low-pass filter for band A transmission mode and two power amplifiers, a high-pass filter, and a low-pass filter for band B transmission, a miniaturized amplifier circuit supporting multiple frequency bands can be provided.

[0138] Furthermore, by configuring the DP3T type switch 45, the connection destination of each of the power amplifiers 21 to 23 can be selected as either the low-pass filter 32 or the high-pass filter 31 for connection.

[0139] [4. Structure of the amplifier circuit 10D involved in Example 4]

[0140] Next, the circuit structure of the amplifier circuit 10D involved in Example 4 will be described. Figure 7 This is a circuit diagram of the amplifier circuit 10D according to Embodiment 4. As shown in the figure, the amplifier circuit 10D includes amplifiers 11 and 12, power amplifiers 21, 22 and 23, a combining circuit 30D, switches 41 and 45, 90° mixing circuits 51 and 52, signal input terminals 110 and 120, and a signal output terminal 130. Compared with the amplifier circuit 10C according to Embodiment 3, the amplifier circuit 10D according to Embodiment 4 differs in the connection structure of switches 41 and 45 and the structure of the combining circuit 30D. Therefore, the following description of the amplifier circuit 10D according to this embodiment omits the structures identical to those in the amplifier circuit 10C according to Embodiment 3, and focuses on the different structures.

[0141] Power amplifier 21 is an example of a first power amplifier, capable of amplifying signals in frequency bands A and B (MHB). Power amplifier 22 is an example of a second power amplifier, capable of amplifying signals in frequency band A (HB). Power amplifier 23 is an example of a third power amplifier, capable of amplifying signals in frequency band B (MB).

[0142] The 90° mixing circuit 51 is an example of a first 90° mixing circuit, having an input terminal 51a, an output terminal 51b, and an output terminal 51c, configured such that the phase difference between the first output signal output from the output terminal 51b and the second output signal output from the output terminal 51c is 90°. In this embodiment, the input terminal 51a is an example of a first input terminal, the output terminal 51b is an example of a first output terminal, and the output terminal 51c is an example of a second output terminal. The phase of the second output signal output from the output terminal 51c leads the phase of the first output signal output from the output terminal 51b by 90°.

[0143] The 90° mixing circuit 52 is an example of a second 90° mixing circuit, having input terminals 52a, output terminals 52b and 52c, configured such that the fourth output signal output from output terminal 52b has a 90° phase difference with the third output signal output from output terminal 52c. In this embodiment, input terminal 52a is an example of a second input terminal, output terminal 52b is an example of a fourth output terminal, and output terminal 52c is an example of a third output terminal. The phase of the fourth output signal output from output terminal 52b lags behind the phase of the third output signal output from output terminal 52c by 90°.

[0144] The synthesis circuit 30D has an input terminal 30a (third input terminal), an input terminal 30b (fourth input terminal), and a signal output terminal 130 (fifth output terminal). It is configured to synthesize a first input signal input to the input terminal 30a and a second input signal input to the input terminal 30b, and output the synthesized fifth output signal from the signal output terminal 130.

[0145] In this embodiment, the synthesis circuit 30D includes a high-pass filter 31 and a low-pass filter 32. The high-pass filter 31 is connected between the input terminal 30a and the signal output terminal 130. The low-pass filter 32 is connected between the input terminal 30b and the signal output terminal 130.

[0146] Input terminal 51a is connected to the output terminal of amplifier 11, output terminal 51b is connected to selection terminal 41b, and output terminal 51c is connected to the input terminal of power amplifier 22. Input terminal 52a is connected to the output terminal of amplifier 12, output terminal 52c is connected to selection terminal 41c, and output terminal 52b is connected to the input terminal of power amplifier 23.

[0147] Common terminal 41a is connected to the input terminal of power amplifier 21. The output terminal of power amplifier 21 is connected to selection terminal 45d. The output terminal of power amplifier 22 is connected to selection terminal 45c. The output terminal of power amplifier 23 is connected to selection terminal 45e. Common terminal 45a is connected to input terminal 30a. Common terminal 45b is connected to input terminal 30b.

[0148] Figure 8AThis diagram illustrates the circuit state of the amplifier circuit 10D according to Embodiment 4 when transmitting a signal in frequency band A (HB). As shown in the diagram, when transmitting a signal in frequency band A (HB), the common terminal 41a is connected to the selection terminal 41b, the common terminal 45a is connected to the selection terminal 45d, and the common terminal 45b is connected to the selection terminal 45c. Thus, the signal in frequency band A (HB) is input from the signal input terminal 110, a first output signal with a phase of 0° is output from the output terminal 51b, and a second output signal with a phase of +90° is output from the output terminal 51c. The first output signal is amplified by the power amplifier 21 via switch 41, and then input to the input terminal 30a as a 0° phase input signal via switch 45, becoming a +45° phase first input signal via the high-pass filter 31. On the other hand, the second output signal is amplified by the power amplifier 22, and then input to the input terminal 30b as a +90° phase input signal via switch 45, becoming a +45° phase second input signal via the low-pass filter 32. Then, the first input signal with a phase of +45° and the second input signal with a phase of +45° are current-synthesized at the signal output terminal 130, and the fifth output signal obtained by the synthesis is output from the signal output terminal 130.

[0149] Accordingly, in the amplifier circuit 10D, the phase difference between the first output signal at the output terminal of the power amplifier 21 and the second output signal at the output terminal of the power amplifier 22 is 90°, and the phase difference between the first input signal and the second input signal at the signal output terminal 130 is 0°. Therefore, it can operate as a current-synthesizing balanced amplifier that is resistant to load variations.

[0150] Figure 8BThis diagram illustrates the circuit state of the amplifier circuit 10D according to Embodiment 4 when transmitting a frequency band B (MB) signal. As shown in the diagram, when transmitting a frequency band B (MB) signal, common terminal 41a is connected to selection terminal 41c, common terminal 45a is connected to selection terminal 45e, and common terminal 45b is connected to selection terminal 45d. Thus, the frequency band B (MB) signal is input from signal input terminal 120, a fourth output signal with a phase of 0° is output from output terminal 52b, and a third output signal with a phase of +90° is output from output terminal 52c. The third output signal is amplified by power amplifier 21 via switch 41, and then input to input terminal 30b as a +90° input signal via switch 45. It then becomes a first input signal with a phase of +45° via low-pass filter 32. On the other hand, the fourth output signal is amplified by power amplifier 23, and then input to input terminal 30a as a 0° input signal via switch 45. It then becomes a second input signal with a phase of +45° via high-pass filter 31. Then, the first input signal with a phase of +45° and the second input signal with a phase of +45° are current-synthesized at the signal output terminal 130, and the fifth output signal obtained by the synthesis is output from the signal output terminal 130.

[0151] Accordingly, in the amplifier circuit 10D, the phase difference between the third output signal at the output terminal of the power amplifier 21 and the fourth output signal at the output terminal of the power amplifier 23 is 90°, and the phase difference between the first input signal and the second input signal at the signal output terminal 130 is 0°. Therefore, it can operate as a current-synthesizing balanced amplifier that is resistant to load variations.

[0152] Furthermore, the power amplifier 21, high-pass filter 31, and low-pass filter 32 are shared in both band A and band B transmission modes. Accordingly, compared to conventional current-combining balanced amplifiers that have two power amplifiers, a high-pass filter, and a low-pass filter for band A transmission mode and two power amplifiers, a high-pass filter, and a low-pass filter for band B transmission, a miniaturized multi-band amplifier circuit 10D can be provided.

[0153] Furthermore, by configuring the DP3T type switch 45, the connection destination of each of the power amplifiers 21 to 23 can be selected as either the low-pass filter 32 or the high-pass filter 31 for connection.

[0154] Figure 9AThis is a diagram showing the frequency characteristics of the high-pass filter 31 and power amplifiers 21 and 22 when transmitting in band A (HB) of the amplifier circuit 10D according to Embodiment 4. The pass characteristics of the high-pass filter 31 are shown above the diagram, and the gain characteristics of the power amplifiers 21-23 are shown below the diagram. The high-pass filter 31 includes band A (HB) and band B (MB) as passbands, but since it has an attenuation band at a lower frequency than band B, the insertion loss of band A (HB) tends to be smaller than that of band B (MB).

[0155] Figure 9B This is a diagram showing the frequency characteristics of the low-pass filter 32 and power amplifiers 21 and 23 when transmitting in band B (MB) of the amplifier circuit 10D according to Embodiment 4. The pass characteristics of the low-pass filter 32 are shown above the diagram, and the gain characteristics of the power amplifiers 21-23 are shown below. The low-pass filter 32 includes band A (HB) and band B (MB) as passbands, but since it has an attenuation band at a higher frequency than band A, the insertion loss of band B (MB) tends to be smaller than that of band A (HB).

[0156] In addition, such as Figure 9A and Figure 9B As shown in both cases, power amplifier 21 needs to include frequency bands A and B in the amplification band and has wide-band amplification characteristics. Therefore, the gain of power amplifier 21 is lower than that of power amplifiers 22 and 23, which have narrow-band amplification characteristics.

[0157] In contrast, in the amplifier circuit 10D involved in Embodiment 4, when the frequency band A (HB) signal is transmitted, such as Figure 8A As shown, power amplifier 21 is connected to high-pass filter 31, and power amplifier 22 is connected to low-pass filter 32. Additionally, when transmitting frequency band B (MB) signals, as... Figure 8B As shown, power amplifier 21 is connected to low-pass filter 32, and power amplifier 23 is connected to high-pass filter 31.

[0158] That is, when transmitting a signal in frequency band A (HB), i.e., when a high-frequency signal in frequency band A (HB) is input from input terminal 51a, the low gain in power amplifier 21 can be compensated by the high-pass filter 31 with low insertion loss in frequency band A (HB). Similarly, when transmitting a signal in frequency band B (MB), i.e., when a high-frequency signal in frequency band B (MB) is input from input terminal 52a, the low gain in power amplifier 21 can be compensated by the low-pass filter 32 with low insertion loss in frequency band B (MB). Therefore, an amplifier circuit 10D capable of transmitting signals in frequency band A and frequency band B with low loss can be provided.

[0159] Furthermore, in the amplifier circuit 10D according to Embodiment 4, by changing the structure of the synthesis circuit 30D, the voltage synthesis type amplifier circuit according to the modified example of Embodiment 4 can be realized. Specifically, the synthesis circuit 30D is replaced with a synthesis circuit having the following structure. The synthesis circuit of the amplifier circuit according to the modified example of Embodiment 4 includes a transformer 60, a high-pass filter 31, and a low-pass filter 32. The transformer 60 has an input-side coil and an output-side coil that are magnetically coupled to each other. The low-pass filter 32 is connected between the input terminal 30a and one end 60a of the input-side coil. The high-pass filter 31 is connected between the input terminal 30b and the other end 60b of the input-side coil. One end 60c of the output-side coil is connected to the signal output terminal 130, and the other end of the output-side coil is grounded.

[0160] Accordingly, in the modified example of Embodiment 4, the amplifier circuit exhibits a 90° phase difference between the first output signal at the output terminal of power amplifier 21 and the second output signal at the output terminal of power amplifier 22 in frequency band A transmission mode, and a 180° phase difference between the first input signal and the second input signal at the input side coil of transformer 60. Furthermore, in frequency band B transmission mode, the 90° phase difference between the third output signal at the output terminal of power amplifier 21 and the fourth output signal at the output terminal of power amplifier 23, and a 180° phase difference between the first input signal and the second input signal at the input side coil of transformer 60. Therefore, it can operate as a voltage-synthesizing balanced amplifier resistant to load variations.

[0161] Furthermore, the power amplifier 21, high-pass filter 31, and low-pass filter 32 are shared in both band A and band B transmission modes. Accordingly, compared to conventional voltage-synthesizing balanced amplifiers that have two power amplifiers, a high-pass filter, and a low-pass filter for band A transmission mode and two power amplifiers, a high-pass filter, and a low-pass filter for band B transmission, a miniaturized amplifier circuit supporting multiple frequency bands can be provided.

[0162] Furthermore, by configuring the DP3T type switch 45, the connection destination of each of the power amplifiers 21 to 23 can be selected as either the low-pass filter 32 or the high-pass filter 31 for connection.

[0163] [5. Component configuration of the high-frequency circuit 1 involved in Embodiment 1]

[0164] Next, the component configuration of the high-frequency circuit 1 involved in Embodiment 1 will be described. Figure 10 This is a top view of the high-frequency circuit 1 involved in Embodiment 1. Figure 10 In (a), the arrangement of circuit components is shown when viewed from the positive z-axis direction on the main surface 90a of the mounting substrate 90. Additionally, in Figure 10 In (b), the arrangement of circuit components is shown when the main surface 90b of the mounting substrate 90 is viewed from the positive z-axis direction. Furthermore, in Figure 10 In the diagram, part of the wiring connecting the mounting base plate 90 and the various circuit components is omitted. Additionally, in... Figure 10 In order to make it easier to understand the configuration relationship of power amplifiers, switches, and filters, labels indicating their functions are marked, but these labels are not used in actual power amplifiers, switches, and filters.

[0165] Compared to Figure 1 The high-frequency circuit 1 shown is... Figure 10 The high-frequency circuit 1 shown also includes a mounting base plate 90.

[0166] The mounting substrate 90 has two opposing main surfaces 90a (first main surface) and 90b (second main surface) and is a substrate for mounting circuit components constituting the high-frequency circuit 1. The mounting substrate 90 may be, for example, a low-temperature co-fired ceramic (LTCC) substrate with a multilayer dielectric structure, a high-temperature co-fired ceramic (HTCC) substrate, a component-embedded substrate, a substrate with a redistribution layer (RDL), or a printed circuit board.

[0167] like Figure 10 As shown, power amplifiers 21-23, a high-pass filter 31, and a low-pass filter 32 are disposed on the main surface 90a of the mounting substrate 90. Additionally, a semiconductor IC 70 is disposed on the main surface 90b of the mounting substrate 90.

[0168] Semiconductor IC 70 is an example of a first semiconductor IC, including switches 41-44. Furthermore, switches 43 and 44 may not be included in semiconductor IC 70. Semiconductor IC 70 may be constructed using CMOS (Complementary Metal Oxide Semiconductor), specifically, it may be manufactured using SOI (Silicon on Insulator) technology. Additionally, semiconductor IC 70 may also be constructed from at least one of GaAs, SiGe, and GaN. Furthermore, the semiconductor material of semiconductor IC 70 is not limited to the materials described above.

[0169] In addition, although not shown, amplifiers 11 and 12 constituting high-frequency circuit 1, as well as 90° mixing circuits 51 and 52, can also be configured on mounting substrate 90.

[0170] Alternatively, a resin component may be disposed on the main surface 90a and / or the main surface 90b. Additionally, a shielding electrode layer may be disposed covering the surface and sides of the aforementioned resin component.

[0171] Here, when viewed from above on the mounting substrate 90, the semiconductor IC 70 and the power amplifier 21 overlap at least partially.

[0172] Accordingly, the wiring connecting the power amplifier 21 and the switch 41 can be shortened, thereby reducing the transmission loss of the transmitted signal through the relatively wide-bandwidth and low-gain power amplifier 21, and reducing the transmission loss of the high-frequency circuit 1 and the amplifier circuit 10.

[0173] Furthermore, it is desirable that, when viewed from above the mounting substrate 90, the common terminal 41a of the switch 41 overlaps at least partially with the power amplifier 21.

[0174] Accordingly, the wiring connecting the power amplifier 21 and the switch 41 can be further shortened, thereby further reducing the transmission loss of the high-frequency circuit 1 and the amplifier circuit 10.

[0175] Additionally, it is desirable that, when viewed from above the mounting substrate 90, the common terminal 42a of the switch 42 overlaps at least partially with the low-pass filter 32, the selection terminal 42b overlaps at least partially with the power amplifier 22, and the selection terminal 42c overlaps at least partially with the power amplifier 23.

[0176] Accordingly, the wiring connecting power amplifiers 22 and 23 to low-pass filter 32 can be shortened, thereby reducing the transmission loss of high-frequency circuit 1 and amplifier circuit 10.

[0177] [6. Component configuration of the high-frequency circuit 1B involved in Example 2]

[0178] Next, the component configuration of the high-frequency circuit 1B involved in Embodiment 2 will be described. Figure 11 This is a top view of the high-frequency circuit 1B involved in Embodiment 2. Figure 11 In (a), the arrangement of circuit components is shown when viewed from the positive z-axis direction on the main surface 90a of the mounting substrate 90. Additionally, in Figure 11 In (b), the arrangement of circuit components is shown when the main surface 90b of the mounting substrate 90 is viewed from the positive z-axis direction. Furthermore, in Figure 11 In the diagram, part of the wiring connecting the mounting base plate 90 and the various circuit components is omitted. Additionally, in... Figure 11 In order to make it easier to understand the configuration relationship of power amplifiers, switches, and filters, labels indicating their functions are marked, but these labels are not used in actual power amplifiers, switches, and filters.

[0179] Figure 11 The high-frequency circuit 1B shown includes an amplifier circuit 10B, filters 33 and 34, switches 43 and 44, an antenna connection terminal 100, and a mounting substrate 90. The filters 33 and 34, switches 43 and 44, and the antenna connection terminal 100 have the same connection structure as those of the high-frequency circuit 1 in the embodiment. The component configuration of the high-frequency circuit 1B in Embodiment 2 differs from that of the high-frequency circuit 1 in Embodiment 1 in that the configurations of the power amplifiers 21-23, the high-pass filter 31, the low-pass filter 32, and the semiconductor IC 70B are different. Therefore, the following description of the component configuration of the high-frequency circuit 1B in this embodiment omits structures identical to those in the high-frequency circuit 1 in Embodiment 1, focusing instead on the different structures.

[0180] like Figure 11 As shown, power amplifiers 21-23, a high-pass filter 31, and a low-pass filter 32 are disposed on the main surface 90a of the mounting substrate 90. Additionally, a semiconductor IC 70B is disposed on the main surface 90b of the mounting substrate 90.

[0181] Semiconductor IC 70B is an example of a first semiconductor IC, including switches 41-44. Furthermore, switches 43 and 44 may not be included in semiconductor IC 70B. Semiconductor IC 70B may be constructed using CMOS, for example, or specifically, it may be manufactured using SOI technology. Additionally, semiconductor IC 70B may be constructed from at least one of GaAs, SiGe, and GaN. Furthermore, the semiconductor material of semiconductor IC 70B is not limited to the materials described above.

[0182] In addition, although not shown, amplifiers 11 and 12 constituting high-frequency circuit 1B, as well as 90° mixing circuits 51 and 52, can also be configured on mounting substrate 90.

[0183] Here, when viewed from above the mounting substrate 90, the semiconductor IC 70B and the power amplifier 21 overlap at least partially.

[0184] Accordingly, the wiring connecting the power amplifier 21 and the switch 41 can be shortened, thereby reducing the transmission loss of the transmitted signal through the relatively wide-bandwidth and low-gain power amplifier 21, and reducing the transmission loss of the high-frequency circuit 1B and the amplifier circuit 10B.

[0185] Furthermore, it is desirable that, when viewed from above the mounting substrate 90, the common terminal 41a of the switch 41 overlaps at least partially with the power amplifier 21.

[0186] Accordingly, the wiring connecting the power amplifier 21 and the switch 41 can be further shortened, thus further reducing the transmission loss of the high-frequency circuit 1B and the amplifier circuit 10B.

[0187] Additionally, it is desirable that, when viewed from above the mounting substrate 90, the common terminal 42a of the switch 42 overlaps at least partially with the high-pass filter 31, the select terminal 42b overlaps at least partially with the power amplifier 22, and the select terminal 42c overlaps at least partially with the power amplifier 23.

[0188] Accordingly, the wiring connecting power amplifiers 22 and 23 to high-pass filter 31 can be shortened, thereby reducing the transmission loss of high-frequency circuit 1B and amplifier circuit 10B.

[0189] [7 Component configuration of the high-frequency circuit 1C involved in Embodiment 3]

[0190] Next, the component configuration of the high-frequency circuit 1C involved in Embodiment 3 will be described. Figure 12 This is a top view of the high-frequency circuit 1C involved in Embodiment 3. Figure 12 In (a), the arrangement of circuit components is shown when viewed from the positive z-axis direction on the main surface 90a of the mounting substrate 90. Additionally, in Figure 12 In (b), the arrangement of circuit components is shown when the main surface 90b of the mounting substrate 90 is viewed from the positive z-axis direction. Furthermore, in Figure 12 In the diagram, part of the wiring connecting the mounting base plate 90 and the various circuit components is omitted. Additionally, in... Figure 12 In order to make it easier to understand the configuration relationship of power amplifiers, switches, and filters, labels indicating their functions are marked, but these labels are not used in actual power amplifiers, switches, and filters.

[0191] Figure 12 The high-frequency circuit 1C shown includes an amplifier circuit 10C, filters 33 and 34, switches 43 and 44, an antenna connection terminal 100, and a mounting substrate 90. The filters 33 and 34, switches 43 and 44, and the antenna connection terminal 100 have the same connection structure as those of the high-frequency circuit 1 in the embodiment. The component configuration of the high-frequency circuit 1C in Embodiment 3 differs from that of the high-frequency circuit 1 in Embodiment 1 in the configuration of power amplifiers 21-23, high-pass filter 31, low-pass filter 32, and semiconductor IC 70C. Therefore, the following description of the component configuration of the high-frequency circuit 1C in this embodiment omits descriptions of structures identical to those in the high-frequency circuit 1 in Embodiment 1, focusing instead on descriptions of structures with different configurations.

[0192] like Figure 12 As shown, power amplifiers 21-23, a high-pass filter 31, and a low-pass filter 32 are disposed on the main surface 90a of the mounting substrate 90. Additionally, a semiconductor IC 70C is disposed on the main surface 90b of the mounting substrate 90.

[0193] Semiconductor IC 70C is an example of a first semiconductor IC, including switches 41, 43, 44, and 45. Furthermore, switches 43 and 44 may not be included in semiconductor IC 70C. Semiconductor IC 70C may be constructed using CMOS, for example, and specifically, may be manufactured using SOI technology. Additionally, semiconductor IC 70C may also be constructed from at least one of GaAs, SiGe, and GaN. Furthermore, the semiconductor material of semiconductor IC 70C is not limited to the materials described above.

[0194] In addition, although not shown, amplifiers 11 and 12 constituting the high-frequency circuit 1C, as well as 90° mixing circuits 51 and 52, can also be configured on the mounting substrate 90.

[0195] Here, when viewed from above on the mounting substrate 90, the semiconductor IC 70C and the power amplifier 21 overlap at least partially.

[0196] Accordingly, the wiring connecting the power amplifier 21 and the switch 41 can be shortened, thereby reducing the transmission loss of the transmitted signal through the relatively wide-bandwidth and low-gain power amplifier 21, and reducing the transmission loss of the high-frequency circuit 1C and the amplifier circuit 10C.

[0197] Furthermore, it is desirable that, when viewed from above the mounting substrate 90, the common terminal 41a of switch 41 overlaps at least partially with the power amplifier 21, and the select terminal 45d of switch 45 overlaps at least partially with the power amplifier 21.

[0198] Accordingly, the wiring connecting the power amplifier 21 to the switch 41 and the power amplifier 21 to the switch 45 can be further shortened, thus further reducing the transmission loss of the high-frequency circuit 1C and the amplifier circuit 10C.

[0199] Furthermore, when viewed from above on the mounting substrate 90, power amplifiers 21 to 23 are arranged in the order of power amplifier 22, power amplifier 21, and power amplifier 23 in the negative y-axis direction (first direction) on the main surface 90a, and selection terminals 45c, 45d, and 45e are arranged in the order of selection terminals 45c, 45d, and 45e in the negative y-axis direction (first direction) on the main surface 90b.

[0200] Accordingly, the total length of the wiring connecting the selection terminal 45d to the common terminal 45a and the wiring connecting the selection terminal 45d to the common terminal 45b of the power amplifier 21 can be shortened, thereby reducing the transmission loss of the transmitted signal through the relatively wide-bandwidth and low-gain power amplifier 21, and reducing the transmission loss of the high-frequency circuit 1C and the amplifier circuit 10C.

[0201] Furthermore, although not shown in the figure, it is also possible that, when viewed from above on the mounting substrate 90, the common terminals 45a and 45b are arranged in the order of common terminals 45b and 45a in the negative y-axis direction (first direction) on the main surface 90b.

[0202] Accordingly, the wiring connecting the common terminals 45a and 45b to the selection terminals 45c, 45d and 45e can be configured to be as short as possible and not cross within the switch 45, thereby reducing the transmission loss of the high-frequency circuit 1C and the amplifier circuit 10C and improving the isolation between signal paths.

[0203] Furthermore, although not illustrated, it is also possible that the high-pass filter 31 and the low-pass filter 32 are arranged in the order of high-pass filter 31 and low-pass filter 32 in the negative y-axis direction (first direction) on the main surface 90a.

[0204] Accordingly, the wiring can be configured to minimize the length and prevent crossing of the wiring not only inside the switch 45, but also from the selection terminals 45c, 45d, and 45e to the low-pass filter 32 and the high-pass filter 31. This reduces the transmission loss of the high-frequency circuit 1C and the amplifier circuit 10C and improves the isolation between signal paths.

[0205] Furthermore, it is desirable that, when viewed from above the mounting substrate 90, such as Figure 12 As shown, the common terminal 45a of switch 45 overlaps at least partially with the low-pass filter 32, the common terminal 45b overlaps at least partially with the high-pass filter 31, and the select terminal 45d overlaps at least partially with the power amplifier 21.

[0206] Accordingly, the wiring connecting the power amplifier 21 to the high-pass filter 31 and the low-pass filter 32 via the switch 45 can be shortened, thereby reducing the transmission loss of the high-frequency circuit 1C and the amplifier circuit 10C.

[0207] [8 Component configuration of the high-frequency circuit 1D involved in Example 4]

[0208] Next, the component configuration of the high-frequency circuit 1D involved in Embodiment 4 will be described. Figure 13 This is a top view of the high-frequency circuit 1D involved in Embodiment 4. Figure 13In (a), the arrangement of circuit components is shown when viewed from the positive z-axis direction on the main surface 90a of the mounting substrate 90. Additionally, in Figure 13 In (b), the arrangement of circuit components is shown when the main surface 90b of the mounting substrate 90 is viewed from the positive z-axis direction. Furthermore, in Figure 13 In the diagram, part of the wiring connecting the mounting base plate 90 and the various circuit components is omitted. Additionally, in... Figure 13 In order to make it easier to understand the configuration relationship of power amplifiers, switches, and filters, labels indicating their functions are marked, but these labels are not used in actual power amplifiers, switches, and filters.

[0209] Figure 13 The high-frequency circuit 1D shown includes an amplifier circuit 10D, filters 33 and 34, switches 43 and 44, an antenna connection terminal 100, and a mounting substrate 90. The filters 33 and 34, switches 43 and 44, and the antenna connection terminal 100 have the same connection structure as those of the high-frequency circuit 1 in the embodiment. The component configuration of the high-frequency circuit 1D in Embodiment 4 differs from that of the high-frequency circuit 1 in Embodiment 1 in the configuration of power amplifiers 21-23, high-pass filter 31, low-pass filter 32, and semiconductor IC 70D. Therefore, the following description of the component configuration of the high-frequency circuit 1D in this embodiment omits the structures identical to those in the high-frequency circuit 1 in Embodiment 1, focusing instead on the different structures.

[0210] like Figure 13 As shown, power amplifiers 21-23, a high-pass filter 31, and a low-pass filter 32 are disposed on the main surface 90a of the mounting substrate 90. Additionally, a semiconductor IC 70D is disposed on the main surface 90b of the mounting substrate 90.

[0211] Semiconductor IC 70D is an example of a first semiconductor IC, including switches 41, 43, 44, and 45. Furthermore, switches 43 and 44 may not be included in semiconductor IC 70D. Semiconductor IC 70D may be constructed using CMOS, for example, and specifically, may be manufactured using SOI technology. Additionally, semiconductor IC 70D may be constructed from at least one of GaAs, SiGe, and GaN. Furthermore, the semiconductor material of semiconductor IC 70D is not limited to the materials described above.

[0212] In addition, although not shown, amplifiers 11 and 12 constituting the high-frequency circuit 1D, as well as 90° mixing circuits 51 and 52, can also be configured on the mounting substrate 90.

[0213] Here, when viewed from above the mounting substrate 90, the semiconductor IC 70D and the power amplifier 21 overlap at least partially.

[0214] Accordingly, the wiring connecting the power amplifier 21 and the switch 41 can be shortened, thereby reducing the transmission loss of the transmitted signal through the relatively wide-bandwidth and low-gain power amplifier 21, and reducing the transmission loss of the high-frequency circuit 1D and the amplifier circuit 10D.

[0215] Furthermore, it is desirable that, when viewed from above the mounting substrate 90, the common terminal 41a of switch 41 overlaps at least partially with the power amplifier 21, and the select terminal 45d of switch 45 overlaps at least partially with the power amplifier 21.

[0216] Accordingly, the wiring connecting the power amplifier 21 to the switch 41 and the power amplifier 21 to the switch 45 can be further shortened, thus further reducing the transmission loss of the high-frequency circuit 1D and the amplifier circuit 10D.

[0217] Furthermore, when viewed from above on the mounting substrate 90, power amplifiers 21 to 23 are arranged in the order of power amplifier 22, power amplifier 21, and power amplifier 23 in the negative y-axis direction (first direction) on the main surface 90a, and selection terminals 45c, 45d, and 45e are arranged in the order of selection terminals 45c, 45d, and 45e in the negative y-axis direction (first direction) on the main surface 90b.

[0218] Accordingly, the total length of the wiring connecting the selection terminal 45d to the common terminal 45a and the wiring connecting the selection terminal 45d to the common terminal 45b of the power amplifier 21 can be shortened, thereby reducing the transmission loss of the transmitted signal through the relatively wide-bandwidth and low-gain power amplifier 21, and reducing the transmission loss of the high-frequency circuit 1D and the amplifier circuit 10D.

[0219] Furthermore, when viewed from above the mounting substrate 90, the common terminals 45a and 45b are arranged in the order of common terminals 45b and 45a in the negative y-axis direction (first direction) on the main surface 90b.

[0220] Accordingly, the wiring connecting the common terminals 45a and 45b to the selection terminals 45c, 45d and 45e can be configured to be as short as possible and not cross within the switch 45, thereby reducing the transmission loss of the high-frequency circuit 1D and the amplifier circuit 10D and improving the isolation between signal paths.

[0221] Alternatively, the high-pass filter 31 and the low-pass filter 32 can be arranged in the order of low-pass filter 32 and high-pass filter 31 in the negative y-axis direction (first direction) on the main surface 90a.

[0222] Accordingly, the wiring can be configured to minimize the length and prevent crossing of the wiring not only inside the switch 45, but also from the selection terminals 45c, 45d, and 45e to the low-pass filter 32 and the high-pass filter 31. This reduces the transmission loss of the high-frequency circuit 1D and the amplifier circuit 10D and improves the isolation between signal paths.

[0223] Additionally, it is desirable that, when viewed from above the mounting substrate 90, the common terminal 45a of the switch 45 overlaps at least partially with the high-pass filter 31, the common terminal 45b overlaps at least partially with the low-pass filter 32, and the select terminal 45d overlaps at least partially with the power amplifier 21.

[0224] Accordingly, the wiring connecting the power amplifier 21 to the high-pass filter 31 and the low-pass filter 32 via the switch 45 can be shortened, thereby reducing the transmission loss of the high-frequency circuit 1D and the amplifier circuit 10D.

[0225] [9. Effects, etc.]

[0226] The amplifier circuit 10 (10B) according to Embodiment 1 (2) comprises: a 90° mixing circuit 51 having input terminals 51a, output terminals 51b and 51c; a 90° mixing circuit 52 having input terminals 52a, output terminals 52b and 52c; power amplifiers 21, 22 and 23; a switch 41 having a common terminal 41a, selection terminals 41b and 41c; a switch 42 having a common terminal 42a, selection terminals 42b and 42c; and a combining circuit 30 (30B) having input terminals 30a and 30b and a signal output terminal 130, wherein... Output terminal 51b (51c) is connected to selection terminal 41b, output terminal 51c (51b) is connected to the input terminal of power amplifier 22, output terminal 52b (52c) is connected to selection terminal 41c, output terminal 52c (52b) is connected to the input terminal of power amplifier 23, common terminal 41a is connected to the input terminal of power amplifier 21, the output terminal of power amplifier 21 is connected to input terminal 30a, the output terminal of power amplifier 22 is connected to selection terminal 42b, the output terminal of power amplifier 23 is connected to selection terminal 42c, and common terminal 42a is connected to input terminal 30b.

[0227] Accordingly, by switching switches 41 and 42, amplifier circuit 10 (10B) can transmit signals in frequency band A using power amplifiers 21 and 22, and transmit signals in frequency band B using power amplifiers 21 and 23. When transmitting signals in frequency band A, the phase difference between the signals in frequency band A at the output of power amplifier 21 and the output of power amplifier 22 is made 90°, and these two signals are combined using a combining circuit. Similarly, when transmitting signals in frequency band B, the phase difference between the signals in frequency band B at the output of power amplifier 21 and the output of power amplifier 23 is made 90°, and these two signals are combined using a combining circuit. Therefore, amplifier circuit 10 (10B) can operate as a balanced amplifier resistant to load variations. Furthermore, power amplifier 21 and the combining circuit are shared in both frequency band A transmission mode and frequency band B transmission mode. Therefore, compared with conventional balanced amplifiers that have two power amplifiers and a combining circuit for transmission mode A and two power amplifiers and a combining circuit for transmission mode B, a miniaturized amplifier circuit 10 (10B) supporting multiple frequency bands can be provided.

[0228] Additionally, for example, in amplifier circuit 10 (10B), 90° mixing circuit 51 is configured such that the phase difference between the first output signal output from output terminal 51b (51c) and the second output signal output from output terminal 51c (51b) is 90°; 90° mixing circuit 52 is configured such that the phase difference between the third output signal output from output terminal 52b (52c) and the fourth output signal output from output terminal 52c (52b) is 90°; switch 41 is configured to switch the connection between common terminal 41a and selection terminal 41b and the connection between common terminal 41a and selection terminal 41c; switch 42 is configured to switch the connection between common terminal 42a and selection terminal 42b and the connection between common terminal 42a and selection terminal 42c; and synthesis circuit 30 is configured to output a fifth output signal obtained by combining the first input signal input to input terminal 30a and the second input signal input to input terminal 30b from signal output terminal 130.

[0229] Accordingly, the amplifier circuit 10 (10B) adds two switches to support multiple frequency bands, which reduces the number of power amplifiers and synthesis circuits. Therefore, a miniaturized amplifier circuit 10 (10B) that supports multiple frequency bands can be provided.

[0230] Additionally, for example, in the amplifier circuit 10 of Embodiment 1, the phase of the second output signal output from the output terminal 51c is 90° ahead of the phase of the first output signal output from the output terminal 51b, and the phase of the fourth output signal output from the output terminal 52c is 90° ahead of the phase of the third output signal output from the output terminal 52b. The synthesis circuit 30 includes: a high-pass filter 31 connected between the input terminal 30a and the signal output terminal 130; and a low-pass filter 32 connected between the input terminal 30b and the signal output terminal 130.

[0231] Accordingly, in the amplifier circuit 10, the phase difference between the first output signal at the output terminal of power amplifier 21 and the second output signal at the output terminal of power amplifier 22 is 90°, which enables the phase difference between the first input signal and the second input signal at the signal output terminal 130 to be 0°. Furthermore, the phase difference between the third output signal at the output terminal of power amplifier 21 and the fourth output signal at the output terminal of power amplifier 23 is 90°, which also enables the phase difference between the first input signal and the second input signal at the signal output terminal 130 to be 0°. Therefore, it can operate as a current-synthesizing balanced amplifier resistant to load variations.

[0232] Additionally, for example, in the amplifier circuit 10A involved in the modified example of Embodiment 1, the phase of the second output signal output from the output terminal 51c is 90° ahead of the phase of the first output signal output from the output terminal 51b, and the phase of the fourth output signal output from the output terminal 52c is 90° ahead of the phase of the third output signal output from the output terminal 52b. The synthesis circuit 30A includes: a transformer 60 having an input-side coil and an output-side coil; a low-pass filter 32 connected between the third input terminal and one end of the input-side coil; and a high-pass filter 31 connected between the fourth input terminal and the other end of the input-side coil. One end of the output-side coil is connected to the signal output terminal 130, and the other end of the output-side coil is grounded.

[0233] Accordingly, in amplifier circuit 10A, the phase difference between the first output signal at the output terminal of power amplifier 21 and the second output signal at the output terminal of power amplifier 22 is 90°, which enables the phase difference between the first input signal and the second input signal at signal output terminal 130 to be 180°. Furthermore, the phase difference between the third output signal at the output terminal of power amplifier 21 and the fourth output signal at the output terminal of power amplifier 23 is 90°, which also enables the phase difference between the first input signal and the second input signal at signal output terminal 130 to be 180°. Therefore, it can operate as a voltage-synthesizing balanced amplifier resistant to load variations.

[0234] Additionally, for example, in the amplifier circuit 10B according to Embodiment 2, the phase of the second output signal output from the output terminal 51b lags behind the phase of the first output signal output from the output terminal 51c by 90°, and the phase of the fourth output signal output from the output terminal 52b lags behind the phase of the third output signal output from the output terminal 52c by 90°. The synthesis circuit 30B includes: a low-pass filter 32 connected between the input terminal 30a and the signal output terminal 130; and a high-pass filter 31 connected between the input terminal 30b and the signal output terminal 130.

[0235] Accordingly, in amplifier circuit 10B, the phase difference between the first output signal at the output terminal of power amplifier 21 and the second output signal at the output terminal of power amplifier 22 is 90°, which enables the phase difference between the first input signal and the second input signal at signal output terminal 130 to be 0°. Furthermore, the phase difference between the third output signal at the output terminal of power amplifier 21 and the fourth output signal at the output terminal of power amplifier 23 is 90°, which also enables the phase difference between the first input signal and the second input signal at signal output terminal 130 to be 0°. Therefore, it can operate as a current-synthesizing balanced amplifier resistant to load variations.

[0236] Additionally, for example, in the amplifier circuit involved in the modified example of embodiment 2, the phase of the second output signal output from output terminal 51b lags behind the phase of the first output signal output from output terminal 51c by 90°, and the phase of the fourth output signal output from output terminal 52b lags behind the phase of the third output signal output from output terminal 52c by 90°. The synthesis circuit includes: a transformer 60 having an input-side coil and an output-side coil; a high-pass filter 31 connected between the input terminal 30a and one end of the input-side coil; and a low-pass filter 32 connected between the input terminal 30b and the other end of the input-side coil. One end of the output-side coil is connected to the signal output terminal 130, and the other end of the output-side coil is grounded.

[0237] Accordingly, in the amplifier circuit involved in the modified example of Embodiment 2, the phase difference between the first output signal at the output terminal of power amplifier 21 and the second output signal at the output terminal of power amplifier 22 is 90°, which enables the phase difference between the first input signal and the second input signal at signal output terminal 130 to be 180°. Furthermore, the phase difference between the third output signal at the output terminal of power amplifier 21 and the fourth output signal at the output terminal of power amplifier 23 is 90°, which also enables the phase difference between the first input signal and the second input signal at signal output terminal 130 to be 180°. Therefore, it can operate as a voltage-synthesizing balanced amplifier resistant to load variations.

[0238] Additionally, for example, in amplifier circuit 10 (10A, 10B), power amplifier 21 can amplify signals in frequency band A and frequency band B, power amplifier 22 can amplify signals in frequency band A, and power amplifier 23 can amplify signals in frequency band B. Power amplifier 23 does not perform amplification operations simultaneously with power amplifier 22. When transmitting signals in frequency band A, common terminal 41a is connected to selection terminal 41b, and common terminal 42a is connected to selection terminal 42b. When transmitting signals in frequency band B, common terminal 41a is connected to selection terminal 41c, and common terminal 42a is connected to selection terminal 42c.

[0239] Accordingly, by switching the two switches 41 and 42, both band A transmission mode and band B transmission mode can be supported, thus providing a multi-band amplifier circuit 10 (10A, 10B) with a simplified circuit structure.

[0240] Additionally, for example, the amplifier circuit 10 (10A, 10B) also includes a mounting substrate 90 having main surfaces 90a and 90b facing each other, switches 41 and 42 included in semiconductor IC 70 (70B), power amplifiers 21-23 disposed on main surface 90a, and semiconductor IC 70 (70B) disposed on main surface 90b. When viewed from above, semiconductor IC 70 (70B) and power amplifier 21 overlap at least partially.

[0241] Accordingly, the wiring connecting the power amplifier 21 and the switch 41 can be shortened, thereby reducing the transmission loss of the transmitted signal through the power amplifier 21, which has a wider bandwidth and lower gain compared to the power amplifiers 22 and 23, and reducing the transmission loss of the amplifier circuits 10 (10A, 10B).

[0242] Additionally, for example, in amplifier circuits 10 (10A, 10B), when viewed from above on mounting substrate 90, the common terminal 41a of switch 41 overlaps at least partially with power amplifier 21.

[0243] Accordingly, the wiring connecting the power amplifier 21 and the switch 41 can be further shortened, thereby further reducing the transmission loss of the amplifier circuit 10 (10A, 10B).

[0244] Additionally, the amplifier circuit 10C (10D) involved in Embodiment 3 (4) includes: a 90° mixing circuit 51 having input terminals 51a, output terminals 51b and 51c; a 90° mixing circuit 52 having input terminals 52a, output terminals 52b and 52c; power amplifiers 21, 22 and 23; a switch 41 having a common terminal 41a, selection terminals 41b and 41c; a switch 45 having common terminals 45a and 45b, selection terminals 45c, 45d and 45e; and a synthesis circuit 30C (30D) having input terminals 30a and 30b and a signal output terminal 130, wherein the output terminal... Sub-terminal 51c (51b) is connected to selection terminal 41b, output terminal 51b (51c) is connected to the input terminal of power amplifier 22, output terminal 52b (52c) is connected to selection terminal 41c, output terminal 52c (52b) is connected to the input terminal of power amplifier 23, common terminal 41a is connected to the input terminal of power amplifier 21, the output terminal of power amplifier 21 is connected to selection terminal 45d, the output terminal of power amplifier 22 is connected to selection terminal 45c, the output terminal of power amplifier 23 is connected to selection terminal 45e, common terminal 45a is connected to input terminal 30a, and common terminal 45b is connected to input terminal 30b.

[0245] Accordingly, the amplifier circuit 10C (10D) can transmit signals in frequency band A using power amplifiers 21 and 22, and transmit signals in frequency band B using power amplifiers 21 and 23, by switching switches 41 and 45. When transmitting signals in frequency band A, the phase difference between the signals in frequency band A at the output of power amplifier 21 and the output of power amplifier 22 is made 90°, and these two signals are combined by a combining circuit. Similarly, when transmitting signals in frequency band B, the phase difference between the signals in frequency band B at the output of power amplifier 21 and the output of power amplifier 23 is made 90°, and these two signals are combined by a combining circuit. Therefore, the amplifier circuit 10C (10D) can operate as a balanced amplifier resistant to load variations. Furthermore, power amplifier 21 and the combining circuit are shared in both frequency band A and frequency band B transmission modes. Therefore, compared to conventional balanced amplifiers that have two power amplifiers and a combining circuit for transmission mode A and two power amplifiers and a combining circuit for transmission mode B, a miniaturized amplifier circuit 10C (10D) supporting multiple frequency bands can be provided. Furthermore, by configuring the DP3T type switch 45, the connection destination of each of the power amplifiers 21 to 23 can be selected to be either the input terminals 30a and 30b.

[0246] Additionally, for example, in amplifier circuit 10C (10D), 90° mixing circuit 51 is configured such that the phase difference between the first output signal output from output terminal 51c (51b) and the second output signal output from output terminal 51b (51c) is 90°; 90° mixing circuit 52 is configured such that the phase difference between the third output signal output from output terminal 52c (52b) and the fourth output signal output from output terminal 52b (52c) is 90°; and switch 41 is configured to connect common terminal 41a and selection terminal 41b, and common terminal... The connection between 41a and selection terminal 41c is switched. Switch 45 is configured to switch the connection between common terminal 45a and selection terminal 45d and the connection between common terminal 45b and selection terminal 45c, and the connection between common terminal 45a and selection terminal 45e and the connection between common terminal 45b and selection terminal 45d. The synthesis circuit 30C (30D) is configured to output a fifth output signal from signal output terminal 130, which is a synthesis of the first input signal input to input terminal 30a and the second input signal input to input terminal 30b.

[0247] Accordingly, the amplifier circuit 10C (10D) adds two switches to support multiple frequency bands, which reduces the number of power amplifiers and synthesis circuits. Therefore, a miniaturized amplifier circuit 10C (10D) that supports multiple frequency bands can be provided.

[0248] Additionally, for example, in the amplifier circuit 10D according to embodiment 4, the phase of the second output signal output from output terminal 51c is 90° ahead of the phase of the first output signal output from output terminal 51b, and the phase of the fourth output signal output from output terminal 52b is 90° behind the phase of the third output signal output from output terminal 52c. The synthesis circuit 30D includes: a high-pass filter 31 connected between input terminal 30a and signal output terminal 130; and a low-pass filter 32 connected between input terminal 30b and signal output terminal 130.

[0249] Accordingly, in amplifier circuit 10D, the phase difference between the first output signal at the output terminal of power amplifier 21 and the second output signal at the output terminal of power amplifier 22 is 90°, which enables the phase difference between the first input signal and the second input signal at signal output terminal 130 to be 0°. Furthermore, the phase difference between the third output signal at the output terminal of power amplifier 21 and the fourth output signal at the output terminal of power amplifier 23 is 90°, which also enables the phase difference between the first input signal and the second input signal at signal output terminal 130 to be 0°. Therefore, it can operate as a current-synthesizing balanced amplifier resistant to load variations.

[0250] Additionally, for example, in the amplifier circuit involved in the modified example of embodiment 4, the phase of the second output signal output from output terminal 51c is 90° ahead of the phase of the first output signal output from output terminal 51b, and the phase of the fourth output signal output from output terminal 52b is 90° behind the phase of the third output signal output from output terminal 52c. The synthesis circuit includes: a transformer 60 having an input-side coil and an output-side coil; a low-pass filter 32 connected between the input terminal 30a and one end of the input-side coil; and a high-pass filter 31 connected between the input terminal 30b and the other end of the input-side coil. One end of the output-side coil is connected to the signal output terminal 130, and the other end of the output-side coil is grounded.

[0251] Accordingly, in the amplifier circuit involved in the modified example of Embodiment 4, the phase difference between the first output signal at the output terminal of power amplifier 21 and the second output signal at the output terminal of power amplifier 22 is 90°, which enables the phase difference between the first input signal and the second input signal at signal output terminal 130 to be 180°. Furthermore, the phase difference between the third output signal at the output terminal of power amplifier 21 and the fourth output signal at the output terminal of power amplifier 23 is 90°, which also enables the phase difference between the first input signal and the second input signal at signal output terminal 130 to be 180°. Therefore, it can operate as a voltage-synthesizing balanced amplifier resistant to load variations.

[0252] Additionally, for example, in amplifier circuit 10D, a high-frequency signal of frequency band A is input from input terminal 51a, and a high-frequency signal of frequency band B, which is lower than frequency band A, is input from input terminal 52a.

[0253] Accordingly, when transmitting a signal in frequency band A, i.e., when a high-frequency signal in frequency band A is input from input terminal 51a, the low gain in the power amplifier 21 can be compensated by the high-pass filter 31 with low insertion loss in frequency band A. Similarly, when transmitting a signal in frequency band B, i.e., when a high-frequency signal in frequency band B is input from input terminal 52a, the low gain in the power amplifier 21 can be compensated by the low-pass filter 32 with low insertion loss in frequency band B. Therefore, an amplifier circuit 10D capable of transmitting signals in both frequency band A and frequency band B with low loss can be provided.

[0254] Additionally, for example, in the amplifier circuit 10C according to Embodiment 3, the phase of the second output signal output from the output terminal 51b lags behind the phase of the first output signal output from the output terminal 51c by 90°, and the phase of the fourth output signal output from the output terminal 52c leads the phase of the third output signal output from the output terminal 52b by 90°. The synthesis circuit 30C includes: a low-pass filter 32 connected between the input terminal 30a and the signal output terminal 130; and a high-pass filter 31 connected between the input terminal 30b and the signal output terminal 130.

[0255] Accordingly, in amplifier circuit 10C, the phase difference between the first output signal at the output terminal of power amplifier 21 and the second output signal at the output terminal of power amplifier 22 is 90°, which enables the phase difference between the first input signal and the second input signal at signal output terminal 130 to be 0°. Furthermore, the phase difference between the third output signal at the output terminal of power amplifier 21 and the fourth output signal at the output terminal of power amplifier 23 is 90°, which also enables the phase difference between the first input signal and the second input signal at signal output terminal 130 to be 0°. Therefore, it can operate as a current-synthesizing balanced amplifier resistant to load variations.

[0256] Additionally, for example, in amplifier circuit 10C (10D), power amplifier 21 can amplify signals of frequency band A and frequency band B, power amplifier 22 can amplify signals of frequency band A, and power amplifier 23 can amplify signals of frequency band B. Power amplifier 23 does not perform amplification operations simultaneously with power amplifier 22. When transmitting signals of frequency band A, common terminal 41a is connected to selection terminal 41b, common terminal 45a is connected to selection terminal 45d, and common terminal 45b is connected to selection terminal 45c. When transmitting signals of frequency band B, common terminal 41a is connected to selection terminal 41c, common terminal 45a is connected to selection terminal 45e, and common terminal 45b is connected to selection terminal 45d.

[0257] Accordingly, by switching the two switches 41 and 45, both band A transmission mode and band B transmission mode can be supported, thus providing a multi-band amplifier circuit 10C (10D) with a simplified circuit structure.

[0258] Additionally, for example, the amplifier circuit 10C (10D) also includes a mounting substrate 90 having main surfaces 90a and 90b facing each other, switches 41 and 45 included in the semiconductor IC 70C (70D), power amplifiers 21-23 disposed on the main surface 90a, and semiconductor IC 70C (70D) disposed on the main surface 90b. When viewed from above, the semiconductor IC 70C (70D) and the power amplifier 21 overlap at least partially.

[0259] Accordingly, the wiring connecting the power amplifier 21 and the switch 41 can be shortened, thereby reducing the transmission loss of the transmitted signal through the power amplifier 21, which has a wider bandwidth and lower gain compared to the power amplifiers 22 and 23, and thus reducing the transmission loss of the amplifier circuit 10C (10D).

[0260] Additionally, for example, in amplifier circuit 10C (10D), when viewed from above on mounting substrate 90, common terminal 41a overlaps at least partially with power amplifier 21, and select terminal 45d overlaps at least partially with power amplifier 21.

[0261] Accordingly, the wiring connecting the power amplifier 21 to the switch 41 and the power amplifier 21 to the switch 45 can be further shortened, thus further reducing the transmission loss of the high-frequency circuit 1C (1D) and the amplifier circuit 10C (10D).

[0262] Additionally, for example, in the amplifier circuit 10C (10D), when viewed from above the mounting substrate 90, power amplifiers 21 to 23 are arranged in the order of power amplifiers 22, 21, and 23 in the negative y-axis direction (first direction) on the main surface 90a, and selection terminals 45c, 45d, and 45e are arranged in the order of selection terminals 45c, 45d, and 45e in the negative y-axis direction (first direction) on the main surface 90b.

[0263] Accordingly, the total length of the wiring connecting the selection terminal 45d to the common terminal 45a and the wiring connecting the selection terminal 45d to the common terminal 45b of the power amplifier 21 can be shortened, thereby reducing the transmission loss of the transmitted signal through the relatively wide-bandwidth and low-gain power amplifier 21, and reducing the transmission loss of the high-frequency circuit 1C (1D) and the amplifier circuit 10C (10D).

[0264] Additionally, for example, in the amplifier circuit 10C (10D), when viewed from above the mounting substrate 90, the common terminals 45a and 45b are arranged in the order of common terminals 45b and 45a in the negative y-axis direction (first direction) on the main surface 90b.

[0265] Accordingly, the wiring connecting the common terminals 45a and 45b to the selection terminals 45c, 45d and 45e can be configured to be as short as possible and not cross within the switch 45, thereby reducing the transmission loss of the high-frequency circuit 1C (1D) and the amplifier circuit 10C (10D) and improving the isolation between signal paths.

[0266] (Other implementation methods, etc.)

[0267] The above description illustrates the amplification circuit according to the embodiments, examples, and modifications of the present invention. However, the amplification circuit according to the present invention is not limited to the above embodiments, examples, and modifications. Other embodiments implemented by combining any of the constituent elements in the above embodiments, examples, and modifications; modifications obtained by implementing the above embodiments, examples, and modifications in accordance with various modifications conceived by those skilled in the art without departing from the spirit of the present invention; and various devices incorporating the above amplification circuit are also included in the present invention.

[0268] For example, in the amplifier circuits described in the above embodiments, examples and variations, other circuit elements and wiring may be inserted between the paths connecting the circuit elements and signal paths disclosed in the drawings.

[0269] The following describes the features of the amplifier circuit based on the above-described embodiments, examples, and variations.

[0270] <1>

[0271] An amplifier circuit, comprising:

[0272] A first 90° hybrid circuit has a first input terminal, a first output terminal, and a second output terminal;

[0273] The second 90° mixing circuit has a second input terminal, a third output terminal, and a fourth output terminal;

[0274] First power amplifier, second power amplifier, and third power amplifier;

[0275] A first switch has a first common terminal, a first selection terminal, and a second selection terminal;

[0276] A second switch having a second common terminal, a third selection terminal, and a fourth selection terminal; and

[0277] The synthesized circuit has a third input terminal, a fourth input terminal, and a fifth output terminal.

[0278] The first output terminal is connected to the first selection terminal.

[0279] The second output terminal is connected to the input terminal of the second power amplifier.

[0280] The third output terminal is connected to the second selection terminal.

[0281] The fourth output terminal is connected to the input terminal of the third power amplifier.

[0282] The first common terminal is connected to the input terminal of the first power amplifier.

[0283] The output terminal of the first power amplifier is connected to the third input terminal.

[0284] The output terminal of the second power amplifier is connected to the third selection terminal.

[0285] The output terminal of the third power amplifier is connected to the fourth selection terminal.

[0286] The second common terminal is connected to the fourth input terminal.

[0287] <2>

[0288] according to <1> The aforementioned amplifier circuit, wherein,

[0289] The first 90° mixing circuit is configured such that the phase difference between the first output signal output from the first output terminal and the second output signal output from the second output terminal is 90°.

[0290] The second 90° mixing circuit is configured such that the phase difference between the third output signal output from the third output terminal and the fourth output signal output from the fourth output terminal is 90°.

[0291] The first switch is configured to switch the connection between the first common terminal and the first select terminal, and the connection between the first common terminal and the second select terminal.

[0292] The second switch is configured to switch the connection between the second common terminal and the third selection terminal, and the connection between the second common terminal and the fourth selection terminal.

[0293] The synthesis circuit is configured to output a fifth output signal from the fifth output terminal, which is a result of combining the first input signal input to the third input terminal and the second input signal input to the fourth input terminal.

[0294] <3>

[0295] according to <1> or <2> The aforementioned amplifier circuit, wherein,

[0296] The phase of the second output signal output from the second output terminal is 90° ahead of the phase of the first output signal output from the first output terminal.

[0297] The phase of the fourth output signal output from the fourth output terminal is 90° ahead of the phase of the third output signal output from the third output terminal.

[0298] The synthesis circuit includes:

[0299] A high-pass filter, connected between the third input terminal and the fifth output terminal; and

[0300] A low-pass filter is connected between the fourth input terminal and the fifth output terminal.

[0301] <4>

[0302] according to <1> or <2> The aforementioned amplifier circuit, wherein,

[0303] The phase of the second output signal output from the second output terminal is 90° ahead of the phase of the first output signal output from the first output terminal.

[0304] The phase of the fourth output signal output from the fourth output terminal is 90° ahead of the phase of the third output signal output from the third output terminal.

[0305] The synthesis circuit includes:

[0306] A transformer has an input coil and an output coil;

[0307] A low-pass filter, connected between the third input terminal and one end of the input-side coil; and

[0308] A high-pass filter is connected between the fourth input terminal and the other end of the input-side coil.

[0309] One end of the output-side coil is connected to the fifth output terminal.

[0310] The other end of the output coil is grounded.

[0311] <5>

[0312] according to <1> or <2> The aforementioned amplifier circuit, wherein,

[0313] The phase of the second output signal output from the second output terminal lags behind the phase of the first output signal output from the first output terminal by 90°.

[0314] The phase of the fourth output signal output from the fourth output terminal lags behind the phase of the third output signal output from the third output terminal by 90°.

[0315] The synthesis circuit includes:

[0316] A low-pass filter, connected between the third input terminal and the fifth output terminal; and

[0317] A high-pass filter is connected between the fourth input terminal and the fifth output terminal.

[0318] <6>

[0319] according to <1> or <2> The aforementioned amplifier circuit, wherein,

[0320] The phase of the second output signal output from the second output terminal lags behind the phase of the first output signal output from the first output terminal by 90°.

[0321] The phase of the fourth output signal output from the fourth output terminal lags behind the phase of the third output signal output from the third output terminal by 90°.

[0322] The synthesis circuit includes:

[0323] A transformer has an input coil and an output coil;

[0324] A high-pass filter, connected between the third input terminal and one end of the input-side coil; and

[0325] A low-pass filter is connected between the fourth input terminal and the other end of the input-side coil.

[0326] One end of the output-side coil is connected to the fifth output terminal.

[0327] The other end of the output coil is grounded.

[0328] <7>

[0329] according to <1> ~ <6> The amplifier circuit described in any one of the above, wherein,

[0330] The first power amplifier can amplify signals in the first frequency band and signals in the second frequency band.

[0331] The second power amplifier can amplify the signal in the first frequency band.

[0332] The third power amplifier is capable of amplifying signals in the second frequency band, and the third power amplifier does not perform amplification operations simultaneously with the second power amplifier.

[0333] When transmitting a signal in the first frequency band, the first common terminal is connected to the first selected terminal, and the second common terminal is connected to the third selected terminal.

[0334] When transmitting a signal in the second frequency band, the first common terminal is connected to the second select terminal, and the second common terminal is connected to the fourth select terminal.

[0335] <8>

[0336] according to <1> ~ <7> In any one of the amplifier circuits, wherein,

[0337] It also includes a mounting substrate having a first main surface and a second main surface facing each other.

[0338] The first switch and the second switch are included in the first semiconductor IC.

[0339] The first power amplifier, the second power amplifier, and the third power amplifier are disposed on the first main surface.

[0340] The first semiconductor IC is disposed on the second main surface.

[0341] When viewed from above the mounting substrate, the first semiconductor IC and the first power amplifier overlap at least partially.

[0342] <9>

[0343] according to <8> The aforementioned amplifier circuit, wherein,

[0344] When viewed from above, the first common terminal overlaps at least partially with the first power amplifier.

[0345] <10>

[0346] An amplifier circuit, comprising:

[0347] A first 90° hybrid circuit has a first input terminal, a first output terminal, and a second output terminal;

[0348] The second 90° mixing circuit has a second input terminal, a third output terminal, and a fourth output terminal;

[0349] First power amplifier, second power amplifier, and third power amplifier;

[0350] A first switch has a first common terminal, a first selection terminal, and a second selection terminal;

[0351] The second switch has a second common terminal, a third common terminal, a third selector terminal, a fourth selector terminal, and a fifth selector terminal; and

[0352] The synthesized circuit has a third input terminal, a fourth input terminal, and a fifth output terminal.

[0353] The first output terminal is connected to the first selection terminal.

[0354] The second output terminal is connected to the input terminal of the second power amplifier.

[0355] The third output terminal is connected to the second selection terminal.

[0356] The fourth output terminal is connected to the input terminal of the third power amplifier.

[0357] The first common terminal is connected to the input terminal of the first power amplifier.

[0358] The output terminal of the first power amplifier is connected to the fourth selection terminal.

[0359] The output terminal of the second power amplifier is connected to the third selection terminal.

[0360] The output terminal of the third power amplifier is connected to the fifth selection terminal.

[0361] The second common terminal is connected to the third input terminal.

[0362] The third common terminal is connected to the fourth input terminal.

[0363] <11>

[0364] according to <10> The aforementioned amplifier circuit, wherein,

[0365] The first 90° mixing circuit is configured such that the phase difference between the first output signal output from the first output terminal and the second output signal output from the second output terminal is 90°.

[0366] The second 90° mixing circuit is configured such that the phase difference between the third output signal output from the third output terminal and the fourth output signal output from the fourth output terminal is 90°.

[0367] The first switch is configured to switch the connection between the first common terminal and the first select terminal, and the connection between the first common terminal and the second select terminal.

[0368] The second switch is configured to switch the connection between the second common terminal and the fourth selection terminal and the third common terminal and the third selection terminal, and the connection between the second common terminal and the fifth selection terminal and the third common terminal and the fourth selection terminal.

[0369] The synthesis circuit is configured to output a fifth output signal from the fifth output terminal, which is a result of combining the first input signal input to the third input terminal and the second input signal input to the fourth input terminal.

[0370] <12>

[0371] according to <10> or <11> The aforementioned amplifier circuit, wherein,

[0372] The phase of the second output signal output from the second output terminal is 90° ahead of the phase of the first output signal output from the first output terminal.

[0373] The phase of the fourth output signal output from the fourth output terminal lags behind the phase of the third output signal output from the third output terminal by 90°.

[0374] The synthesis circuit includes:

[0375] A high-pass filter, connected between the third input terminal and the fifth output terminal; and

[0376] A low-pass filter is connected between the fourth input terminal and the fifth output terminal.

[0377] <13>

[0378] according to <10> or <11> The aforementioned amplifier circuit, wherein,

[0379] The phase of the second output signal output from the second output terminal is 90° ahead of the phase of the first output signal output from the first output terminal.

[0380] The phase of the fourth output signal output from the fourth output terminal lags behind the phase of the third output signal output from the third output terminal by 90°.

[0381] The synthesis circuit includes:

[0382] A transformer has an input coil and an output coil;

[0383] A low-pass filter, connected between the third input terminal and one end of the input-side coil; and

[0384] A high-pass filter is connected between the fourth input terminal and the other end of the input-side coil.

[0385] One end of the output-side coil is connected to the fifth output terminal.

[0386] The other end of the output coil is grounded.

[0387] <14>

[0388] according to <13> The aforementioned amplifier circuit, wherein,

[0389] A high-frequency signal of the first frequency band is input from the first input terminal.

[0390] A high-frequency signal from a second frequency band that is lower than the first frequency band is input from the second input terminal.

[0391] <15>

[0392] according to <10> or <11> The aforementioned amplifier circuit, wherein,

[0393] The phase of the second output signal output from the second output terminal lags behind the phase of the first output signal output from the first output terminal by 90°.

[0394] The phase of the fourth output signal output from the fourth output terminal is 90° ahead of the phase of the third output signal output from the third output terminal.

[0395] The synthesis circuit includes:

[0396] A low-pass filter, connected between the third input terminal and the fifth output terminal; and

[0397] A high-pass filter is connected between the fourth input terminal and the fifth output terminal.

[0398] <16>

[0399] according to <10> ~ <15> The amplifier circuit described in any one of the above, wherein,

[0400] The first power amplifier can amplify signals in the first frequency band and signals in the second frequency band.

[0401] The second power amplifier can amplify the signal in the first frequency band.

[0402] The third power amplifier is capable of amplifying signals in the second frequency band, and the third power amplifier does not perform amplification operations simultaneously with the second power amplifier.

[0403] When transmitting a signal in the first frequency band, the first common terminal is connected to the first selected terminal, the second common terminal is connected to the fourth selected terminal, and the third common terminal is connected to the third selected terminal.

[0404] When transmitting a signal in the second frequency band, the first common terminal is connected to the second selection terminal, the second common terminal is connected to the fifth selection terminal, and the third common terminal is connected to the fourth selection terminal.

[0405] <17>

[0406] according to <10> ~ <16> In any one of the amplifier circuits, wherein,

[0407] It also includes a mounting substrate having a first main surface and a second main surface facing each other.

[0408] The first switch and the second switch are included in the first semiconductor IC.

[0409] The first power amplifier, the second power amplifier, and the third power amplifier are disposed on the first main surface.

[0410] The first semiconductor IC is disposed on the second main surface.

[0411] When viewed from above the mounting substrate, the first semiconductor IC and the first power amplifier overlap at least partially.

[0412] <18>

[0413] according to <17> The aforementioned amplifier circuit, wherein,

[0414] When viewed from above the mounting substrate, the first common terminal overlaps at least partially with the first power amplifier, and the fourth selection terminal overlaps at least partially with the first power amplifier.

[0415] <19>

[0416] according to <17> or <18> The aforementioned amplifier circuit, wherein,

[0417] Viewed from above, the mounting substrate...

[0418] The first power amplifier, the second power amplifier, and the third power amplifier are arranged in the order of the second power amplifier, the first power amplifier, and the third power amplifier in a first direction on the first main surface.

[0419] The third selection terminal, the fourth selection terminal, and the fifth selection terminal are arranged in the first direction on the second main surface in the order of the third selection terminal, the fourth selection terminal, and the fifth selection terminal.

[0420] <20>

[0421] according to <19> The aforementioned amplifier circuit, wherein,

[0422] Viewed from above, the second common terminal and the third common terminal are arranged in the first direction on the second main surface in the order of the third common terminal and the second common terminal.

[0423] Industrial availability

[0424] As an amplifier circuit configured in the front end, this invention can be widely used in communication devices such as portable telephones.

[0425] Explanation of reference numerals in the attached figures

[0426] 1, 1B, 1C, 1D: High-frequency circuits;

[0427] 2: Antenna;

[0428] 3: RFIC;

[0429] 4: Communication device;

[0430] 10, 10A, 10B, 10C, 10D: Amplifier circuits;

[0431] 11, 12: Amplifiers;

[0432] 21, 22, 23: Power amplifiers;

[0433] 30, 30A, 30B, 30C, 30D: Combined circuit;

[0434] 30a, 30b, 51a, 52a: Input terminals;

[0435] 31: High-pass filter;

[0436] 32: Low-pass filter;

[0437] 33, 34: Filters;

[0438] 41, 42, 43, 44, 45: Switches;

[0439] 41a, 42a, 43a, 45a, 45b: Common terminals;

[0440] 41b, 41c, 42b, 42c, 43b, 43c, 45c, 45d, 45e: Select terminals;

[0441] 51, 52: 90° hybrid circuit;

[0442] 51b, 51c, 52b, 52c: Output terminals;

[0443] 60: Transformer;

[0444] 60a, 60c: One end;

[0445] 60b: The other end;

[0446] 70, 70B, 70C, 70D: Semiconductor ICs;

[0447] 90: Mounting the substrate;

[0448] 90a, 90b: Main face;

[0449] 100: Antenna connection terminal;

[0450] 110, 120: Signal input terminals;

[0451] 130: Signal output terminal;

[0452] 311, 322: Capacitors;

[0453] 312, 321: Inductors.

Claims

1. An amplifier circuit, comprising: A first 90° hybrid circuit has a first input terminal, a first output terminal, and a second output terminal; The second 90° mixing circuit has a second input terminal, a third output terminal, and a fourth output terminal; First power amplifier, second power amplifier, and third power amplifier; A first switch has a first common terminal, a first selection terminal, and a second selection terminal; The second switch has a second common terminal, a third selection terminal and a fourth selection terminal; as well as The synthesized circuit has a third input terminal, a fourth input terminal, and a fifth output terminal. The first output terminal is connected to the first selection terminal. The second output terminal is connected to the input terminal of the second power amplifier. The third output terminal is connected to the second selection terminal. The fourth output terminal is connected to the input terminal of the third power amplifier. The first common terminal is connected to the input terminal of the first power amplifier. The output terminal of the first power amplifier is connected to the third input terminal. The output terminal of the second power amplifier is connected to the third selection terminal. The output terminal of the third power amplifier is connected to the fourth selection terminal. The second common terminal is connected to the fourth input terminal.

2. The amplifier circuit according to claim 1, wherein, The first 90° mixing circuit is configured such that the phase difference between the first output signal output from the first output terminal and the second output signal output from the second output terminal is 90°. The second 90° mixing circuit is configured such that the phase difference between the third output signal output from the third output terminal and the fourth output signal output from the fourth output terminal is 90°. The first switch is configured to switch the connection between the first common terminal and the first select terminal, and the connection between the first common terminal and the second select terminal. The second switch is configured to switch the connection between the second common terminal and the third selection terminal, and the connection between the second common terminal and the fourth selection terminal. The synthesis circuit is configured to output a fifth output signal from the fifth output terminal, which is a result of combining the first input signal input to the third input terminal and the second input signal input to the fourth input terminal.

3. The amplifier circuit according to claim 1 or 2, wherein, The phase of the second output signal output from the second output terminal is 90° ahead of the phase of the first output signal output from the first output terminal. The phase of the fourth output signal output from the fourth output terminal is 90° ahead of the phase of the third output signal output from the third output terminal. The synthesis circuit includes: A high-pass filter, connected between the third input terminal and the fifth output terminal; and A low-pass filter is connected between the fourth input terminal and the fifth output terminal.

4. The amplifier circuit according to claim 1 or 2, wherein, The phase of the second output signal output from the second output terminal is 90° ahead of the phase of the first output signal output from the first output terminal. The phase of the fourth output signal output from the fourth output terminal is 90° ahead of the phase of the third output signal output from the third output terminal. The synthesis circuit includes: A transformer has an input coil and an output coil; A low-pass filter, connected between the third input terminal and one end of the input-side coil; and A high-pass filter is connected between the fourth input terminal and the other end of the input-side coil. One end of the output-side coil is connected to the fifth output terminal. The other end of the output coil is grounded.

5. The amplifier circuit according to claim 1 or 2, wherein, The phase of the second output signal output from the second output terminal lags behind the phase of the first output signal output from the first output terminal by 90°. The phase of the fourth output signal output from the fourth output terminal lags behind the phase of the third output signal output from the third output terminal by 90°. The synthesis circuit includes: A low-pass filter, connected between the third input terminal and the fifth output terminal; and A high-pass filter is connected between the fourth input terminal and the fifth output terminal.

6. The amplifier circuit according to claim 1 or 2, wherein, The phase of the second output signal output from the second output terminal lags behind the phase of the first output signal output from the first output terminal by 90°. The phase of the fourth output signal output from the fourth output terminal lags behind the phase of the third output signal output from the third output terminal by 90°. The synthesis circuit includes: A transformer has an input coil and an output coil; A high-pass filter, connected between the third input terminal and one end of the input-side coil; and A low-pass filter is connected between the fourth input terminal and the other end of the input-side coil. One end of the output-side coil is connected to the fifth output terminal. The other end of the output coil is grounded.

7. The amplifier circuit according to any one of claims 1 to 6, wherein, The first power amplifier can amplify signals in the first frequency band and signals in the second frequency band. The second power amplifier can amplify the signal in the first frequency band. The third power amplifier is capable of amplifying signals in the second frequency band, and the third power amplifier does not perform amplification operations simultaneously with the second power amplifier. When transmitting a signal in the first frequency band, the first common terminal is connected to the first selected terminal, and the second common terminal is connected to the third selected terminal. When transmitting a signal in the second frequency band, the first common terminal is connected to the second select terminal, and the second common terminal is connected to the fourth select terminal.

8. The amplifier circuit according to any one of claims 1 to 7, wherein, It also includes a mounting substrate having a first main surface and a second main surface facing each other. The first switch and the second switch are included in the first semiconductor IC. The first power amplifier, the second power amplifier, and the third power amplifier are disposed on the first main surface. The first semiconductor IC is disposed on the second main surface. When viewed from above the mounting substrate, the first semiconductor IC and the first power amplifier overlap at least partially.

9. The amplifier circuit according to claim 8, wherein, When viewed from above, the first common terminal overlaps at least partially with the first power amplifier.

10. An amplifier circuit, comprising: A first 90° hybrid circuit has a first input terminal, a first output terminal, and a second output terminal; The second 90° mixing circuit has a second input terminal, a third output terminal, and a fourth output terminal; First power amplifier, second power amplifier, and third power amplifier; A first switch has a first common terminal, a first selection terminal, and a second selection terminal; The second switch has a second common terminal, a third common terminal, a third select terminal, a fourth select terminal, and a fifth select terminal; as well as The synthesized circuit has a third input terminal, a fourth input terminal, and a fifth output terminal. The first output terminal is connected to the first selection terminal. The second output terminal is connected to the input terminal of the second power amplifier. The third output terminal is connected to the second selection terminal. The fourth output terminal is connected to the input terminal of the third power amplifier. The first common terminal is connected to the input terminal of the first power amplifier. The output terminal of the first power amplifier is connected to the fourth selection terminal. The output terminal of the second power amplifier is connected to the third selection terminal. The output terminal of the third power amplifier is connected to the fifth selection terminal. The second common terminal is connected to the third input terminal. The third common terminal is connected to the fourth input terminal.

11. The amplifier circuit according to claim 10, wherein, The first 90° mixing circuit is configured such that the phase difference between the first output signal output from the first output terminal and the second output signal output from the second output terminal is 90°. The second 90° mixing circuit is configured such that the phase difference between the third output signal output from the third output terminal and the fourth output signal output from the fourth output terminal is 90°. The first switch is configured to switch the connection between the first common terminal and the first select terminal, and the connection between the first common terminal and the second select terminal. The second switch is configured to switch the connection between the second common terminal and the fourth selection terminal and the third common terminal and the third selection terminal, and the connection between the second common terminal and the fifth selection terminal and the third common terminal and the fourth selection terminal. The synthesis circuit is configured to output a fifth output signal from the fifth output terminal, which is a result of combining the first input signal input to the third input terminal and the second input signal input to the fourth input terminal.

12. The amplifier circuit according to claim 10 or 11, wherein, The phase of the second output signal output from the second output terminal is 90° ahead of the phase of the first output signal output from the first output terminal. The phase of the fourth output signal output from the fourth output terminal lags behind the phase of the third output signal output from the third output terminal by 90°. The synthesis circuit includes: A high-pass filter, connected between the third input terminal and the fifth output terminal; and A low-pass filter is connected between the fourth input terminal and the fifth output terminal.

13. The amplifier circuit according to claim 10 or 11, wherein, The phase of the second output signal output from the second output terminal is 90° ahead of the phase of the first output signal output from the first output terminal. The phase of the fourth output signal output from the fourth output terminal lags behind the phase of the third output signal output from the third output terminal by 90°. The synthesis circuit includes: A transformer has an input coil and an output coil; A low-pass filter, connected between the third input terminal and one end of the input-side coil; and A high-pass filter is connected between the fourth input terminal and the other end of the input-side coil. One end of the output-side coil is connected to the fifth output terminal. The other end of the output coil is grounded.

14. The amplifier circuit according to claim 13, wherein, A high-frequency signal of the first frequency band is input from the first input terminal. A high-frequency signal from a second frequency band that is lower than the first frequency band is input from the second input terminal.

15. The amplifier circuit according to claim 10 or 11, wherein, The phase of the second output signal output from the second output terminal lags behind the phase of the first output signal output from the first output terminal by 90°. The phase of the fourth output signal output from the fourth output terminal is 90° ahead of the phase of the third output signal output from the third output terminal. The synthesis circuit includes: A low-pass filter, connected between the third input terminal and the fifth output terminal; and A high-pass filter is connected between the fourth input terminal and the fifth output terminal.

16. The amplifier circuit according to any one of claims 10 to 15, wherein, The first power amplifier can amplify signals in the first frequency band and signals in the second frequency band. The second power amplifier can amplify the signal in the first frequency band. The third power amplifier is capable of amplifying signals in the second frequency band, and the third power amplifier does not perform amplification operations simultaneously with the second power amplifier. When transmitting a signal in the first frequency band, the first common terminal is connected to the first selected terminal, the second common terminal is connected to the fourth selected terminal, and the third common terminal is connected to the third selected terminal. When transmitting a signal in the second frequency band, the first common terminal is connected to the second selection terminal, the second common terminal is connected to the fifth selection terminal, and the third common terminal is connected to the fourth selection terminal.

17. The amplifier circuit according to any one of claims 10 to 16, wherein, It also includes a mounting substrate having a first main surface and a second main surface facing each other. The first switch and the second switch are included in the first semiconductor IC. The first power amplifier, the second power amplifier, and the third power amplifier are disposed on the first main surface. The first semiconductor IC is disposed on the second main surface. When viewed from above the mounting substrate, the first semiconductor IC and the first power amplifier overlap at least partially.

18. The amplifier circuit according to claim 17, wherein, When viewed from above the mounting substrate, the first common terminal overlaps at least partially with the first power amplifier, and the fourth selection terminal overlaps at least partially with the first power amplifier.

19. The amplifier circuit according to claim 17 or 18, wherein, Viewed from above, the mounting substrate... The first power amplifier, the second power amplifier, and the third power amplifier are arranged in the order of the second power amplifier, the first power amplifier, and the third power amplifier in a first direction on the first main surface. The third selection terminal, the fourth selection terminal, and the fifth selection terminal are arranged in the first direction on the second main surface in the order of the third selection terminal, the fourth selection terminal, and the fifth selection terminal.

20. The amplifier circuit according to claim 19, wherein, Viewed from above, the second common terminal and the third common terminal are arranged in the first direction on the second main surface in the order of the third common terminal and the second common terminal.

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