Display device

Abstract

A display device includes: a substrate including a first pixel region and a second pixel region disposed adjacent to each other, each of the first pixel region and the second pixel region including a first light emitting region, a second light emitting region, a third light emitting region, and a non-light emitting region; a light emitting element disposed on the substrate in each of the first light emitting region, the second light emitting region, and the third light emitting region; a bank layer disposed in the non-emission area on the light emitting element and defining a first opening overlapping a first emission area of the first pixel area and the second pixel area, and a first center opening extending to the first opening, respectively; and a first color conversion layer including first quantum dots and filling the first opening and the first center opening.

Description

Technical Field

[0001] Embodiments generally provide display devices. More specifically, embodiments relate to display devices that provide visual information. Background Art

[0002] As information technology develops, the importance of display devices, which are a connection medium between users and information, is becoming more prominent. For example, the use of display devices such as liquid crystal display devices, organic light emitting display devices, or plasma display devices is increasing. Summary of the invention

[0003] The embodiment provides a display device capable of substantially achieving high resolution.

[0004] The display device in the embodiment of the present disclosure includes: a substrate including a first pixel area and a second pixel area arranged adjacent to each other, each of the first pixel area and the second pixel area including a first light-emitting area, a second light-emitting area, a third light-emitting area and a non-light-emitting area; a light-emitting element arranged in each of the first light-emitting area, the second light-emitting area and the third light-emitting area on the substrate; a dam layer arranged in the non-light-emitting area on the light-emitting element and defining a first opening overlapping with the first light-emitting area of ​​the first pixel area and the second pixel area, respectively, and a first center opening extending to the first opening; and a first color conversion layer including a first quantum dot and filling the first opening and the first center opening.

[0005] In an embodiment, the embankment layer may further define: a second opening overlapping the second light emitting areas of the first pixel area and the second pixel area, respectively; a third opening overlapping the third light emitting areas of the first pixel area and the second pixel area, respectively; and a second central opening extending to the second opening.

[0006] In an embodiment, a center of the first central opening may be defined on the same line as a center of the first opening in plan view, and a center of the second central opening may be defined on the same line as a center of the second opening in plan view.

[0007] In an embodiment, the first side of the first central opening may protrude from the first side of the first opening toward the first direction, and the first side of the second central opening may protrude from the first side of the second opening toward the first direction.

[0008] In an embodiment, a first side of the first central opening may protrude from the first side of the first opening toward a first direction, and a second side of the second central opening may protrude from the second side of the second opening toward a direction opposite to the first direction.

[0009] In an embodiment, the display device may further include: a second color conversion layer filling the second opening and the second central opening and including second quantum dots.

[0010] In an embodiment, the display device may further include: a light-transmitting layer filling each of the third openings. The light-transmitting layer may include a light-transmitting photosensitive organic material in which scattering particles are dispersed.

[0011] In an embodiment, the third openings may be spaced apart from each other in a plan view.

[0012] In an embodiment, the display device may further include: a light blocking layer disposed in the non-light emitting region on the bank layer and partially overlapping each of the first central opening and the second central opening.

[0013] In an embodiment, the light blocking layer may include a plurality of light blocking patterns spaced apart from each other.

[0014] In an embodiment, each of the plurality of light blocking patterns may have an “H” shape in a plan view.

[0015] In an embodiment, the light blocking layer may expose the entire first opening, the second opening, and the third opening and continuously extend in the non-light emitting region.

[0016] In an embodiment, the display device may further include: a column spacer disposed in the non-light emitting region on the bank layer and including the same material as that of the light blocking layer.

[0017] In embodiments, the bank layer may include an inorganic material and / or an organic material having a black color.

[0018] In an embodiment, the bank layer may further define a second opening overlapping the second light emitting regions of the first pixel region and the second pixel region, respectively, and a second central opening extending to the second opening. The bank layer may overlap the third light emitting region.

[0019] In an embodiment, the bank layer may include a photosensitive organic material having light transmittance in which scattering particles are dispersed.

[0020] In an embodiment, the display device may further include: a light blocking layer, which is disposed on the embankment layer, partially overlapping each of the first central opening and the second central opening, exposing the entire first opening and the second opening and the entire portion of the embankment layer overlapping the third light-emitting area and extending continuously in the non-light-emitting area.

[0021] In an embodiment, the display device may further include: a first color filter that completely overlaps the first central opening and partially overlaps the second central opening; a second color filter that partially overlaps the first central opening and completely overlaps the second central opening; and a third color filter that partially overlaps each of the first central opening and the second central opening and completely overlaps the third opening.

[0022] In an embodiment, the first light emitting region may emit red light, the second light emitting region may emit green light, and the third light emitting region may emit blue light.

[0023] The display device in the embodiment of the present disclosure includes: a substrate including a first pixel area and a second pixel area arranged adjacent to each other, each of the first pixel area and the second pixel area including a first light-emitting area emitting light of a first color, a second light-emitting area emitting light of a second color, a third light-emitting area emitting light of a third color, and a non-light-emitting area; a light-emitting element arranged in each of the first light-emitting area, the second light-emitting area, and the third light-emitting area on the substrate; a bank layer arranged in the non-light-emitting area on the light-emitting element and defining a first opening overlapping with the first light-emitting area of ​​the first pixel area and the second pixel area, a second opening overlapping with the second light-emitting area of ​​the first pixel area and the second pixel area, a third opening overlapping with the third light-emitting area of ​​the first pixel area and the second pixel area, a first central opening extending to the first opening, and a second central opening extending to the second opening; a first color conversion layer including a first quantum dot and filling the first opening and the first central opening; a second color conversion layer including a second quantum dot and filling the second opening and the second central opening; a light-transmitting layer including a light-transmitting photosensitive organic material in which scattering particles are dispersed and filling the third opening; and a light-blocking layer arranged on the bank layer and partially overlapping with each of the first central opening and the second central opening.

[0024] In the display device in the embodiment of the present disclosure, the bank layer can be arranged in the non-luminous area and define an opening overlapping with the luminous area emitting red light or green light of the first pixel area and the second pixel area arranged adjacent to each other and a central opening extending to the opening. The color conversion layer including quantum dots can be filled in the opening and the central opening. That is, due to the central opening, two adjacent openings can be filled with the color conversion layer at the same time. Accordingly, a high-resolution display device can be realized. In addition, the color spots of the display device can be improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] Illustrative, non-limiting embodiments will be more clearly understood from the following detailed description taken in conjunction with the accompanying drawings.

[0026] Figure 1 is a view illustrating an embodiment of a display device according to the present disclosure.

[0027] Figure 2 It is along Figure 1 A cross-sectional view taken along line II'.

[0028] Figure 3 It is a graphic Figure 1 and Figure 2A plan view of an embodiment of a display device.

[0029] Figure 4 It is a graphic Figure 1 and Figure 2 A plan view of an embodiment of a pixel defining layer included in a lower structure.

[0030] Figure 5 It is a graphic Figure 1 and Figure 2 A plan view of an embodiment of a bank layer included in a lower structure of FIG.

[0031] Figure 6 It is a graphic Figure 1 and Figure 2 A plan view of an embodiment of a bank layer and a light blocking layer included in a lower structure of FIG.

[0032] Figure 7 It is along Figure 3 , Figure 4 and Figure 6 Cross-sectional views taken along line II-II', line III-III' and line IV-IV'.

[0033] Figure 8 It is a graphic Figure 7 A cross-sectional view of an embodiment of a first color conversion layer, a second color conversion layer, and a light-transmitting layer of a display device.

[0034] Fig. 9 , Fig.10 , Fig.11 and Fig.12 It is a graphic Figure 5 Plan views of other embodiments of bank layers.

[0035] Fig.13 It is a graphic Figure 6 A plan view of another embodiment of a bank layer and a light blocking layer.

[0036] Fig.14 It is a graphic Figure 3 A plan view of another embodiment of a display device.

[0037] Fig.15 It is a graphic Figure 5 and Figure 6 A plan view of another embodiment of a bank layer.

[0038] Fig.16 The diagram is along Fig.14 and Fig.15 sectional views of an embodiment of the cross sections taken along line VV', line VI-VI' and line VII-VII'.

[0039] Fig.17 The diagram is along Fig.14 and Fig.15 A cross-sectional view of another embodiment of the cross-sections taken along line VV′, line VI-VI′ and line VII-VII′.

[0040] Fig.18 It is a graphic Figure 3 A plan view of yet another embodiment of a display device.

[0041] Fig.19 It is a graphic Figure 5 A plan view of another embodiment of a bank layer.

[0042] Fig. 20 It is a graphic Figure 6 A plan view of another embodiment of a bank layer and a light blocking layer.

[0043] Fig.21 It is along Fig.18 and Fig. 20 Cross-sectional views taken along line VIII-VIII', line IX-IX' and line XX'. DETAILED DESCRIPTION

[0044] Hereinafter, a display device in an embodiment of the present disclosure will be explained in detail with reference to the accompanying drawings. The same reference numerals are used for the same components in the drawings, and redundant descriptions of the same components will be omitted.

[0045] It will be understood that when an element is referred to as being “on” another element, it can be directly on the other element or intervening elements may be present therebetween. In contrast, when an element is referred to as being “directly on” another element, there are no intervening elements present.

[0046] It will be understood that although the terms "first", "second", "third", etc. may be used herein to describe various elements, components, regions, layers and / or portions, these elements, components, regions, layers and / or portions should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or portion from another element, component, region, layer or portion. Therefore, the first element, component, region, layer or portion discussed below may be referred to as a second element, component, region, layer or portion without departing from the teachings herein.

[0047] The terms used herein are only for the purpose of describing specific embodiments and are not intended to be limiting. As used herein, unless the context clearly indicates otherwise, the singular forms "one" and "the / said" are intended to include plural forms including "at least one". "Or" means "and / or". As used herein, the term "and / or" includes any combination and all combinations of one or more related listed items. It will be further understood that when used in this specification, the term "includes" or "comprising" and / or its variations indicate the presence of stated features, regions, wholes, steps, operations, elements and / or parts, but does not exclude the presence or addition of one or more other features, regions, wholes, steps, operations, elements, parts and / or their groups.

[0048] In addition, relative terms such as "lower" or "bottom" and "upper" or "top" may be used herein to describe the relationship of one element to another element as illustrated in the accompanying drawings. It will be understood that, in addition to the orientation depicted in the accompanying drawings, relative terms are intended to include different orientations of the device. For example, if a device in one of the drawings is turned over, the element described as being on the "lower" side of the other element will then be oriented on the "upper" side of the other element. Therefore, depending on the specific orientation of the drawings, the exemplary term "lower" can include both orientations of "lower" and "upper". Similarly, if a device in one of the drawings is turned over, the element described as being "below" or "below" the other element will then be oriented "above" the other element. Therefore, the exemplary terms "below..." or "below..." can include both orientations of above and below.

[0049] As used herein, "about" or "approximately" includes the stated value and means within an acceptable range of deviation of the particular value as determined by one of ordinary skill in the art, taking into account the measurement in question and the errors associated with the measurement of a particular quantity (i.e., the limitations of the measurement system). For example, a term such as "about" may mean within one or more standard deviations, or within ±30%, ±20%, ±10%, ±5% of a stated value.

[0050] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as those commonly understood by those of ordinary skill in the art to which the present disclosure belongs. It will be further understood that terms (such as those defined in commonly used dictionaries) should be interpreted as having a meaning consistent with their meaning in the context of the relevant art and the present disclosure, and will not be interpreted in an idealized or overly formal sense unless explicitly so defined herein.

[0051] Figure 1 is a view illustrating an embodiment of a display device according to the present disclosure. Figure 2 It is along Figure 1A cross-sectional view taken along line II'.

[0052] Reference Figure 1 and Figure 2 , the display device DD in the embodiment of the present disclosure may include a lower structure 100 , a sealing portion 350 , a filling layer 300 , and an upper structure 200 .

[0053] The display device DD may be divided into a display area DA and a non-display area NDA. The display area DA may be defined as an area where an image is displayed, and the non-display area NDA may be defined as an area where an image is not displayed. The non-display area NDA may be disposed around the display area DA. In an embodiment, for example, the non-display area NDA may surround the display area DA.

[0054] The lower structure 100 may include a substrate, an insulating layer, a transistor, and a light emitting element. A detailed description of the lower structure 100 will be provided later.

[0055] The upper structure 200 may be disposed on the lower structure 100. The upper structure 200 may face the lower structure 100. The upper structure 200 may include a color filter layer that selectively transmits light having a predetermined wavelength. A detailed description of the upper structure 200 will be provided later.

[0056] The sealing portion 350 may be disposed between the lower structure 100 and the upper structure 200 in the non-display area NDA. The sealing portion 350 may be disposed along the edges of the lower structure 100 and the upper structure 200 in the non-display area NDA to surround the display area DA in a plan view. In addition, the lower structure 100 and the upper structure 200 may be coupled by the sealing portion 350. The sealing portion 350 may include an organic material. In an embodiment, for example, the sealing portion 350 may include epoxy resin or the like. However, the present disclosure is not limited thereto, and the sealing portion 350 may include various organic materials.

[0057] The filling layer 300 may be disposed between the lower structure 100 and the upper structure 200. The filling layer 300 may be filled between the lower structure 100 and the upper structure 200. The filling layer 300 may include a material that is capable of transmitting light. In an embodiment, for example, the filling layer 300 may include an organic material. In an embodiment, the material that may be used for the filling layer 300 may include a silicone resin or an epoxy resin, etc. These may be used alone or in any combination with each other. However, the present disclosure is not limited thereto, and the filling layer 300 may include various organic materials. In other embodiments, the filling layer 300 may be omitted.

[0058] In this specification, a plane may be defined by a first direction D1 and a second direction D2 crossing the first direction D1. In an embodiment, for example, the second direction D2 may be perpendicular to the first direction D1. In addition, a third direction D3 may be perpendicular to the plane.

[0059] Figure 3 It is a graphic Figure 1 and Figure 2 A plan view of an embodiment of a display device.

[0060] Reference Figure 1 , Figure 2 and Figure 3 As described above, the display device DD may be divided into a display area DA and a non-display area NDA. The display area DA may include a plurality of pixel areas. Each of the pixel areas may emit light.

[0061] The pixel area may include a first pixel area PX1 and a second pixel area PX2. The first pixel area PX1 and the second pixel area PX2 may be adjacent to each other. In an embodiment, for example, the first pixel area PX1 and the second pixel area PX2 may emit light at the same time. In an alternative embodiment, when the first pixel area PX1 emits light, the second pixel area PX2 may not emit light. In an alternative embodiment, when the first pixel area PX1 does not emit light, the second pixel area PX2 may emit light. When each of the pixel areas emits light, the display area DA may display an image.

[0062] The pixel regions may be repeatedly arranged along the first direction D1 and the second direction D2 intersecting the first direction D1. In an embodiment, for example, the first pixel region PX1 may be repeatedly arranged in the first row R1 along the first direction D1, and the second pixel region PX2 may be repeatedly arranged in the second row R2 adjacent to the first row R1 along the first direction D1. That is, the first pixel region PX1 may be repeatedly arranged along the first direction D1 in odd-numbered rows, and the second pixel region PX2 may be repeatedly arranged along the first direction D1 in even-numbered rows.

[0063] Each of the first and second pixel regions PX1 and PX2 may include a first light emitting region EA1, a second light emitting region EA2, a third light emitting region EA3, and a non-light emitting region NEA.

[0064] Each of the first light emitting area EA1, the second light emitting area EA2, and the third light emitting area EA3 may be an area through which light emitted from the light emitting element is emitted to the outside. The first light emitting area EA1, the second light emitting area EA2, and the third light emitting area EA3 may emit light of different colors. In an embodiment, for example, the first light emitting area EA1 may emit light of a first color, the second light emitting area EA2 may emit light of a second color, and the third light emitting area EA3 may emit light of a third color.

[0065] In an embodiment, the first light emitting area EA1 may emit red light, the second light emitting area EA2 may emit green light, and the third light emitting area EA3 may emit blue light. However, the present disclosure is not limited thereto, and in another embodiment, for example, the first light emitting area EA1, the second light emitting area EA2, and the third light emitting area EA3 may be combined to emit yellow light, cyan light, and magenta light.

[0066] In addition, the first light emitting area EA1, the second light emitting area EA2, and the third light emitting area EA3 may emit four or more colors of light. In an embodiment, for example, the first light emitting area EA1, the second light emitting area EA2, and the third light emitting area EA3 may be combined to further emit at least one of yellow light, cyan light, and magenta light in addition to red light, green light, and blue light. In addition, the first light emitting area EA1, the second light emitting area EA2, and the third light emitting area EA3 may be combined to further emit white light.

[0067] The areas of the first light emitting area EA1, the second light emitting area EA2, and the third light emitting area EA3 may be different from each other. In an embodiment, the area of ​​the second light emitting area EA2 emitting green light may be larger than the area of ​​each of the first light emitting area EA1 emitting red light and the third light emitting area EA3 emitting blue light. In this case, the area of ​​the first light emitting area EA1 may be larger than the area of ​​the third light emitting area EA3. However, the present disclosure is not limited thereto.

[0068] The non-emission area NEA may be disposed between the first, second, and third emission areas EA1, EA2, and EA3. In an embodiment, the non-emission area NEA may surround the first, second, and third emission areas EA1, EA2, and EA3 in a plan view. For example, the non-emission area NEA may not emit light.

[0069] The display device DD may have a quadrilateral planar shape, such as a rectangular planar shape. In an embodiment, for example, the display device DD may include two first sides extending in the first direction D1 and two second sides extending in the second direction D2. The corner where the first side and the second side intersect may be a right angle. In another embodiment, the corner where the first side and the second side of the display device DD intersect may form a curved surface.

[0070] Figure 4 It is a graphic Figure 1 and Figure 2 A plan view of an embodiment of a pixel defining layer included in a lower structure.

[0071] Reference Figure 1 , Figure 2 , Figure 3 and Figure 4, the lower structure 100 of the display device DD in the embodiment may include a pixel defining layer PDL.

[0072] In an embodiment, the pixel electrode (eg, Figure 7 An opening of at least a portion of the upper surface of the pixel electrodes PE1, PE2, and PE3 may be defined in the pixel defining layer PDL. In an embodiment, for example, a first opening OP1_P overlapping the first light emitting area EA1, a second opening OP2_P overlapping the second light emitting area EA2, and a third opening OP3_P overlapping the third light emitting area EA3 may be defined in the pixel defining layer PDL.

[0073] The areas of the first opening OP1_P, the second opening OP2_P, and the third opening OP3_P may be different from each other. In an embodiment, the area of ​​the second opening OP2_P may be greater than the area of ​​each of the first opening OP1_P and the third opening OP3_P. In this case, the area of ​​the first opening OP1_P may be greater than the area of ​​the third opening OP3_P. However, the present disclosure is not limited thereto.

[0074] The first opening OP1_P may have the same area as the first light emitting region EA1, the second opening OP2_P may have the same area as the second light emitting region EA2, and the third opening OP3_P may have the same area as the third light emitting region EA3. Accordingly, the first opening OP1_P may define the first light emitting region EA1, the second opening OP2_P may define the second light emitting region EA2, and the third opening OP3_P may define the third light emitting region EA3. However, the present disclosure is not limited thereto. In an embodiment, for example, the first opening OP1_P may have an area different from the area of ​​the first light emitting region EA1, the second opening OP2_P may have an area different from the area of ​​the second light emitting region EA2, and the third opening OP3_P may have an area different from the area of ​​the third light emitting region EA3.

[0075] Figure 5 It is a graphic Figure 1 and Figure 2 A plan view of an embodiment of a bank layer included in a lower structure of FIG. Figure 6 It is a graphic Figure 1 and Figure 2 A plan view of an embodiment of a bank layer and a light blocking layer included in a lower structure of FIG.

[0076] Reference Figure 1 , Figure 2 , Figure 3 and Figure 5 , the lower structure 100 of the display device DD in the embodiment may include a bank layer BL.

[0077] An opening filled with a material forming a color conversion layer and a light-transmitting layer may be defined in the bank layer BL. In an embodiment, a first opening OP1_B overlapping the first light-emitting area EA1, a second opening OP2_B overlapping the second light-emitting area EA2, and a third opening OP3_B overlapping the third light-emitting area EA3 may be defined in the bank layer BL. The first opening OP1_B may be filled with a material forming a color conversion layer and a light-transmitting layer. Figure 7 The second opening OP2_B may be filled with a first color conversion layer CCL1 (eg, Figure 7 The second color conversion layer CCL2 of FIG. 1 is filled with the third opening OP3_B, and the third opening OP3_B may be filled with a light-transmitting layer (eg, Figure 7 Light-transmitting layer (LTL) filling.

[0078] In an embodiment, a first central opening COP1_B extending to two adjacent first openings OP1_B and a second central opening COP2_B extending to two adjacent second openings OP2_B may be further defined in the bank layer BL. The first central opening COP1_B may partially overlap each of the first light emitting area EA1 and the non-light emitting area NEA, and the second central opening COP2_B may partially overlap each of the second light emitting area EA2 and the non-light emitting area NEA. The first central opening COP1_B may be filled with a first color conversion layer and the second central opening COP2_B may be filled with a second color conversion layer.

[0079] In an embodiment, the third openings OP3_B may be spaced apart from each other. That is, a central opening extending to the third opening OP3_B may not be defined in the bank layer BL.

[0080] The first color conversion layer and the second color conversion layer may be formed by an inkjet printing process. In the inkjet printing process, an ink composition that is a material for forming the first color conversion layer and the second color conversion layer may be dropped into the first central opening COP1_B and the second central opening COP2_B. In this case, the ink composition dropped into the first central opening COP1_B may diffuse into the first opening OP1_B adjacent to each other, and the ink composition dropped into the second central opening COP2_B may diffuse into the second opening OP2_B adjacent to each other. Accordingly, a high-resolution display device DD may be realized.

[0081] In an embodiment, the center of the first central opening COP1_B may be defined on the same line as the center of the first opening OP1_B adjacent to the first central opening COP1_B in a plan view. In addition, the center of the second central opening COP2_B may be defined on the same line as the center of the second opening OP2_B adjacent to the second central opening COP2_B in a plan view. However, the present disclosure is not limited thereto.

[0082] Further references Figure 6 , the lower structure 100 of the display device DD in the embodiment may further include a light blocking layer BM.

[0083] The light blocking layer BM may be disposed on the bank layer BL. The light blocking layer BM may overlap the non-light emitting area NEA. Specifically, the light blocking layer BM may overlap a portion of the non-light emitting area NEA. In an embodiment, the light blocking layer BM may include a plurality of light blocking patterns spaced apart from each other. One of the light blocking patterns may partially overlap the first central opening COP1_B, and another of the light blocking patterns may partially overlap the second central opening COP2_B.

[0084] Each of the light blocking patterns may have various planar shapes. In an embodiment, each of the light blocking patterns may have an "H" shape in a plan view. However, the present disclosure is not limited thereto.

[0085] In an embodiment, the display device DD may further include a columnar spacer CS disposed on the bank layer BL. The columnar spacer CS may include the same material as that of the light blocking layer BM. That is, the columnar spacer CS may be formed by the same process as the light blocking layer BM. The columnar spacer CS may maintain a constant gap between the lower structure 100 and the upper structure 200. In other embodiments, the columnar spacer CS may be omitted.

[0086] Figure 7 It is along Figure 3 , Figure 4 and Figure 6 Cross-sectional views taken along line II-II', line III-III' and line IV-IV'.

[0087] Reference Figure 7 , the display device DD in the embodiment may include a lower structure 100, a filling layer 300, and an upper structure 200. First, the lower structure 100 will be described.

[0088] The lower structure 100 includes a first substrate SUB1, a buffer layer BUF, a first transistor TR1, a second transistor TR2 and a third transistor TR3, a gate insulating layer GI, an intermediate insulating layer ILD, a via insulating layer VIA, a pixel defining layer PDL, a first light emitting element LED1, a second light emitting element LED2 and a third light emitting element LED3, an encapsulation layer ENC, a dam layer BL, a first color conversion layer CCL1 and a second color conversion layer CCL2, a light transmitting layer LTL, a first passivation layer PL1 and a light blocking layer BM.

[0089] As described above, the display device DD may be divided into a display area DA and a non-display area NDA, and the display area DA may include a first pixel area PX1 and a second pixel area PX2. Since the display area DA of the display device DD includes the first pixel area PX1 and the second pixel area PX2, the first substrate SUB1 may include the first pixel area PX1 and the second pixel area PX2.

[0090] The first substrate SUB1 may include a transparent material or an opaque material. The first substrate SUB1 may include a transparent resin substrate or be composed of a transparent resin substrate. In an embodiment, the transparent resin substrate may include a polyimide substrate, etc. In this case, the polyimide substrate may include a first organic layer, a first barrier layer, or a second organic layer, etc. In an alternative embodiment, the first substrate SUB1 may include a quartz substrate, a synthetic quartz substrate, a calcium fluoride substrate, a fluorine-doped quartz substrate, a soda-lime glass substrate, or an alkali-free glass substrate, etc. These may be used alone or in any combination with each other.

[0091] The buffer layer BUF may be disposed on the first substrate SUB1. The buffer layer BUF may prevent metal atoms or impurities from diffusing from the first substrate SUB1 to the first transistor TR1, the second transistor TR2, and the third transistor TR3. In addition, when the surface of the first substrate SUB1 is uneven, the buffer layer BUF may improve the flatness of the surface of the first substrate SUB1. In an embodiment, for example, the buffer layer BUF may include an inorganic material such as silicon oxide, silicon nitride, or silicon oxynitride. These may be used alone or in any combination with each other.

[0092] The first active pattern ACT1, the second active pattern ACT2, and the third active pattern ACT3 may be disposed on the buffer layer BUF. Each of the first active pattern ACT1, the second active pattern ACT2, and the third active pattern ACT3 may include an inorganic semiconductor (e.g., a metal oxide semiconductor, amorphous silicon, polycrystalline silicon) or an organic semiconductor. Each of the first active pattern ACT1, the second active pattern ACT2, and the third active pattern ACT3 may include a source region, a drain region, and a channel region disposed between the source region and the drain region. The first active pattern ACT1, the second active pattern ACT2, and the third active pattern ACT3 may be formed by the same process and include the same material.

[0093] The metal oxide semiconductor may include a binary compound (AB) containing indium (In), zinc (Zn), gallium (Ga), tin (Sn), titanium (Ti), aluminum (Al), hafnium (Hf), zirconium (Zr), or magnesium (Mg), or composed of indium (In), zinc (Zn), gallium (Ga), tin (Sn), titanium (Ti), aluminum (Al), hafnium (Hf), zirconium (Zr), or magnesium (Mg). x), ternary compounds (AB x C y ) or quaternary compound (AB x C y D z ) etc. In an embodiment, for example, the metal oxide semiconductor may include zinc oxide (ZnO x ), gallium oxide (GaO x ), tin oxide (SnO x ), indium oxide (InO x ), indium gallium oxide ("IGO"), indium zinc oxide ("IZO"), indium tin oxide ("ITO"), indium zinc tin oxide ("IZTO"), or indium gallium zinc oxide ("IGZO"), etc. These may be used alone or in any combination with one another.

[0094] The gate insulating layer GI may be disposed on the buffer layer BUF. The gate insulating layer GI may fully cover the first active pattern ACT1, the second active pattern ACT2, and the third active pattern ACT3, and may have a substantially flat upper surface without creating steps around the first active pattern ACT1, the second active pattern ACT2, and the third active pattern ACT3. In an alternative embodiment, the gate insulating layer GI may cover the first active pattern ACT1, the second active pattern ACT2, and the third active pattern ACT3 and may be disposed along the contour of each of the first active pattern ACT1, the second active pattern ACT2, and the third active pattern ACT3 to have a uniform thickness. In an embodiment, for example, the gate insulating layer GI may include a material such as silicon oxide (SiO x ), silicon nitride (SiN x ), Silicon Carbide (SiC x ), silicon oxynitride (SiO x N y ) or silicon oxycarbide (SiO x C y ) etc. These may be used alone or in any combination with each other.

[0095] The first gate electrode GE1, the second gate electrode GE2, and the third gate electrode GE3 may be disposed on the gate insulating layer GI. The first gate electrode GE1 may overlap the channel region of the first active pattern ACT1, the second gate electrode GE2 may overlap the channel region of the second active pattern ACT2, and the third gate electrode GE3 may overlap the channel region of the third active pattern ACT3.

[0096] Each of the first gate electrode GE1, the second gate electrode GE2, and the third gate electrode GE3 may include a metal, an alloy, a metal nitride, a conductive metal oxide, or a transparent conductive material, etc. In an embodiment, the metal may include silver (Ag), molybdenum (Mo), aluminum (Al), tungsten (W), copper (Cu), nickel (Ni), chromium (Cr), titanium (Ti), tantalum (Ta), platinum (Pt), or scandium (Sc), etc. In an embodiment, the conductive metal oxide may include indium tin oxide and indium zinc oxide. In addition, an embodiment of the metal nitride may include aluminum nitride (AlN x ), tungsten nitride (WN x ) or chromium nitride (CrN x ) etc. These may be used alone or in any combination with each other.

[0097] The first gate electrode GE1 , the second gate electrode GE2 , and the third gate electrode GE3 may be formed by the same process and include the same material.

[0098] The intermediate insulating layer ILD may be disposed on the gate insulating layer GI. The intermediate insulating layer ILD may fully cover the first gate electrode GE1, the second gate electrode GE2, and the third gate electrode GE3 and may have a substantially flat upper surface without creating steps around the first gate electrode GE1, the second gate electrode GE2, and the third gate electrode GE3. In an alternative embodiment, the intermediate insulating layer ILD may cover the first gate electrode GE1, the second gate electrode GE2, and the third gate electrode GE3 and may be disposed along the contour of each of the first gate electrode GE1, the second gate electrode GE2, and the third gate electrode GE3. In an embodiment, for example, the intermediate insulating layer ILD may include an inorganic material such as silicon oxide, silicon nitride, silicon carbide, silicon oxynitride, or silicon oxycarbide. These may be used alone or in any combination with each other.

[0099] The first source electrode SE1, the second source electrode SE2, and the third source electrode SE3 may be disposed on the intermediate insulating layer ILD. The first source electrode SE1 may be connected to the source region of the first active pattern ACT1 through a contact hole penetrating the gate insulating layer GI and the intermediate insulating layer ILD. The second source electrode SE2 may be connected to the source region of the second active pattern ACT2 through a contact hole penetrating the gate insulating layer GI and the intermediate insulating layer ILD. The third source electrode SE3 may be connected to the source region of the third active pattern ACT3 through a contact hole penetrating the gate insulating layer GI and the intermediate insulating layer ILD.

[0100] The first drain electrode DE1, the second drain electrode DE2, and the third drain electrode DE3 may be disposed on the intermediate insulating layer ILD. The first drain electrode DE1 may be connected to the drain region of the first active pattern ACT1 through a contact hole penetrating the gate insulating layer GI and the intermediate insulating layer ILD. The second drain electrode DE2 may be connected to the drain region of the second active pattern ACT2 through a contact hole penetrating the gate insulating layer GI and the intermediate insulating layer ILD. The third drain electrode DE3 may be connected to the drain region of the third active pattern ACT3 through a contact hole penetrating the gate insulating layer GI and the intermediate insulating layer ILD.

[0101] In an embodiment, for example, each of the first source electrode SE1, the second source electrode SE2, and the third source electrode SE3 may include a metal, an alloy, a metal nitride, a conductive metal oxide, or a transparent conductive material, etc. These may be used alone or in any combination with each other. The first drain electrode DE1, the second drain electrode DE2, and the third drain electrode DE3 may be formed by the same process as the first source electrode SE1, the second source electrode SE2, and the third source electrode SE3 and may include the same material.

[0102] Accordingly, a first transistor TR1 including a first active pattern ACT1, a first gate electrode GE1, a first source electrode SE1 and a first drain electrode DE1 may be disposed on the first substrate SUB1, a second transistor TR2 including a second active pattern ACT2, a second gate electrode GE2, a second source electrode SE2 and a second drain electrode DE2 may be disposed on the first substrate SUB1, and a third transistor TR3 including a third active pattern ACT3, a third gate electrode GE3, a third source electrode SE3 and a third drain electrode DE3 may be disposed on the first substrate SUB1.

[0103] The via insulating layer VIA may be disposed on the intermediate insulating layer ILD. The via insulating layer VIA may fully cover the first source electrode SE1, the second source electrode SE2, and the third source electrode SE3 and the first drain electrode DE1, the second drain electrode DE2, and the third drain electrode DE3. The via insulating layer VIA may include an organic material. In an embodiment, for example, the via insulating layer VIA may include an organic material such as a phenolic resin, a polyacrylate resin, a polyimide resin, a polyamide resin, a siloxane resin, or an epoxy resin. These may be used alone or in any combination with each other.

[0104] The first pixel electrode PE1, the second pixel electrode PE2, and the third pixel electrode PE3 may be disposed on the via insulating layer VIA. The first pixel electrode PE1 may overlap the first light emitting region EA1, the second pixel electrode PE2 may overlap the second light emitting region EA2, and the third pixel electrode PE3 may overlap the third light emitting region EA3. The first pixel electrode PE1 may be connected to the first drain electrode DE1 through a contact hole penetrating the via insulating layer VIA, the second pixel electrode PE2 may be connected to the second drain electrode DE2 through a contact hole penetrating the via insulating layer VIA, and the third pixel electrode PE3 may be connected to the third drain electrode DE3 through a contact hole penetrating the via insulating layer VIA.

[0105] In an embodiment, for example, each of the first pixel electrode PE1, the second pixel electrode PE2 and the third pixel electrode PE3 may include a metal, an alloy, a metal nitride, a conductive metal oxide or a transparent conductive material, etc. These may be used alone or in any combination with each other. In an embodiment, each of the first pixel electrode PE1, the second pixel electrode PE2 and the third pixel electrode PE3 may have a stacked structure including ITO / Ag / ITO. The first pixel electrode PE1, the second pixel electrode PE2 and the third pixel electrode PE3 may be formed by the same process and include the same material. In an embodiment, for example, each of the first pixel electrode PE1, the second pixel electrode PE2 and the third pixel electrode PE3 may function as an anode.

[0106] The pixel defining layer PDL may be disposed on the via insulating layer VIA. The pixel defining layer PDL may overlap the non-light emitting area NEA. The pixel defining layer PDL may cover an edge of each of the first pixel electrode PE1, the second pixel electrode PE2, and the third pixel electrode PE3. In addition, an opening (e.g., Figure 4 The first opening OP1_P, the second opening OP2_P and the third opening OP3_P) may be defined in the pixel defining layer PDL. In an embodiment, for example, the pixel defining layer PDL may include an inorganic material or an organic material. In an embodiment, the pixel defining layer PDL may include an organic material such as an epoxy resin or a silicone resin. These may be used alone or in any combination with each other. In another embodiment, the pixel defining layer PDL may further include a light blocking material having a black color.

[0107] The first light emitting layer EML1 may be disposed on the first pixel electrode PE1, the second light emitting layer EML2 may be disposed on the second pixel electrode PE2, and the third light emitting layer EML3 may be disposed on the third pixel electrode PE3. Specifically, the first light emitting layer EML1 may be disposed in the first opening (eg, Figure 4 The second light emitting layer EML2 may be disposed in the first opening OP1_P of the pixel defining layer PDL (eg, Figure 4 The third light emitting layer EML3 may be disposed in the second opening OP2_P of the pixel defining layer PDL (eg, Figure 4 In the third opening OP3_P).

[0108] Each of the first, second, and third light emitting layers EML1, EML2, and EML3 may include an organic material emitting light of a predetermined color. In an embodiment, each of the first, second, and third light emitting layers EML1, EML2, and EML3 may include an organic material emitting blue light.

[0109] The first common electrode CE1 may be disposed on the first light-emitting layer EML1 and the pixel defining layer PDL, the second common electrode CE2 may be disposed on the second light-emitting layer EML2 and the pixel defining layer PDL, and the third common electrode CE3 may be disposed on the third light-emitting layer EML3 and the pixel defining layer PDL. The first common electrode CE1, the second common electrode CE2, and the third common electrode CE3 may be integral with each other. In an embodiment, for example, each of the first common electrode CE1, the second common electrode CE2, and the third common electrode CE3 may include a metal, an alloy, a metal nitride, a conductive metal oxide, or a transparent conductive material, etc. These may be used alone or in any combination with each other. The first common electrode CE1, the second common electrode CE2, and the third common electrode CE3 may operate as a cathode.

[0110] Accordingly, a first light emitting element LED1 including a first pixel electrode PE1, a first light emitting layer EML1, and a first common electrode CE1 may be disposed in a first light emitting area EA1 on a first substrate SUB1, a second light emitting element LED2 including a second pixel electrode PE2, a second light emitting layer EML2, and a second common electrode CE2 may be disposed in a second light emitting area EA2 on a first substrate SUB1, and a third light emitting element LED3 including a third pixel electrode PE3, a third light emitting layer EML3, and a third common electrode CE3 may be disposed in a third light emitting area EA3 on a first substrate SUB1. Each of the first light emitting element LED1, the second light emitting element LED2, and the third light emitting element LED3 may emit blue light.

[0111] The first light emitting element LED1 may be electrically connected to the first transistor TR1 , the second light emitting element LED2 may be electrically connected to the second transistor TR2 , and the third light emitting element LED3 may be electrically connected to the third transistor TR3 .

[0112] The encapsulation layer ENC may be disposed on the first common electrode CE1, the second common electrode CE2, and the third common electrode CE3. The encapsulation layer ENC may prevent impurities, moisture, or air from penetrating from the outside into the first light-emitting element LED1, the second light-emitting element LED2, and the third light-emitting element LED3. The encapsulation layer ENC may include at least one inorganic layer and at least one organic layer. In an embodiment, for example, the inorganic layer may include silicon oxide, silicon nitride, or silicon oxynitride, etc. These may be used alone or in any combination with each other. The organic layer may include a polymer curing material such as polyacrylate, etc.

[0113] The bank layer BL may be disposed on the encapsulation layer ENC. The bank layer BL may overlap the non-emission area NEA. A space capable of accommodating materials forming the first color conversion layer CCL1, the second color conversion layer CCL2, and the light-transmitting layer LTL may be formed in the bank layer BL. In an embodiment, a first opening (e.g., Figure 5 A first opening OP1_B overlapping with the second light emitting area EA2 (eg, Figure 5 A second opening OP2_B) and a third opening OP3_B overlapping the third light emitting area EA3 may be defined in the bank layer BL. In addition, a first central opening COP1_B extending to an adjacent first opening and a second central opening COP2_B extending to an adjacent second opening may be further defined in the bank layer BL. The first opening, the second opening, the third opening OP3_B, the first central opening COP1_B and the second central opening COP2_B may accommodate the above-mentioned materials.

[0114] The bank layer BL may include an inorganic material and / or an organic material. In an embodiment, for example, the bank layer BL may include an organic material such as polyimide. In an alternative embodiment, the bank layer BL may include an inorganic material and / or an organic material including or consisting of a light blocking material having a black color.

[0115] The first color conversion layer CCL1, the second color conversion layer CCL2, and the light-transmitting layer LTL may be disposed on the encapsulation layer ENC. The first color conversion layer CCL1 may overlap the first light-emitting area EA1, the second color conversion layer CCL2 may overlap the second light-emitting area EA2, and the light-transmitting layer LTL may overlap the third light-emitting area EA3. In addition, the first color conversion layer CCL1 may further overlap a portion of the non-light-emitting area NEA disposed between adjacent first light-emitting areas EA1, and the second color conversion layer CCL2 may further overlap a portion of the non-light-emitting area NEA disposed between adjacent second light-emitting areas EA2.

[0116] In an embodiment, the first color conversion layer CCL1 may be provided to fill the first opening and the first central opening COP1_B of the bank layer BL, the second color conversion layer CCL2 may be provided to fill the second opening and the second central opening COP2_B of the bank layer BL, and the light-transmitting layer LTL may be provided to fill the third opening OP3_B of the bank layer BL. Accordingly, the first color conversion layer CCL1 may have the same planar shape as the first opening and the first central opening COP1_B, the second color conversion layer CCL2 may have the same planar shape as the second opening and the second central opening COP2_B, and the light-transmitting layer LTL may have the same planar shape as the third opening OP3_B.

[0117] Figure 8 It is a graphic Figure 7 A cross-sectional view of an embodiment of a first color conversion layer, a second color conversion layer, and a light-transmitting layer of a display device.

[0118] Further references Figure 8 , the first color conversion layer CCL1 may include first quantum dots 11c excited by the light L1 emitted from the first light emitting element LED1 to emit light of a first color (eg, red light Lr). In addition, the first color conversion layer CCL1 may further include a first base resin 11b in which first scattering particles 11a are dispersed.

[0119] The second color conversion layer CCL2 may include second quantum dots 12c excited by the light L1 emitted from the second light emitting element LED2 to emit light of a second color (eg, green light Lg). In addition, the second color conversion layer CCL2 may further include a second base resin 12b in which second scattering particles 12a are dispersed.

[0120] The light-transmitting layer LTL may emit blue light Lb by transmitting the light L1 emitted from the third light-emitting element LED 3. In addition, the light-transmitting layer LTL may include a third base resin 13b in which third scattering particles 13a are dispersed.

[0121] In an embodiment, for example, each of the first base resin 11b, the second base resin 12b, and the third base resin 13b may include an organic material having a relatively high light transmittance such as a photoresist, a silicone resin, or an epoxy resin. These may be used alone or in any combination with each other. In an embodiment, the third base resin 13b may include a photosensitive organic material having a relatively high light transmittance. However, the present disclosure is not limited thereto.

[0122] In an embodiment, for example, the first scattering particles 11a, the second scattering particles 12a, and the third scattering particles 13a may scatter and emit light emitted from the first light-emitting element LED1, the second light-emitting element LED2, and the third light-emitting element LED3. In addition, the first scattering particles 11a, the second scattering particles 12a, and the third scattering particles 13a may include the same material as each other.

[0123] Accordingly, the first light emitting area EA1 may emit red light Lr, the second light emitting area EA2 may emit green light Lg, and the third light emitting area EA3 may emit blue light Lb.

[0124] In an embodiment, the first color conversion layer CCL1 and the second color conversion layer CCL2 may be formed by an inkjet printing process, and the light-transmitting layer LTL may be formed by a photolithography process. However, the present disclosure is not limited thereto.

[0125] Back to reference Figure 7 , the first passivation layer PL1 may be disposed on the first color conversion layer CCL1, the second color conversion layer CCL2, the light-transmitting layer LTL, and the dike layer BL. The first passivation layer PL1 may be disposed along the contours of the first color conversion layer CCL1, the second color conversion layer CCL2, the light-transmitting layer LTL, and the dike layer BL. The first passivation layer PL1 may function to prevent moisture penetration to prevent degradation of the first color conversion layer CCL1, the second color conversion layer CCL2, and the light-transmitting layer LTL. In an embodiment, for example, the first passivation layer PL1 may include an inorganic material such as silicon oxide, silicon nitride, or silicon oxynitride. These may be used alone or in any combination with one another.

[0126] The light blocking layer BM may be disposed on the first passivation layer PL1. The light blocking layer BM may overlap the non-emission area NEA. Specifically, the light blocking layer BM may overlap a portion of the non-emission area NEA. That is, the first emission area EA1 and the second emission area EA2 may be defined by the light blocking layer BM. In addition, the light blocking layer BM may block light leakage.

[0127] The light blocking layer BM may include an inorganic material and / or an organic material. In an embodiment, for example, the light blocking layer BM may include an organic material such as polyimide, etc. In an alternative embodiment, the light blocking layer BM may include an inorganic material and / or an organic material including or consisting of a light blocking material having a black color.

[0128] Hereinafter, the upper structure 200 will be described.

[0129] The upper structure 200 may include a second substrate SUB2, first, second and third color filters CF1, CF2 and CF3, and a second passivation layer PL2.

[0130] The second substrate SUB2 may include a transparent resin substrate or be composed of a transparent resin substrate. The second substrate SUB2 may transmit light emitted from the first light-emitting element LED1, the second light-emitting element LED2, and the third light-emitting element LED3. In an embodiment, for example, the second substrate SUB2 may include an insulating material such as glass or plastic. In an alternative embodiment, the second substrate SUB2 may include an organic polymer material such as polycarbonate ("PC"), polyethylene ("PE"), or polypropylene ("PP"). These may be used alone or in any combination with each other.

[0131] A color filter layer may be disposed under the second substrate SUB2. The color filter layer may selectively transmit light having a predetermined wavelength. The color filter layer may include a first color filter CF1, a second color filter CF2, and a third color filter CF3.

[0132] The first color filter CF1 may selectively transmit light of a first color (e.g., red light Lr). The first color filter CF1 may overlap the first light emitting area EA1 and the non-light emitting area NEA. In this case, the first color filter CF1 may not overlap the second light emitting area EA2 and the third light emitting area EA3. In an embodiment, the first color filter CF1 may completely overlap the first central opening COP1_B and partially overlap the second central opening COP2_B.

[0133] The second color filter CF2 may selectively transmit light of a second color (e.g., green light Lg). The second color filter CF2 may overlap the second light emitting area EA2 and the non-light emitting area NEA. In this case, the second color filter CF2 may not overlap the first light emitting area EA1 and the third light emitting area EA3. In an embodiment, the second color filter CF2 may partially overlap the first central opening COP1_B and completely overlap the second central opening COP2_B.

[0134] The third color filter CF3 may selectively transmit light of a third color (e.g., blue light Lb). The third color filter CF3 may overlap the third light emitting area EA3 and the non-light emitting area NEA. In this case, the third color filter CF3 may not overlap the first light emitting area EA1 and the second light emitting area EA2. In an embodiment, the third color filter CF3 partially overlaps each of the first central opening COP1_B and the second central opening COP2_B, and completely overlaps the third opening OP3_B.

[0135] The second passivation layer PL2 may be disposed under the color filter layer. The second passivation layer PL2 may block external impurities to prevent contamination of the color filter layer. In an embodiment, for example, the second passivation layer PL2 may include an inorganic material such as silicon oxide, silicon nitride, or silicon oxynitride. These may be used alone or in any combination with each other.

[0136] The filling layer 300 may be disposed between the lower structure 100 and the upper structure 200. That is, the filling layer 300 may fill an empty space between the lower structure 100 and the upper structure 200.

[0137] However, although the display device DD of the present disclosure is limited to an organic light emitting display device ("OLED"), the present disclosure is not limited thereto. In an embodiment, for example, the display device DD may include a liquid crystal display device ("LCD"), a field emission display device ("FED"), a plasma display device ("PDP"), or an electrophoretic display device ("EPD").

[0138] In addition, although the bank layer BL, the first color conversion layer CCL1, the second color conversion layer CCL2, the light-transmitting layer LTL, and the light-blocking layer BM are illustrated as being included Figure 7 In an alternative embodiment, the bank layer BL, the first color conversion layer CCL1, the second color conversion layer CCL2, the light-transmitting layer LTL, and the light-blocking layer BM may be included in the upper structure 200.

[0139] In the display device DD in the embodiment of the present disclosure, the bank layer BL may be disposed in the non-luminous area NEA and define a first opening OP1_B overlapping with a first luminous area EA1 emitting red light of a first pixel area PX1 and a second pixel area PX2 disposed adjacent to each other and a first central opening COP1_B extending to the first opening OP1_B. In addition, the bank layer BL may further define a second opening OP2_B overlapping with a second luminous area EA2 emitting green light of a first pixel area PX1 and a second pixel area PX2 disposed adjacent to each other and a second central opening COP2_B extending to the second opening OP2_B. A first color conversion layer CCL1 including quantum dots may be filled in the first opening OP1_B and the first central opening COP1_B. A second color conversion layer CCL2 including quantum dots may be filled in the second opening OP2_B and the second central opening COP2_B. That is, due to the central opening, two adjacent openings may be filled with a color conversion layer at the same time. Accordingly, a high-resolution display device DD may be implemented. In addition, color spots of the display device DD may be improved.

[0140] Fig. 9 , Fig.10 , Fig.11 and Fig.12 It is a graphic Figure 5 Plan views of other embodiments of bank layers.

[0141] In the following, the references will be omitted or simplified. Figure 5 The description of the bank layer BL is repeated.

[0142] Reference Fig. 9 , Fig.10 , Fig.11 and Fig.12 , a first opening OP1_B, a second opening OP2_B, a third opening OP3_B, a first central opening COP1_B, and a second central opening COP2_B may be defined in the bank layer BL. The first central opening COP1_B may extend to two adjacent first openings OP1_B, and the second central opening COP2_B may extend to two adjacent second openings OP2_B. Each of the first central opening COP1_B and the second central opening COP2_B may have various shapes.

[0143] Reference Fig. 9In an embodiment, a first side of the first central opening COP1_B may protrude toward the first direction D1 from a first side of the first opening OP1_B extending to the first central opening COP1_B, and a first side of the second central opening COP2_B may protrude toward the first direction D1 from a first side of the second opening OP2_B extending to the second central opening COP2_B. In this case, a second side of the first central opening COP1_B may be defined on the same line as a second side of the first opening OP1_B extending to the first central opening COP1_B, and a second side of the second central opening COP2_B may be defined on the same line as a second side of the second opening OP2_B extending to the second central opening COP2_B.

[0144] Reference Fig.10 In an embodiment, a first side of the first central opening COP1_B may protrude toward the first direction D1 from a first side of the first opening OP1_B extending to the first central opening COP1_B, and a second side of the second central opening COP2_B may protrude toward a direction opposite to the first direction D1 from a second side of the second opening OP2_B extending to the second central opening COP2_B. In this case, the second side of the first central opening COP1_B may be defined on the same line as the second side of the first opening OP1_B extending to the first central opening COP1_B, and the first side of the second central opening COP2_B may be defined on the same line as the first side of the second opening OP2_B extending to the second central opening COP2_B.

[0145] Reference Fig.11 In an embodiment, the second side of the first central opening COP1_B may protrude from the second side of the first opening OP1_B extending to the first central opening COP1_B in a direction opposite to the first direction D1, and the second side of the second central opening COP2_B may protrude from the second side of the second opening OP2_B extending to the second central opening COP2_B in a direction opposite to the first direction D1. In this case, the first side of the first central opening COP1_B may be defined on the same line as the first side of the first opening OP1_B extending to the first central opening COP1_B, and the first side of the second central opening COP2_B may be defined on the same line as the first side of the second opening OP2_B extending to the second central opening COP2_B.

[0146] Reference Fig.12In an embodiment, the second side of the first central opening COP1_B may protrude from the second side of the first opening OP1_B extending to the first central opening COP1_B toward a direction opposite to the first direction D1, and the first side of the second central opening COP2_B may protrude from the first side of the second opening OP2_B extending to the second central opening COP2_B toward the first direction D1. In this case, the first side of the first central opening COP1_B may be defined on the same line as the first side of the first opening OP1_B extending to the first central opening COP1_B, and the second side of the second central opening COP2_B may be defined on the same line as the second side of the second opening OP2_B extending to the second central opening COP2_B.

[0147] Fig.13 It is a graphic Figure 6 A plan view of another embodiment of a bank layer and a light blocking layer.

[0148] In the following, the references will be omitted or simplified. Figure 6 The description of the light blocking layer BM is repeated.

[0149] Reference Figure 3 and Fig.13 , the light blocking layer BM may be disposed on the bank layer BL. The light blocking layer BM may overlap the non-light emitting area NEA. Specifically, the light blocking layer BM may completely overlap the non-light emitting area NEA. In an embodiment, the light blocking layer BM may partially overlap each of the first central opening COP1_B and the second central opening COP2_B, expose the entire first opening OP1_B, the second opening OP2_B, and the third opening OP3_B, and extend continuously in the non-light emitting area NEA. Accordingly, the light blocking layer BM may define the first light emitting area EA1, the second light emitting area EA2, and the third light emitting area EA3.

[0150] Fig.14 It is a graphic Figure 3 A plan view of another embodiment of a display device. Fig.15 It is a graphic Figure 5 and Figure 6 A plan view of another embodiment of a bank layer. Fig.16 The diagram is along Fig.14 and Fig.15 sectional views of an embodiment of the cross sections taken along line VV', line VI-VI' and line VII-VII'.

[0151] In the following, the references will be omitted or simplified. Figure 3 , Figure 4 , Figure 5 , Figure 6 and Figure 7The description of the display device DD described is repeated.

[0152] Reference Fig.14 , Fig.15 and Fig.16 , the display device DD' may include a lower structure 100, a filling layer 300, and an upper structure 200. Here, the lower structure 100 may include a first substrate SUB1, a buffer layer BUF, a first transistor TR1, a second transistor TR2, and a third transistor TR3, a gate insulating layer GI, an intermediate insulating layer ILD, a via insulating layer VIA, a pixel defining layer PDL, a first light emitting element LED1, a second light emitting element LED2, and a third light emitting element LED3, an encapsulation layer ENC, a bank layer BL, a first color conversion layer CCL1, and a second color conversion layer CCL2, a light-transmitting layer LTL, and a first passivation layer PL1. The upper structure 200 may include a second substrate SUB2, a first color filter CF1, a second color filter CF2, and a third color filter CF3, and a second passivation layer PL2.

[0153] In an embodiment, the light blocking layer may not be disposed on the bank layer BL. The first color filter CF1, the second color filter CF2, and the third color filter CF3 may overlap each other in the non-emission area NEA. In this case, the first color filter CF1, the second color filter CF2, and the third color filter CF3 may define the first emission area EA1, the second emission area EA2, and the third emission area EA3.

[0154] In addition, although the bank layer BL, the first color conversion layer CCL1, the second color conversion layer CCL2 and the light-transmitting layer LTL are Fig.15 and Fig.16 The bank layer BL, the first color conversion layer CCL1, the second color conversion layer CCL2, and the light-transmitting layer LTL may be included in the upper structure 200.

[0155] Fig.17 The diagram is along Fig.14 and Fig.15 A cross-sectional view of another embodiment of the cross-sections taken along line VV′, line VI-VI′ and line VII-VII′.

[0156] In the following, the references will be omitted or simplified. Fig.16 The description of the display device DD' described above is repeated.

[0157] Reference Fig.14 , Fig.15 and Fig.17The display device DD' may include a substrate SUB, a buffer layer BUF, a first transistor TR1, a second transistor TR2 and a third transistor TR3, a gate insulating layer GI, an intermediate insulating layer ILD, a via insulating layer VIA, a pixel defining layer PDL, a first light emitting element LED1, a second light emitting element LED2 and a third light emitting element LED3, an encapsulation layer ENC, a dam layer BL, a first color conversion layer CCL1 and a second color conversion layer CCL2, a light transmitting layer LTL, a cover layer CP, a low refractive index layer LRL, a first color filter CF1, a second color filter CF2 and a third color filter CF3, and a passivation layer PRL.

[0158] The display device DD' may have a single substrate structure. In an embodiment, for example, the bank layer BL, the first color conversion layer CCL1, the second color conversion layer CCL2, the light-transmitting layer LTL, the first color filter CF1, the second color filter CF2, and the third color filter CF3 may be directly disposed on the encapsulation layer ENC.

[0159] The cap layer CP may be disposed on the bank layer BL, the first color conversion layer CCL1, the second color conversion layer CCL2, and the light-transmitting layer LTL. The cap layer CP may cover the bank layer BL, the first color conversion layer CCL1, the second color conversion layer CCL2, and the light-transmitting layer LTL. In an embodiment, for example, the cap layer CP may include an inorganic material such as silicon oxide, silicon nitride, or silicon oxynitride. These may be used alone or in any combination with each other.

[0160] The low refractive index layer LRL may be disposed on the cover layer CP. The low refractive index layer LRL may have a relatively low refractive index. In an embodiment, for example, the refractive index of the low refractive index layer LRL may be lower than the refractive index of each of the first color conversion layer CCL1, the second color conversion layer CCL2, and the light-transmitting layer LTL. The low refractive index layer LRL may include an organic material. In an embodiment, for example, the low refractive index layer LRL may include an organic polymer material containing silicon.

[0161] In an embodiment, the light blocking layer may not be disposed on the bank layer BL. In this case, the first, second, and third color filters CF1, CF2, and CF3 may define the first, second, and third light emitting regions EA1, EA2, and EA3.

[0162] The color filter layer may be disposed on the low refractive index layer LRL. The color filter layer may include a first color filter CF1, a second color filter CF2, and a third color filter CF3.

[0163] The passivation layer PRL may be disposed on the first color filter CF1, the second color filter CF2, and the third color filter CF3. The passivation layer PRL may cover the first color filter CF1, the second color filter CF2, and the third color filter CF3. The passivation layer PRL may include an inorganic material and / or an organic material. In an embodiment, for example, the passivation layer PRL may include an inorganic material such as silicon oxide, silicon nitride, or silicon oxynitride. These may be used alone or in any combination with each other.

[0164] Fig.18 It is a graphic Figure 3 A plan view of yet another embodiment of a display device. Fig.19 It is a graphic Figure 5 A plan view of another embodiment of a bank layer. Fig. 20 It is a graphic Figure 6 A plan view of another embodiment of a bank layer and a light blocking layer. Fig.21 It is along Fig.18 and Fig. 20 Cross-sectional views taken along line VIII-VIII', line IX-IX' and line XX'.

[0165] In the following, the references will be omitted or simplified. Figure 3 , Figure 4 , Figure 5 , Figure 6 and Figure 7 The description of the display device DD described is repeated.

[0166] Reference Fig.18 , Fig.19 , Fig. 20 and Fig.21 , the display device DD" may include a lower structure 100, a filling layer 300 and an upper structure 200. Here, the lower structure 100 may include a first substrate SUB1, a buffer layer BUF, a first transistor TR1, a second transistor TR2 and a third transistor TR3, a gate insulating layer GI, an intermediate insulating layer ILD, a via insulating layer VIA, a pixel defining layer PDL, a first light emitting element LED1, a second light emitting element LED2 and a third light emitting element LED3, an encapsulation layer ENC, a bank layer BL, a first color conversion layer CCL1 and a second color conversion layer CCL2, a first passivation layer PL1 and a light blocking layer BM. The upper structure 200 may include a second substrate SUB2, a first color filter CF1, a second color filter CF2 and a third color filter CF3 and a second passivation layer PL2.

[0167] The embankment layer BL may be disposed on the encapsulation layer ENC. The embankment layer BL may overlap with the non-light emitting area NEA. The first opening OP1_B, the second opening OP2_B, the first central opening COP1_B, and the second central opening COP2_B may be defined in the embankment layer BL. The first central opening COP1_B may extend to two adjacent first openings OP1_B, and the second central opening COP2_B may extend to two adjacent second openings OP2_B. In an embodiment, the embankment layer BL may further overlap with the third light emitting area EA3. That is, the opening may not be formed in the embankment layer BL in the third light emitting area EA3.

[0168] In an embodiment, the bank layer BL may include a base resin in which scattering particles are dispersed. In an embodiment, for example, the base resin may include a photosensitive organic material having a relatively high light transmittance. Accordingly, a portion of the bank layer BL overlapping the third light emitting area EA3 may transmit light emitted from the third light emitting element LED3. That is, a portion of the bank layer BL overlapping the third light emitting area EA3 may serve as Figure 7 The light-transmitting layer LTL is shown in FIG.

[0169] The light blocking layer BM may be disposed on the embankment layer BL. The light blocking layer BM may overlap the non-light emitting area NEA. Specifically, the light blocking layer BM may completely overlap the non-light emitting area NEA. In an embodiment, the light blocking layer BM may partially overlap each of the first central opening COP1_B and the second central opening COP2_B, expose the entire first opening OP1_B and the second opening OP2_B, and extend continuously in the non-light emitting area NEA. In addition, the light blocking layer BM may expose the entire portion of the embankment layer BL that overlaps the third light emitting area EA3. Accordingly, the light blocking layer BM may define the first light emitting area EA1, the second light emitting area EA2, and the third light emitting area EA3.

[0170] In addition, although the bank layer BL, the first color conversion layer CCL1, the second color conversion layer CCL2 and the light blocking layer BM are Fig.21 The bank layer BL, the first color conversion layer CCL1, the second color conversion layer CCL2, and the light blocking layer BM may be included in the upper structure 200.

[0171] The present disclosure can be applied to various display devices. In an embodiment, for example, the present invention can be applied to a high-resolution smart phone, a mobile phone, a smart tablet, a smart watch, a tablet PC, a car navigation system, a television, a computer monitor or a laptop computer, etc.

[0172] The foregoing is an illustration of the embodiments and should not be construed as limiting them. Although some embodiments have been described, it will be readily appreciated by those skilled in the art that many modifications are possible in the embodiments without substantially departing from the novel teachings and advantages of the inventive concept. Accordingly, all such modifications are intended to be included within the scope of the inventive concept as defined in the claims. Therefore, it should be understood that the foregoing is an illustration of various embodiments and should not be construed as being limited to the disclosed illustrative embodiments, and modifications to the disclosed embodiments and other embodiments are intended to be included within the scope of the claims.

Claims

1. A display device, include: A substrate including a first pixel region and a second pixel region disposed adjacent to each other, each of the first pixel region and the second pixel region including a first light emitting region, a second light emitting region, a third light emitting region, and a non-light emitting region; a light emitting element disposed in each of the first light emitting region, the second light emitting region, and the third light emitting region on the substrate; a bank layer disposed in the non-light emitting region on the light emitting element and defining a first opening overlapping the first light emitting region of the first pixel region and the second pixel region, respectively, and a first central opening extending to the first opening; as well as The first color conversion layer includes first quantum dots and fills the first opening and the first central opening.

2. The display device according to claim 1, in, The bank layer is further defined as: a second opening, overlapping the first pixel region and the second light emitting region of the second pixel region respectively; a third opening, overlapping the third light emitting area of ​​the first pixel area and the second pixel area respectively; as well as A second central opening extends to the second opening.

3. The display device according to claim 2, in, The center of the first central opening is defined on the same line as the center of the first opening in a plan view, and the center of the second central opening is defined on the same line as the center of the second opening in the plan view.

4. The display device according to claim 2, in, The first side of the first central opening protrudes from the first side of the first opening toward a first direction, and the first side of the second central opening protrudes from the first side of the second opening toward the first direction.

5. The display device according to claim 2, in, The first side of the first central opening protrudes from the first side of the first opening toward a first direction, and the second side of the second central opening protrudes from the second side of the second opening toward a direction opposite to the first direction.

6. The display device according to claim 2, further comprising: include: The second color conversion layer fills the second opening and the second central opening and includes second quantum dots.

7. The display device according to any one of claims 2 to 6, further comprising: include: a light-transmitting layer filling each of the third openings, The light-transmitting layer includes a light-transmitting photosensitive organic material in which scattering particles are dispersed.

8. The display device according to claim 2, further comprising: include: a light blocking layer disposed in the non-light emitting region on the bank layer and partially overlapping each of the first central opening and the second central opening, Wherein, the light blocking layer includes a plurality of light blocking patterns spaced apart from each other.

9. The display device according to claim 2, further comprising: include: a light blocking layer disposed in the non-light emitting region on the bank layer and partially overlapping each of the first central opening and the second central opening, The light blocking layer exposes the entire first opening, the second opening, and the third opening and extends continuously in the non-light emitting region.

10. The display device according to claim 1, in, The bank layer further defines a second opening overlapping the second light emitting regions of the first pixel region and the second pixel region, respectively, and a second central opening extending to the second opening, and wherein the bank layer overlaps with the third light emitting region, The display device further comprises: A light blocking layer is disposed on the embankment layer, partially overlapping each of the first central opening and the second central opening, exposing the entire first opening and the second opening and the entire portion of the embankment layer overlapping the third light emitting area and continuously extending in the non-light emitting area.

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