Uninterrupted power supply (UPS) parallel operation sectional power supply energy-saving configuration system

Abstract

The utility model discloses a UPS (Uninterrupted Power Supply) parallel operation segmented power supply energy-saving configuration system, which comprises a parallel power module capable of being increased or decreased according to actual load requirements, and the parallel power module comprises an IGBT (Insulated Gate Bipolar Translator) driving circuit and an equalization circuit. The power module capable of being connected in parallel can be increased or decreased according to actual load requirements, flexible power configuration is achieved, the battery module capable of being connected in parallel is used for guaranteeing that stable power supply can be provided under different load conditions, the PMU chip is used for controlling the current detection circuit to monitor the states and load requirements of all the modules in real time, power output is dynamically adjusted, and the power supply efficiency is improved. According to the UPS parallel operation segmented power supply energy-saving configuration system, accurate load distribution is achieved, so that the UPS parallel operation segmented power supply energy-saving configuration system can automatically adjust the working state according to the actual load change and the power supply requirement, high-efficiency electric energy utilization is achieved, and the reliability of power supply is guaranteed.

Description

Technical Field

[0001] The utility model relates to the technical field of electric power supply configuration, in particular to a UPS parallel segmented power supply energy-saving configuration system. Background Art

[0002] A power saving configuration system is a software or hardware system used to manage power consumption. It can automatically adjust the power settings of computers, servers, mobile phones and other devices according to set rules and conditions to reduce energy consumption and extend battery life.

[0003] After searching, the Chinese patent document application number is 202311700580.0, which discloses a UPS parallel segmented power supply energy-saving configuration system and method, including multiple power loads, multiple uninterruptible power supplies and a control system. The uninterruptible power supplies are connected in parallel, and the control system includes a load detection module, a power supply corresponding module and a power supply control module; the load detection module detects the total load value of all current power loads and transmits it to the power supply corresponding module; the power supply corresponding module is preset with multiple voltage range values, selects the corresponding voltage range value according to the received total load value and transmits it to the power supply control module; after receiving the voltage range value, the power supply control module controls part of the uninterruptible power supply to shut down according to the voltage range value until the output voltage is within the voltage range value. The invention has the effect of saving electricity by adjusting the working UPS in real time.

[0004] However, the above-mentioned UPS parallel segmented power supply energy-saving configuration system needs to reasonably distribute the load in the parallel segmented configuration to ensure the load balance of each segment. However, the load changes dynamically in actual use, and it is not easy to achieve accurate dynamic load distribution, which may cause some segments to be overloaded or idle. Therefore, we need to propose a UPS parallel segmented power supply energy-saving configuration system to solve the above-mentioned problems. Utility Model Content

[0005] The purpose of the utility model is to provide a UPS parallel segmented power supply energy-saving configuration system, so that the UPS parallel segmented power supply energy-saving configuration system can automatically adjust the working state according to the actual load changes and power supply requirements, thereby achieving efficient power utilization and ensuring the reliability of power supply, so as to solve the problems raised in the background technology.

[0006] To achieve the above object, the utility model provides the following technical solutions: a UPS parallel segmented power energy-saving configuration system, comprising: parallel-connectable power modules that can be increased or decreased according to actual load requirements, the parallel-connectable power modules comprising an IGBT drive circuit and a balancing circuit, the IGBT drive circuit being electrically connected to the balancing circuit;

[0007] A parallel-connectable battery module for providing a stable power supply, the parallel-connectable battery module comprising a battery module capable of being controlled in series and parallel and a protection circuit for protecting the battery module from overcharge, overdischarge, short circuit and abnormal temperature;

[0008] A charging module for charging the battery modules that can be connected in parallel, the charging module comprising a charging management circuit for performing charging management;

[0009] A control module for controlling dynamic power output adjustment, the control module includes a PMU chip U9 responsible for monitoring and adjusting power distribution, a current detection circuit connected to the PMU chip U9 for real-time monitoring of each load current, and multiple voltage regulation circuits for providing a stable voltage supply to the load.

[0010] Preferably, the IGBT driving circuit comprises a transistor V1, a transistor V3, a transistor V2 and a transistor V4, the drain of the transistor V1 is connected to the source of the transistor V3, the drain of the transistor V2 is connected to the source of the transistor V4, the source of the transistor V2 is connected to the source of the transistor V1, the drain of the transistor V3 is connected to the drain of the transistor V4, and a diode D1 and a diode D4 arranged in series, a diode D2 and a diode D5 arranged in series, and a diode D6 arranged in series are connected in parallel between the source of the transistor V1 and the drain of the transistor V3. The diodes D3 and D6 are arranged in series, and the capacitors C1 and C2 are arranged in series, the connecting end of the diode D1 and the diode D4 is connected to the fuse F1 for receiving the input signal, the connecting end of the diode D2 and the diode D5 is connected to the fuse F2 for receiving the input signal, the connecting end of the diode D3 and the diode D6 is connected to the fuse F3 for receiving the input signal, and the connecting end of the transistor V1 and the transistor V3 and the connecting end of the transistor V2 and the transistor V4 are both provided with output pins connected to the balancing circuit.

[0011] Preferably, the balancing circuit includes a differential amplifier U1, and a ground varistor R is connected in parallel to the positive electrode of the differential amplifier U1. SL and a ground resistor R1, the ground resistor R1 and the ground varistor R SL A capacitor C3 is connected between them, the negative end of the differential amplifier U1 is connected to a resistor R2 and a capacitor C7 which are arranged in series, the output end of the differential amplifier U1 is connected to a switch S1, one end of the switch S1 is connected to resistors R4 and R3 which are arranged in series, a capacitor C5 is connected in parallel to the resistor R4, and a capacitor C4 is connected in parallel to the resistor R3, the other end of the switch S1 is connected in parallel to the resistor R5 and the capacitor C6 and resistor R6 which are arranged in series, one end of the resistor R6, one end of the resistor R5 and one end of the resistor R3 are all connected to the negative end of the differential amplifier U1.

[0012] Preferably, the battery module includes a MOS tube Q3 and a diode D11, a battery BT1, a diode D12, a battery BT2, a diode D13 and a battery BT3 connected in series in sequence on the drain of the MOS tube Q3; the source of the MOS tube Q3 is connected to a resistor R51, a capacitor C51, a resistor R52, a capacitor C52, a resistor R53 and a capacitor C53 connected in series in sequence; the connecting end of the capacitor C51 and the resistor R52 is connected to the connecting end of the battery BT1 and the diode D12; the connecting end of the capacitor C52 and the resistor R53 is connected to the connecting end of the battery BT2 and the diode D13; and one end of the capacitor C53 away from the resistor R53 is connected to one end of the battery BT3 away from the diode D13.

[0013] Preferably, the protection circuit includes a balanced discharge chip U4, a balanced discharge chip U5 and a balanced discharge chip U6, wherein pin 2 of the balanced discharge chip U4 is connected to the connection end of the resistor R51 and the capacitor C51, pin 6 of the balanced discharge chip U4 is connected to a transistor Q4, the source of the transistor Q4 is connected to the battery BT1 through the resistor R54, the drain of the transistor Q4 is connected to one end of the diode D11, pin 2 of the balanced discharge chip U5 is connected to the connection end of the resistor R52 and the capacitor C52, pin 6 of the balanced discharge chip U5 is connected to a transistor Q5, the source of the transistor Q5 is connected to the battery BT2 through the resistor R55, pin 2 of the balanced discharge chip U6 is connected to the connection end of the resistor R53 and the capacitor C53, pin 6 of the balanced discharge chip U6 is connected to a transistor Q6, the source of the transistor Q6 is connected to the battery BT3 through the resistor R57.

[0014] Preferably, the charging management circuit includes a management chip U11, pin 5 of the management chip U11 is connected to a capacitor C31 and a capacitor C41 having one end connected to a battery module, pin 4 of the management chip U11 is connected to a capacitor C11 and a capacitor C22 arranged in parallel, the connecting end of the capacitor C11 and the capacitor C22 is connected to a resistor R44, pin 7 of the management chip U11 is connected in series with an LED1 and a resistor R22, pin 6 of the management chip U11 is connected to an LED2 and a resistor R33, and one end of each of the resistors R22 and R33 is connected to one end of the resistor R44.

[0015] Preferably, the voltage regulation circuit includes an inductor L3 connected to the PMU chip U9, one end of the inductor L3 is connected in parallel with a capacitor C71, a resistor R70 and a capacitor to ground C70, one end of the resistor R70 is connected to a grounding resistor R71, and one end of the capacitor to ground C70 is provided with an output terminal Vout.

[0016] Preferably, the current detection circuit includes a transistor Q20 and an operator U60, an operator U61 and an operator U62 arranged in series, the drain of the transistor Q20 is connected in parallel with a diode D60 and a capacitor C60, and an inductor L1 is connected between the diode D60 and the capacitor C60, the other end of the diode D60 is connected to a resistor R60, one end of the resistor R60 is connected to a resistor R61, one end of the resistor R61 is connected to the negative terminal of the operator U62, the output end of the operator U60 and the negative terminal of the operator U61 are connected to a resistor R63, and the negative terminal of the operator U60 is connected in parallel with resistors R64 and R65.

[0017] Compared with the prior art, the beneficial effects of the utility model are:

[0018] 1. The utility model mainly cooperates with a parallel power module, a parallel battery module, a charging module and a control module. The parallel power module can be increased or decreased according to the actual load demand to realize flexible configuration of power. The parallel battery module is used to ensure that a stable power supply can be provided under different load conditions. The PMU chip is used to control the current detection circuit to monitor the status and load demand of each module in real time, and dynamically adjust the power output to realize accurate load distribution, so that the UPS parallel segmented power supply energy-saving configuration system can automatically adjust the working state according to the actual load changes and power supply requirements, thereby realizing efficient energy utilization and ensuring the reliability of power supply. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 This is a system block diagram of the utility model;

[0020] Figure 2 This is a circuit diagram of the IGBT drive circuit of the utility model;

[0021] Figure 3 A circuit diagram of the equalizing circuit of the utility model;

[0022] Figure 4 This is a circuit diagram of the charging management circuit of the utility model;

[0023] Figure 5 This is a circuit diagram of the battery module of the utility model;

[0024] Figure 6 This is a circuit diagram of the control module of the utility model;

[0025] Figure 7 The utility model is a circuit diagram of a current detection circuit. DETAILED DESCRIPTION

[0026] The following will be combined with the drawings in the embodiments of the utility model to clearly and completely describe the technical solutions in the embodiments of the utility model. Obviously, the described embodiments are only part of the embodiments of the utility model, not all of the embodiments. Based on the embodiments in the utility model, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the utility model.

[0027] See also Figure 1-7 , the utility model provides a technical solution: a UPS parallel segmented power energy-saving configuration system, comprising: a parallel-connectable power module that can be increased or decreased according to actual load demand, the parallel-connectable power module comprising an IGBT drive circuit and a balancing circuit, the IGBT drive circuit being electrically connected to the balancing circuit;

[0028] The IGBT driving circuit comprises a transistor V1, a transistor V3, a transistor V2 and a transistor V4, wherein the drain of the transistor V1 is connected to the source of the transistor V3, the drain of the transistor V2 is connected to the source of the transistor V4, the source of the transistor V2 is connected to the source of the transistor V1, the drain of the transistor V3 is connected to the drain of the transistor V4, and a diode D1 and a diode D4 arranged in series, a diode D2 and a diode D5 arranged in series, a diode D3 and a diode D6 arranged in series and a diode D7 arranged in series are connected in parallel between the source of the transistor V1 and the drain of the transistor V3. Capacitor C1 and capacitor C2, the connecting end of the diode D1 and the diode D4 is connected with a fuse F1 for receiving an input signal, the connecting end of the diode D2 and the diode D5 is connected with a fuse F2 for receiving an input signal, the connecting end of the diode D3 and the diode D6 is connected with a fuse F3 for receiving an input signal, and the connecting end of the transistor V1 and the transistor V3 and the connecting end of the transistor V2 and the transistor V4 are both provided with an output pin connected to the balancing circuit, so that the transistor V1, the transistor V3, the transistor V2 and the transistor V4 are connected in parallel to ensure the balance of current in each branch.

[0029] The balancing circuit includes a differential amplifier U1, and a ground varistor R is connected in parallel to the positive electrode of the differential amplifier U1. SL and a ground resistor R1, the ground resistor R1 and the ground varistor R SLA capacitor C3 is connected between them, the negative end of the differential amplifier U1 is connected to a resistor R2 and a capacitor C7 arranged in series, the output end of the differential amplifier U1 is connected to a switch S1, one end of the switch S1 is connected to resistors R4 and R3 arranged in series, the resistor R4 is connected in parallel with a capacitor C5, the resistor R3 is connected in parallel with a capacitor C4, the other end of the switch S1 is connected in parallel with a resistor R5 and a capacitor C6 and a resistor R6 arranged in series, one end of the resistor R6, one end of the resistor R5 and one end of the resistor R3 are all connected to the negative end of the differential amplifier U1, and the differential amplifier U1 is used to adjust the difference in current output to achieve current sharing for each module.

[0030] A parallel-connectable battery module for providing a stable power supply, the parallel-connectable battery module comprising a battery module capable of being controlled in series and parallel and a protection circuit for protecting the battery module from overcharge, overdischarge, short circuit and abnormal temperature;

[0031] The battery module includes a MOS tube Q3 and a diode D11, a battery BT1, a diode D12, a battery BT2, a diode D13 and a battery BT3 connected in series in sequence on the drain of the MOS tube Q3. The source of the MOS tube Q3 is connected to a resistor R51, a capacitor C51, a resistor R52, a capacitor C52, a resistor R53 and a capacitor C53 connected in series in sequence. The connection end of the capacitor C51 and the resistor R52 is connected to the connection end of the battery BT1 and the diode D12. The connection end of the capacitor C52 and the resistor R53 is connected to the connection end of the battery BT2 and the diode D13. The end of the capacitor C53 away from the resistor R53 is connected to the connection end of the battery BT3 away from the diode D13. When the battery modules need to be connected in series, the gate and source of the MOS tube Q3 are turned on, and the current passes through the diode D11, the battery BT1, the diode D12, the battery BT2, the diode D13 and the battery BT3 in sequence, so that the battery BT1, the battery BT2 and the battery BT3 are connected in series. At the same time, the diodes D11, the diodes D12 and the diodes D13 are used to protect the batteries, and only current output is allowed, and current input is not allowed, so as to prevent the batteries from charging each other. When the battery modules need to be connected in parallel, the gate and the drain of the MOS tube Q3 are turned on, so that the battery BT1, the battery BT2 and the battery BT3 are connected in parallel, so that the battery modules can be flexibly switched in series and parallel according to actual use requirements.

[0032] The protection circuit includes a balanced discharge chip U4, a balanced discharge chip U5 and a balanced discharge chip U6. Pin 2 of the balanced discharge chip U4 is connected to the connection end of the resistor R51 and the capacitor C51. Pin 6 of the balanced discharge chip U4 is connected to a transistor Q4. The source of the transistor Q4 is connected to the battery BT1 through the resistor R54. The drain of the transistor Q4 is connected to one end of the diode D11. Pin 2 of the balanced discharge chip U5 is connected to the connection end of the resistor R52 and the capacitor C52. Pin 6 of the balanced discharge chip U5 is connected to a transistor Q4. The transistor Q5 is connected to the battery BT2 through the resistor R55, the pin 2 of the balanced discharge chip U6 is connected to the connection end of the resistor R53 and the capacitor C53, the pin 6 of the balanced discharge chip U6 is connected to the transistor Q6, the source of the transistor Q6 is connected to the battery BT3 through the resistor R57, and the balanced discharge chip U4, the balanced discharge chip U5 and the balanced discharge chip U6 are used to protect the battery BT1, the battery BT2 and the battery BT3 respectively, so as to reduce the overcharge, over discharge, short circuit and temperature abnormality of the battery module.

[0033] A charging module for charging the battery modules that can be connected in parallel, the charging module comprising a charging management circuit for performing charging management;

[0034] The charging management circuit includes a management chip U11, wherein the 5th pin of the management chip U11 is connected to a capacitor C31 and a capacitor C41 having one end connected to a battery module, the 4th pin of the management chip U11 is connected to a capacitor C11 and a capacitor C22 arranged in parallel, the connection end of the capacitor C11 and the capacitor C22 is connected to a resistor R44, the 7th pin of the management chip U11 is connected in series with an LED1 and a resistor R22, the 6th pin of the management chip U11 is connected to an LED2 and a resistor R33, one end of the resistor R22 and the resistor R33 are both connected to one end of the resistor R44, and the management chip U11 charges the single-chip battery, and indicates the charging status through an LED1 (marked in red) connected to the resistor R22 and an LED2 (marked in green) connected to the resistor R33. When LED1 is on, it indicates that the battery is being charged; when LED2 is on, it indicates that the battery is fully charged.

[0035] A control module for controlling dynamic power output adjustment, the control module includes a PMU chip U9 responsible for monitoring and adjusting power distribution, a current detection circuit connected to the PMU chip U9 for real-time monitoring of each load current, and multiple voltage regulation circuits for providing a stable voltage supply to the load.

[0036] The voltage regulation circuit includes an inductor L3 connected to the PMU chip U9, one end of the inductor L3 is connected in parallel with a capacitor C71, a resistor R70 and a ground capacitor C70, one end of the resistor R70 is connected to a ground resistor R71, and one end of the ground capacitor C70 is provided with an output terminal Vout, such as Figure 6 As shown in the figure, there are three groups of voltage regulating circuits (the symbols of the capacitors, resistors and inductors of the three groups of voltage regulating circuits are different, but the functions are the same and will not be described in detail here) which respectively adjust different voltage outputs, and use capacitor C70, capacitor C71 and inductor L3 to smooth the voltage and remove noise, thereby improving the stability of the voltage output.

[0037] The current detection circuit includes a transistor Q20 and an operator U60, an operator U61 and an operator U62 which are arranged in series. The drain of the transistor Q20 is connected in parallel with a diode D60 and a capacitor C60, and an inductor L1 is connected between the diode D60 and the capacitor C60. The other end of the diode D60 is connected with a resistor R60, one end of the resistor R60 is connected with a resistor R61, one end of the resistor R61 is connected to the negative end of the operator U62, the output end of the operator U60 is connected to the negative end of the operator U61 with a resistor R63, and the negative end of the operator U60 is connected to the negative end of the operator U61. The end is connected in parallel with resistor R64 and resistor R65. Resistors R60, R61, R63, R64 and R65 are used to set the gain of the operational amplifier and provide feedback to adjust the sensitivity and accuracy of the circuit. Transistor Q20, diode D60, capacitor C60 and inductor L1 form a filtering and protection network to ensure the accuracy and stability of the signal, and help eliminate noise and protect the circuit from voltage spikes. Operators U60, U61 and U62 are used to amplify and process signals, and output the processed signals to improve the accuracy of current monitoring.

[0038] Although the embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that various changes, modifications, substitutions and variations may be made to the embodiments without departing from the principles and spirit of the present invention, and that the scope of the present invention is defined by the appended claims and their equivalents.

Claims

1. A UPS parallel segmented power supply energy saving configuration system, Features: include: A parallel-connectable power module that can be increased or decreased according to actual load demand, the parallel-connectable power module comprising an IGBT drive circuit and a balancing circuit, the IGBT drive circuit being electrically connected to the balancing circuit; A parallel-connectable battery module for providing a stable power supply, the parallel-connectable battery module comprising a battery module capable of being controlled in series and parallel and a protection circuit for protecting the battery module from overcharge, overdischarge, short circuit and abnormal temperature; A charging module for charging the battery modules that can be connected in parallel, the charging module comprising a charging management circuit for performing charging management; A control module for controlling dynamic power output adjustment, the control module includes a PMU chip U9 responsible for monitoring and adjusting power distribution, a current detection circuit connected to the PMU chip U9 for real-time monitoring of each load current, and multiple voltage regulation circuits for providing a stable voltage supply to the load.

2. A UPS parallel segmented power supply energy saving configuration system according to claim 1, Features: The IGBT driving circuit includes a transistor V1, a transistor V3, a transistor V2 and a transistor V4, wherein the drain of the transistor V1 is connected to the source of the transistor V3, the drain of the transistor V2 is connected to the source of the transistor V4, the source of the transistor V2 is connected to the source of the transistor V1, and the drain of the transistor V3 is connected to the drain of the transistor V4. A diode D1 and a diode D4, a diode D2 and a diode D5, a diode D3 and a diode D6, and a capacitor C1 and a capacitor C2 arranged in series are connected in parallel between the source of the transistor V1 and the drain of the transistor V3. A fuse F1 for receiving an input signal is connected to a connecting end of the diode D1 and the diode D4, a fuse F2 for receiving an input signal is connected to a connecting end of the diode D2 and the diode D5, and a fuse F3 for receiving an input signal is connected to a connecting end of the diode D3 and the diode D6. An output pin connected to an equalizing circuit is provided at a connecting end of the transistor V1 and the transistor V3 and at a connecting end of the transistor V2 and the transistor V4.

3. A UPS parallel segmented power supply energy saving configuration system according to claim 2, Features: The balancing circuit includes a differential amplifier U1, and a ground varistor R is connected in parallel to the positive electrode of the differential amplifier U1. SL and a ground resistor R1, the ground resistor R1 and the ground varistor R SL A capacitor C3 is connected between them, the negative end of the differential amplifier U1 is connected to a resistor R2 and a capacitor C7 which are arranged in series, the output end of the differential amplifier U1 is connected to a switch S1, one end of the switch S1 is connected to resistors R4 and R3 which are arranged in series, a capacitor C5 is connected in parallel to the resistor R4, and a capacitor C4 is connected in parallel to the resistor R3, the other end of the switch S1 is connected in parallel to the resistor R5 and the capacitor C6 and resistor R6 which are arranged in series, one end of the resistor R6, one end of the resistor R5 and one end of the resistor R3 are all connected to the negative end of the differential amplifier U1.

4. A UPS parallel segmented power supply energy saving configuration system according to claim 3, Features: The battery module includes a MOS tube Q3 and a diode D11, a battery BT1, a diode D12, a battery BT2, a diode D13 and a battery BT3 connected in series in sequence on the drain of the MOS tube Q3. The source of the MOS tube Q3 is connected with a resistor R51, a capacitor C51, a resistor R52, a capacitor C52, a resistor R53 and a capacitor C53 connected in series in sequence. The connecting end of the capacitor C51 and the resistor R52 is connected to the connecting end of the battery BT1 and the diode D12. The connecting end of the capacitor C52 and the resistor R53 is connected to the connecting end of the battery BT2 and the diode D13. One end of the capacitor C53 away from the resistor R53 is connected to one end of the battery BT3 away from the diode D13.

5. A UPS parallel segmented power supply energy saving configuration system according to claim 4, Features: The protection circuit includes a balanced discharge chip U4, a balanced discharge chip U5 and a balanced discharge chip U6. Pin 2 of the balanced discharge chip U4 is connected to the connection end of the resistor R51 and the capacitor C51. Pin 6 of the balanced discharge chip U4 is connected to a transistor Q4. The source of the transistor Q4 is connected to the battery BT1 through the resistor R54. The drain of the transistor Q4 is connected to one end of the diode D11. Pin 2 of the balanced discharge chip U5 is connected to the connection end of the resistor R52 and the capacitor C52. Pin 6 of the balanced discharge chip U5 is connected to a transistor Q5. The source of the transistor Q5 is connected to the battery BT2 through the resistor R55. Pin 2 of the balanced discharge chip U6 is connected to the connection end of the resistor R53 and the capacitor C53. Pin 6 of the balanced discharge chip U6 is connected to a transistor Q6. The source of the transistor Q6 is connected to the battery BT3 through the resistor R57.

6. A UPS parallel segmented power supply energy saving configuration system according to claim 5, Features: The charging management circuit includes a management chip U11, wherein pin 5 of the management chip U11 is connected to a capacitor C31 and a capacitor C41 having one end connected to a battery module, pin 4 of the management chip U11 is connected to a capacitor C11 and a capacitor C22 arranged in parallel, a resistor R44 is connected to the connecting end of the capacitor C11 and the capacitor C22, pin 7 of the management chip U11 is connected in series with an LED1 and a resistor R22, pin 6 of the management chip U11 is connected to an LED2 and a resistor R33, and one end of each of the resistors R22 and R33 is connected to one end of the resistor R44.

7. A UPS parallel segmented power supply energy saving configuration system according to claim 6, Features: The voltage regulation circuit includes an inductor L3 connected to the PMU chip U9, one end of the inductor L3 is connected in parallel with a capacitor C71, a resistor R70 and a capacitor C70 to ground, one end of the resistor R70 is connected to a ground resistor R71, and one end of the capacitor C70 to ground is provided with an output terminal Vout.

8. A UPS parallel segmented power supply energy saving configuration system according to claim 6, Features: The current detection circuit includes a transistor Q20 and an operator U60, an operator U61 and an operator U62 which are arranged in series. The drain of the transistor Q20 is connected in parallel with a diode D60 and a capacitor C60, and an inductor L1 is connected between the diode D60 and the capacitor C60. The other end of the diode D60 is connected to a resistor R60, one end of the resistor R60 is connected to a resistor R61, one end of the resistor R61 is connected to the negative terminal of the operator U62, the output end of the operator U60 is connected to the negative terminal of the operator U61, and a resistor R63 is connected, and the negative terminal of the operator U60 is connected in parallel with resistors R64 and R65.

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