Standard power device embedded packaging back copper type PCB

Abstract

The utility model discloses a standard power device embedded packaging back copper type PCB, which relates to the technical field of PCB and power device packaging and comprises a first copper layer, a second copper layer, a third copper layer, a fourth copper layer and a fifth copper layer which are sequentially arranged from top to bottom. Resin is filled between the first copper layer and the fourth copper layer, an ultrahigh heat conduction insulating layer is fixedly connected between the fourth copper layer and the fifth copper layer, and a plurality of sets of copper plating blind holes are formed in the resin between the first copper layer and the second copper layer and the resin between the second copper layer and the third copper layer. A third copper layer and a fourth copper layer are arranged between the first copper layer and the second copper layer, a shunt resistor is selectively embedded in the left side between the third copper layer and the fourth copper layer, a plurality of groups of standard packaging units are embedded in the middle between the third copper layer and the fourth copper layer, a busbar is embedded in the right side between the third copper layer and the fourth copper layer, and the device solves the problems that a current power chip is low in integration and high in parasitic inductance.

Description

Technical Field

[0001] The utility model belongs to the technical field of PCB boards and power device packaging, and in particular relates to a copper-backed PCB board with embedded packaging of standard power devices. Background Art

[0002] With the development and popularization of new energy vehicles, the importance of motor controllers as the core components of electric drive is constantly increasing. Traditional motor controller design ideas can no longer meet the increasing usage demand, and performance is gradually encountering bottlenecks. With the continuous development of third-generation semiconductors SiC and GaN, the trend of miniaturization of motor controllers is becoming increasingly obvious.

[0003] The power module of the traditional motor controller is based on welding the power chip on the ceramic substrate, conducting the circuit through bonding lines, and then designing the circuit board with drive and control functions. Connectors are used to connect the circuit board and the power module to realize its functions. This approach leads to high parasitic inductance, large switching losses, large size and mass of the controller, and complex back-end processes. Therefore, it is necessary to design a standard power device embedded package back copper PCB board with high power chip integration and low parasitic inductance. Utility Model Content

[0004] The purpose of the utility model is to provide a standard power device embedded package copper-backed PCB board to solve the problems raised in the above background technology in view of the existing technical defects.

[0005] In order to solve the above technical problems, the utility model provides the following technical solutions: a standard power device embedded package back copper type PCB board, comprising a first copper layer, a second copper layer, a third copper layer, a fourth copper layer, and a fifth copper layer, wherein the first copper layer, the second copper layer, the third copper layer, the fourth copper layer, and the fifth copper layer are arranged in sequence from top to bottom;

[0006] Resin is filled between each of the first copper layer to the fourth copper layer, and an ultra-high thermal conductive insulation layer is fixedly connected between the fourth copper layer and the fifth copper layer;

[0007] A plurality of copper-plated blind holes are provided in the resin between the first copper layer and the second copper layer and between the second copper layer and the third copper layer, and a shunt resistor can be selectively embedded in the left side between the third copper layer and the fourth copper layer;

[0008] A plurality of groups of standard packaging units are buried in the middle between the third copper layer and the fourth copper layer, and a busbar is buried on the right side between the third copper layer and the fourth copper layer.

[0009] The utility model further illustrates that the resin is a high Tg resin, and the ultra-high thermal conductive insulating layer is any material with high thermal conductivity and insulation.

[0010] The utility model further describes that the upper and lower sides of the partially copper-plated blind hole are directly in contact with the lower side of the first copper layer and the upper side of the second copper layer respectively, and the upper and lower sides of the partially copper-plated blind hole are directly in contact with the lower side of the second copper layer and the upper side of the third copper layer respectively.

[0011] The utility model further illustrates that the upper side of the shunt resistor is in direct contact with a portion of the copper-plated blind holes, and the lower side of the shunt resistor is in direct contact with the upper side of the ultra-high thermal conductive insulation layer.

[0012] The utility model further illustrates that the standard packaging unit is located on the right side of the shunt resistor, and the standard packaging unit includes a carrier frame, the upper side of the carrier frame is wrapped with a power chip, and the lower side of the carrier frame is in direct contact with the ultra-high thermal conductive insulation layer.

[0013] The utility model further illustrates that the upper and lower sides of the partial copper-plated blind holes are directly in contact with the lower side of the second copper layer and the upper side of the carrier frame respectively, the upper and lower sides of the partial copper-plated blind holes are directly in contact with the lower side of the second copper layer and the upper side of the power chip respectively, the busbar is located on the right side of the standard packaging unit, the upper side of the busbar is directly in contact with the partial copper-plated blind holes, and the lower side of the busbar is directly in contact with the upper side of the ultra-high thermal conductive insulation layer.

[0014] The utility model further describes that a plurality of copper layers are arranged on the upper side of the ultra-high thermal conductive insulating layer, so that the layer structure of the PCB board is 4-8 layers.

[0015] Compared with the prior art, the beneficial effects achieved by the utility model are as follows: the utility model, by setting multiple layers of copper layers and filling resin between the copper layers, buries the standard packaging unit and the busbar in the circuit board, and conducts current to the standard packaging unit and the busbar through copper-plated blind holes and copper layers, shortens the current conduction path, achieves high integration and reduces parasitic inductance. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] The accompanying drawings are used to provide a further understanding of the present invention and constitute a part of the specification. Together with the embodiments of the present invention, they are used to explain the present invention and do not constitute a limitation of the present invention. In the accompanying drawings:

[0017] Figure 1 It is a schematic diagram of the overall side sectional structure of the utility model;

[0018] In the figure: 1. First copper layer; 2. Second copper layer; 3. Third copper layer; 4. Fourth copper layer; 5. Fifth copper layer; 6. Shunt resistor; 7. Standard packaging unit; 8. Copper-plated blind hole; 9. Ultra-high thermal conductivity insulation layer; 10. Busbar; 11. Resin; 12. Carrier frame; 13. Power chip. DETAILED DESCRIPTION

[0019] The following is a further non-limiting detailed description of the technical solution of the utility model in conjunction with the preferred embodiments and the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the utility model, not all of the embodiments. Based on the embodiments of the utility model, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the utility model.

[0020] See also Figure 1 The utility model provides a technical solution: a standard power device embedded package back copper type PCB board, including a first copper layer 1, a second copper layer 2, a third copper layer 3, a fourth copper layer 4, and a fifth copper layer 5, the first copper layer 1, the second copper layer 2, the third copper layer 3, the fourth copper layer 4, and the fifth copper layer 5 are arranged from top to bottom, and each layer from the first copper layer 1 to the fourth copper layer 4 is filled with a resin 11, and the resin 11 is a high Tg resin;

[0021] A plurality of groups of copper-plated blind holes 8 are provided in the resin 11 between the first copper layer 1 and the second copper layer 2 and between the second copper layer 2 and the third copper layer 3, and the copper-plated blind holes 8 respectively connect the first copper layer 1 and the second copper layer 2 and the second copper layer 2 and the third copper layer 3 from top to bottom;

[0022] An ultra-high thermal conductivity insulating layer 9 is fixedly connected between the fourth copper layer 4 and the fifth copper layer 5. The ultra-high thermal conductivity insulating layer 9 is any material with high thermal conductivity and insulation, including but not limited to high thermal conductivity PP, high thermal conductivity resin, polyimide, and insulating paper;

[0023] A shunt resistor 6 may be selectively embedded on the left side between the third copper layer 3 and the fourth copper layer 4. The shunt resistor 6 is used for current detection. The upper side of the shunt resistor 6 is in direct contact with a portion of the copper-plated blind hole 8, and the lower side of the shunt resistor 6 is in direct contact with the upper side of the ultra-high thermal conductive insulating layer 9.

[0024] A plurality of groups of standard packaging units 7 are buried in the middle between the third copper layer 3 and the fourth copper layer 4. The standard packaging unit 7 is located on the right side of the shunt resistor 6. The standard packaging unit 7 includes a carrier frame 12. A power chip 13 is wrapped on the upper side of the carrier frame 12. The lower side of the carrier frame 12 is in direct contact with the ultra-high thermal conductive insulation layer 9. The power chip 13 can be Si MOSFET, SiCMOSFET, GaN MOSFET or IGBT.

[0025] The upper and lower sides of some copper-plated blind holes 8 are directly in contact with the lower side of the second copper layer 2 and the upper side of the carrier frame 12 respectively, and the upper and lower sides of some copper-plated blind holes 8 are directly in contact with the lower side of the second copper layer 2 and the upper side of the power chip 13 respectively. The current passes through the second copper layer 2 and the copper-plated blind holes 8 to conduct the power chip 13. The heat generated by the power chip 13 during operation is introduced into the radiator through the carrier frame 12, the ultra-high thermal conductive insulating layer 9, and the fifth copper layer 5 on the lower side of the ultra-high thermal conductive insulating layer 9, so as to achieve heat dissipation of the power chip 13;

[0026] A busbar 10 is buried on the right side between the third copper layer 3 and the fourth copper layer 4. The busbar 10 is located on the right side of the standard packaging unit 7. The upper side of the busbar 10 is in direct contact with a portion of the copper-plated blind hole 8, and the lower side of the busbar 10 is in direct contact with the upper side of the ultra-high thermal conductive insulation layer 9. The busbar 10 supplies power to the standard packaging unit 7 through the copper-plated blind hole 8 and the second copper layer 2.

[0027] A plurality of copper layers are arranged on the upper side of the ultra-high thermal conductive insulating layer 9, so that the layer structure of the PCB board is 4-8 layers, and the control circuit and the drive circuit can be integrated into one, which is convenient for simplifying the subsequent SMT and assembly process.

[0028] In this embodiment, a groove is opened in the resin 11 between the second copper layer 2 and the third copper layer 3 or between the second copper layer 2 and the third copper layer 3, and the standard package unit 7 and the busbar 10 are embedded in the resin 11 in an ESD environment through PCB production processes such as pressing, laser blind holes, hole filling electroplating, VCP electroplating, circuit production, solder mask, routing, and electrical testing to achieve integration.

[0029] In the description of the present invention, it should be understood that the terms "upper", "lower", "front", "back", "left", "right", etc., indicating directions or positional relationships, are based on the directions or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention, and do not indicate or imply that the device or element referred to must have a specific direction, be constructed and operated in a specific direction, and therefore should not be understood as a limitation on the present invention.

[0030] Finally, it should be pointed out that the above embodiments are only used to illustrate the technical solutions of the utility model, rather than to limit them. Although the utility model is described in detail with reference to the above embodiments, a person skilled in the art should understand that the technical solutions described in the above embodiments can still be modified, or some of the technical features can be replaced by equivalents, and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the utility model.

Claims

1. A copper-backed PCB board for embedded packaging of a standard power device, comprising a first copper layer (1), a second copper layer (2), a third copper layer (3), a fourth copper layer (4), and a fifth copper layer (5), characterized in that: The first copper layer (1), the second copper layer (2), the third copper layer (3), the fourth copper layer (4), and the fifth copper layer (5) are arranged in sequence from top to bottom; Resin (11) is filled between each of the first copper layer (1) to the fourth copper layer (4), and an ultra-high thermal conductivity insulation layer (9) is fixedly connected between the fourth copper layer (4) and the fifth copper layer (5); A plurality of groups of copper-plated blind holes (8) are provided in the resin (11) between the first copper layer (1) and the second copper layer (2) and between the second copper layer (2) and the third copper layer (3); a shunt resistor (6) can be selectively embedded on the left side between the third copper layer (3) and the fourth copper layer (4); A plurality of groups of standard packaging units (7) are embedded in the middle between the third copper layer (3) and the fourth copper layer (4), and a busbar (10) is embedded on the right side between the third copper layer (3) and the fourth copper layer (4).

2. A standard power device embedded package copper-backed PCB board according to claim 1, characterized in that: The resin (11) is a high Tg resin, and the ultra-high thermal conductivity insulating layer (9) is any material with high thermal conductivity and insulation.

3. A standard power device embedded package copper-backed PCB board according to claim 2, characterized in that: The upper and lower sides of the partially copper-plated blind hole (8) are in direct contact with the lower side of the first copper layer (1) and the upper side of the second copper layer (2), respectively; the upper and lower sides of the partially copper-plated blind hole (8) are in direct contact with the lower side of the second copper layer (2) and the upper side of the third copper layer (3), respectively.

4. A standard power device embedded package copper-backed PCB board according to claim 3, characterized in that: The upper side of the shunt resistor (6) is in direct contact with a portion of the copper-plated blind hole (8), and the lower side of the shunt resistor (6) is in direct contact with the upper side of the ultra-high thermal conductivity insulation layer (9).

5. A standard power device embedded package copper-backed PCB board according to claim 4, characterized in that: The standard packaging unit (7) is located on the right side of the shunt resistor (6), and the standard packaging unit (7) comprises a carrier frame (12), the upper side of the carrier frame (12) is wrapped with a power chip (13), and the lower side of the carrier frame (12) is in direct contact with the ultra-high thermal conductivity insulation layer (9).

6. A standard power device embedded package copper-backed PCB board according to claim 5, characterized in that: The upper and lower sides of the partially copper-plated blind hole (8) are in direct contact with the lower side of the second copper layer (2) and the upper side of the carrier frame (12), respectively; the upper and lower sides of the partially copper-plated blind hole (8) are in direct contact with the lower side of the second copper layer (2) and the upper side of the power chip (13), respectively; the busbar (10) is located on the right side of the standard packaging unit (7); the upper side of the busbar (10) is in direct contact with the partially copper-plated blind hole (8); and the lower side of the busbar (10) is in direct contact with the upper side of the ultra-high thermal conductivity insulation layer (9).

7. A standard power device embedded package copper-backed PCB board according to claim 6, characterized in that: A plurality of copper layers are further provided on the upper side of the ultra-high thermal conductive insulating layer (9), so that the layer structure of the PCB board is 4-8 layers.

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