Band-gap reference circuit

Abstract

The utility model discloses a band-gap reference circuit, which comprises a power supply pre-voltage-stabilizing module, a voltage dividing module, a band-gap reference core module and a clamping transistor, and is characterized in that the clamping transistor is used for clamping the grid voltage of an output transistor in the power supply pre-voltage-stabilizing module when the power supply voltage of a power supply end is relatively low; according to the band-gap reference circuit, the charging current of the output transistor to the pre-voltage-stabilizing node when the circuit is just established is reduced, and then the overshoot of the pre-supply voltage and the band-gap reference voltage in the circuit is reduced, so that the starting time of the circuit can be reduced, the power consumption is reduced, the precision of the output voltage is improved, and the stability, reliability and performance of the band-gap reference circuit are improved.

Description

Technical Field

[0001] The utility model relates to the technical field of integrated circuits, and more specifically, to a bandgap reference circuit. Background Art

[0002] The bandgap voltage reference (Bandgap for short) circuit can use the offset of positive temperature coefficient voltage and negative temperature coefficient voltage to realize a temperature-independent voltage reference. Since the bandgap voltage output by the bandgap reference circuit is very stable and is basically not affected by the uncertainty of power supply, process and temperature, it has been widely used in integrated circuits.

[0003] In the prior art, in order to provide a relatively stable power supply for the bandgap reference circuit, a corresponding power supply pre-stabilization circuit is usually provided upstream of the bandgap reference circuit. In addition, this type of circuit will adjust the voltage based on the feedback of the bandgap reference module, thereby adjusting the unstable power supply voltage to a relatively stable voltage, so as to further improve the accuracy of the bandgap reference circuit. However, in this type of bandgap reference circuit, when the input voltage or the power supply voltage is too low to establish the bandgap reference, the signal state fed back by the bandgap reference circuit to the power supply pre-stabilization circuit is not stable enough, which can easily cause the output current of the output tube of the power supply pre-stabilization circuit to be too large, and then cause the bandgap reference voltage to overshoot, which will cause problems such as logic errors or misdetection in the subsequent circuit.

[0004] At present, the commonly used solution is to design a detection circuit, a feedback circuit and an overshoot suppression circuit in the bandgap reference circuit to solve the problem of output overshoot. Although this solution can effectively suppress the output overshoot of the bandgap reference circuit, the circuit structure of this method is usually more complicated, and it is necessary to design additional detection circuits, feedback circuits and suppression circuits, which increases the chip area and power consumption. In addition, it is necessary to ensure that the circuit that forms the comparison threshold does not change much under conditions such as process, temperature and voltage, otherwise the output may be incorrectly suppressed under normal working conditions, affecting the normal operation of the circuit. Utility Model Content

[0005] In view of the above problems, the purpose of the utility model is to provide a bandgap reference circuit, which can reduce the overshoot of the bandgap reference voltage during the establishment of the bandgap reference circuit and improve the stability, reliability and performance of the circuit.

[0006] According to one aspect of the utility model, a bandgap reference circuit is provided, comprising: a power pre-regulator module, connected between a power supply terminal and a ground terminal, configured to generate a secondary power supply voltage according to a power supply voltage from the power supply terminal, and output it via a first node; a bandgap reference core module, connected between the first node and the ground terminal, configured to generate a bandgap reference voltage, and provide feedback to the power pre-regulator module via a second node; and a voltage divider module, connected between the first node and the ground terminal, and connected to the bandgap reference voltage, wherein the power pre-regulator module comprises: a first transistor, a second transistor, an output transistor, and a feedback transistor, wherein the first transistor and the second transistor are connected in series between the power supply terminal and the ground terminal, and the first transistor and the second transistor are connected in series between the power supply terminal and the ground terminal, and the first transistor and the second transistor are connected in series between the power supply terminal and the ground terminal. The control terminal of a transistor is connected to a first bias voltage, the control terminal of the second transistor is connected to a second bias voltage, the first terminal of the output transistor is connected to the power supply terminal, the control terminal of the output transistor is connected to an intermediate node between the first transistor and the second transistor, the second terminal of the output transistor is connected to the first node, the first terminal of the feedback transistor is connected to the first node, the control terminal of the feedback transistor is connected to the second node, and the second terminal of the feedback transistor is connected to an intermediate node between the first transistor and the second transistor, wherein the bandgap reference circuit further includes: a clamping transistor, the first terminal of the clamping transistor is connected to the first node, and the control terminal and the second terminal of the clamping transistor are connected to the control terminal of the output transistor.

[0007] Optionally, the voltage division module includes: a first resistor and a second resistor connected in series between the first node and the ground terminal, and an intermediate node between the first resistor and the second resistor is connected to the bandgap reference voltage.

[0008] Optionally, the bandgap reference core module includes: a third resistor, a third transistor, a fourth transistor, a fourth resistor and a fifth resistor connected in series between the first node and the ground terminal; a sixth resistor, a fifth transistor and a sixth transistor connected in series between the first node and the intermediate node between the fourth resistor and the fifth resistor, wherein the control ends of the third transistor and the fifth transistor are connected to each other and to the second end of the third transistor to form a current mirror structure, the control ends of the fourth transistor and the sixth transistor serve as the output ends of the bandgap reference voltage, and the second node is located between the fifth transistor and the sixth transistor.

[0009] Optionally, the first transistor, the output transistor and the feedback transistor are PMOS transistors, and the second transistor is an NMOS transistor.

[0010] Optionally, the clamping transistor is a PMOS transistor.

[0011] Optionally, the third transistor and the fifth transistor are PMOS transistors, and the fourth transistor and the sixth transistor are NPN transistors.

[0012] In summary, the bandgap reference circuit provided by the utility model clamps the gate voltage of the output transistor in the power pre-regulator module by using a clamping transistor when the power voltage at the power supply end is low, so as to reduce the charging current of the output transistor to the pre-regulator node when the circuit is just established, and then reduce the overshoot of the pre-power supply voltage and the bandgap reference voltage in the circuit, thereby reducing the startup time of the circuit, reducing power consumption and improving the accuracy of the output voltage, which is conducive to improving the stability, reliability and performance of the bandgap reference circuit. In addition, the circuit structure of the bandgap reference circuit according to the utility model is simple and will not significantly increase the area of ​​the bandgap reference circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] The above and other purposes, features and advantages of the present invention will become more apparent through the following description of the embodiments of the present invention with reference to the accompanying drawings, in which:

[0014] Figure 1 A schematic circuit diagram of a bandgap reference circuit according to the utility model is shown.

[0015] Figure 2 A waveform comparison diagram of the bandgap reference circuit according to the utility model and the bandgap reference circuit in the prior art is shown. DETAILED DESCRIPTION

[0016] Various embodiments of the present invention will be described in more detail below with reference to the accompanying drawings. In each of the accompanying drawings, the same elements are represented by the same or similar reference numerals. For the sake of clarity, the various parts in the accompanying drawings are not drawn to scale.

[0017] It should be understood that in the following description, a "circuit" may include a single or multiple combined hardware circuit, a programmable circuit, a state machine circuit and / or an element that can store instructions executed by a programmable circuit. When an element or circuit is said to be "connected to" another element or an element / circuit is said to be "connected between" two nodes, it can be directly coupled or connected to another element or there can be an intermediate element, and the connection between the elements can be physical, logical, or a combination thereof. On the contrary, when an element is said to be "directly coupled to" or "directly connected to" another element, it means that there is no intermediate element between the two.

[0018] In the present application, a MOS tube (Metal-Oxide-Semiconductor Field-Effect Transistor) includes a first end, a second end and a control end. When the MOS tube is in the on state, current flows from the first end to the second end. The first end, the second end and the control end of the PMOS tube are the source, the drain and the gate, respectively, and the first end, the second end and the control end of the NMOS tube are the drain, the source and the gate, respectively. A triode (also known as a bipolar transistor) includes a first end, a second end and a control end. When the triode is in the on state, current flows from the first end to the second end. The first end, the second end and the control end of the PNP tube are the emitter, the collector and the base, respectively, and the first end, the second end and the control end of the NPN tube are the collector, the emitter and the base, respectively.

[0019] The utility model is further described below in conjunction with the accompanying drawings and embodiments.

[0020] Figure 1 FIG. 2 shows a schematic circuit diagram of a bandgap reference circuit according to the utility model. Figure 1 As shown, the bandgap reference circuit 10 includes a power pre-regulator module 11 , a bandgap reference core module 12 and a voltage divider module 13 .

[0021] The power pre-regulator module 11 is connected between the power supply terminal VCC and the ground terminal, and is configured to generate a secondary power supply voltage VREG according to the power supply voltage VCC from the power supply terminal, and output it through the first node N1. Further, the power pre-regulator module 11 includes an output transistor M3, a feedback transistor M4, a transistor M5, and a transistor M6. The transistor M5, the output transistor M3, and the feedback transistor M4 are, for example, PMOS tubes, the source of the transistor M5 is connected to the power supply terminal VCC, the gate of the transistor M5 is connected to the bias voltage VBP, and the drain of the transistor M5 is connected to the gate of the output transistor M3. The source of the output transistor M3 is connected to the power supply terminal VCC, the drain of the output transistor M3 is connected to the first node N1, and the secondary power supply voltage VREG is output. The source of the feedback transistor M4 is connected to the first node N1, and the gate of the feedback transistor M4 is connected to the bandgap reference core module 12 at the second node N2. The transistor M6 is, for example, an NMOS tube, the drain of the transistor M6 is connected to the drain of the transistor M5, the gate of the output transistor M3 and the drain of the feedback transistor M4, the gate of the transistor M6 is connected to the bias voltage VBN, and the source of the transistor M6 is connected to the ground.

[0022] The bandgap reference core module 12 is connected between the first node N1 and the ground terminal, and is connected to the voltage divider module 13 and the power pre-regulator module 11, and is configured to generate a bandgap reference voltage VBG, and provide feedback to the power pre-regulator module 11 at the second node N2 according to the bandgap reference voltage VBG. Further, the bandgap reference core module 12 includes a transistor M1, a transistor M2, a triode Q1, a triode Q2, and resistors R1 to R4. Among them, the resistor R3, the transistor M1, the triode Q1, the resistor R1, and the resistor R2 are connected in series to the first branch between the first node N1 and the ground terminal, and the resistor R4, the transistor M2, and the triode Q2 are connected in series to the second branch between the first node N1 and the first end of the resistor R2. Specifically, the transistor M1 and the transistor M2 are PMOS tubes, and the triode Q1 and the triode Q2 are NPN tubes. The first end of the resistor R3 is connected to the first node N1, the second end of the resistor R3 is connected to the source of the transistor M1, the first end of the resistor R4 is connected to the first node N1, the second end of the resistor R4 is connected to the source of the transistor M2, the gate and drain of the transistor M1 are connected to the gate of the transistor M2, so that the transistor M1 and the transistor M2 can form a current mirror structure. The drain of the transistor M1 is also connected to the collector of the transistor Q1, the drain of the transistor M2 is connected to the collector of the transistor Q2 and the second node N2, and the bases of the transistors Q1 and Q2 are used to output the bandgap reference voltage VBG. The emitter of the transistor Q1 is connected to the first end of the resistor R1, the second end of the resistor R1 is connected to the first end of the resistor R2 and the emitter of the transistor Q2, and the second end of the resistor R2 is connected to the ground terminal.

[0023] The voltage dividing module 13 is connected between the first node N1 and the ground terminal, and is connected to the bandgap reference voltage VBG, and is configured to determine the voltage value of the secondary power supply voltage VREG according to the voltage value of the bandgap reference voltage VBG. Further, the voltage dividing module 13 includes a resistor R5 and a resistor R6, wherein the resistor R5 and the resistor R6 are connected between the first node N1 and the ground terminal, and are connected to the bandgap reference voltage VBG from an intermediate node between the resistor R5 and the resistor R6.

[0024] In the bandgap reference circuit 10 of the present embodiment, the bandgap reference voltage VBG is provided to the bases of the transistors Q1 and Q2 as a bias voltage, and then a comparison current is generated by utilizing the base-emitter difference of the transistors Q1 and Q2. The current comparison result is fed back to the power pre-regulator module 11 through the second pole N2 via a current mirror structure formed by the transistors M1 and M2, so as to obtain a secondary power supply voltage VREG at the first node N1 that is not affected by the power supply ripple.

[0025] exist Figure 1In the example, the negative feedback loop formed by the output transistor M3, the feedback transistor M4, the transistor M5 and the transistor M6 generates the pre-regulated voltage node N1. When the power supply voltage VCC is too low to fully establish the bandgap reference circuit, since the internal loop of the bandgap reference core module 12 has not yet reached a stable state, the transistor M4, which serves as a negative feedback adjustment tube, is in a cut-off state. Since the gate-source voltage VGS of the output transistor M3 is too large, the current flowing through it will increase, and then the voltage at the first node N1 will be quickly pulled up, thereby generating an overshoot on the secondary power supply voltage VREG. Since the bandgap reference voltage VBG is connected to the secondary power supply voltage VREG through a resistor series, the bandgap reference voltage VBG will also overshoot.

[0026] In view of the above problems, the bandgap reference circuit 10 of the present invention further includes a clamping transistor MP, which is, for example, a PMOS transistor, a source of which is connected to the first node N1, and a gate and a drain of which are connected to the gate of the output transistor M3. When an overshoot occurs on the secondary power supply voltage VREG, since the gate voltage of the output transistor M3 is very low, the clamping transistor MP is turned on, and then the gate potential of the output transistor M3 is clamped at VREG-VGS,MP by the clamping transistor MP, where VGS,MP represents the gate-source voltage of the clamping transistor MP, and then the conduction degree of the transistor M3 can be reduced, and the output current of the transistor M3 can be reduced, and finally the purpose of suppressing the overshoot of the secondary power supply voltage VREG and the bandgap reference voltage VBG is achieved.

[0027] Figure 2 The following is a waveform comparison diagram of the bandgap reference circuit according to the utility model and the bandgap reference circuit of the prior art. Figure 2 In FIG. 1 , the dotted line represents a waveform diagram of the bandgap reference voltage VBG output by the bandgap reference circuit of the prior art, and the solid line represents a waveform diagram of the bandgap reference voltage VBG output by the bandgap reference circuit 10 of the present invention. Figure 2 As shown, the bandgap reference circuit of the prior art will have obvious overshoot and undershoot of the bandgap reference voltage VBG when the circuit is just established, while the bandgap reference circuit of the utility model can suppress the overshoot and undershoot of the bandgap reference voltage VBG during the establishment of the circuit, and provide a stable bandgap reference voltage VBG.

[0028] In summary, the bandgap reference circuit provided by the utility model clamps the gate voltage of the output transistor in the power pre-regulator module by using a clamping transistor when the power voltage at the power supply end is low, so as to reduce the charging current of the output transistor to the pre-regulator node when the circuit is just established, and then reduce the overshoot of the pre-power supply voltage and the bandgap reference voltage in the circuit, thereby reducing the startup time of the circuit, reducing power consumption and improving the accuracy of the output voltage, which is conducive to improving the stability, reliability and performance of the bandgap reference circuit. In addition, the circuit structure of the bandgap reference circuit according to the utility model is simple and will not significantly increase the area of ​​the bandgap reference circuit.

[0029] It should be noted that although in this article, the device is described as a certain N-channel or P-channel device, or a certain N-type or P-type doped region, it can be understood by those skilled in the art that complementary devices can also be realized according to the present invention. It can be understood by those skilled in the art that the conductivity type refers to the mechanism by which conduction occurs, such as conduction by holes or electrons, so the conductivity type does not involve doping concentration but involves doping type, such as P-type or N-type. It can be understood by those skilled in the art that the words "during", "when" and "when..." used in this article in connection with the operation of the circuit are not strict terms indicating an action that occurs immediately at the start of the start-up action, but there may be some small but reasonable one or more delays between it and the reaction action initiated by the start-up action, such as various transmission delays, etc. The words "approximately" or "substantially" used in this article mean that the element value (element) has a parameter that is expected to be close to the declared value or position. However, as is well known in the art, there are always slight deviations that make it difficult for the value or position to be strictly the declared value. It has been well established in the art that a deviation of at least ten percent (10%) (or at least twenty percent (20%) for semiconductor doping concentrations) is a reasonable deviation from the exact ideal goal described. When used in conjunction with a signal state, the actual voltage value or logic state (e.g., "1" or "0") of the signal depends on whether positive logic or negative logic is used.

[0030] In addition, it should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the statement "comprise a ..." do not exclude the presence of other identical elements in the process, method, article or device including the elements.

[0031] According to the embodiments of the present invention as described above, these embodiments do not describe all the details in detail, nor do they limit the present invention to specific embodiments. Obviously, many modifications and changes can be made based on the above description. This specification selects and describes these embodiments in detail in order to better explain the principles and practical applications of the present invention, so that technicians in the relevant technical field can make good use of the present invention and the modified use based on the present invention. The scope of protection of the present invention shall be based on the scope defined by the claims of the present invention.

Claims

1. A bandgap reference circuit, characterized in that: include: A power pre-regulator module is connected between the power terminal and the ground terminal, and is configured to generate a secondary power voltage according to the power voltage from the power terminal, and output it via the first node; a bandgap reference core module, connected between the first node and the ground terminal, configured to generate a bandgap reference voltage and provide feedback to the power pre-regulator module via a second node; as well as A voltage divider module is connected between the first node and the ground terminal and is connected to the bandgap reference voltage. The power pre-stabilization module includes a first transistor, a second transistor, an output transistor and a feedback transistor. The first transistor and the second transistor are connected in series between the power supply terminal and the ground terminal, the control terminal of the first transistor is connected to a first bias voltage, and the control terminal of the second transistor is connected to a second bias voltage. The first terminal of the output transistor is connected to the power supply terminal, the control terminal of the output transistor is connected to the middle node of the first transistor and the second transistor, and the second terminal of the output transistor is connected to the first node. The first terminal of the feedback transistor is connected to the first node, the control terminal of the feedback transistor is connected to the second node, and the second terminal of the feedback transistor is connected to an intermediate node between the first transistor and the second transistor. The bandgap reference circuit further includes: a clamp transistor, a first end of the clamp transistor is connected to the first node, and a control end and a second end of the clamp transistor are connected to the control end of the output transistor.

2. The bandgap reference circuit according to claim 1, characterized in that: The voltage divider module comprises: A first resistor and a second resistor are connected in series between the first node and the ground terminal, and an intermediate node between the first resistor and the second resistor is connected to the bandgap reference voltage.

3. The bandgap reference circuit according to claim 2, characterized in that: The bandgap reference core module includes: a third resistor, a third transistor, a fourth transistor, a fourth resistor and a fifth resistor connected in series between the first node and the ground terminal; a sixth resistor, a fifth transistor, and a sixth transistor connected in series between the first node and an intermediate node between the fourth resistor and the fifth resistor, Among them, the control ends of the third transistor and the fifth transistor are connected to each other and to the second end of the third transistor to form a current mirror structure, the control ends of the fourth transistor and the sixth transistor serve as the output ends of the bandgap reference voltage, and the second node is located between the fifth transistor and the sixth transistor.

4. The bandgap reference circuit according to claim 1, characterized in that: The first transistor, the output transistor and the feedback transistor are PMOS transistors, and the second transistor is an NMOS transistor.

5. The bandgap reference circuit according to claim 1, characterized in that: The clamping transistor is a PMOS tube.

6. The bandgap reference circuit according to claim 3, characterized in that: The third transistor and the fifth transistor are PMOS transistors, and the fourth transistor and the sixth transistor are NPN transistors.

Images