Driving anti-straight-through circuit of bridgeless converter

Abstract

The utility model belongs to the technical field of driving circuits, and discloses a driving anti-straight-through circuit of a bridgeless converter, the driving process is completed through two driving chips, the primary sides of the two driving chips are respectively provided with two signal input ends, the secondary side output ends of the two driving chips are only provided with one output control signal, and the driving anti-straight-through circuit of the bridgeless converter is provided with one output control signal. Two primary side signal pins of the driving chip are respectively connected with two input complementary square wave signals, and the connection sequences of the input signals of the primary side pins of the two driving chips are opposite, so that only one secondary side of the driving chip outputs a high-level signal, and the other secondary side outputs a low-level signal during normal work; and in an abnormal state, the secondary sides of the two driving chips only output low levels, so that a back-end controlled device is prevented from being short-circuited. The beneficial effects of the utility model are that when a control chip or a software program is abnormal, a controlled device can be protected from being damaged by the circuit, and secondary damage caused by the damage can be avoided.

Description

Technical Field

[0001] The utility model relates to the technical field of drive circuits, in particular to a drive anti-shoot-through circuit for a bridgeless converter. Background Art

[0002] In AC / DC conversion, totem pole PFC, dual-boost bridgeless PFC and three-level bridgeless PFC are widely used because of their high efficiency. However, when the control chip of the bridgeless converter crashes or the software program has a bug, the PWM wave is prone to abnormality, resulting in power supply damage.

[0003] Therefore, it is necessary to provide a bridgeless converter drive anti-shoot-through circuit to prevent the control chip of the bridgeless converter from erroneously transmitting a wave, causing a short circuit inside the back-end controlled circuit and causing power supply damage. Utility Model Content

[0004] The utility model discloses a driving anti-straight-through circuit of a bridgeless converter, relates to the field of bridgeless converter power supply, is applied to a rectifier circuit of a charging module of a DC charging system, and can effectively solve the technical problems involved in the background technology.

[0005] To achieve the above purpose, the technical solution of the utility model is:

[0006] A driving anti-shoot-through circuit of a bridgeless converter includes a driving chip U1 and a driving chip U2.

[0007] Pin 1 of the driver chip U1 is connected to port 5V and one end of capacitor C5, and the other end of capacitor C5 is connected to port GND1. Pin 2 of the driver chip U1 is connected to the positive end of diode D1, one end of resistor R1, one end of resistor R5 and one end of capacitor C1, and the negative end of diode D1 and the other end of resistor R1 are connected to port PWM_UP_1. Pin 3 of the driver chip U1 is connected to the positive end of diode D2, one end of resistor R2, one end of capacitor C2 and one end of resistor R6, and the other end of resistor R2 and the negative end of diode D2 are connected to port PWM_DOWN_2. Pin 1 of the driver chip U1 is connected to port 5V and one end of capacitor C5, and the other end of capacitor C5 is connected to port GND1. 4. The other end of the resistor R6, the other end of the capacitor C2, the other end of the capacitor C1 and the other end of the resistor R5 are connected to port GND1, pin 5 of the driver chip U1 is connected to port 18V_UP and one end of capacitor C7, the other end of capacitor C7 is connected to port GND_UP, pin 6 of the driver chip U1 is connected to one end of resistor R9, the other end of resistor R9 is connected to port DRV_UP_1, pin 7 of the driver chip U1 is connected to one end of resistor R11, the other end of resistor R11 is connected to port DRV_UP_1, and pin 8 of the driver chip U1 is connected to port GND_UP.

[0008] Pin 1 of the driver chip U2 is connected to port 5V and one end of capacitor C6, the other end of capacitor C6 is connected to port GND1 and pin 4 of the driver chip U1, pin 2 of the driver chip U2 is connected to the positive end of diode D3, one end of resistor R3, one end of resistor R7 and one end of capacitor C3, the negative end of diode D3 and the other end of resistor R3 are connected to port PWM_DOWN_2, pin 3 of the driver chip U2 is connected to the positive end of diode D4, one end of resistor R4, one end of capacitor C4 and one end of resistor R8, the other end of resistor R4 and the negative end of diode D4 are connected to port PWM_UP_1, pin 2 of the driver chip U2 is connected to the positive end of diode D4, one end of resistor R4, one end of capacitor C4 and one end of resistor R8, the other end of resistor R4 and the negative end of diode D4 are connected to port PWM_UP_1, pin 3 of the driver chip U2 is connected to the positive end of diode D4, one end of resistor R4, one end of capacitor C4 and one end of resistor R8, the other end of resistor R4 and the negative end of diode D4 are connected to port PWM_UP_1, pin 4 of the driver chip U2 is connected to the positive end of diode D3, one end of resistor R3, one end of capacitor C4 and one end of resistor R8, the other end of resistor R4 and the negative end of diode D4 are connected to port PWM_UP_2, pin 5 of the driver chip U2 is connected to the positive end of diode D3, one end of resistor R3, one end of capacitor C4 and one end of resistor R8, the other end of resistor R4 and the negative end of diode D4 are connected to port PWM_UP_1, pin 6 of the driver chip U2 is connected to the positive end of diode D3, one end of resistor R3, one end of capacitor C4 and one end of resistor R8, the Pin 4, the other end of the resistor R7, the other end of the capacitor C3, the other end of the capacitor C4 and the other end of the resistor R8 are connected to port GND1, pin 5 of the driver chip U2 is connected to port 18V_DOWN and one end of capacitor C8, the other end of the capacitor C8 is connected to port GND_DOWN, pin 6 of the driver chip U2 is connected to one end of resistor R12, the other end of the resistor R12 is connected to port DRV_DOWN_2, pin 7 of the driver chip U2 is connected to one end of resistor R14, the other end of the resistor R14 is connected to port DRV_DOWN_2, and pin 8 of the driver chip U2 is connected to port GND_DOWN.

[0009] The driving process is completed by two driver chips. Both driver chips have two signal input terminals on the primary side, and only one output control signal is output on the secondary side output terminals of both driver chips. The two primary signal pins of the driver chip are connected to two complementary square wave signals respectively, and the connection order of the input signals of the primary pins of the two driver chips is opposite. It is ensured that only one driver chip secondary side outputs a high-level signal and the other outputs a low-level signal during normal operation; when abnormal, the complementary square wave signals are both high or low at the same time, and both driver chips secondary sides only output a low level to ensure that the back-end controlled devices will not be short-circuited.

[0010] As a preferred improvement of the present utility model: the port PWM_UP_1 and the port PWM_DOWN_2 are connected to a controller, the controller model is IC-TMS320F280023PMSR-LQFP64, the port PWM_UP_1 is connected to pin 51, and the port PWM_DOWN_2 is connected to pin 52.

[0011] As a preferred improvement of the present invention: the port DRV_UP_1 is connected to the gate of the MOS transistor Q1 in the bridgeless converter, and the port DRV_DOWN_2 is connected to the gate of the MOS transistor Q2 in the bridgeless converter.

[0012] As a preferred improvement of the present invention: the port 5V is connected to a 5V power supply.

[0013] As a preferred improvement of the present invention: the port 18V_UP is connected to an 18V power supply.

[0014] As a preferred improvement of the present invention: the model of the driving chip U1 and the driving chip U2 is NSI6601MC-DSWVR.

[0015] The beneficial effects of the utility model are as follows:

[0016] The invention provides a driving anti-shoot-through protection function suitable for bridgeless converter circuits. There are two signals at the control signal input end, but there will be no more than one high-level signal at the output end, so as to ensure that the controlled circuit will not shoot through. When the control chip or software program is abnormal, the controlled device can be protected from damage and secondary damage caused by it by relying on the circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] In order to more clearly illustrate the technical solutions in the embodiments of the present utility model, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present utility model. For those skilled in the art, other drawings can be obtained based on these drawings without creative work, among which:

[0018] Figure 1 It is a schematic diagram of a driving anti-shoot-through circuit of a bridgeless converter of the utility model;

[0019] Figure 2 This is a schematic diagram of the structure of the bridgeless converter of the utility model;

[0020] Figure 3 This is a schematic diagram of the input and output relationship of the utility model. DETAILED DESCRIPTION

[0021] The technical solutions in the embodiments of the present invention will be described clearly and completely below in combination with the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0022] It should be noted that all directional indications in the embodiments of the present invention (such as up, down, left, right, front, back, etc.) are only used to explain the relative position relationship, movement status, etc. between the components under a certain specific posture (as shown in the accompanying drawings). If the specific posture changes, the directional indication will also change accordingly.

[0023] In addition, in the present invention, descriptions such as "first", "second", etc. are only used for descriptive purposes and cannot be understood as indicating or implying their relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" or "second" may explicitly or implicitly include at least one of the features. In the description of the present invention, the meaning of "plurality" is at least two, such as two, three, etc., unless otherwise clearly and specifically defined.

[0024] In the present invention, unless otherwise clearly specified and limited, the terms "connection", "fixation", etc. should be understood in a broad sense. For example, "fixation" can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements, unless otherwise clearly defined. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0025] In addition, the technical solutions between the various embodiments of the present invention can be combined with each other, but it must be based on the fact that ordinary technicians in the field can implement it. When the combination of technical solutions is contradictory or cannot be implemented, it should be deemed that such combination of technical solutions does not exist and is not within the scope of protection required by the present invention.

[0026] See also Figure 2 As shown in the figure, a common bridgeless converter circuit diagram has three AC inputs and outputs at both ends of capacitor C10. The AC input is connected to the MOS tube through the inductor. The source of the MOS tube Q1 and the drain of the MOS tube Q2 are connected to the same input terminal. The source of the MOS tube Q1 is connected to the port GND_UP, and the source of the MOS tube Q2 is connected to the port GND_DOWN. The control signal of the MOS tube is provided by the controller. If there is no anti-through circuit, the controller chip crashes or the software program has a bug, PWM wave abnormalities are likely to occur, so that the control signals DRV_UP_1 and DRV_DOWN_2 of the MOS tube are high at the same time, resulting in power damage.

[0027] See also Figure 1 As shown, the utility model provides a driving anti-straight-through circuit of a bridgeless converter, which is connected between a controller and the gate of a MOS tube, and the driving anti-straight-through circuit includes a driving chip U1 and a driving chip U2. The driving process is completed by two driving chips, and the primary sides of the two driving chips have two signal input terminals, and the secondary side output terminals of the two driving chips have only one output control signal. The two primary side signal pins of the driving chip are respectively connected to the two complementary square wave signals input, and the connection order of the input signals of the primary side pins of the two driving chips is opposite. It is ensured that only one driving chip secondary side outputs a high level signal and the other outputs a low level signal during normal operation; when abnormal, the complementary square wave signals are both high or low at the same time, and the secondary sides of the two driving chips only output low levels, so as to ensure that the back-end controlled devices will not be short-circuited.

[0028] Pin 1 of the driver chip U1 is connected to port 5V and one end of capacitor C5, and the other end of capacitor C5 is connected to port GND1. Pin 2 of the driver chip U1 is connected to the positive end of diode D1, one end of resistor R1, one end of resistor R5 and one end of capacitor C1, and the negative end of diode D1 and the other end of resistor R1 are connected to port PWM_UP_1. Pin 3 of the driver chip U1 is connected to the positive end of diode D2, one end of resistor R2, one end of capacitor C2 and one end of resistor R6, and the other end of resistor R2 and the negative end of diode D2 are connected to port PWM_DOWN_2. Pin 4 of the driver chip U1, the other end of resistor R6, the other end of capacitor C2, the other end of capacitor C1 and the other end of resistor R5 are connected to port GND1. Pin 5 of the driver chip U1 is connected to port 18V_UP and One end of capacitor C7, the other end of the capacitor C7 is connected to port GND_UP, pin 6 of the driver chip U1 is connected to one end of resistor R9, the other end of the resistor R9 is connected to port DRV_UP_1, pin 7 of the driver chip U1 is connected to one end of resistor R11, the other end of the resistor R11 is connected to port DRV_UP_1, pin 8 of the driver chip U1 is connected to port GND_UP, the port PWM_UP_1 and the port PWM_DOWN_2 are connected to the controller, the controller model is IC-TMS320F280023PMSR-LQFP64, the port 5V is connected to a 5V power supply, the port 18V_UP is connected to an 18V power supply, the port DRV_UP_1 is connected to the gate of the MOS tube Q1 in the bridgeless converter, and the model of the driver chip U1 is NSI6601MC-DSWVR.

[0029] Pin 1 of the driver chip U2 is connected to port 5V and one end of capacitor C6, the other end of capacitor C6 is connected to port GND1 and pin 4 of the driver chip U1, pin 2 of the driver chip U2 is connected to the positive end of diode D3, one end of resistor R3, one end of resistor R7 and one end of capacitor C3, the negative end of diode D3 and the other end of resistor R3 are connected to port PWM_DOWN_2, pin 3 of the driver chip U2 is connected to the positive end of diode D4, one end of resistor R4, one end of capacitor C4 and one end of resistor R8, the other end of resistor R4 and the negative end of diode D4 are connected to port PWM_UP_1, pin 4 of the driver chip U2, the other end of resistor R7, the other end of capacitor C3, the negative end of capacitor C 4 and the other end of the resistor R8 are connected to port GND1, pin 5 of the driver chip U2 is connected to port 18V_DOWN and one end of capacitor C8, the other end of the capacitor C8 is connected to port GND_DOWN, pin 6 of the driver chip U2 is connected to one end of resistor R12, the other end of the resistor R12 is connected to port DRV_DOWN_2, pin 7 of the driver chip U2 is connected to one end of resistor R14, the other end of the resistor R14 is connected to port DRV_DOWN_2, pin 8 of the driver chip U2 is connected to port GND_DOWN, and the port DRV_DOWN_2 is connected to the gate of the MOS tube Q2 in the bridgeless converter. The model of the driver chip U2 is NSI6601MC-DSWVR.

[0030] Embodiment 1

[0031] Normal working conditions:

[0032] When PWM_UP_1 is high level and PWM_DOWN_2 is low level: the driver chip U1 outputs high level and the driver chip U2 outputs low level, then DRV_UP_1 is high level and DRV_DOWN_2 is low level.

[0033] When PWM_UP_1 is low level and PWM_DOWN_2 is high level: the driver chip U1 outputs a low level, and the driver chip U2 outputs a high level, then DRV_UP_1 is low level and DRV_DOWN_2 is high level.

[0034] Abnormal working conditions:

[0035] When PWM_UP_1 is high level and PWM_DOWN_2 is high level: the driver chip U1 outputs a low level, the driver chip U2 outputs a low level, then DRV_UP_1 is low level, and DRV_DOWN_2 is low level.

[0036] Although the implementation scheme of the utility model has been disclosed as above, it is not limited to the applications listed in the specification and the implementation scheme. It can be fully applied to various fields suitable for the utility model. For those familiar with the art, additional modifications can be easily implemented. Therefore, without departing from the general concept defined by the claims and the scope of equivalents, the utility model is not limited to the specific details and the illustrations shown and described herein.

Claims

1. A bridgeless converter drive anti-shoot-through circuit, characterized in that: Including driver chip U1 and driver chip U2; Pin 1 of the driver chip U1 is connected to port 5V and one end of capacitor C5, and the other end of capacitor C5 is connected to port GND1. Pin 2 of the driver chip U1 is connected to the positive end of diode D1, one end of resistor R1, one end of resistor R5 and one end of capacitor C1, and the negative end of diode D1 and the other end of resistor R1 are connected to port PWM_UP_1. Pin 3 of the driver chip U1 is connected to the positive end of diode D2, one end of resistor R2, one end of capacitor C2 and one end of resistor R6, and the other end of resistor R2 and the negative end of diode D2 are connected to port PWM_DOWN_2. Pin 1 of the driver chip U1 is connected to port 5V and one end of capacitor C5, and the other end of capacitor C5 is connected to port GND1.

4. The other end of the resistor R6, the other end of the capacitor C2, the other end of the capacitor C1 and the other end of the resistor R5 are connected to port GND1, pin 5 of the driver chip U1 is connected to port 18V_UP and one end of the capacitor C7, the other end of the capacitor C7 is connected to port GND_UP, pin 6 of the driver chip U1 is connected to one end of the resistor R9, the other end of the resistor R9 is connected to port DRV_UP_1, pin 7 of the driver chip U1 is connected to one end of the resistor R11, the other end of the resistor R11 is connected to port DRV_UP_1, and pin 8 of the driver chip U1 is connected to port GND_UP; Pin 1 of the driver chip U2 is connected to port 5V and one end of capacitor C6, the other end of capacitor C6 is connected to port GND1 and pin 4 of the driver chip U1, pin 2 of the driver chip U2 is connected to the positive end of diode D3, one end of resistor R3, one end of resistor R7 and one end of capacitor C3, the negative end of diode D3 and the other end of resistor R3 are connected to port PWM_DOWN_2, pin 3 of the driver chip U2 is connected to the positive end of diode D4, one end of resistor R4, one end of capacitor C4 and one end of resistor R8, the other end of resistor R4 and the negative end of diode D4 are connected to port PWM_UP_1, pin 2 of the driver chip U2 is connected to the positive end of diode D4, one end of resistor R4, one end of capacitor C4 and one end of resistor R8, the other end of resistor R4 and the negative end of diode D4 are connected to port PWM_UP_1, pin 3 of the driver chip U2 is connected to the positive end of diode D4, one end of resistor R4, one end of capacitor C4 and one end of resistor R8, the other end of resistor R4 and the negative end of diode D4 are connected to port PWM_UP_1, pin 4 of the driver chip U2 is connected to the positive end of diode D3, one end of resistor R3, one end of capacitor C4 and one end of resistor R8, the other end of resistor R4 and the negative end of diode D4 are connected to port PWM_UP_2, pin 5 of the driver chip U2 is connected to the positive end of diode D3, one end of resistor R3, one end of capacitor C4 and one end of resistor R8, the other end of resistor R4 and the negative end of diode D4 are connected to port PWM_UP_1, pin 6 of the driver chip U2 is connected to the positive end of diode D3, one end of resistor R3, one end of capacitor C4 and one end of resistor R8, the Pin 4, the other end of the resistor R7, the other end of the capacitor C3, the other end of the capacitor C4 and the other end of the resistor R8 are connected to port GND1, pin 5 of the driver chip U2 is connected to port 18V_DOWN and one end of capacitor C8, the other end of the capacitor C8 is connected to port GND_DOWN, pin 6 of the driver chip U2 is connected to one end of resistor R12, the other end of the resistor R12 is connected to port DRV_DOWN_2, pin 7 of the driver chip U2 is connected to one end of resistor R14, the other end of the resistor R14 is connected to port DRV_DOWN_2, and pin 8 of the driver chip U2 is connected to port GND_DOWN.

2. The anti-shoot-through driving circuit of a bridgeless converter according to claim 1, characterized in that: The port PWM_UP_1 and the port PWM_DOWN_2 are connected to a controller, and the controller model is IC-TMS320F280023PMSR-LQFP64.

3. The anti-shoot-through circuit for driving a bridgeless converter according to claim 1, characterized in that: The port DRV_UP_1 is connected to the gate of the MOS transistor Q1 in the bridgeless converter, and the port DRV_DOWN_2 is connected to the gate of the MOS transistor Q2 in the bridgeless converter.

4. The anti-shoot-through circuit for driving a bridgeless converter according to claim 1, characterized in that: The port 5V is connected to a 5V power supply.

5. The anti-shoot-through driving circuit of a bridgeless converter according to claim 1, characterized in that: The port 18V_UP is connected to an 18V power supply.

6. The anti-shoot-through circuit for driving a bridgeless converter according to claim 1, characterized in that: The models of the driver chip U1 and the driver chip U2 are NSI6601MC-DSWVR.

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