High-speed signal synthesis processing module equipment

Abstract

The utility model discloses high-speed signal synthesis processing module equipment, which comprises an outer shell, a shock-stopping ferrule, a heat dissipation fan module, an active knob, an indicator lamp, an adjusting knob, a control button, a wiring port, an alloy heat dissipation plate and a circuit board module, and is characterized in that the heat dissipation fan module is positioned and mounted at the top of the outer shell through the shock-stopping ferrule; a wiring port panel is fixedly provided with an alloy heat dissipation plate through screws, a wiring port is horizontally and transversely provided with a circuit board module, and the high-speed signal synthesis processing module equipment is more reliable by adopting a standard 6U VPX board card and a high-speed backboard framework; the transmission of data and instruction control interfaces is realized through a high-speed PCIE interface and a gigabit Ethernet port, and the whole system is provided with a Kylin operating system main control board file management interface and a complete machine self-checking function, so that the defects that the traditional signal synthesis is limited by data bandwidth performance and the data transmission rate is low are overcome; and high-speed, high-performance and high-expandability system application requirements are difficult to meet.

Description

Technical Field

[0001] The utility model relates to a high-speed signal synthesis processing module device, which belongs to the technical fields of radar, electronic countermeasure, interference, communication and the like, and specifically relates to high-speed signal synthesis and signal generation. Background Art

[0002] High-speed signal synthesis and processing technology is an important foundation of modern radar and countermeasure technology. Many modern electronic systems such as aperture radar, phased array radar, countermeasure, interference and high-speed communication fields require high-speed signal synthesis and processing capabilities.

[0003] In current scientific experiments and research, the requirements for signal acquisition and signal synthesis resolution are getting higher and higher, which requires optimizing the key signal indicators according to the signal characteristics. For applications with higher signal processing capabilities, the signals need to be further separated and processed to meet the predetermined requirements. With the advancement of information digitization and people's demand for high bandwidth and high signal resolution, how to achieve high-speed and high-bandwidth signal synthesis processing capabilities has become an important task and mission. Utility Model Content

[0004] The purpose of the utility model is to provide a high-speed signal synthesis processing module device to solve the problems raised in the above background technology.

[0005] To achieve the above-mentioned purpose, the utility model adopts the following technical scheme: a high-speed signal synthesis processing module device, including an outer shell, an anti-vibration ring, a heat dissipation fan module, an active knob, an indicator light, an adjustment knob, a control button, a wiring port, an alloy heat dissipation plate, and a circuit board module. The heat dissipation fan module is positioned and installed on the top of the outer shell through the anti-vibration ring, the alloy heat dissipation plate is fixedly installed on the wiring port panel with screws, and the circuit board module is horizontally installed on the wiring port.

[0006] Preferably, the circuit board module (10) is based on an FPGA+DSP architecture platform, and realizes a high-speed signal synthesis function through a DDR4 cache, a high-speed JESD204C interface, an Aurora high-speed interface, a PCIE high-speed interface, a Gigabit Ethernet interface, and a standard communication interface hardware architecture. The signal synthesis channel is: 3 channels, the instantaneous bandwidth is up to 5 GHz, and the module adopts a 6U VPX standard architecture.

[0007] Preferably, the high-speed signal synthesis processing module device transmits data to the FPGA according to the PCIE interface of the external baseband main control board. The FPGA in the board processes the signal and performs algorithm processing and onboard high-speed signal synthesis technology to finally achieve the high-speed signal synthesis task.

[0008] Preferably, the external data transmission adopts PCIE3.0 interface, and the instruction control / status adopts Gigabit Ethernet and RS422, wherein the internal data interaction between FPGA1 and FPGA2 adopts 16x Aurora, the protocol adopts 64B / 66B, the total data volume can reach 128Gb / s, FPGA1 has 3 groups of 64-bit DDR4 externally connected, the total capacity can reach 12GB, and the data bandwidth is 45GB / s; FPGA2 has 2 groups of 64-bit DDR4 externally connected, the total capacity can reach 8GB, and the data bandwidth is 30GB / s; the data of the high-speed signal synthesis module is converted into a data packet compliant with the PCIe 3.0 protocol, and the data is uploaded to the baseband main control board through the 8X PCIe interface, and can also be exported to the baseband main control board through the Gigabit Ethernet port.

[0009] Compared with the prior art, the beneficial effects of the utility model are as follows: the use of standard 6U VPX boards and high-speed backplane architecture makes the high-speed signal synthesis processing module equipment more reliable; the transmission of data and instruction control interfaces is realized externally through high-speed PCIE interfaces and Gigabit Ethernet ports, and the entire system has a Kylin operating system main control board file management interface and a whole machine self-test function; the utility model solves the problem that traditional signal synthesis is limited by data bandwidth performance and data transmission rate and is difficult to meet the requirements of high-speed, high-performance and highly scalable system applications. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] Figure 1 This is a schematic diagram of the structure of the high-speed signal synthesis processing module device of the utility model;

[0011] Figure 2 This is a schematic diagram of the principle structure of the high-speed signal synthesis processing module device of the utility model;

[0012] Figure 3 This is a schematic diagram of the instruction control structure in the utility model;

[0013] Figure 4 It is a schematic diagram of the data transmission interface structure in the utility model.

[0014] In the figure: 1. outer shell, 2. anti-vibration ring, 3. cooling fan module, 4. active knob, 5. indicator light, 6. adjustment knob, 7. control button, 8. wiring port, 9. alloy heat sink, 10. circuit board module. DETAILED DESCRIPTION

[0015] The technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the accompanying drawings in the embodiments of the present invention.

[0016] like Figure 1-Figure 4As shown, a high-speed signal synthesis processing module device includes an outer shell 1, an anti-vibration ring 2, a heat dissipation fan module 3, an active knob 4, an indicator light 5, an adjustment knob 6, a control button 7, a wiring port 8, an alloy heat dissipation plate 9, and a circuit board module 10. The heat dissipation fan module 3 is positioned and installed on the top of the outer shell 1 through the anti-vibration ring 2, and the active knob 4, the indicator light 5, the adjustment knob 6 and the control button 7 are electrically connected and installed at the front end of the outer shell 1. The rear end of the outer shell 1 is provided with a wiring port 8, and the alloy heat dissipation plate 9 is fixedly installed on the wiring port 8 panel with screws, and the circuit board module 10 is horizontally installed on the wiring port 8.

[0017] The circuit board module 10 is based on an FPGA+DSP architecture platform, and realizes high-speed signal synthesis function through DDR4 cache, high-speed JESD204C interface, Aurora high-speed interface, PCIE high-speed interface, Gigabit Ethernet interface and standard communication interface hardware architecture. The signal synthesis channel: 3 channels, the instantaneous bandwidth is up to 5GHz, and the module adopts a 6U VPX standard architecture.

[0018] The high-speed signal synthesis processing module device transmits data to the FPGA according to the PCIE interface of the external baseband main control board. The FPGA in the board processes the signal and performs algorithm processing and on-board high-speed signal synthesis technology to finally realize the high-speed signal synthesis task.

[0019] The external data transmission adopts the PCIE3.0 interface, and the command control / status adopts Gigabit Ethernet and RS422. The internal data interaction between FPGA1 and FPGA2 adopts 16x Aurora, the protocol adopts 64B / 66B, the total data volume can reach 128Gb / s, FPGA1 has 3 groups of 64-bit DDR4 externally connected, the total capacity can reach 12GB, and the data bandwidth is 45GB / s; FPGA2 has 2 groups of 64-bit DDR4 externally connected, the total capacity can reach 8GB, and the data bandwidth is 30GB / s; the data of the high-speed signal synthesis module is converted into a data packet that complies with the PCIe 3.0 protocol, and the data is uploaded to the baseband main control board through the 8X PCIe interface, and can also be exported to the baseband main control board through the Gigabit Ethernet port.

[0020] Specific usage: A high-speed signal synthesis processing module device, which adopts a standard 6U VPX board and a high-speed backplane architecture to make the high-speed signal synthesis processing module device more reliable; externally, the data and command control interface are transmitted through a high-speed PCIE interface and a Gigabit Ethernet port. The entire system has a Kylin operating system main control board file management interface and a whole machine self-test function, which solves the problem that traditional signal synthesis is limited by data bandwidth performance and data transmission rate and other deficiencies, making it difficult to meet high-speed, high-performance and highly scalable system application requirements.

[0021] The above is a preferred embodiment of the present invention. For ordinary technicians in this field, according to the teachings of the present invention, without departing from the principles and spirit of the present invention, changes, modifications, substitutions and variations made to the implementation methods are still within the scope of protection of the present invention.

Claims

1. A high-speed signal synthesis processing module device, characterized in that: The invention comprises an outer shell (1), an anti-vibration ring (2), a heat dissipation fan module (3), an active knob (4), an indicator light (5), an adjustment knob (6), a control button (7), a wiring port (8), an alloy heat dissipation plate (9), and a circuit board module (10). The top of the outer shell (1) is positioned and installed with the heat dissipation fan module (3) through the anti-vibration ring (2). The front end of the outer shell (1) is electrically connected and installed with the active knob (4), the indicator light (5), the adjustment knob (6), and the control button (7). The rear end of the outer shell (1) is provided with a wiring port (8). The wiring port (8) is fixedly installed with an alloy heat dissipation plate (9) by means of panel screws. The wiring port (8) is horizontally installed with the circuit board module (10).

2. A high-speed signal synthesis processing module device according to claim 1, characterized in that: The circuit board module (10) is based on an FPGA+DSP architecture platform and realizes a high-speed signal synthesis function through a DDR4 cache, a high-speed JESD204C interface, an Aurora high-speed interface, a PCIE high-speed interface, a Gigabit Ethernet interface and a standard communication interface hardware architecture. The signal synthesis channel has three channels and an instantaneous bandwidth of up to 5 GHz. The module adopts a 6U VPX standard architecture.

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