Wave recording isolation sampling circuit
By using high-efficiency isolation amplifier chip and accurate sampling resistor in the wave-recording isolation sampling circuit, combined with high-performance ADC module, the problem of insufficient isolation efficiency and accuracy in the existing technology is solved, and more efficient and reliable sampling data acquisition is achieved. And reduces costs and is suitable for a wider range of application scenarios.
Patent Information
- Application Number
- CN202420909890.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-04-28
- Publication Date
- 2025-01-14
- Estimated Expiration
- 2034-04-28
AI Technical Summary
The existing isolation sampling technology cannot effectively isolate all interference in extreme environments, and may introduce errors, increase system complexity and maintenance difficulty, and is costly to efficient isolation equipment.
A wave recording isolation sampling circuit is designed, using a high-efficiency isolation amplifier chip (AMC1200TDWVRQ1) and an accurate sampling resistor (Ohmite 5mΩ±0.25%2W), combined with a high-performance ADC module (AD7616BSTZ), through sampling components, isolation modules and signals The conditioning module improves the isolation efficiency and sampling accuracy of the system.
It improves the isolation efficiency and sampling accuracy of the system, ensures the reliability of the recorded data, facilitates more accurate data analysis and fault diagnosis, and reduces overall cost without sacrificing performance.
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Figure CN222353977U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to the technical field of isolation sampling circuits, in particular to a wave recording isolation sampling circuit. Background Art
[0002] Feeder terminal DC wave recording sampling technology is mainly used in power systems to monitor and ensure the stable operation of power systems by recording and analyzing the current and voltage changes that occur in specific power equipment or systems. This technology can help power engineers to promptly discover and diagnose potential power problems, thereby avoiding possible failures or damage. Feeder terminal DC wave recording sampling technology focuses on how to effectively sample current and voltage in high-voltage power systems while ensuring safety and accuracy. Isolated sampling is particularly important in this context because it can protect the safety of sampling equipment and personnel, and accurately capture the dynamics of the power system.
[0003] Current isolation sampling technologies usually use devices such as optoelectronic isolators or magnetic isolators to achieve isolation between high and low voltage parts. These technologies can effectively protect electronic equipment in the low voltage part from high voltage shocks, suppress electromagnetic interference, and maintain the integrity and accuracy of the sampling signal.
[0004] However, existing devices such as optoelectronic isolators or magnetic isolators still have some problems and shortcomings: on the one hand, in some cases, existing isolation technology may not be able to effectively isolate all interference, especially in extreme environments. On the other hand, the isolation device itself may introduce additional errors, affecting the final sampling accuracy, and high-efficiency isolation devices are often expensive and may increase the complexity and maintenance difficulty of the system.
[0005] In view of this, it is necessary to provide a new type of recording isolation sampling circuit to overcome the above defects. Utility Model Content
[0006] The purpose of the utility model is to provide a recording isolation sampling circuit, which improves the isolation efficiency of the system. This improvement helps to improve the safety of the system and effectively improves the accuracy of sampling, which can ensure that the recording data of the generated recording file is more reliable, thereby facilitating more accurate data analysis and fault diagnosis.
[0007] In order to achieve the above-mentioned purpose, the utility model provides a wave recording isolation sampling circuit, comprising: a sampling component, an isolation module, a signal conditioning module and a micro control unit; an ADC module is arranged inside the micro control unit, the sampling component is connected to the DC power supply of the feeder terminal and is electrically connected to the isolation module, the signal conditioning module is electrically connected to the isolation module, and the signal conditioning module is electrically connected to the ADC module inside the micro control unit.
[0008] Preferably, the sampling component includes a resistor R9 and a resistor R10, the isolation module includes a resistor R2, a resistor R5, a capacitor C3, a capacitor C4, a capacitor C5, a capacitor C6, a capacitor C8 and an isolation amplifier chip U1, the resistor R9 is electrically connected between the feeder terminal and the resistor R2, the resistor R10 is electrically connected between the feeder terminal and the resistor R5, the resistor R2 is electrically connected to the first end of the capacitor C3, the first end of the capacitor C6 and the VINP pin of the isolation amplifier chip U1,
[0009] The resistor R5 is electrically connected to the second end of the capacitor C3, the first end of the capacitor C5 and the VINN pin of the isolation amplifier chip U1, the second end of the capacitor C5 is electrically connected to the second end of the capacitor C6, the first end of the capacitor C4 and the GND1 pin of the isolation amplifier chip U1, the second end of the capacitor C4 is electrically connected to the VDD1 pin of the isolation amplifier chip U1, the first end of the capacitor C8 and the 5V VDD power supply, and the second end of the capacitor C8 is grounded.
[0010] Preferably, the signal conditioning module includes an operational amplifier U2, the VOUTP pin of the isolation amplifier chip U1 is electrically connected to the same-direction input terminal of the operational amplifier U2, the VOUTN pin of the isolation amplifier chip U1 is electrically connected to the reverse input terminal of the operational amplifier U2, the VDD2 pin of the isolation amplifier chip U1 is connected to a 3.3V VCCA power supply, the GND2 pin of the isolation amplifier chip U1 is grounded, and the output terminal of the operational amplifier U2 is electrically connected to the ADC module of the microcontroller unit.
[0011] Preferably, the signal conditioning module further includes a resistor R1, a resistor R3, a resistor R4, a resistor R6 and a resistor R7; the resistor R3 is electrically connected between the VOUTN pin of the isolation amplifier chip U1 and the reverse input terminal of the operational amplifier U2, the resistor R6 is electrically connected between the VOUTP pin of the isolation amplifier chip U1 and the same-direction input terminal of the operational amplifier U2, the first end of the resistor R1 is electrically connected to the reverse input terminal of the operational amplifier U2, and the second end of the resistor R1 is electrically connected to the output terminal of the operational amplifier U2.
[0012] The resistor R4 is electrically connected between the output end of the operational amplifier U2 and the ADC module, the first end of the resistor R7 is electrically connected to the same-direction input end of the operational amplifier U2, the second end of the resistor R7 is electrically connected to the negative pole of the operational amplifier U2 and grounded, and the positive pole of the operational amplifier U2 is connected to a 3.3V power supply.
[0013] Compared with the prior art, the beneficial effect is that the recording isolation sampling circuit provided by the utility model improves the isolation efficiency of the system by using an efficient isolation amplifier chip (AMC1200TDWVRQ1). This improvement helps to improve the safety of the system and protect equipment and operators from potential hazards of high voltage systems.
[0014] The recording isolation sampling circuit provided by the utility model adopts precise sampling resistor 9 (Ohmite 5mΩ±0.25% 2W) and sampling resistor R10 (Ohmite 5mΩ±0.25% 2W) and signal conditioning technology, combined with a high-performance ADC module (AD7616BSTZ), which effectively improves the sampling accuracy, thereby ensuring that the recording data of the generated recording file is more reliable, thereby facilitating more accurate data analysis and fault diagnosis.
[0015] Additionally, the design focuses on cost-effectiveness, reducing overall costs without sacrificing performance, making the technology more accessible for widespread adoption.
[0016] Other features and advantages of the utility model will be stated in the following description, and some will be apparent from the description, or can be understood through the implementation of the utility model. The features and advantages of the utility model can be realized and obtained by the elements and combinations specifically pointed out in the attached application scope. These and other features of the utility model will become more clearly understood according to the following description and the attached claims, or can be understood through the implementation of the embodiments described in the utility model. BRIEF DESCRIPTION OF THE DRAWINGS
[0017] In order to more clearly illustrate the technical solutions of the embodiments of the utility model, the drawings required for use in the embodiments will be briefly introduced below. It should be understood that the following drawings only show certain embodiments of the utility model and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other relevant drawings can be obtained based on these drawings without paying creative work.
[0018] Figure 1 The utility model provides a schematic diagram of the wave recording isolation sampling circuit.
[0019] Figure 2 for Figure 1 The circuit diagram of the waveform recording isolation sampling circuit is shown. DETAILED DESCRIPTION
[0020] In order to make the purpose, technical solution and beneficial technical effect of the utility model clearer, the utility model is further described in detail below in conjunction with the accompanying drawings and specific implementation methods. It should be understood that the specific implementation methods described in this specification are only for explaining the utility model, and are not intended to limit the utility model.
[0021] It should be understood that the terms "upper", "lower", "front", "back", "left", "right", "top", "bottom", "inside", "outside", etc., indicating the orientation or position relationship are based on the orientation or position relationship shown in the drawings, and are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present invention.
[0022] It should also be noted that, unless otherwise clearly specified and limited, the terms "install", "connect", "connect", "fix", "set" and the like should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral one; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements. For ordinary technicians in this field, the specific meanings of the above terms in this utility model can be determined according to the specific circumstances.
[0023] In addition, the terms "first", "second", and "third" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, a feature defined as "first", "second", and "third" may explicitly or implicitly include one or more of the features. In addition, the meaning of "multiple" and "several" refers to two or more, unless otherwise clearly and specifically defined.
[0024] See also Figure 1 to Figure 2 The utility model provides a wave recording isolation sampling circuit, comprising: a sampling component, an isolation module, a signal conditioning module and a micro control unit (MCU); an ADC module is arranged inside the micro control unit, the sampling component is connected to a DC power supply of a feeder terminal and is electrically connected to the isolation module, the signal conditioning module is electrically connected to the isolation module, and the signal conditioning module is electrically connected to the ADC module inside the micro control unit.
[0025] In this way, the current of the DC power supply at the feeder terminal is converted into a voltage input signal through the sampling component and input into the isolation module U1. The amplitude of this signal is within 250mv. The isolation module U1 isolates the voltage input signal and amplifies it by 8 times. The isolated voltage input signal is then converted into a single-ended signal by the signal conditioning module U2. This single-ended signal is input into the ADC module inside the microcontroller unit. The digital signal converted by the ADC module is read from a fixed area inside the microcontroller unit to generate a recording file.
[0026] In a preferred embodiment, the sampling component includes a resistor R9 and a resistor R10, the isolation module includes a resistor R2, a resistor R5, a capacitor C3, a capacitor C4, a capacitor C5, a capacitor C6, a capacitor C8 and an isolation amplifier chip U1, the resistor R9 is electrically connected between the feeder terminal and the resistor R2, the resistor R10 is electrically connected between the feeder terminal and the resistor R5, the resistor R2 is electrically connected to the first end of the capacitor C3, the first end of the capacitor C6 and the VINP pin of the isolation amplifier chip U1,
[0027] The resistor R5 is electrically connected to the second end of the capacitor C3, the first end of the capacitor C5, and the VINN pin of the isolation amplifier chip U1. The second end of the capacitor C5 is electrically connected to the second end of the capacitor C6, the first end of the capacitor C4, and the GND1 pin of the isolation amplifier chip U1. The second end of the capacitor C4 is electrically connected to the VDD1 pin of the isolation amplifier chip U1, the first end of the capacitor C8, and the 5V VDD power supply. The second end of the capacitor C8 is grounded. In this way, the resistor R2, the resistor R5, the capacitor C3, the capacitor C4, the capacitor C5, the capacitor C6, and the capacitor C8 form a pre-stage filter circuit, which can produce a filtering effect on the voltage input signal.
[0028] In a preferred embodiment, the signal conditioning module includes an operational amplifier U2, the VOUTP pin of the isolation amplifier chip U1 is electrically connected to the same-direction input terminal of the operational amplifier U2, the VOUTN pin of the isolation amplifier chip U1 is electrically connected to the reverse input terminal of the operational amplifier U2, the VDD2 pin of the isolation amplifier chip U1 is connected to a 3.3V VCCA power supply, the GND2 pin of the isolation amplifier chip U1 is grounded, and the output terminal of the operational amplifier U2 is electrically connected to the ADC module of the microcontroller unit.
[0029] In this way, the VINP pin and VINN pin of the isolation amplifier chip U1 input a DC differential signal, the VOUTP pin and VOUTN pin of the isolation amplifier chip U1 output an isolated and amplified differential signal, the operational amplifier U2 converts the isolated and amplified differential signal into a single-ended signal and outputs it to the ADC module of the microcontroller unit, and the ADC module converts the single-ended signal into a digital signal.
[0030] In a preferred embodiment, the signal conditioning module further includes a resistor R1, a resistor R3, a resistor R4, a resistor R6 and a resistor R7; the resistor R3 is electrically connected between the VOUTN pin of the isolation amplifier chip U1 and the reverse input terminal of the operational amplifier U2, the resistor R6 is electrically connected between the VOUTP pin of the isolation amplifier chip U1 and the same-direction input terminal of the operational amplifier U2, the first end of the resistor R1 is electrically connected to the reverse input terminal of the operational amplifier U2, and the second end of the resistor R1 is electrically connected to the output terminal of the operational amplifier U2.
[0031] The resistor R4 is electrically connected between the output end of the operational amplifier U2 and the ADC module, the first end of the resistor R7 is electrically connected to the same-direction input end of the operational amplifier U2, the second end of the resistor R7 is electrically connected to the negative pole of the operational amplifier U2 and grounded, and the positive pole of the operational amplifier U2 is connected to a 3.3V power supply.
[0032] The recording isolation sampling circuit provided by the utility model improves the isolation efficiency of the system by using a high-efficiency isolation amplifier chip (AMC1200TDWVRQ1). This improvement helps to improve the safety of the system and protect equipment and operators from potential hazards of high-voltage systems.
[0033] The recording isolation sampling circuit provided by the utility model adopts precise sampling resistor 9 (Ohmite 5mΩ±0.25% 2W) and sampling resistor R10 (Ohmite 5mΩ±0.25% 2W) and signal conditioning technology, combined with a high-performance ADC module (AD7616BSTZ), which effectively improves the sampling accuracy, thereby ensuring that the recording data of the generated recording file is more reliable, thereby facilitating more accurate data analysis and fault diagnosis.
[0034] Additionally, the design focuses on cost-effectiveness, reducing overall costs without sacrificing performance, making the technology more accessible for widespread adoption.
[0035] Compared with existing technologies, the advantages of this solution are: by optimizing sampling accuracy, the data obtained is more accurate, which helps to improve the effectiveness of fault detection and system maintenance. Under limited budget conditions, the improved technology is more versatile and can be applied to a wider range of application scenarios, increasing its market potential.
[0036] The present invention is not limited to what is described in the specification and implementation modes, and therefore, additional advantages and modifications can be easily realized by those familiar with the art. Therefore, without departing from the spirit and scope of the general concept defined by the claims and their equivalents, the present invention is not limited to the specific details, representative devices, and illustrative examples shown and described herein.
Claims
1. A wave recording isolation sampling circuit, characterized in that: include: A sampling component, an isolation module, a signal conditioning module and a micro control unit; an ADC module is arranged inside the micro control unit, the sampling component is connected to the DC power supply of the feeder terminal and is electrically connected to the isolation module, the signal conditioning module is electrically connected to the isolation module, and the signal conditioning module is electrically connected to the ADC module inside the micro control unit.
2. The wave recording isolation sampling circuit according to claim 1, characterized in that: The sampling component includes a resistor R9 and a resistor R10, the isolation module includes a resistor R2, a resistor R5, a capacitor C3, a capacitor C4, a capacitor C5, a capacitor C6, a capacitor C8 and an isolation amplifier chip U1, the resistor R9 is electrically connected between the feeder terminal and the resistor R2, the resistor R10 is electrically connected between the feeder terminal and the resistor R5, the resistor R2 is electrically connected to the first end of the capacitor C3, the first end of the capacitor C6 and the VINP pin of the isolation amplifier chip U1, The resistor R5 is electrically connected to the second end of the capacitor C3, the first end of the capacitor C5 and the VINN pin of the isolation amplifier chip U1, the second end of the capacitor C5 is electrically connected to the second end of the capacitor C6, the first end of the capacitor C4 and the GND1 pin of the isolation amplifier chip U1, the second end of the capacitor C4 is electrically connected to the VDD1 pin of the isolation amplifier chip U1, the first end of the capacitor C8 and the 5V VDD power supply, and the second end of the capacitor C8 is grounded.
3. The recording isolation sampling circuit according to claim 2, characterized in that: The signal conditioning module includes an operational amplifier U2, a VOUTP pin of the isolation amplifier chip U1 is electrically connected to the same-direction input terminal of the operational amplifier U2, a VOUTN pin of the isolation amplifier chip U1 is electrically connected to the reverse input terminal of the operational amplifier U2, a VDD2 pin of the isolation amplifier chip U1 is connected to a 3.3V VCCA power supply, a GND2 pin of the isolation amplifier chip U1 is grounded, and an output terminal of the operational amplifier U2 is electrically connected to an ADC module of a microcontroller unit.
4. The wave recording isolation sampling circuit according to claim 3, characterized in that: The signal conditioning module further includes a resistor R1, a resistor R3, a resistor R4, a resistor R6 and a resistor R7; the resistor R3 is electrically connected between the VOUTN pin of the isolation amplifier chip U1 and the reverse input terminal of the operational amplifier U2, the resistor R6 is electrically connected between the VOUTP pin of the isolation amplifier chip U1 and the non-inverting input terminal of the operational amplifier U2, the first end of the resistor R1 is electrically connected to the reverse input terminal of the operational amplifier U2, the second end of the resistor R1 is electrically connected to the output terminal of the operational amplifier U2, The resistor R4 is electrically connected between the output end of the operational amplifier U2 and the ADC module, the first end of the resistor R7 is electrically connected to the same-direction input end of the operational amplifier U2, the second end of the resistor R7 is electrically connected to the negative pole of the operational amplifier U2 and grounded, and the positive pole of the operational amplifier U2 is connected to a 3.3V power supply.