Single-node double-control application circuit

Abstract

The utility model relates to a single-node double-control type application circuit, which effectively solves the problems that more GPIO (General Purpose Input / Output) pins are often used for switching between a maintenance state and a non-maintenance state in the existing relay protector, the cost is too high and the like. Comprising a control circuit, the control circuit comprises a CPU controller and a mode switching circuit, the control circuit is connected with a relay protector, the mode switching circuit comprises a key and an inductor which are connected in series, one end of the key is connected with a reference ground, and the other end of the key is sequentially connected with the inductor and the control input end of the CPU controller in series; the display circuit is convenient to use, achieves the effect of saving one control node and reducing the cost through the arrangement of the control circuit, the mode switching circuit and the like, can automatically detect level signals of double control nodes while correctly driving node signals through the arrangement of the feedback circuit and the like, ensures that the display circuit is in a normal operation state, and improves the display efficiency. When the triode or the two light emitting diodes are damaged, the CPU controller can control the buzzer or other equipment to send out alarm information.

Description

Technical Field

[0001] The utility model relates to the technical field of power distribution network, in particular to a single-node dual-control application circuit. Background Art

[0002] The relay protector is a comprehensive relay protection device based on microprocessor design, integrating inverse time and definite time relay protection. In the daily use of the relay, the relay protector needs to be regularly inspected and maintained. In the modern relay protection system, the staff can disconnect the circuit of the test switch with one click through specific operations or buttons.

[0003] Existing relay protection devices are used in power systems, and workers operate them through background or remote control systems. However, for switching between remote / local, maintenance status and non-maintenance status, more GPIO pins are often used, which brings higher costs. Utility Model Content

[0004] In view of the above situation, in order to overcome the defects of the prior art, the purpose of the present utility model is to provide a single-node dual-control application circuit, which effectively solves the problems mentioned in the background technology.

[0005] The technical solution is as follows: the utility model comprises:

[0006] A control circuit, wherein the control circuit comprises a CPU controller and the control circuit is connected to a relay protector;

[0007] A mode switching circuit, the mode switching circuit comprising a key and an inductor connected in series, one end of the key is connected to a reference ground, and the other end is connected in series with the inductor and a control input end of a CPU controller in sequence, and a power supply connected in series with the inductor is provided between the inductor and the key;

[0008] A display circuit, the display circuit comprising a triode and two light emitting diodes connected in parallel;

[0009] The cathode of one of the light emitting diodes is connected to the collector of the transistor, the cathode of the other light emitting diode is connected to the base of the transistor, and the anodes of the two light emitting diodes are connected to a power supply;

[0010] The emitter of the transistor is connected to the reference ground, and the control output terminal of the CPU controller is connected to the base of the transistor.

[0011] Preferably, a feedback circuit is also included, and the feedback circuit is an XOR gate circuit, the two input ports of the feedback circuit are respectively connected to the negative ends of the two light-emitting diodes, and the output port is connected to the control input end of the CPU controller.

[0012] Preferably, the button circuit is connected with a capacitor in parallel with the button to absorb the spike interference caused by the button being turned on and off.

[0013] Preferably, it also includes a transient suppression diode connected to the power supply to enhance the power supply protection of the power supply and the CPU controller.

[0014] Preferably, a current-limiting resistor is connected in series in the connection loop between the two light-emitting diodes and the power supply.

[0015] Compared with the prior art, the beneficial effects of the utility model are:

[0016] 1. By setting up control circuits and mode switching circuits, the effect of saving a control node can be achieved, thereby reducing costs.

[0017] 2. Through settings such as feedback circuits, the level signals of the dual-control nodes can be automatically detected while the node signals are driven correctly to ensure that the display circuit is in normal operation. When the transistor or two light-emitting diodes are damaged, the CPU controller can control the buzzer or other devices to issue an alarm message. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1 It is a schematic diagram of the process of the utility model.

[0019] Figure 2 It is a circuit diagram of the utility model.

[0020] Explanation of the symbols in the schematic diagram:

[0021] 10. CPU controller; 20. Button; 30. Inductor; 40. Power supply; 50. Transistor; 60. Light emitting diode; 70. Transient suppression diode. DETAILED DESCRIPTION

[0022] The following will be combined with the drawings in the embodiments of the utility model to clearly and completely describe the technical solutions in the embodiments of the utility model. Obviously, the described embodiments are only part of the embodiments of the utility model, not all of the embodiments. Based on the embodiments in the utility model, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the utility model.

[0023] Depend on Figure 1 to Figure 2 Provided, including a control circuit, the control circuit includes a CPU controller 10, and the control circuit is connected to a relay protection device;

[0024] A mode switching circuit, wherein the mode switching circuit comprises a key 20 and an inductor 30 connected in series, wherein one end of the key 20 is connected to a reference ground, and the other end is connected in series with the inductor 30 and a control input end of the CPU controller 10 in sequence, and a power supply 40 connected in series with the inductor 30 is provided between the inductor 30 and the key 20, and a resistor is provided between the inductor 30 and the power supply 40, and the power supply 40 presets a high-level signal to the input end of the CPU signal of the key 20 through the resistor, thereby ensuring the stability of the level state of the input end of the CPU controller 10, and controlling the level signal of the output end of the CPU controller 10 through the key 20;

[0025] A display circuit, the display circuit comprising a transistor 50 and two light emitting diodes 60 connected in parallel;

[0026] The cathode of one of the light emitting diodes 60 is connected to the collector of the transistor 50, the cathode of the other light emitting diode 60 is connected to the base of the transistor 50, the anodes of the two light emitting diodes 60 are connected to the power supply 40, and resistors are respectively connected in series in the connection loops between the two light emitting diodes 60 and the power supply 40. The light emitting diode 60 connected to the collector of the transistor 50 is called the first light emitting diode 60, and the other is the second light emitting diode 60;

[0027] The emitter of the transistor 50 is connected to the reference ground, the control output end of the CPU controller 10 is connected to the base of the transistor 50, and a resistor is arranged between the control output end of the CPU controller 10 and the base of the transistor 50. When the CPU controller 10 outputs a high level, the base of the transistor 50 is also a high level, the transistor 50 is turned on, the loop of the first light-emitting diode 60 is turned on, so that the first light-emitting diode emits light, and the second light-emitting diode loop is cut off. When the button 20 is pressed, the level signal output by the CPU controller 10 becomes a low level. At this time, the transistor 50 is cut off, the second light-emitting diode loop is turned on, and the second light-emitting diode emits light, thereby realizing the effect of dual control of one node, which is more cost-effective than the traditional method.

[0028] refer to Figure 2 As shown, in order to monitor the level state of the base and collector control end of the triode 50, a feedback circuit is also included. The feedback circuit is an XOR gate circuit. The two input ports of the feedback circuit are respectively connected to the negative ends of the two light-emitting diodes 60, and the output port is connected to the control input end of the CPU controller 10. Under normal conditions, the level states of the base and collector control ends are one high and one low. According to the basic characteristics of the XOR gate logic circuit (when the two input ends of the XOR gate circuit receive different level signals, that is, one high and one low, the XOR gate circuit outputs a high level, and if the level signals are the same, the output is a low level), at this time, the signal input by the feedback circuit to the CPU controller 10 is a high level;

[0029] When the levels of the base and collector control terminals are both high or both low, which is an abnormal state (the light-emitting diode 60 or the transistor 50 is damaged), the signal output by the feedback circuit to the CPU controller 10 is a low level. When the CPU controller 10 receives the low level signal for more than 40ms, the CPU controller 10 is connected to a buzzer, which sends an alarm signal. In this way, the display circuit is monitored and fault information is discovered in time.

[0030] refer to Figure 2 As shown, the button 20 circuit is connected with a capacitor in parallel with the button 20 to absorb the spike interference caused by the button 20 being turned on and off.

[0031] refer to Figure 2 As shown, a transient suppression diode 70 connected to the power supply 40 is also included to enhance the protection of the power supply 40 and the CPU controller 10.

[0032] Although embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that various changes, modifications, substitutions and variations may be made to the embodiments without departing from the principles and spirit of the present invention, and that the scope of the present invention is defined by the appended claims and their equivalents.

Claims

1. A single-node dual-control application circuit, characterized in that: include: A control circuit, the control circuit comprising a CPU controller (10), the control circuit being connected to a relay protection device; A mode switching circuit, the mode switching circuit comprising a key (20) and an inductor (30) connected in series, one end of the key (20) being connected to a reference ground, and the other end being connected in series with the inductor (30) and a control input end of a CPU controller (10) in sequence, and a power supply (40) being provided between the inductor (30) and the key (20) and being connected in series with the inductor (30); A display circuit, the display circuit comprising a triode (50) and two light emitting diodes (60) connected in parallel with each other; The cathode of one of the light-emitting diodes (60) is connected to the collector of the transistor (50), the cathode of the other light-emitting diode (60) is connected to the base of the transistor (50), and the anodes of the two light-emitting diodes (60) are connected to a power source (40); The emitter of the transistor (50) is connected to the reference ground, and the control output end of the CPU controller (10) is connected to the base of the transistor (50).

2. A single-node dual-control application circuit according to claim 1, characterized in that: It also includes a feedback circuit, which is an XOR gate circuit. The two input ports of the feedback circuit are respectively connected to the negative ends of the two light-emitting diodes (60), and the output port is connected to the control input end of the CPU controller (10).

3. A single-node dual-control application circuit according to claim 1, characterized in that: The button (20) circuit is connected to a capacitor in parallel with the button (20) for absorbing spike interference caused by the button (20) being turned on and off.

4. A single-node dual-control application circuit according to claim 1, characterized in that: It also includes a transient suppression diode (70) connected to the power supply (40) for strengthening the power supply (40) protection of the CPU controller (10).

5. The single-node dual-control application circuit according to claim 1, characterized in that: Current-limiting resistors are respectively connected in series on the connection loops between the two light-emitting diodes (60) and the power source (40).

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