Multiple anti-interference circuit for instrument measurement
By designing a multiple anti -interference circuit for measuring instrument measurement, a variety of anti -interference measures are used to solve the problem of insufficient anti -interference ability in existing technologies, and significantly improves the stability and reliability of measurement.
Patent Information
- Application Number
- CN202323656856.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2023-12-31
- Publication Date
- 2025-01-28
- Estimated Expiration
- 2033-12-31
AI Technical Summary
The prior art has shortcomings in anti-interference capability, especially in industrial environments, instruments and meters are susceptible to external interference, such as surges, static electricity and transient electric pulse groups, resulting in data fluctuations, measurement deviations and display abnormalities.
A multiple anti -interference circuit is designed, including the power conversion module, the display module, the main control module, and the digital output module. Multiple anti -interference measures, such as the power supply input protection circuit, the power supply isolation chip, the anti -interference filter, the protection chip, the protective chip, the protection chip, the protection chip, the protection chip, the protection chip, the protection chip, the protection chip, the protection chip, the protection chip, the protection chip, the protection chip, the protection chip, the protection chip, the protection chip, the protective chip, and the protection chip, and the protection chip, and the protection chip, the protection chip, and the protection chip, the protection chip, and the protection chip, and the protection chip, and the protection chip, and the protective chip, and the protection chip, and the protection chip, and protect the chip, and protect the chip. 485 isolation chip and output protection circuit, through the combination of these modules and the use of chips, enhance the anti -interference capacity of the circuit.
Effectively suppress the impact of external interference sources on the equipment, improve the stability and reliability of the instrument measurement measurement, and avoid the problems of data fluctuations, display abnormalities, and 485 communication abnormalities.
Smart Images

Figure CN222423509U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to the technical field of power supply and display screen anti-interference, in particular to a multiple anti-interference circuit for instrument measurement. Background Art
[0002] In the application of power electronics and electrical engineering equipment, due to the existence of external interference sources, such as power fluctuations, electromagnetic interference, high-frequency noise interference and static electricity, these interferences will cause unstable operation of the equipment and even generate erroneous signals, which will have a serious impact on the entire system. Therefore, designing a circuit with strong anti-interference ability has always been the goal pursued by engineers.
[0003] At present, there are some technical measures to improve the anti-interference ability of circuits, such as power supply filtering and decoupling, uninterruptible power supply and switching DC regulated power supply. However, these measures have a single anti-interference form and relatively weak anti-interference ability. Precision instruments require high-precision measurements. Due to the complexity of the industrial environment, instruments are easily affected by external interference such as surges, static electricity, and transient electrical pulse groups during measurement, resulting in data fluctuations, measurement deviations, screen distortion on instruments with displays, and data loss in 485 communications. This requires the design of circuits with stronger anti-interference capabilities to improve measurement accuracy.
[0004] In this case, the utility model proposes a multiple anti-interference circuit for instrument measurement. The circuit design adopts a variety of effective anti-interference measures, strengthens the anti-interference ability of the circuit, can effectively suppress the influence of external interference sources on the equipment, and improve the stability and reliability of instrument measurement. Utility Model Content
[0005] The utility model provides an anti-interference circuit for solving the technical problems raised in the background technology.
[0006] In order to achieve the above purpose, the utility model adopts the following technical solutions:
[0007] A multiple anti-interference circuit for instrument measurement includes a power conversion module, a single-chip computer minimum system, a display module and a digital output module;
[0008] The power conversion module is composed of a power input protection circuit, a power chip and a power isolation chip connected in sequence; the display module is composed of a display screen, an anti-interference filter and a protection chip connected in sequence; the display module is composed of a display screen, an anti-interference filter and a protection chip connected in sequence; the digital output module is composed of an isolation chip and an output protection circuit connected in sequence;
[0009] The input end of the single-chip microcomputer minimum system is connected to the output end of the power isolation chip in the power conversion module, and the output end of the single-chip microcomputer minimum system is connected to the input end of the protection chip in the display module and the input end of the isolation chip in the digital output module.
[0010] As a further preferred embodiment of the utility model, the power input protection circuit includes a 0Ω resistor, a varistor, a rectifier bridge and a bidirectional TVS tube. 0Ω resistors R94 and R93, a varistor RV1, a resettable fuse F3, a rectifier bridge D10, filter capacitors C1 and C26, and a bidirectional TVS tube D13; the power supply 24VAC voltage is input from the power supply end, the positive end of the power supply is connected in series with R93, the negative end of the power supply is connected in series with R94, and then connected in parallel with the varistor RV1, one end of the resettable fuse F3 is connected to one end of the R93 resistor, and the other end is connected to the input end of the rectifier bridge D10, one end of the R94 resistor is connected to the input end of the rectifier bridge D10, the rectifier bridge D10 "+" output end is connected in series with resistor R95, and the D10 "-" output end is connected in series with resistor R96, C1, C26 and D13 are connected in parallel, one end is connected to R95, and the other end is connected to the reference ground. In this circuit, the rectifier bridge D10 has the characteristics of high efficiency, low power consumption and good stability. The principle is to use the unidirectional conduction characteristics of the diode to convert AC into DC. The 0Ω resistor is used for circuit protection and acts as a low-cost fuse. The self-recovery fuse F3 limits the short-circuit current. The varistor RV1, capacitors C1, C26 and D13TVS tube are used to achieve surge protection for the circuit. As a further preferred embodiment of the utility model, the power isolation chip adopts a constant voltage isolation power supply including a DCDC constant voltage isolation power isolation chip.
[0011] As a further preferred embodiment of the present invention, the protection chip in the display module adopts an ESD electrostatic protector protection chip.
[0012] As a further preferred embodiment of the present invention, the isolation chip in the digital output module adopts a 485 isolation chip; the output protection circuit in the digital output module adopts a 485 output protection circuit. As a further preferred embodiment of the present invention, the 485 output protection circuit includes a 485 isolation chip U17, a 485 chip U10, resistors R8, R9 and R11, a bidirectional TVS tube D14, self-recovery fuses F1 and F2, a gas discharge tube G1, and filter capacitors C62, C63 and C25. One end of the C63 filter capacitor is connected to the analog ground, and the other end is connected to the power supply end of the 485 isolation chip U17. At the same time, this pin is powered by +3.3V. IN2, IN3 and OUT4 of U17 are connected to the main control chip, OUT2, OUT3 and IN4 are connected to DI, RE, RO of the 485 chip U10, one end of the filter capacitor C62 is connected to the power supply end and enable end of U17, and at the same time, this pin is powered by +5V, and the other end of C62 is connected to the digital ground. One end of the R9 resistor is connected to RE and DE, and the other end is connected to the analog ground. One end of R8 is connected to the B pin of U10, and the other end is connected to the digital ground. One end of R11 is connected to +5V, and the other end is connected to the signal end of U10. D14 is connected to A in parallel to the ground, F1 and F2 are connected in series to the signal end respectively, and the gas discharge tube G1 is connected in parallel to the A and B lines, and the other end is connected to the digital ground. This circuit integrates the digital 485 output signal, adopts the 485 isolation chip U17, and uses a bidirectional TVS tube, a gas discharge tube and a fuse to protect the circuit from external surges or static electricity interference.
[0013] Compared with the prior art, the utility model has the following advantages or technical effects:
[0014] The utility model provides a multiple anti-interference circuit for instrument measurement, which solves the problems of interference caused by surge, pulse and static electricity, data fluctuation under interference, abnormal display screen and abnormal 485 communication.
[0015] The power conversion module is used to prevent the noise at the power supply end from affecting the signal and suppress the impact of surges; the main control module is used to coordinate the work of the power input protection module, the display module and the digital output module to ensure that the circuit can still maintain stable operation when it is interfered with; the display module is used to ensure that the display displays information in various environments and is used to suppress the interference of the pulse group output by the power conversion module; the digital output module is used to prevent surges and static electricity at the signal end from interfering with the noise current on the data bus and damaging sensitive circuits. Through the superposition of the anti-interference effects of several modules and the use and layout technology of chips, the anti-interference method of the circuit is no longer single, but a combination of multiple anti-interference methods is used, and the anti-interference ability of the circuit has been significantly enhanced. BRIEF DESCRIPTION OF THE DRAWINGS
[0016] The present invention and its features, appearance and advantages will become more apparent by reading the detailed description of non-limiting embodiments with reference to the following drawings. The same reference numerals indicate the same parts in all the drawings. The drawings are not drawn to scale, but the emphasis is on illustrating the subject matter of the present invention.
[0017] Figure 1 This is a schematic diagram of the anti-interference circuit module of the utility model;
[0018] Figure 2 This is the schematic diagram of the power input protection circuit of the utility model;
[0019] Figure 3 This is a schematic diagram of the 485 isolation chip U17 of the utility model;
[0020] Figure 4 This is the principle diagram of the digital output circuit of the utility model;
[0021] Figure 5 This is a schematic diagram of the ESD protection chip of the utility model. DETAILED DESCRIPTION
[0022] The technical solutions in the embodiments of the present invention are described below in conjunction with the drawings in the embodiments of the present invention. It is obvious that the described embodiments are only part of the embodiments of the present invention, rather than all the embodiments. Therefore, the following detailed description of the embodiments of the present invention provided in the drawings is not intended to limit the scope of the utility model claimed for protection, but merely represents the selected embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without making creative work belong to the protection scope of the present invention.
[0023] Example:
[0024] The present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments.
[0025] like Figure 1 As shown, a multiple anti-interference circuit for instrument measurement consists of a power conversion module, a display module, a main control module and a digital output module. The power conversion module consists of a power input protection circuit, a power chip and a power isolation chip. The power isolation chip is used to prevent the power supply end noise from affecting the signal and suppress the surge impact; the display module consists of a display screen, a chip, an anti-interference filter and is used to ensure that the display displays information in various environments; the main control module is composed of a single-chip minimum system to ensure that the circuit can still maintain stable operation when interfered; the digital output module is composed of an isolation chip and an output protection circuit to prevent the noise current on the data bus from damaging sensitive circuits.
[0026] like Figure 2 The figure shows a 24V power input protection circuit, including 0Ω resistors R94 and R93, varistor RV1, self-recovery fuse F3, rectifier bridge D10, filter capacitors C1 and C26, and bidirectional TVS tube D13.
[0027] The 24V power supply voltage is input from the VIN+ and VIN- ports. The VIN+ end is connected in series with R93, the VIN- end is connected in series with R94, and then connected in parallel with the varistor RV1. One end of the self-recovery fuse F3 is connected to one end of the R93 resistor, and the other end is connected to the AC1 pin of the rectifier bridge D10. One end of the R94 resistor is connected to the AC2 pin of the rectifier bridge D10. The "+" output end of the rectifier bridge D10 is connected in series with the resistor R95, and the "-" output end of D10 is connected in series with the resistor R96. C1, C26 and D13 are connected in parallel, one end is connected to R95, and the other end is connected to the reference ground. In this circuit, the rectifier bridge D10 has the characteristics of high efficiency, low power consumption, and good stability. Its principle is to use the unidirectional conduction characteristics of the diode to convert AC into DC. The 0Ω resistor is used for circuit protection and acts as a low-cost fuse. The self-recovery fuse F3 limits the short-circuit current. Use varistor RV1, capacitors C1, C26 and D13TVS tube to achieve surge protection for the circuit.
[0028] like Figure 3 and Figure 4 Shown is a digital output module, including a 485 isolation chip U17, a 485 chip U10, resistors R8, R9 and R11, a bidirectional TVS tube D14, self-recovery fuses F1 and F2, a gas discharge tube G1, and filter capacitors C62, C63 and C25. One end of the C63 filter capacitor is connected to the analog ground, and the other end is connected to the VCCA pin of the 485 isolation chip U17, and this pin is powered by +3.3V. IN2, IN3 and OUT4 of U17 are connected to the main control chip, OUT2, OUT3 and IN4 are connected to DI, RE, RO of the 485 chip U10, one end of the filter capacitor C62 is connected to the VCCB pin and ENB pin of U17, and this pin is powered by +5V, and the other end of C62 is connected to the digital ground, one end of the R9 resistor is connected to RE and DE, and the other end is connected to the analog ground, one end of R8 is connected to the B pin of U10, and the other end is connected to the digital ground, one end of R11 is connected to +5V, and the other end is connected to the A pin of U10, D14 connects A in parallel to the ground, F1 and F2 are connected in series to the A and B pins respectively, the gas discharge tube G1 is connected in parallel to the A and B lines, and the other end is connected to the digital ground. This circuit integrates the digital 485 output signal, adopts the 485 isolation chip U17, and uses a bidirectional TVS tube, a gas discharge tube and a fuse to protect the circuit from external surges or static electricity interference.
[0029] like Figure 4As shown, the U17 is a high-performance 4-channel digital isolator that provides high electromagnetic immunity and low emissions at low power while isolating CMOS or LVCMOS digital I / Os. Each isolation channel has a logic input and output buffer separated by a dual-capacitor silicon dioxide (SiO2) insulation barrier.
[0030] like Figure 5 The figure shows the schematic diagram of the ESD protector in the display module. A chip U10, B chip U13, C chip U11, D chip U14, and E chip U15 are ESD protection chips. The IO1, IO2, IO3, and IO4 of these five chips are connected to the main control chip pins, and NC1, NC2, NC4, and NC5 are connected to the display pins. The chip ULC3304P10 is used. This chip has excellent ESD protection functions: ESD, IEC61000-4-2, ±30kV contact discharge, ±30kV air discharge; EFT, IEC61000-4-4, 40A; Lightning, IEC61000-4-5, 10A. Protect the display screen from interference from the EFT fast pulse group. Under the interference of the pulse group, the function is not affected, and the display screen does not have the phenomenon of screen flickering.
[0031] The circuit's anti-interference ability can be further optimized through reasonable chip layout and routing technology. For example, the power supply part and the signal part can be laid out separately to avoid the interference of power supply noise on the signal. At the same time, multi-layer board design or adding ground layer can be used to improve the circuit's anti-interference ability.
[0032] These devices in the present invention are used in conjunction with an isolated power supply to help prevent noise currents on the data bus from damaging sensitive circuits. Through the use of chips and layout techniques, the anti-interference ability of the circuit is significantly enhanced.
[0033] The above contents are further detailed descriptions of the present invention in combination with specific implementation methods, and it cannot be determined that the specific implementation of the present invention is limited to these descriptions. For ordinary technicians in the technical field to which the present invention belongs, several simple deductions or substitutions can be made without departing from the concept of the present invention, which should be regarded as falling within the scope of protection of the present invention.
Claims
1. A multiple anti-interference circuit for instrument measurement, characterized in that: It includes power conversion module, single chip minimum system, display module and digital output module; The power conversion module is composed of a power input protection circuit, a power chip and a power isolation chip connected in sequence; the display module is composed of a display screen, an anti-interference filter and a protection chip connected in sequence; the digital output module is composed of an isolation chip and an output protection circuit connected in sequence; The input end of the single-chip microcomputer minimum system is connected to the output end of the power isolation chip in the power conversion module, and the output end of the single-chip microcomputer minimum system is connected to the input end of the protection chip in the display module and the input end of the isolation chip in the digital output module.
2. A multiple anti-interference circuit for instrument measurement according to claim 1, wherein: The power input protection circuit includes 0Ω resistors R94 and R93, a varistor RV1, a resettable fuse F3, a rectifier bridge D10, filter capacitors C1 and C26, and a bidirectional TVS tube D13; a 24VAC power supply voltage is input from the power supply end, the positive end of the power supply is connected in series with R93, the negative end of the power supply is connected in series with R94, and then connected in parallel with the varistor RV1, one end of the resettable fuse F3 is connected to one end of the R93 resistor, and the other end is connected to the input end of the rectifier bridge D10, one end of the R94 resistor is connected to the input end of the rectifier bridge D10, a resistor R95 is connected in series with the "+" output end of the rectifier bridge D10, and a resistor R96 is connected in series with the "-" output end of the D10, C1, C26 and D13 are connected in parallel, one end is connected to R95, and the other end is connected to the reference ground.
3. A multiple anti-interference circuit for instrument measurement according to claim 1 or 2, wherein: The power chip adopts a DCDC isolation chip constant voltage isolation power supply.
4. A multiple anti-interference circuit for instrument measurement according to claim 1 or 2, wherein: The protection chip in the display module adopts an ESD protection chip.
5. A multiple anti-interference circuit for instrument measurement according to claim 1 or 2, wherein: The isolation chip in the digital output module adopts a 485 isolation chip; the output protection circuit in the digital output module adopts a 485 output protection circuit.
6. A multiple anti-interference circuit for instrument measurement according to claim 5, wherein: The 485 output protection circuit includes a 485 isolation chip U17, a 485 chip U10, resistors R8, R9 and R11, a bidirectional TVS tube D14, self-recovery fuses F1 and F2, a gas discharge tube G1, filter capacitors C62, C63 and C25; one end of the C63 filter capacitor is connected to the analog ground, and the other end is connected to the power supply end of the 485 isolation chip U17, and the pin is powered by +3.3V. IN2, IN3 and OUT4 of U17 are connected to the main control chip, OUT2, OUT3 and IN4 are connected to DI, RE, RO of the 485 chip U10, and one end of the filter capacitor C62 is connected to the power supply end of U17. The source end and the enable end are also powered by +5V. The other end of C62 is connected to the digital ground. One end of the R9 resistor is connected to RE and DE, and the other end is connected to the analog ground. One end of R8 is connected to the B pin of U10, and the other end is connected to the digital ground. One end of R11 is connected to +5V, and the other end is connected to the signal end of U10. D14 is connected to A in parallel to the ground. F1 and F2 are connected in series to the signal end respectively. The gas discharge tube G1 is connected in parallel to the A and B lines, and the other end is connected to the digital ground. This circuit integrates the digital 485 output signal, adopts the 485 isolation chip U17, and uses bidirectional TVS tubes, gas discharge tubes and fuses to protect the circuit from external surges or electrostatic interference.