Control circuit, Ethernet PHY, domain controller, and vehicle

Abstract

The utility model discloses a control circuit, an Ethernet PHY, a domain controller and a vehicle, the control circuit comprises a microcontroller MCU, at least two Switch chips and a PHY chip, the microcontroller MCU is connected with the at least two Switch chips, and the PHY chip is connected with any two Switch chips. According to the domain controller provided by the invention, the requirement that the autonomous vehicle carries a plurality of sensors can be met.

Description

Technical Field

[0001] The present application relates to the field of autonomous driving technology, and in particular to a control circuit, Ethernet PHY, a domain controller and a vehicle. Background Art

[0002] The perception scenarios of autonomous driving are complex and changeable. As the requirements for autonomous driving safety redundancy become higher and higher, autonomous driving vehicles are equipped with more and more perception sensors, especially L4 and above autonomous driving vehicles. The domain controller needs multiple Ethernet interfaces to input the perception data collected by sensors such as lidar.

[0003] In the related art, the SMI communication protocol is often used to manage and configure the Ethernet PHY chip inside the vehicle switch. The number of Ethernet interfaces in ordinary vehicle switches is too small to meet the needs of the domain controller to access multiple Ethernet sensor devices and quickly configure them. Utility Model Content

[0004] Embodiments of the present application provide a control circuit, Ethernet PHY, domain controller and vehicle to meet the requirements of accessing multiple Ethernet PHYs.

[0005] The present application embodiment adopts the following technical solutions:

[0006] In a first aspect, an embodiment of the present application provides a control circuit, wherein the control circuit includes: a microcontroller MCU, at least two Switch chips, and a PHY chip, wherein the microcontroller MCU is connected to the at least two Switch chips, and the PHY chip is connected to any two Switch chips.

[0007] In some embodiments, the microcontroller MCU transparently transmits information through the SMI communication bus of the Switch chip to configure the PHY chip.

[0008] In some embodiments, the microcontroller MCU transparently transmits the SMI communication bus of the Switch chip to access the PHY chip.

[0009] In some embodiments, the microcontroller MCU and one of the at least two Switch chips are connected via an RGMII interface.

[0010] In some embodiments, the microcontroller MCU is connected to the at least two Switch chips via a switch chip.

[0011] In some embodiments, control is enabled by the microcontroller MCU through the OE pin of the switch chip.

[0012] In some embodiments, when the switch chip is opened or closed, only one Switch chip is in the SMI communication bus path at the same time.

[0013] In a second aspect, an embodiment of the present application further provides an Ethernet PHY, which includes the control circuit described in the first aspect.

[0014] In a third aspect, an embodiment of the present application further provides a domain controller, which includes the Ethernet PHY described in the second aspect.

[0015] In a fourth aspect, an embodiment of the present application further provides a vehicle, which includes the domain controller described in the third aspect.

[0016] At least one of the above-mentioned technical solutions adopted in the embodiments of the present application can achieve the following beneficial effects: adopting a microcontroller MCU, at least two Switch chips, and a PHY chip, realizing interface expansion through at least two Switch chips, and being able to configure multiple groups of Switch chips and PHY chips at the same time, and each group does not interfere with each other when controlling the PHY chip, thereby further meeting the needs of autonomous driving vehicles equipped with multiple sensors. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] The drawings described herein are used to provide a further understanding of the present application and constitute a part of the present application. The illustrative embodiments of the present application and their descriptions are used to explain the present application and do not constitute an improper limitation on the present application. In the drawings:

[0018] Figure 1 This is a schematic diagram of the internal structure of the control circuit in the embodiment of the present application;

[0019] Figure 2 Schematic diagram of the circuit principle of the control circuit in the embodiment of the present application. DETAILED DESCRIPTION

[0020] In order to make the purpose, technical solution and advantages of the present application clearer, the technical solution of the present application will be clearly and completely described below in combination with the specific embodiments of the present application and the corresponding drawings. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present application.

[0021] The technical solutions provided by various embodiments of the present application are described in detail below in conjunction with the accompanying drawings.

[0022] The present application embodiment provides a control circuit, such as Figure 1As shown, a schematic diagram of the internal structure of the control circuit in an embodiment of the present application is provided, wherein the control circuit includes: a microcontroller MCU100, at least two Switch chips (200, 300), and a PHY chip 400, wherein the microcontroller MCU100 is connected to the at least two Switch chips (200, 300), and the PHY chip 400 is connected to any two Switch chips.

[0023] In specific implementation, the microcontroller MCU100 needs to have basic functions such as enable control and data transmission. Preferably, the Infineon automotive-grade microcontroller MCU can be used. It can be understood that the selection of the microcontroller MCU100 by those skilled in the art can be selected according to actual conditions, and is not specifically limited in the embodiments of this application. The microcontroller MCU100 can generate a switch enable after level conversion, and the microcontroller MCU100 is also used to process the transmitted network data.

[0024] The switch chip (200, 300), i.e. the switch chip, is used to realize the interaction of network data. The microcontroller MCU100 can be connected to the switch chips (200, 300) respectively, but the microcontroller MCU100 can only access one switch chip at the same time.

[0025] The PHY chip 400, namely the Physical chip, can be called the port physical layer in Chinese, which is a common abbreviation for the physical layer of the OSI model. It can be understood that Ethernet is a device that operates the physical layer of the OSI model, that is, an Ethernet PHY is a chip that can send and receive Ethernet data frames.

[0026] In one embodiment of the present application, the microcontroller MCU transparently transmits information through the SMI communication bus of the Switch chip to configure the PHY chip.

[0027] like Figure 1 As shown, the microcontroller MCU100 transparently accesses or configures the registers of multiple external PHY chips through the SMI bus of the Switch chip 200, thereby achieving the function of configuring the external PHY chip.

[0028] In one embodiment of the present application, the microcontroller MCU transparently transmits information through the SMI communication bus of the Switch chip to access the PHY chip.

[0029] like Figure 1As shown, the microcontroller MCU100 is used to transparently transmit the SMI bus of the Switch chip to configure the registers of multiple external PHYs, realize the control of multiple network ports such as 1000M, master-slave, and adaptive, and read the connection status, so as to achieve the functional purpose of monitoring external PHY.

[0030] In one embodiment of the present application, the microcontroller MCU and one of the at least two Switch chips are connected via an RGMII interface.

[0031] like Figure 2 As shown, the microcontroller MCU100 is connected to one of the switch chips through the RGMII interface for data transmission. It can be understood that RGMII (Reduced Gigabit Media Independent Interface) is Reduced GMII (Gigabit Media Independent Interface). RGMII uses a 4-bit data interface, a working clock of 125MHz, and transmits data at the rising and falling edges at the same time, with a transmission rate of up to 1000Mbps.

[0032] In one embodiment of the present application, the microcontroller MCU is connected to the at least two Switch chips via a switch chip.

[0033] like Figure 2 As shown, the microcontroller MCU is connected to two 6113 switch chips (referred to as 6113), and each 6113 is connected to six external 2221PHY chips (referred to as 2221). Since both 6113s are in single mode (a chip attribute), the microcontroller MCU can only access one 6113 at a time.

[0034] Since the single mode is a working attribute of the chip itself, the chip address in single mode is fixed (there is only one address). At this time, the addresses of the two 6113s are the same, so the MCU can only communicate with one 6113.

[0035] In this way, theoretically, each SMI bus can connect to up to 32 PHY addresses, and 2221 supports up to 8 PHY addresses, meeting the usage requirements. Optionally, each SMI bus connects to 32 2221s, each 2221 supports 1 address; or each SMI bus connects to 4 2221s, each 2221 supports 8 addresses; or each SMI bus connects to 6 2221s, and the total number of addresses supported by all 2221s is 32.

[0036] In one embodiment of the present application, the OE pin of the switch chip is enabled and controlled by the microcontroller MCU.

[0037] like Figure 2 As shown, in the specific implementation, a switch chip is used between the microcontroller MCU and 6113 respectively, and the OE (Output Enable) pin of the switch chip is enabled and controlled by the microcontroller MCU to realize the opening and closing functions, ensuring that only one 6113 is in the SMI path at the same time.

[0038] In one embodiment of the present application, when the switch chip is opened or closed, only one Switch chip is in the SMI communication bus path at the same time.

[0039] like Figure 2 As shown, by using at least two Switch chips, each Switch chip can expand 6 1000base-T1 interfaces, and use the switch chip OE pin for enable control to access and configure the external PHY, a total of 12 1000base-T1 interfaces can be reached, and the number of interfaces can be increased with the number of Switch chips, thereby meeting the needs of autonomous driving vehicles equipped with multiple sensors.

[0040] An Ethernet PHY is provided in an embodiment of the present application, which includes the control circuit, and the control circuit includes: a microcontroller MCU, at least two Switch chips, and a PHY chip. The microcontroller MCU is connected to the at least two Switch chips, and the PHY chip is connected to any two Switch chips.

[0041] The control circuit of the Ethernet PHY in the embodiment of the present application uses the microcontroller MCU to transparently transmit through the SMI bus of the Switch chip to configure the registers of multiple external PHY chips, realize the control of multiple network ports such as 1000M, master-slave, and adaptive, and read the connection status, so as to achieve the functional purpose of configuring and monitoring external PHY.

[0042] The SMI link is turned on and off by enabling the control switch chip between the microcontroller MCU and each Switch chip, ensuring that only one Switch chip is in the SMI path at the same time, thereby achieving the function of configuring and monitoring the external PHY.

[0043] An embodiment of the present application provides a domain controller, which includes the Ethernet PHY.

[0044] The domain controller in the embodiment of the present application uses a microcontroller MCU in the Ethernet PHY to transparently transmit through the SMI bus of the Switch chip to configure the registers of multiple external PHY chips, realize the control of multiple network ports such as 1000M, master-slave, and adaptive, and read the connection status, so as to achieve the functional purpose of configuring and monitoring external PHY.

[0045] The domain controller in the embodiment of the present application realizes the opening and closing of the SMI link by enabling the control switch chip between the microcontroller MCU in the Ethernet PHY and each Switch chip, ensuring that only one Switch chip is in the SMI path at the same time, thereby achieving the function of configuring and monitoring the external PHY.

[0046] The above domain controller is sufficient to meet the needs of autonomous driving vehicles equipped with multiple sensors.

[0047] A vehicle is provided in an embodiment of the present application, which includes the domain controller.

[0048] In the vehicle of the embodiment of the present application, the domain controller uses the microcontroller MCU to transparently transmit through the SMI bus of the Switch chip to configure the registers of multiple external PHY chips, realize the control of multiple network ports of 1000M, master-slave, adaptive, etc. and read the connection status, so as to achieve the functional purpose of configuring and monitoring external PHY.

[0049] In the vehicle in the embodiment of the present application, the SMI link is opened and closed by enabling the control switch chip between the microcontroller MCU in the domain controller and each Switch chip, ensuring that only one Switch chip is in the SMI path at the same time, thereby achieving the function of configuring and monitoring the external PHY.

[0050] The above-mentioned vehicles can meet the needs of autonomous driving vehicles equipped with multiple sensors.

[0051] The above is only an embodiment of the present application and is not intended to limit the present application. For those skilled in the art, the present application may have various changes and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application should be included in the scope of the claims of the present application.

Claims

1. A control circuit, wherein: The control circuit comprises: a microcontroller MCU, at least two Switch chips, and a PHY chip. The microcontroller MCU is connected to the at least two Switch chips, and the PHY chip is connected to any two Switch chips.

2. The control circuit as claimed in claim 1, wherein: The microcontroller MCU transparently transmits information through the SMI communication bus of the Switch chip to configure the PHY chip.

3. The control circuit as claimed in claim 1, wherein: The microcontroller MCU transparently transmits the SMI communication bus of the Switch chip to access the PHY chip.

4. The control circuit as claimed in claim 1, wherein: The microcontroller MCU and one of the at least two Switch chips are connected via an RGMII interface.

5. The control circuit as claimed in claim 1, wherein: The microcontroller MCU is connected to the at least two Switch chips via a switch chip.

6. The control circuit as claimed in claim 5, wherein: The control is enabled by the microcontroller MCU through the OE pin of the switch chip.

7. The control circuit as claimed in claim 6, wherein: When the switch chip is opened or closed, only one Switch chip is in the SMI communication bus path at the same time.

8. An Ethernet PHY, wherein: Comprising the control circuit according to any one of claims 1 to 7.

9. A domain controller, wherein: Comprising the Ethernet PHY as claimed in claim 8.

10. A vehicle, wherein: Comprising a domain controller as claimed in claim 9.

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