Signal generation circuit, DC-DC conversion circuit, LED control circuit and electronic equipment

Abstract

The utility model provides a signal generation circuit and electronic equipment. The circuit comprises an input amplification circuit which receives a first input signal and a second input signal at an input end and outputs a differential amplification signal of the first input signal and the second input signal at an output end; the overvoltage protection circuit is coupled to the output end of the input amplification circuit and is used for limiting the amplitude of the differential amplification signal based on a preset voltage threshold value; the carrier signal generation circuit is used for generating a carrier signal; the first input end of the signal output circuit is coupled to the output end of the overvoltage protection circuit so as to receive the amplitude-limited differential amplification signal, and the second input end of the signal output circuit is coupled to the output end of the carrier signal generation circuit; an input signal of a first input end is compared with an input signal of a second input end, and a target signal is obtained based on a comparison result. Due to the fact that amplitude limiting is carried out on the differential amplification signal, unstable output of the target signal is avoided. The circuit further comprises a voltage division circuit which is used for controlling the duty ratio of a target signal in an initial period.

Description

Technical Field

[0001] The utility model relates to the field of power supply, in particular to a signal generating circuit, a DC-DC conversion circuit, an LED control circuit and electronic equipment. Background Art

[0002] Signal generating circuits, such as pulse width modulation (PWM) circuits, modulate the width of a series of pulses to equivalently obtain the required waveform (including shape and amplitude). They are widely used in DC-DC conversion circuits, power control, mobile phone backlight adjustment and some negative feedback circuits.

[0003] At present, analog circuits are usually used to build PWM pulse width modulation circuits with built-in Metal Oxide Semiconductor Field Effect Transistor (MOSFET). The PWM pulse width modulation circuit is used to form a PWM signal, which is used in conjunction with the MOSFET of an external circuit to realize circuit on and off, thereby adjusting the voltage of the output branch of the external circuit.

[0004] The general practice is to compare the PWM control signal and the carrier signal through a comparator to generate a PWM signal. However, there is no limit on the amplitude of the PWM control signal. If the PWM control signal is too high or too low, the comparator will generate a PWM signal with a duty cycle that is too high or too low, resulting in an unstable comparator output signal.

[0005] In addition, in the initial cycles when the comparator generates the PWM signal, if the initial voltage value of the PWM control signal exceeds the amplitude of the carrier signal, the comparator output signal will also be unstable. Utility Model Content

[0006] In response to the problems in the prior art that the PWM control signal has no amplitude control and the initial duty cycle is uncontrollable, an embodiment of the present application provides a PWM pulse width modulation circuit and an electronic device to achieve amplitude control of the PWM control signal and adjust the duty cycle of the initial period of the PWM signal to avoid unstable output.

[0007] In a first aspect, an embodiment of the present application provides a signal generating circuit, comprising: an input amplification circuit, comprising a differential amplifier, wherein the inverting input terminal of the differential amplifier is used to receive a first input signal, the non-inverting input terminal of the differential amplifier is used to receive a second input signal, and the output terminal of the differential amplifier outputs a differential amplified signal of the first input signal and the second input signal; an overvoltage protection circuit, coupled to the output terminal of the differential amplifier, and limiting the differential amplified signal based on a preset voltage threshold; a carrier signal generating circuit, wherein the carrier signal generating circuit is used to generate a carrier signal; a signal output circuit, comprising a comparator, wherein the inverting input terminal of the comparator is coupled to the output terminal of the differential amplifier to receive the differential amplified signal after limiting, and the non-inverting input terminal of the comparator is coupled to the carrier signal generating circuit; the signal output circuit compares the signal at the inverting input terminal of the comparator with the signal at the non-inverting input terminal, generates a target signal based on the comparison result, and outputs it.

[0008] In the technical solution of the signal generating circuit, the amplitude of the differential amplified signal output by the input amplifier circuit is controlled by the overvoltage protection circuit so that the amplitude of the signal at the first input end of the signal output circuit is within the amplitude range of the carrier signal, thereby avoiding instability of the target signal output by the signal output circuit.

[0009] In one implementation, the signal generating circuit further includes a voltage divider circuit coupled between a power supply terminal and ground. The voltage divider circuit includes a first resistor and a second resistor; a voltage divider node between the first resistor and the second resistor is coupled to a first input terminal of the signal output circuit.

[0010] In one achievable manner, the voltage divider circuit is used to input the voltage of the voltage division node to the first input terminal of the signal output circuit when the output terminal of the input amplifier circuit does not output the differential amplification signal.

[0011] In the technical solution of the signal generating circuit, by setting a voltage divider circuit at the first input end of the signal output circuit, when there is no signal input to the first input end and the second input end of the input amplifier circuit, the voltage generated at the voltage divider node through the voltage divider resistor can be input to the first input end of the signal output circuit to adjust the duty cycle of the output signal of the signal output circuit in the initial signal cycle, thereby avoiding instability of the output target signal.

[0012] In one achievable manner, the first resistor in the voltage divider circuit is a plurality of resistors connected in series, and the second resistor is a plurality of resistors connected in series.

[0013] In one achievable manner, the inverting input terminal of the differential amplifier is coupled to the first end of the third resistor, and the second end of the third resistor is coupled to the first input signal; the non-inverting input terminal of the differential amplifier is coupled to the first end of the fourth resistor, and the second end of the fourth resistor is coupled to the second input signal; the first end of the fifth resistor is coupled to the inverting input terminal of the differential amplifier, and the second end of the fifth resistor is coupled to the output terminal of the differential amplifier; the first end of the sixth resistor is coupled to the non-inverting input terminal of the differential amplifier, and the second end of the sixth resistor is grounded.

[0014] In one possible implementation, the carrier signal includes a sine wave, and a direct current component is added to the sine wave to make the reference voltage value greater than zero.

[0015] In the technical solution of the signal generating circuit, a DC component is added to the carrier signal generated by the carrier signal generating circuit so that the voltage value of the carrier signal is greater than zero volts, so as to further modulate the duty cycle of the output signal of the signal output circuit.

[0016] In an achievable manner, the overvoltage protection circuit includes a first voltage-limiting diode (D1), a second voltage-limiting diode (D2) and a current-limiting resistor (R7); the first voltage-limiting diode (D1) and the second voltage-limiting diode (D2) are connected in series, the cathode of the first voltage-limiting diode (D1) is coupled to the anode of the second voltage-limiting diode (D2) and the output end of the input amplifier circuit, the anode of the first voltage-limiting diode (D1) is coupled to the first end of the current-limiting resistor (R7), the second end of the current-limiting resistor (R7) is grounded, and the cathode of the second voltage-limiting diode (D2) is coupled to the power supply end.

[0017] In the technical solution of the PWM pulse width modulation circuit, the amplitude of the differential amplified signal output by the input amplifier circuit is controlled by using the first zener diode and the second zener diode in the overvoltage protection circuit, so that the amplitude range of the differential amplified signal is within the amplitude range of the carrier signal.

[0018] In a second aspect, an embodiment of the present application provides a DC-DC conversion circuit, including a voltage sampling circuit, an output circuit, and a logic drive circuit, such as the signal generating circuit in the first aspect and its various implementation methods; the output circuit includes an inductor, a first switch tube, a second switch tube and an output branch; the first end of the first switch tube is coupled to the power supply end, and the second end thereof is coupled to the first end of the second switch tube; the second end of the second switch tube is grounded; the second end of the first switch tube and the first end of the second switch tube are connected to the first end of the inductor; the second end of the inductor is coupled to the output branch, and the inductor is charged or discharged under the control of the first switch tube and the second switch tube; the first signal input end of the signal generating circuit is coupled to the output end of the voltage sampling circuit, and the second signal input end thereof is coupled to the reference voltage; the voltage sampling circuit samples the voltage of the output branch; based on the signals of the first signal input end and the second signal input end, the signal generating circuit outputs a target signal to the logic drive circuit; under the action of the target signal, the logic drive circuit drives the first switch tube and the second switch tube to be turned on or off to adjust the voltage of the output branch.

[0019] In a third aspect, an embodiment of the present application provides an LED control circuit, comprising a voltage divider circuit, an LED array and a signal generating circuit as in the first aspect and its various implementations; a first input signal terminal of the signal generating circuit is coupled to a voltage dividing node of the voltage divider circuit, and a second input signal terminal thereof is coupled to a reference voltage; the voltage divider circuit comprises a photoresistor; based on signals from the first input signal terminal and the second input signal terminal, the signal generating circuit outputs a target signal to the LED array; when the resistance value of the photoresistor changes, the signal from the first input signal terminal changes, and the target signal output by the signal generating circuit changes to control the light emitting state of the LED array.

[0020] In a fourth aspect, an embodiment of the present application provides an electronic device, which includes the signal generating circuit in the first aspect and its various implementation methods, the electronic device outputs at least a first signal to the signal generating circuit, and the signal generating circuit outputs a target signal to the electronic device.

[0021] In one achievable manner, the electronic device may be a DC-DC conversion circuit, a power control circuit, a mobile phone backlight adjustment circuit, or a negative feedback circuit.

[0022] For the specific description of the second, third and fourth aspects in the embodiments of the present application, reference can be made to the detailed description of the signal generating circuit in the first aspect and its various implementations; and for the beneficial effects of the second, third and fourth aspects and their various implementations, reference can be made to the analysis of the beneficial effects in the first aspect and its various implementations, which will not be repeated here. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] Figure 1 A schematic diagram of the structure of a PWM pulse width modulation circuit of a related technology;

[0024] Figure 2 A schematic diagram of the structure of a signal generating circuit provided in an embodiment of the present application;

[0025] Figure 3 A schematic diagram of the structure of another signal generating circuit provided in an embodiment of the present application;

[0026] Figure 4 A circuit topology diagram of a signal generating circuit provided in an embodiment of the present application;

[0027] Figure 5 A schematic diagram of voltage changes after the differential amplified signal is limited by the overvoltage protection circuit provided in an embodiment of the present application;

[0028] Figure 6 A schematic diagram of generating a carrier signal and a PWM signal waveform provided in an embodiment of the present application;

[0029] Figure 7 A DC-DC circuit conversion circuit provided in an embodiment of the present application;

[0030] Figure 8 A schematic diagram of an LED brightness adjustment circuit provided in an embodiment of the present application;

[0031] Fig. 9 A schematic diagram of the structure of an electronic device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0032] The technical solutions in the embodiments of the present application will be described below in conjunction with the drawings in the embodiments of the present application.

[0033] The term "and / or" in this article is a description of the association relationship of associated objects, indicating that there can be three relationships. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. The symbol " / " in this article indicates that the associated objects are in an or relationship, for example, A / B means A or B.

[0034] The terms "first" and "second" in the specification and claims herein are used to distinguish different objects rather than to describe a specific order of the objects. For example, a first response message and a second response message are used to distinguish different response messages rather than to describe a specific order of the response messages.

[0035] In the embodiments of the present application, words such as "exemplary" or "for example" are used to indicate examples, illustrations or descriptions. Any embodiment or design described as "exemplary" or "for example" in the embodiments of the present application should not be interpreted as being more preferred or more advantageous than other embodiments or designs. Specifically, the use of words such as "exemplary" or "for example" is intended to present related concepts in a specific way.

[0036] In the description of the embodiments of the present application, unless otherwise specified, "multiple" means two or more than two. For example, multiple processing circuits refer to two or more processing circuits, etc.; multiple elements refer to two or more elements, etc.

[0037] In the present invention, coupling, connection, etc. refer to direct or indirect electrical connection. For example, coupling between A and B means that A and B are directly or indirectly electrically connected. Indirect electrical connection between A and B means that A and B are electrically connected through other elements.

[0038] In order to facilitate understanding of the technical solutions of the embodiments of the present application, the relevant terms involved in this document are explained below.

[0039] Differential amplifier: refers to an amplifier used to amplify the "error" signal. The differential amplifier is a special operational amplifier whose main function is to introduce a ratio and a fixed deviation voltage between the input signal and the amplifier output. Its basic principle is to use the negative feedback characteristics of the operational amplifier to eliminate errors, thereby achieving accurate signal amplification. By selecting different components such as resistors and capacitors, different error amplification functions can be achieved.

[0040] Pulse Width Modulation: A commonly used signal modulation technique that is widely used in various electronic devices and systems. It controls the average power or voltage of the output signal by adjusting the pulse width of the signal.

[0041] Comparator: Usually composed of a differential amplifier and a feedback circuit. The differential amplifier is a circuit consisting of two input terminals and one output terminal. Its input terminals are connected to the signal to be amplified and the reference signal respectively. The differential amplifier amplifies the input signal and outputs the amplified signal to the feedback circuit to control the output signal.

[0042] In a traditional signal generation circuit, the differential amplified signal obtained by calculating the first input signal and the second input signal is directly input into the comparator. After the comparison by the comparator, the target signal outputted may be uncontrollable. For example, in a PWM pulse width modulation circuit, the differential amplified signal (that is, the PWM control signal) obtained by calculating the first input signal and the second input signal is not amplitude-controlled and is directly input into the comparator. After the comparison by the comparator, the target signal (that is, the PWM signal) outputted may have a duty cycle that is too high or too low. Figure 1 FIG. 1 is a schematic diagram of a PWM pulse width modulation circuit of a related technology. Figure 1 As shown in FIG. 1 , the PWM pulse width modulation circuit includes a voltage loop unit, a loop comparator unit, a PWM logic unit and a ramp loop unit. The voltage loop unit includes an instantaneous feedback unit, an integrator unit and a gain and level shift unit. The voltage loop unit converts the externally generated voltage sampling feedback signal V fb and reference voltage V ref Compare and generate PWM control signal V ctrl , and then input to the loop comparator. The specific implementation is that the transient feedforward circuit samples the voltage feedback signal V fb and the reference signal V ref The difference between the two is high-pass filtered to generate the first error signal. The integrator circuit samples the voltage feedback signal V fb and the reference signal V ref The difference between the two is integrated to generate the integrated signal V ref-int The integrator circuit is configured as a four-input error amplifier. In order to obtain the generated signal, the integrator needs to perform a long constant operation. The gain and level shifter are based on the above integrated signal and the voltage sampling feedback signal V fb The difference between them generates a second error signal (i.e., the PWM control signal V ctrl The loop comparator unit combines signals including at least the error signal to generate a feedback control signal that terminates the PWM cycle. The PWM cycle is terminated when the sum of the positive inputs to the loop comparator is higher than the sum of the negative inputs to the loop comparator.

[0043] Since the voltage sampling feedback signal V fb The signal is input into the integrating amplifier for operation. The actual control complexity of the circuit is relatively high, and the PWM control signal V ctrl There is no amplitude control, and there is a PWM control signal V ctrl Risk of instability of the output exceeding the amplitude.

[0044] The embodiment of the present application provides a signal generating circuit, which generates a controllable target signal by differentially amplifying the signals inputted from the first input terminal and the second input terminal, and limiting the differential amplified signal. The following description assumes that the signal generating circuit is a PWM pulse width modulation circuit, and the corresponding output target signal is a PWM signal. The embodiment of the present application solves the problems existing in the prior art by constructing an open-loop PWM pulse width modulation circuit, adding an output overvoltage protection circuit and a duty cycle of the initial cycle pulse width modulation signal. It should be noted that the target signal outputted by the embodiment of the present application can not only be used in a PWM pulse width modulation circuit to generate a PWM signal, but can also be used in other circuits for modulating the required signal.

[0045] Figure 2 A schematic diagram of a signal generating circuit provided in an embodiment of the present application is shown in FIG. Figure 2 As shown, the signal generating circuit 200 includes an input amplifier circuit 210, an overvoltage protection circuit 230, a signal output circuit 250 and a carrier signal generating circuit 260. The output end of the input amplifier circuit 210 is coupled to the input end of the overvoltage protection circuit 230, and the output end of the overvoltage protection circuit 230 is coupled to the first input end of the signal output circuit 250. The input amplifier circuit 210 receives the first input signal V1 and the second input signal V2 respectively inputted from the first input end and the second input end, and generates a differential amplified signal of the first input signal V1 and the second input signal V2 at the output end (the differential amplified signal is the PWM control signal), and based on the differential amplified signal, the signal output circuit 250 outputs a PWM signal (that is, a target signal). The differential amplified signal outputted by the input amplifier circuit 210 is limited within a preset voltage threshold range and provided to the first input end of the pulse width modulation circuit 250. The voltage threshold refers to the maximum amplitude of the voltage value represented by the differential amplified signal allowed to fluctuate, including an upper voltage threshold and a lower voltage threshold.

[0046] When the voltage value of the first differential amplified signal output by the input amplifier circuit 210 is greater than the upper voltage threshold, the output terminal of the overvoltage protection circuit 230 outputs a first voltage signal to clamp the output of the input amplifier circuit 210 at the upper voltage threshold.

[0047] When the voltage value of the second differential amplified signal output by the input amplifier circuit 210 is less than the lower voltage threshold, the output terminal of the overvoltage protection circuit 230 outputs a second voltage signal to clamp the output of the input amplifier circuit 210 at the lower voltage threshold.

[0048] When the voltage value of the third differential amplified signal output by the input amplifier circuit 210 is not greater than the upper limit voltage threshold and not less than the upper limit voltage threshold, the output end of the overvoltage protection circuit 230 outputs a third voltage signal. Because the voltage of the third differential signal is within the preset range, the overvoltage protection circuit does not limit the third differential amplified signal. The third voltage signal output by the overvoltage protection circuit 230 can be directly provided to the first input end of the signal output 250.

[0049] It should be noted that the upper voltage threshold and the lower voltage threshold are determined according to the amplitude of the carrier signal generated by the carrier signal generating circuit 260, that is, the peak voltage of the carrier signal is the upper voltage threshold, and the valley voltage of the carrier signal is the lower voltage threshold.

[0050] It can be understood that the overvoltage protection circuit 230 can obtain the differential amplified signal output by the input amplifier circuit 210, and the overvoltage protection circuit 230 is used to adjust the voltage value represented by the above differential amplified signal. The embodiment of the present application obtains the first voltage / second voltage / third voltage by limiting the differential amplified signal (that is, the PWM control signal) of the first input signal and the second input signal, and then adjusts the duty cycle of the PWM signal (that is, the target signal), thereby avoiding the instability of the PWM signal output by the signal output circuit 250. The first input end of the signal output circuit 250 is coupled to the output end of the overvoltage protection circuit 230, that is, the output of the overvoltage protection circuit 230 is provided to the first input end of the signal output circuit 250, and is used to compare with the carrier signal input at its second input end to generate a PWM signal. The input amplifier circuit 210 provided in the embodiment of the present application at least includes the control information of the carrier signal output to the first input end of the signal output circuit 250, generates a PWM signal according to the control information, and then controls the subsequent circuit components according to the PWM signal.

[0051] The carrier signal of the second input terminal of the signal output circuit 250 is provided by the carrier signal generating circuit 260, and the carrier signal in the example is a sine wave. The duty cycle of the output PWM signal of the pulse width modulation circuit 250 is controlled by adding a DC component to the sine wave to modulate the reference voltage of the sine wave. It should be understood that the carrier generating circuit 260 can also generate a waveform such as a sawtooth wave and provide it to the second input terminal of the pulse width modulation circuit 250, and the embodiment of the present application does not limit this.

[0052] In one possible implementation, the baseline of the carrier signal generated by the carrier signal generating circuit 260 is modulated so that the voltage value of the carrier signal varying with time is greater than 0 volts. By modulating the baseline of the carrier signal, the duty cycle of the output signal of the pulse width modulation circuit is further adjusted.

[0053] In a possible implementation, the input amplifier circuit 210 includes a differential amplifier U1 configured by a third resistor R3, a fourth resistor R4, a fifth resistor R5, and a sixth resistor R6. The differential amplifier U1 has a non-inverting input terminal connected via the fourth resistor R4 to receive the second signal V2 (which may be a reference voltage V ref ), the non-inverting input terminal is connected in parallel to ground or other reference voltage via a fourth resistor R4. The differential amplifier U1 also has an inverting input terminal connected via a third resistor R3 to receive a first signal V1 (which can be a voltage sampling feedback voltage V fb ), the inverting input terminal of the differential amplifier U1 is also connected in parallel to the output terminal of the differential amplifier U1 via the fifth resistor R5. The output of the differential amplifier U1 has a voltage proportional to the gain of the differential amplifier U1 circuit specified by the third resistor R3, the fourth resistor R4, the fifth resistor R5, and the sixth resistor R6.

[0054] The differential amplifier U1 also includes a negative feedback module, which negatively feeds back the output signal of the differential amplifier U1 as a feedback signal to the inverting input terminal of the differential amplifier U1. It should be noted that the first input terminal of the input amplifier unit 210 is coupled to the inverting input terminal of the differential amplifier U1 through the third resistor R3, the second input terminal of the input amplifier unit 210 is coupled to the non-inverting input terminal of the differential amplifier U1 through the fourth resistor R4, and the output terminal of the input amplifier unit 210 is the output terminal of the differential amplifier U1.

[0055] The third resistor R3, the fourth resistor R4, the fifth resistor R5, and the sixth resistor R6 may have the same resistance value. In another example, the third resistor R3 and the fourth resistor R4 have the same resistance value, and the fifth resistor R5 and the sixth resistor R6 have the same resistance value. In a further example, the ratio of the resistance values ​​of the third resistor R3 and the fifth resistor R5 is equal to the ratio of the fourth resistor R4 and the sixth resistor R6. For example, let R3=R4, R5=R6, and according to the principle of virtual short and virtual disconnection of the amplifier, the voltage at the output end of the differential amplifier U1 is obtained = (V2-V1)*R5 / R3. It can be understood that when the second input signal V2 is greater than the first input signal V1, the voltage value at the output end of the differential amplifier U1 is positive (in volts), and when the second input signal V2 is less than the first input signal V1, the voltage value at the output end of the differential amplifier U1 is negative (in volts). When the second input signal V2 is equal to the first input signal V1, the voltage value at the output end of the differential amplifier U1 is 0 (in volts). The embodiment of the present application only limits the amplitude of the voltage when the voltage value of the calculated result at the output end of the differential amplifier U1 is positive, and limits the output voltage of the positive half cycle to stabilize the stable output of the PWM signal. It should be noted that the first input end of the input amplifier circuit 210 and the inverting input end of the differential amplifier U1 are connected through the third resistor R3, and the second input end of the input amplifier circuit 210 and the non-inverting input end of the differential amplifier U1 are connected through the fourth resistor R4. The definition of the inverting input end and the non-inverting input end (that is, the positive input end) of the differential amplifier is not limited to the implementation method provided in the embodiment of the present application.

[0056] It should be understood that the implementation of the input amplifier circuit 210 is not limited to using a differential amplifier, and any other circuit that can implement a differential amplification function is applicable to the embodiment of the present application.

[0057] The overvoltage protection circuit 230 is connected to the output end of the differential amplifier U1 to obtain the differential amplified signal (that is, the calculation result output by the differential amplifier U1) and adjust the differential amplified signal, wherein the differential amplified signal is a function of the voltage difference between the first input signal V1 and the second input signal V2. By limiting the positive value range of the calculation result output by the differential amplifier U1, when the calculation result output by the differential amplifier U1 is greater than the upper voltage threshold, the overvoltage protection circuit 230 adjusts the calculation result to the upper voltage threshold; when the calculation result output by the differential amplifier U1 is less than the upper voltage threshold, the overvoltage protection circuit 230 adjusts the calculation result to the lower voltage threshold.

[0058] In a possible implementation, the signal output circuit 250 includes a comparator U2, the inverting input terminal of the comparator U2 is coupled to the output terminal of the overvoltage protection circuit 230, and is used to make the carrier signal input to its positive input terminal output a PWM signal to the next level circuit under the control of the adjusted differential signal output by the overvoltage protection circuit 3230. It should be noted that the first input terminal of the signal output unit 250 is the inverting input terminal of the comparator U2, the second input terminal of the signal output unit 250 is the positive input terminal of the comparator U2, and the output terminal of the signal output unit 250 is the output terminal of the comparator U2. The embodiment of the present application does not limit the definition of the inverting input terminal and the non-inverting input terminal of the comparator U2. The comparison result output by the comparator U2 is a level signal, which can be a high level or a low level signal. Among them, because the overvoltage protection circuit 230 is provided, the voltage at the inverting input terminal of the comparator U2 will not exceed the upper voltage threshold and will not be lower than the lower voltage threshold. The comparator U2 compares the voltage signals of its inverting input terminal and the non-inverting input terminal and outputs the comparison result. The comparator U2 compares the carrier signal with the voltage Vout-ea outputted by the differential amplifier U1 after being limited by the overvoltage protection circuit 230 .

[0059] In a possible implementation, the target signal (a square wave signal with an adjustable duty cycle, which can also be regarded as a PWM wave / PWM signal) output by the signal output circuit 250 is used to access a PWM switching circuit to control the switching of a power tube.

[0060] It should be understood that the implementation of the input amplifier circuit 250 is not limited to using a comparator, and any other circuit that can implement a comparison function is applicable to the embodiment of the present application.

[0061] Figure 3 A schematic diagram of a structure of another signal generating circuit provided in an embodiment of the present application, Figure 2 The difference is that Figure 3 A voltage divider circuit 340 is added, which is coupled between the power supply terminal VCC and the ground. The voltage divider circuit 340 includes a first resistor R1 and a second resistor R2; the first end of the first resistor R1 is coupled to the power supply terminal VCC, the second end of the first resistor R1 is coupled to the first end of the second resistor R2, and the second end of the second resistor R2 is grounded; the second end of the first resistor R1 and the first end of the second resistor R2 are commonly coupled to a voltage divider node, and the voltage divider node is coupled to the output end of the overvoltage protection circuit 330 and the first input end of the signal output circuit 350.

[0062] For the topological structure description of the input amplifier circuit 310 and the signal output circuit 350, please refer to Figure 2 , I will not go into details here.

[0063] The voltage divider circuit 340 is used for the case where the system is just powered on, and the first input terminal and the second input terminal of the input amplifier circuit 310 do not receive the first input signal V1 and the second input signal V2. At this time, the output terminal of the input amplifier circuit 310 does not output the differential amplified signal, and the output terminal of the overvoltage protection circuit 330 does not output a signal. The voltage generated by the voltage divider node of the voltage divider circuit 340 is provided to the first input terminal of the input signal output circuit 350 to determine the duty cycle of the initial period PWM signal. The embodiment of the present application avoids the problem of uncontrollable duty cycle of the PWM signal in the initial period by increasing the duty cycle setting of the initial PWM signal period.

[0064] After the first input terminal of the input amplifier circuit 310 receives the first input signal V1 and the second input terminal receives the second input signal V2, the input amplifier circuit 310 outputs a differential amplified signal, and the differential amplified signal outputs the first voltage signal / the second voltage signal / the third voltage signal after being limited by the overvoltage protection circuit 230. It should be noted that the voltage division generated by the voltage division node of the voltage division circuit 340 can be ignored compared with the voltage value of the first voltage signal / the second voltage signal / the third voltage signal, which can be achieved by adjusting the resistance values ​​of the sixth resistor R6 and the seventh resistor R7 and the power supply voltage VCC, so that after the output terminal of the input amplifier circuit 310 outputs the differential amplified signal, it will not affect the signal of the first input terminal of the signal output circuit 350. The first input terminal of the signal output circuit 350 receives the differential amplified signal output by the input amplifier circuit 310 after being limited by the overvoltage protection circuit 330, and compares the signal of the second input terminal according to its first input terminal to obtain a PWM signal.

[0065] Figure 4 A circuit topology diagram of a signal generating circuit provided in an embodiment of the present application, and Figure 3 The difference is, Figure 4 A specific implementation method of the overvoltage protection circuit 330 is added.

[0066] In a possible implementation, the overvoltage protection circuit 330 includes a voltage regulator diode D1, a voltage regulator diode D2, and a current limiting resistor R7, wherein the cathode of the voltage regulator diode D1 is coupled to the output end of the differential amplifier U1 and the anode of the second voltage regulator diode D2, the anode of the voltage regulator diode D1 is coupled to the first end of the current limiting resistor R7, and the second end of the current limiting resistor R7 is connected to the ground or other reference voltage. The cathode of the second voltage regulator diode D2 is coupled to the power supply voltage VCC.

[0067] When the cathode voltage of the Zener diode D1 exceeds its reverse breakdown voltage, the Zener diode is in a low-resistance state, and the voltage across the Zener diode D1 will be clamped to the rated voltage, that is, the Zener diode D1 stabilizes the voltages of its cathode and anode at its rated value. When the voltage at the cathode of the Zener diode D1 is not higher than its reverse breakdown voltage, the Zener diode D1 is in a high-resistance state, which is equivalent to being an open circuit in the circuit, and has no effect on the output signal voltage value of the input amplifier circuit 310. The voltage at the cathode of the Zener diode D1 is the voltage at the output end of the input amplifier circuit 310. The principle of the Zener diode D2 is the same, and when the voltage value of the output calculation result of the control differential amplifier U1 is too low, the voltage at the output end of the differential amplifier U1 is stabilized at the rated regulated voltage value. When the output signal of the differential amplifier U1 is lower than the lower threshold, the voltage difference between the output signal and the power supply voltage VCC increases to the reverse breakdown voltage of the Zener diode, and the voltage across the Zener diode D2 is clamped to the rated voltage.

[0068] That is to say, when the output voltage of the differential amplifier U1 is too high or too low, the output voltage can be set to be less than the maximum value in the voltage range (i.e., the upper voltage threshold), or it can be set to be greater than the minimum value in the voltage range (i.e., the lower voltage threshold). When the voltage output by the differential amplifier U1 is between the lower voltage threshold and the upper voltage threshold, the Zener diodes D1 and D2 do not limit the voltage output by the differential amplifier U1. It should be noted that the input and output ends of the overvoltage protection circuit 330 are the same end, specifically, the common connection end of the cathode of the Zener diode D1 and the anode of the Zener diode D2. The current limiting resistor R7 limits the current flowing through the Zener diode D1 to protect the Zener diode.

[0069] In one achievable manner, the voltage zener diodes D1 and D2 may also be a device combination or circuit having a single transient voltage suppression (TVS) function.

[0070] In a possible implementation, the rated voltage of the Zener diode D1 is set to not exceed the peak value of the carrier signal, and the rated voltage of the Zener diode D2 is set to not be less than the valley value of the carrier signal.

[0071] It can be understood that the comparator U2 can compare the voltage signals at its inverting input terminal and non-inverting input terminal and output the comparison result. The comparator U2 compares the sine wave signal (hereinafter, the carrier signal is described as a sine wave signal) with the signal Vout-ea (i.e., the PWM control signal after limiting) output by the differential amplifier U1 after being adjusted by the voltage-regulating diodes D1 and D2. It should be noted that Vout-ea includes the divided voltage output by the voltage-dividing node of the voltage-dividing circuit 340. As mentioned before, after the input amplifier circuit 310 outputs the differential amplified signal, based on the set resistance values ​​of the first resistor R1 and the second resistor R2 and the power supply voltage VCC, the voltage at the voltage-dividing node is negligible compared with the first voltage signal / second voltage signal / third voltage signal output by the overvoltage protection circuit 330. Therefore, Vout-ea can be regarded as the signal of the output signal of the input amplifier circuit 310 after being limited by the overvoltage protection circuit 320. For example, when Vout-ea is greater than the amplitude of the sine wave signal, the comparator U2 outputs a low-level pulse signal; when Vout-ea is less than the amplitude of the sine wave signal, the comparator U2 outputs a high-level pulse signal.

[0072] When Vout-ea is within the range of the sine wave amplitude, the higher the value is, the shorter the high level duration of the PWM signal output by the comparator U2 is within one pulse cycle, the longer the low level duration is, and the smaller the duty cycle of the output PWM signal is; when Vout-ea is within the range of the sine wave amplitude, the lower the value is, the shorter the high level duration of the pulse signal output by the pulse width modulation circuit 350 is within one pulse cycle.

[0073] In one achievable manner, the overvoltage protection circuit only retains the first diode D1 to limit the upper voltage threshold of the differential amplification signal.

[0074] In one achievable manner, the overvoltage protection circuit only retains the second diode D2 to achieve amplitude limiting of the lower voltage threshold of the differential amplification signal.

[0075] See also Figure 5 , which shows the voltage schematic diagram of the differential amplified signal after the overvoltage protection circuit limits the amplitude. Figure 5 As shown:

[0076] At the moment t0-t1 and the moment t2-t3, the voltage value of the third differential amplified signal is between the upper voltage threshold and the lower voltage threshold, the overvoltage protection circuit 330 does not limit the third differential amplified signal, and the overvoltage protection circuit 330 outputs a third voltage signal, and the voltage of the third voltage signal is the voltage of the Vout-ea signal.

[0077] At time t1-t2, the voltage value of the first differential amplified signal exceeds the upper voltage threshold, and the overvoltage protection circuit 330 limits the first differential signal, clamping its output signal at the upper voltage threshold. The overvoltage protection circuit 330 outputs a first voltage signal, and the voltage of the first voltage signal is the voltage of Vout-ea.

[0078] At time t3-t4, the voltage value of the second differential amplified signal is lower than the lower voltage threshold, and the overvoltage protection circuit 330 limits the second differential signal, clamping its output signal at the lower voltage threshold. The overvoltage protection circuit 330 outputs a second voltage signal, and the voltage of the second voltage signal is the voltage of Vout-ea.

[0079] It can be understood that the duty cycle of the PWM signal output by the comparator U2 changes with the change of the voltage value corresponding to the differential amplified signal obtained at the output end of the differential amplifier U1. When the voltage at the inverting input end of the comparator U2 increases from 0 volts in the positive direction to a peak value close to the inverting input end signal, the output end voltage of the comparator U2 keeps the output voltage at a low level. When the voltage at the inverting input end of the comparator U2 increases to a voltage greater than the non-inverting input end voltage of the comparator U2, the output end voltage of the comparator U2 flips to a high level.

[0080] In general circuit implementation, the inverting input signal of comparator U2 is not limited, and the inverting input signal will have an amplitude that exceeds the carrier signal input to its non-inverting input, and the output signal of comparator U2, i.e., the PWM signal, will have an unstable output with a duty cycle that is too high or too low. When the voltage value of the differential amplified signal output by differential amplifier U1 rises to a certain level, the inverting input of comparator U2 becomes a higher value, and the voltage value of the inverting terminal is greater than the non-inverting terminal. The PWM signal output by the output of comparator U2 will flip to a high level, and the duty cycle of the PWM signal is too high.

[0081] In general circuit implementation, when the differential amplified signal output by the differential amplifier U1 drops to a certain level, the inverting input of the comparator U2 becomes a lower value. At this time, the voltage value of the inverting input is less than the voltage value of the non-inverting input. The PWM signal output by the output of the comparator U2 will flip to a low level. At this time, the duty cycle of the PWM signal is too low.

[0082] In the embodiment provided by the present application, when the voltage value of the differential amplified signal output by the differential amplifier U1 is too high, the voltage stabilizing diode D1 clamps the differential amplified signal to a first voltage, which is between the amplitude of the carrier signal and the reference voltage. Therefore, the differential amplified signal is stabilized within a rated range, and the duty cycle of the PWM signal output after passing through the comparator U2 is not too high.

[0083] In the embodiment provided by the present application, when the voltage value of the differential amplified signal output by the differential amplifier U1 is too low, the voltage stabilizing diode D2 clamps the differential amplified signal to a second voltage, which is between the reference voltage and the valley value of the carrier signal. Therefore, the differential amplified signal is stabilized within a rated range, and the duty cycle of the PWM signal output after passing through the comparator U2 will not be too low.

[0084] In addition, the PWM pulse width modulation circuit provided in the embodiment of the present application also includes a carrier generation circuit 360, which is used to generate a carrier signal, and the corresponding carrier period, carrier amplitude and carrier reference voltage value are set according to the needs of the subsequent feedback circuit. For example, the carrier signal can be a sine wave signal or a sawtooth wave signal. Because the sawtooth wave or sine wave frequency is constant, the PWM signal frequency output by the comparator U2 is the same as the sine wave or sawtooth wave frequency and is constant, and the duty cycle of the PWM signal changes with the change of the output value of the differential amplifier U1, so that the output voltage of the subsequent circuit is stabilized at a set value. The duty cycle of the PWM signal changes with the high and low corresponding DC signal output by the overvoltage protection circuit 330, thereby realizing the control of the duty cycle of the PWM signal. In the traditional circuit structure, the amplitude of the PWM control signal is not controlled, and the PWM control signal is the differential amplified signal output by the overvoltage protection circuit 330 provided in the embodiment of the present application. After the overvoltage protection circuit 330 limits the differential amplified signal, the first voltage signal / the second voltage signal / the third voltage signal is output.

[0085] The signal generating circuit 400 provided in the embodiment of the present application further includes a voltage divider circuit 340 .

[0086] The voltage divider circuit 340 generates an output voltage to the first input terminal of the signal output circuit 350 by voltage division. It can be understood that the greater the voltage across the first resistor R1, the smaller the output voltage of the voltage divider node of the voltage divider circuit 340, and the smaller the voltage across the first resistor R1, the greater the output voltage of the voltage divider node of the voltage divider circuit 340. By adjusting the resistance value of the first resistor R1 and the second resistor R2, the voltage Vout-ea at the inverting input terminal of the comparator U2 is adjusted; or by adjusting the voltage value of the voltage source VCC, the voltage Vout-ea at the inverting input terminal of the comparator U2 is adjusted; the embodiment of the present application can also adjust the output of the differential amplifier U1 through the overvoltage protection circuit 330, and then adjust the voltage Vout-ea at the inverting input terminal of the comparator U2. In the first several PWM signal cycles, that is, when the circuit is just powered on, the first resistor R1 and the second resistor R2 generate a voltage after voltage division, which is input to the first input terminal of the pulse width modulation circuit 350.

[0087] For example, by setting the resistance values ​​of the first resistor R1 and the second resistor R2 to control the initial PWM signal duty cycle, the voltage of the voltage dividing node may be (R1 / R1+R2)*VCC. Optionally, the initial PWM signal duty cycle is configured to be 50%.

[0088] In one achievable manner, the first resistor R1 and the second resistor R2 may be fixed resistors or variable resistors.

[0089] In another achievable manner, the first resistor R1 may be replaced by a plurality of resistors connected in series, and the second resistor R2 may also be replaced by a plurality of resistors connected in series.

[0090] The embodiment of the present application uses several basic devices such as a differential amplifier, a comparator and a sine wave generator to build an open-loop signal generation circuit, making the circuit more stable and easy to control the circuit parameters.

[0091] In a possible implementation, the target signal (a square wave signal with an adjustable duty cycle, which can also be regarded as a PWM wave / PWM signal) output by the signal output circuit 250 is used to access a PWM switching circuit to control the switching of a power tube.

[0092] Figure 6 The schematic diagram of the carrier signal and PWM signal waveform generation provided in the embodiment of the application is as follows: Figure 6 As shown, the horizontal axis of the coordinate axis represents time t, the vertical axis represents voltage (volts), and the sine wave signal

[0093] V(t)=V h *sin(2π / T-π / 2)+V0 (1)

[0094] Among them, V h is the amplitude of the sine wave, V0 is the reference voltage value of the sine wave, Vout-ea represents the voltage value of the output signal of the input amplifier circuit 310 after adjustment by the overvoltage protection circuit 330, Vout-ea=a is the upper voltage threshold, Vout-ea=b is the lower voltage threshold, that is, the range of the voltage value represented by Vout-ea is adjusted to between a and b to avoid the amplitude instability of the output PWM signal. The square wave function corresponding to the PWM signal Vout-ca output by the comparator U2 is:

[0095]

[0096] In one achievable manner, by adding a DC component V0 to the sine wave signal to modulate the reference voltage value of the sine wave signal, the square wave duty cycle of the PWM signal Vout-ca output by the signal generating circuit 350 is further adjusted.

[0097] In one achievable manner, in an initial PWM signal cycle, Vout-ea is generated by the voltage divider circuit 340 , and based on the generated divided voltage, the comparator U2 outputs the PWM signal Vout-ca.

[0098] The signal generating circuit provided in the embodiment of the present application can be applied in a wide range of scenarios. For example, the conventional DC-DC conversion circuit often uses the PWM modulation mode, and the signal generating circuit provided in the embodiment of the present application can be applied in a Buck type DC-DC (Direct Current-Direct Current, English abbreviation: DC-DC) switching power supply, a Boost type DC-DC switching power supply and a Buck-Boost type DC-DC switching power supply.

[0099] Figure 7 A DC-DC converter circuit provided in an embodiment of the present application realizes automatic adjustment of the output voltage by adopting the signal generating circuit provided in an embodiment of the present application. Figure 7 As shown, the DC-DC circuit conversion circuit 700 includes a voltage sampling circuit 710, a signal generating circuit 720 provided in an embodiment of the present application, a logic driving circuit 730 and an output circuit 740. The output circuit 740 includes an output branch 741, an inductor L, and switch tubes M1 and M2. The first end of the voltage sampling circuit 710 is electrically connected to the first end of the inductor L, the second end of the voltage sampling circuit 710 is electrically connected to the signal generating circuit 720, the output end of the signal generating circuit 720 is electrically connected to the control end of the switch tube M1, and the signal generating circuit 720 generates a PWM signal to the logic driving circuit 730 based on the output voltage of the voltage sampling circuit 710, which is used to control the conduction or disconnection of the switch tube M1 and the second switch tube M2. In this way, the first switch S1 and the second switch S2 flow corresponding currents in different parts of each cycle of the PWM signal, and the feedback voltage V fb Maintained at the reference voltage V ref Similar level.

[0100] The voltage sampling circuit 710 can detect the output voltage of the output circuit in the DC-DC conversion circuit by means of resistor voltage division, which will not be described in detail here. Figure 7Taking the Buck type switching power supply circuit as an example, the output voltage of the sampling voltage divider circuit 710 is used as the first input terminal of the signal generating circuit 720, that is, the first input signal V1 of the input amplifier circuit. The larger the output voltage in the DC-DC circuit conversion, the larger the output voltage of the voltage sampling circuit 710. The second input signal V2 of the input amplifier circuit can be a reference voltage. By comparing the difference between the output voltage of the sampling voltage divider circuit 710 and the reference voltage, it is determined whether the output voltage of the DC-DC conversion circuit matches the energy demand of the load. When the output voltage does not match the energy demand of the load, the output voltage is adjusted to stabilize it at the set value. When the feedback voltage V of the voltage sampling circuit 710 fb Less than the reference voltage V ref When the feedback voltage V of the sampling voltage divider circuit 710 is fb Greater than the reference voltage V ref When , the signal generating circuit 720 outputs a pulse signal with a smaller duty cycle of the PWM signal.

[0101] The smaller the output voltage of the voltage sampling circuit 710, the smaller the output voltage of the output circuit of the DC-DC conversion circuit. The signal generation circuit 720 compares the differential amplified signal output by the input amplifier circuit with the carrier signal, so that it outputs a pulse signal with a larger duty cycle than the previous pulse cycle signal, which makes the first switch tube M1 in a period of time in the on state longer, thereby increasing the output voltage of the DC-DC conversion circuit; conversely, the larger the output voltage of the voltage sampling circuit 710, the signal generation circuit 720 compares the differential amplified signal output by the input amplifier circuit with the carrier signal, so that it outputs a pulse signal with a smaller duty cycle than the previous pulse cycle signal, thereby shortening the time that the first switch tube M1 is in the on state in a period of time, thereby decreasing the output voltage of the DC-DC conversion circuit. The logic drive circuit 730 uses the PWM signal output from the pulse width modulation circuit 720 to generate the switch signals of the switch tubes M1 and M2. In this way, a closed-loop negative feedback regulation system is formed to stabilize the output voltage. When the output voltage V of the sampling voltage divider circuit 710 is fb and reference voltage V ref When they are equal, it means the circuit has been adjusted to a stable state.

[0102] In summary, the PWM pulse width modulation circuit 720 outputs trigger pulses with constant frequency and different duty cycles to control the states of the switches M1 and M2. The PWM signal is used to drive the switch M1 to turn on and M2 to turn off so that the inductor L is charged. The PWM signal is used to drive the switch M1 to turn off and M2 to turn on so that the inductor L is discharged.

[0103] The signal generating circuit provided in the embodiment of the present application can also be connected to an LED control circuit at the output end to realize the automatic adjustment function of the LED brightness. Figure 8 A schematic diagram of an LED brightness adjustment circuit provided in an embodiment of the present application, such as Figure 8 As shown, the signal generating circuit is the circuit provided by the present application, in which the first input signal V1 of the signal generating circuit is connected to a photoresistor and a fixed resistor to form a voltage divider circuit, and the second input signal V2 is connected to a reference voltage. When the light becomes brighter, the resistance of the photoresistor R8 becomes smaller, the voltage divided by the fixed resistor R9 becomes larger, the first input signal V1 becomes larger, and after passing through the signal generating circuit, the duty cycle of the output PWM signal becomes larger; when the light becomes darker, the resistance of the photoresistor R8 becomes larger, the voltage divided by the fixed resistor R9 becomes smaller, the first input signal V1 becomes smaller, and after passing through the signal generating circuit, the duty cycle of the output PWM signal becomes smaller.

[0104] In more implementations, the signal generating circuit provided in the embodiment of the present application can also be used in a backlight adjustment circuit, with the brightness value of the backlight of the liquid crystal display screen as the first input signal V1, and the reference voltage as the second input signal V2. As the backlight brightness value, i.e., the first input signal V1, changes, PWM signals with different duty cycles are generated, and then the backlight brightness adjustment circuit adjusts the backlight brightness according to the PWM signals with different duty cycles.

[0105] See also Fig. 9 , an embodiment of the present application also provides a structural schematic diagram of an electronic device.

[0106] The electronic device 900 may include an electronic device 900, a signal generating circuit 910, a voltage conversion circuit 920 and a load 930. The output end of the signal generating circuit 910 is coupled to the input end of the voltage conversion circuit 920, the output end of the voltage conversion circuit 920 is coupled to the load 930, and the load 930 is coupled to the signal generating circuit 910.

[0107] The signal generating circuit 910 at least receives a feedback voltage signal from the output end of the load 930 , and after comparing it with a reference voltage, the signal generating circuit 910 outputs a target signal to the input end of the voltage conversion circuit 920 , thereby regulating the output end voltage of the load 930 .

[0108] In a possible implementation, the signal generating circuit 910 may be Figure 2 , Figure 3 or Figure 4 The signal generating circuit shown in .

[0109] It can be understood that the electronic device in the embodiment of the present application can also be a server or other device.

[0110] Compared with the prior art, the embodiment of the present application adjusts the duty cycle of the target signal by building an open-loop signal modulation mechanism, adding output overvoltage protection, and performing voltage modulation on the carrier signal. And the duty cycle setting of the initial target signal period is increased to avoid the problem of uncontrollable duty cycle of the target signal in the initial period. It is also possible to use the PWM pulse width modulation circuit provided by the embodiment of the present application to adjust the pulse width and period of the PWM signal to simulate different voltage and power levels, which can be used in power supply DC-DC conversion circuits, power control circuits, mobile phone backlight adjustment and some negative feedback circuits.

[0111] In the above embodiments, the description of each embodiment has its own emphasis. For parts that are not described in detail in a certain embodiment, please refer to the relevant description of other embodiments. The above embodiments are only used to illustrate the technical solutions of the embodiments of the present application, rather than to limit them. Although the embodiments of the present application are described in detail with reference to the above embodiments, it should be understood by those of ordinary skill in the art that any modification, deformation, or equivalent replacement of some of the technical features based on the technical solutions recorded in the above embodiments should belong to the spirit and scope of the technical solutions of the embodiments of the present application.

Claims

1. A signal generating circuit, characterized in that: include: An input amplifier circuit, comprising a differential amplifier, wherein an inverting input terminal of the differential amplifier is used to receive a first input signal, a non-inverting input terminal of the differential amplifier is used to receive a second input signal, and an output terminal of the differential amplifier outputs a differential amplified signal of the first input signal and the second input signal; an overvoltage protection circuit, coupled to the output end of the differential amplifier, and limiting the differential amplified signal based on a preset voltage threshold; A carrier signal generating circuit, wherein the carrier signal generating circuit is used to generate a carrier signal; The signal output circuit includes a comparator, wherein the inverting input terminal of the comparator is coupled to the output terminal of the differential amplifier to receive the differential amplified signal after limiting, and the non-inverting input terminal of the comparator is coupled to the carrier signal generating circuit; the signal output circuit compares the signal at the inverting input terminal of the comparator with the signal at the non-inverting input terminal, generates a target signal based on the comparison result and outputs it.

2. The signal generating circuit according to claim 1, characterized in that: Also includes: A voltage divider circuit is coupled between a power supply terminal and a ground, and comprises a first resistor (R1) and a second resistor (R2); a voltage divider node between the first resistor (R1) and the second resistor (R2) is coupled to an inverting input terminal of the comparator.

3. The signal generating circuit according to claim 2, characterized in that: The voltage divider circuit is used for inputting the voltage of the voltage division node to the inverting input terminal of the comparator when the output terminal of the differential amplifier does not output the differential amplification signal.

4. The signal generating circuit according to claim 2, characterized in that: The first resistor (R1) in the voltage divider circuit is a plurality of resistors connected in series, and the second resistor (R2) is a plurality of resistors connected in series.

5. The signal generating circuit according to claim 1, characterized in that: The inverting input terminal of the differential amplifier is coupled to the first end of the third resistor (R3), and the second end of the third resistor (R3) is coupled to the first input signal; the non-inverting input terminal of the differential amplifier is coupled to the first end of the fourth resistor (R4), and the second end of the fourth resistor (R4) is coupled to the second input signal; A first end of a fifth resistor (R5) is coupled to the inverting input end of the differential amplifier, and a second end of the fifth resistor (R5) is coupled to the output end of the differential amplifier; A first end of the sixth resistor (R6) is coupled to the non-inverting input terminal of the differential amplifier, and a second end thereof is grounded.

6. The signal generating circuit according to claim 1, characterized in that: The carrier signal includes a sine wave to which a direct current component is added so that the reference voltage value is greater than zero.

7. The signal generating circuit according to any one of claims 1 to 6, characterized in that: The overvoltage protection circuit comprises a first voltage-limiting diode (D1), a second voltage-limiting diode (D2) and a current-limiting resistor (R7); the first voltage-limiting diode (D1) and the second voltage-limiting diode (D2) are connected in series, the cathode of the first voltage-limiting diode (D1) is coupled to the anode of the second voltage-limiting diode (D2) and the output end of the input amplifier circuit, the anode of the first voltage-limiting diode (D1) is coupled to the first end of the current-limiting resistor (R7), the second end of the current-limiting resistor (R7) is connected to the ground, and the cathode of the second voltage-limiting diode (D2) is coupled to the power supply end.

8. A DC-DC conversion circuit, characterized in that: A signal generating circuit comprising a voltage sampling circuit, an output circuit, a logic driving circuit, and the signal generating circuit as claimed in any one of claims 1 to 7; the output circuit comprises an inductor, a first switch tube, a second switch tube and an output branch; the first end of the first switch tube is coupled to the power supply end, and the second end thereof is coupled to the first end of the second switch tube; the second end of the second switch tube is grounded; the second end of the first switch tube and the first end of the second switch tube are connected to the first end of the inductor; the second end of the inductor is coupled to the output branch, and the inductor is charged or discharged under the control of the first switch tube and the second switch tube; The first signal input terminal of the signal generating circuit is coupled to the output terminal of the voltage sampling circuit, and the second signal input terminal thereof is coupled to a reference voltage; the voltage sampling circuit samples the voltage of the output branch; Based on the signals of the first signal input terminal and the second signal input terminal, the signal generating circuit outputs a target signal to the logic driving circuit; Under the action of the target signal, the logic driving circuit drives the first switch tube and the second switch tube to be turned on or off to adjust the voltage of the output branch.

9. An LED control circuit, characterized in that: It comprises a voltage divider circuit, an LED array and a signal generating circuit as claimed in any one of claims 1 to 7; The first input signal terminal of the signal generating circuit is coupled to the voltage dividing node of the voltage dividing circuit, and the second input signal terminal thereof is coupled to the reference voltage; the voltage dividing circuit includes a photoresistor; Based on the signals of the first input signal terminal and the second input signal terminal, the signal generating circuit outputs a target signal to the LED array; When the resistance value of the photoresistor changes, the signal at the first input signal terminal changes, and the target signal output by the signal generating circuit changes to control the light-emitting state of the LED array.

10. An electronic device, characterized in that: The electronic device comprises a signal generating circuit as described in any one of claims 1 to 7, wherein the electronic device outputs at least a first signal to the signal generating circuit, and the signal generating circuit outputs a target signal to the electronic device.

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