Electronic device

Abstract

The utility model relates to an electronic device. The present description relates to a method of fabricating an insulated trench in a substrate for an electronic device, the method comprising the following consecutive steps: (a) filling a trench formed in a substrate with a first insulating material; (b) depositing a first etch stop layer on the first material; (c) depositing a second layer of a second insulating material on the first etch stop layer; (d) etching down to the etch stop layer; and (e) depositing a third layer made of a third compact material.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to French patent application No. FR2212257, filed on November 24, 2022, entitled “Fabrication d'une tranchéeisolante (Insulating trench fabrication)”, which is incorporated herein by reference to the fullest extent permitted by law. Technical Field

[0003] The present disclosure relates generally to electronic devices and components and microelectronic devices and components. The present disclosure relates more particularly to the fabrication of such electronic devices and components, and more precisely to the formation of electrically insulating trenches or optically insulating trenches. Background Art

[0004] Methods for manufacturing electronic devices and components and methods for manufacturing microelectronic devices and components continue to develop. Currently, insulating trenches are used to electrically and optically insulate a component from one or more other adjacent components, or even to electrically or optically insulate multiple portions of the same electrical component. Utility Model Content

[0005] Embodiments overcome all or part of the disadvantages of known methods of manufacturing isolation trenches.

[0006] One embodiment provides a method for manufacturing an insulating trench in a substrate for an electronic device, the method comprising the following consecutive steps:

[0007] (a) filling a trench formed in the substrate with a first insulating material;

[0008] (b) depositing a first etch stop layer on the first material;

[0009] (c) depositing a second layer of a second insulating material on the first etch stop layer;

[0010] (d) etching down to the etch stop layer; and

[0011] (e) Depositing a third layer made of a third tight material.

[0012] According to one embodiment, the third material is waterproof.

[0013] According to one embodiment, the method further comprises: between step (a) and step (b), a step (f) of polishing the surface of the substrate.

[0014] According to one embodiment, step (f) implements a chemical mechanical polishing method.

[0015] According to one embodiment, the method further comprises: between step (f) and step (b), a wet etching step (g).

[0016] According to one embodiment, during step (g), the wet etching uses a hydrofluoric acid solution.

[0017] According to one embodiment, step (d) is an anisotropic etching step.

[0018] According to one embodiment, the first etch stop layer is a layer of aluminum oxide or a layer of aluminum nitride.

[0019] According to one embodiment, the first etch stop layer has a thickness in the range of 5 to 20 nm.

[0020] According to one embodiment, the second layer has a thickness greater than or equal to half the diameter of the portion of the trench that remains empty after filling step (a).

[0021] According to one embodiment, the second insulating material is silicon oxide.

[0022] According to one embodiment, the third compact material is aluminum oxide.

[0023] According to one embodiment, the third layer made of the third compact material has a thickness in the range of 5 to 20 nm.

[0024] Another embodiment provides a method of manufacturing a capacitor using the method described above.

[0025] Another embodiment provides a compact insulating trench for an electronic device, the compact insulating trench comprising an insulating trench having a central cavity filled with a stack, the stack comprising, in sequence:

[0026] a first etch stop layer;

[0027] a second layer of a second insulating material; and

[0028] A third layer made of a third dense material.

[0029] Another embodiment provides a compact capacitor including the previously described isolation trench.

[0030] Another embodiment provides an image sensor including the previously described isolation trench.

[0031] Another embodiment provides an image sensor including the previously described capacitor.

[0032] According to another embodiment, an electronic device is provided. The electronic device includes: a substrate having a first surface; and a trench in the substrate. The trench has: a central cavity; a first insulating layer in the cavity; and a stack in the central cavity. The stack includes: a first etch stop layer on the first insulating layer in the trench and on the first surface of the substrate; a second layer of a second insulating material in the trench, on the first etch stop layer, and on the first surface of the substrate; and a third layer of a third sealing material on the second layer, on the trench, and on the first surface of the substrate.

[0033] In some embodiments, an electronic device includes a capacitor including a trench.

[0034] In some embodiments, an electronic device includes an image sensor, the image sensor including a trench.

[0035] In some embodiments, an electronic device includes an image sensor including a capacitor having a trench. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] The foregoing features and advantages, as well as other features and advantages, will be described in detail in the remainder of the disclosure of specific embodiments given by way of illustration and non-limiting manner with reference to the accompanying drawings, in which:

[0037] Figure 1 schematically shows a cross-sectional view of an insulating trench;

[0038] Figure 2 schematically shows a cross-sectional view of an insulating trench used to form a capacitor;

[0039] Figure 3(A) to Figure 3(E) Five cross-sectional views illustrating a mode of implementation of a method for manufacturing an insulation trench are shown; and

[0040] Figure 4 A cross-sectional view of an embodiment of an image sensor is shown. DETAILED DESCRIPTION

[0041] The same features have been designated by the same reference numerals in the various figures. In particular, common structural and functional features in the various embodiments may have the same reference numerals, and may be provided with the same structural properties, dimensional properties, and material properties.

[0042] For the sake of clarity, only the steps and elements useful for understanding the described embodiments have been illustrated and described in detail. In particular, possible uses of the insulating trenches obtained by the following implementation modes have not been explained in detail, current uses in electronic devices being compatible.

[0043] Unless otherwise stated, when reference is made to two elements being connected together, this means a direct connection without any intervening elements other than conductors, and when reference is made to two elements being coupled together, this means the two elements may be connected or they may be coupled via one or more other elements.

[0044] In the following description, unless otherwise specified, when referring to terms defining absolute positions such as terms "front", "back", "top", "bottom", "left", "right", etc., or terms defining relative positions such as terms "above", "below", "upper", "lower", etc., or terms defining directions such as terms "horizontal", "vertical", etc., reference is made to the orientation of the drawings.

[0045] Unless otherwise stated, the expressions “about”, “approximately”, “substantially” and “approximately” mean ±10%, preferably ±5%.

[0046] Figure 1 is a cross-sectional view showing the insulation trench 100 .

[0047] The insulating trench 100 is formed in a substrate 101 by a trench 102, which is filled with an insulating material 103. The trench 102 extends from the surface of the substrate 101. According to an example, the substrate can be a semiconductor substrate, such as a substrate including silicon. The trench 102 can have a width in the range of 200 to 400 nm, such as a width of about 300 nm, and can have a depth in the range of 3 to 10 μm, such as a depth of about 6 μm. According to an example, the insulating material 103 is silicon oxide (SiO2).

[0048] To produce the insulating trench 100, for example by using an etching method, a trench 102 is formed in the substrate 101. The trench 101 is then filled with an insulating material 103 by using a step of depositing a layer of said insulating material, typically a step of conformal deposition.

[0049] A problem that often occurs is that during this deposition step, the central portion of the trench may not be filled and the insulation trench 100 may, at the end of its manufacturing process, exhibit an empty cavity 104 or an empty portion 104 at the level of the center of the insulation trench. The presence of such a cavity may lead to tightness problems at the level of the insulation trench.

[0050] According to one example, an insulating trench of the trench 100 type may be used to delimit the periphery of a simple electronic device, such as a transistor, or a more complex electronic device, such as a pixel. According to another example, an insulating trench of this type may be used within an electronic device.

[0051] Figure 2is a cross-sectional view showing capacitor 200 .

[0052] Capacitor 200 has a Figure 1 These common elements are not described in detail again, and only the differences between the capacitor 200 and the isolation trench 100 are highlighted below.

[0053] Capacitor 200 is formed like an insulating trench and also exhibits two conductive electrodes 201 placed on either side of trench 103. Electrodes 201 are typically formed against the walls of the trench formed in the substrate, after which the remainder of the trench is filled with insulating material in the same manner as trench 101 is filled with material 103. According to one example, electrodes 201 are electrically insulated from substrate 101 by electrically insulating layer 202.

[0054] about Figure 1 The problem in question is likely to occur during the manufacture of the capacitor 200. In fact, the central portion of the trench 101 may not be filled during the deposition step, and the capacitor 200 may exhibit a relative Figure 1 Depicted is an empty cavity 104. The presence of such a cavity may lead to tightness problems at the level of the isolation trench.

[0055] Figure 3(A) to Figure 3(E) A mode of implementation of a method for producing an insulating trench or capacitor 200 is shown, making it possible to reduce the formation of the cavity 104 . Figure 3(A) to Figure 3(E) More specifically, five cross-sectional views are included that illustrate the method of overcoming the Figure 1 The problem described is the steps of an implementation mode of a method for producing an isolation trench.

[0056] In Figure 3(A), Figure 1 An insulation trench of the type of insulation trench 100 has been formed. In other words, a trench 302 has been formed in substrate 301 and then has been filled with insulation material 303. A cavity 304 of the type of cavity 104 still exists after the filling step.

[0057] According to an example, substrate 301 is a semiconductor substrate, including, for example, silicon. According to an example, trench 302 may have a width in the range of 200 to 300 nm, for example, a width of about 220 nm, and may have a depth in the range of 1 to 10 μm, for example, a depth of about 3 μm. According to an example, insulating material 303 is silicon oxide (SiO2). Cavity 304 has a maximum diameter marked as d.

[0058] Furthermore, at Figure 3(A), and optionally, a polishing method has been implemented. This polishing step enables the cavities 304 on the surface side of the substrate 301 to be renewed. According to one example, the polishing method is chemical mechanical polishing (CMP).

[0059] Furthermore, and optionally, an additional cleaning step can be performed after the polishing method. This cleaning step is, for example, a wet etching method, for example using hydrofluoric acid.

[0060] At FIG. 3(B) after FIG. 3(A), an etch stop layer 305 is conformally deposited on the structure of FIG. 3(A). The etch stop layer is a layer made of a material having an etching rate that is slower than the etching rate of another material deposited thereafter, all or part of which is intended to be etched. According to one example, the etch stop layer 305 is a layer of an electrically insulating material such as, for example, aluminum oxide (Al2O3) or aluminum nitride (AlN). The etch stop layer 305 has a thickness in the range of 5 to 20 nm, for example, a thickness of about 7 nm.

[0061] At FIG. 3(C) after FIG. 3(B), a layer 306 made of an insulating material is deposited on top of and in contact with the etch stop layer 305. According to one example, the insulating material of layer 306 is silicon oxide (SiO2). According to one embodiment, the etching rate of the material of layer 306 is greater than the etching rate of the material of layer 305. According to one example, the insulating material of layer 306 is the same as the insulating material of layer 303. According to another example, the insulating material of layer 306 is different from material 303. Layer 306 has a thickness greater than or equal to half the diameter of cavity 304.

[0062] The layer 306 makes it possible to fill the cavity 304 which is still empty after filling the trench 302 and makes it possible to close the entrance of the cavity 304. According to one example, the cavity 307 may still be present even after the deposition of the layer 306.

[0063] At FIG. 3(D) after FIG. 3(C), an etching method (e.g. an anisotropic etching method) is implemented. The etching method is implemented to reach the etching stop layer 305 and thus enables the removal of the portion of the layer 306 that remains outside the cavity 304, as well as the portion of the layer 304 that remains at the surface level of the substrate 301. This operation is performed without using a mask. According to an example, the etching method can be plasma etching or dry etching.

[0064] At FIG. 3(E) following FIG. 3(D), a layer 308 made of a tight sealing material (e.g., a waterproof (water-impermeable) material) is conformally deposited on the structure of FIG. 3(D). According to one example, layer 308 is an aluminum oxide (Al2O3) layer. Layer 308 has a thickness in the range of 5 to 20 nm, for example, a thickness of about 7 nm. According to one example, layer 308 can also be used as a charge passivation layer.

[0065] One advantage of this embodiment is that it enables the cavity 304 formed during manufacturing to be at least partially filled and enables the insulating trench to be made tight, for example waterproof.

[0066] According to one embodiment, other steps of manufacturing an electronic device may be inserted between FIG. 3(C) and FIG. 3(D). Specifically, FIG. 3(D) and FIG. 3(E) may be performed at the end of a method of manufacturing an electronic device including an insulating trench, the method having steps similar to Figure 3(A) to Figure 3(C) In this case, FIG. 3(D) and FIG. 3(E) are used as steps of a method for correcting defects that may occur during the manufacture of one or more insulating trenches.

[0067] Figure 4 is a cross-sectional view illustrating an embodiment of an image sensor 400 including a Figure 3(A) to Figure 3(E) A method for obtaining an insulating trench is described.

[0068] The image sensor 400 includes two semiconductor substrates W1 and W2 bonded to each other via a connection interface 401 .

[0069] At the level of the substrate W1, the image sensor 400 comprises an insulating trench 402 and one or more components of an image sensor 403 (PIX), such as one or more pixels. More specifically, the component(s) 403 and the insulating trench 402 extend from an upper surface 404 of the substrate W1. The insulating trench 402 is used to electrically and optically insulate the component(s) 403 from each other. Between a lower surface 405 of the substrate W1 opposite to the upper surface 404 of the substrate W1 and the lower surfaces of the component 403 and the insulating trench 402, the substrate W1 comprises a connection network 406 (vias).

[0070] At the level of the substrate W2, the image sensor 400 comprises a circuit 407 (driver) for driving the component 403. The driver circuit 407 comprises, for example, a network of transistors. The driver circuit 407 extends from a lower surface 408 of the substrate W2, all over a portion of the substrate W2, or, for example, across the entire thickness of the substrate W2. Between a lower surface 409 of the substrate W2, opposite to the upper surface 408 of the substrate W2, and the lower surface of the circuit 407, the substrate W2 comprises a connection network 410 (vias).

[0071] An example of a method of manufacturing the image sensor 400 includes the following consecutive steps:

[0072] Fabricating component 403 in substrate W1 includes: implementing Figure 3(A) to Figure 3(E) The described method is used to obtain the insulating trench 402;

[0073] fabricating circuit 406 in substrate W2; and

[0074] The lower surface 405 of substrate W1 is secured to the upper surface 409 of substrate W2, for example by bonding.

[0075] The connection networks 406 and 410 and the connection interface 401 enable the component(s) 403 to be electrically connected to the driver circuit 407 .

[0076] use Figure 3(A) to Figure 3(E) One advantage of the manufacturing method is that it enables an image sensor to be obtained with an effectively compact insulating trench. In practice, during the manufacturing of the component 403 and the trench 402, there may be Figure 1 The cavity 104 type of cavity is described. Use Figure 3(A) to Figure 3(E) The method enables closing of the cavity.

[0077] Various embodiments and variations have been described. Those skilled in the art will appreciate that the specific features of these various embodiments and variations can be combined, and that other variations will occur to those skilled in the art. Specifically, Figure 3(A) to Figure 3(E) The method can be applied to other manufacturing methods, such as forming Figure 2 In addition, the insulating trench 402 of the image sensor 400 can be used by Figure 3(A) to Figure 3(E) The method described hereof obtains a capacitor to be replaced.

[0078] Finally, based on the functional indications given above, the actual implementation of the described embodiments and variants is within the capabilities of a person skilled in the art.

[0079] A method for manufacturing an insulating trench in a substrate (301) for an electronic device can be summarized as comprising the following consecutive steps: (a) filling a trench (302) formed in the substrate (301) with a first insulating material (303); (b) depositing a first etch stop layer (305) on the first material (303); (c) depositing a second layer (306) of a second insulating material on the first etch stop layer (305); (d) etching down to the etch stop layer (305); and (e) depositing a third layer made of a third compact material (308).

[0080] The third material (308) may be waterproof.

[0081] The method may further include: between step (a) and step (b), a step (f) of polishing the surface of the substrate (301).

[0082] Step (f) may be performed by a chemical mechanical polishing method.

[0083] The method may further include: between step (f) and step (b), a wet etching step (g).

[0084] During step (g), the wet etching may use a hydrofluoric acid solution.

[0085] Step (d) may be an anisotropic etching step.

[0086] The first etch stop layer (305) may be a layer of aluminum oxide or a layer of aluminum nitride.

[0087] The first etch stop layer (305) may have a thickness in the range of 5 to 20 nm.

[0088] The second layer (306) may have a thickness greater than or equal to half the diameter of the portion (304) of the trench (301) that remains empty after the filling step (a).

[0089] The second insulating material (306) may be silicon oxide.

[0090] The third compact material (308) may be alumina.

[0091] The third layer made of the third compact material (308) may have a thickness in the range of 5 to 20 nm.

[0092] The method of manufacturing the capacitor may use the method according to the above-described embodiment.

[0093] For electronic devices, a compact insulating trench can be summarized as comprising an insulating trench having a central cavity (304), the central cavity (304) being filled with a stack, the stack comprising, in sequence: a first etch stop layer (305); a second layer (306) of a second insulating material; and a third layer made of a third compact material (308).

[0094] A compact capacitor can be summarized as including the isolation trench according to the above-described embodiments.

[0095] An image sensor can be summarized as including the insulating trench according to the above-described embodiments.

[0096] An image sensor can be summarized as including the capacitor according to the above-described embodiments.

[0097] The various embodiments described above can be combined to provide further embodiments. Aspects of the embodiments can be modified, as necessary, to employ concepts of the various patents, applications, and publications to provide further embodiments.

[0098] These and other changes can be made to the embodiments in light of the above detailed description. In general, in the appended claims, the terms used should not be interpreted as limiting the claims to the specific embodiments disclosed in the specification and claims, but should be interpreted to include all possible embodiments and the full range of equivalents to which such claims are entitled. Therefore, the claims are not limited by the present disclosure.

Claims

1. An electronic device, characterized in that: include: A substrate having a first surface; A groove, in the substrate, the groove having: Central cavity; a first insulating layer in the cavity; A stack, in the central cavity, the stack comprising: a first etch stop layer on the first insulating layer in the trench, and on the first surface of the substrate; a second layer of a second insulating material in the trench, on the first etch stop layer, and on the first surface of the substrate; and A third layer of a third sealing material is on the second layer, on the trench, and on the first surface of the substrate.

2. The electronic device according to claim 1, characterized in that A capacitor is included, the capacitor including the trench.

3. The electronic device according to claim 1, characterized in that: An image sensor is included, the image sensor including the trench.

4. The electronic device according to claim 2, characterized in that: An image sensor is included, the image sensor including the capacitor having the trench.

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