MA output circuit of vortex shedding flowmeter

Abstract

The utility model relates to the technical field of vortex shedding flowmeters, in particular to an mA output circuit of a vortex shedding flowmeter, which comprises an MCU, a PWMOUT pin of the MCU outputs a PWM signal, the output PWM signal is adjusted by the mA output circuit to obtain a required mA value, the mA output circuit comprises a U1 chip, an IOUT output end of the U1 chip is connected with an amplifying circuit, and the amplifying circuit is connected with a power supply. The amplifying circuit comprises a buffer amplifying circuit and an instrument amplifying circuit, the output end of the buffer amplifying circuit is sequentially connected with a sampling resistor R7 and a current-limiting resistor R1 in series, and the current-limiting resistor R1 outputs MAOUT to a load circuit; the feedback voltage adjusted by the instrument amplification circuit enters the U1 chip through the output end of the differential amplification circuit. The driving capacity and stability of current output are ensured through the buffer amplification circuit, the instrument amplification circuit achieves accurate adjustment of output current through precise differential amplification and a feedback mechanism, and the whole mA output circuit can accurately output a set current value according to changes of PWM signals through cooperation of the buffer amplification circuit and the instrument amplification circuit.

Description

Technical Field

[0001] The utility model relates to the technical field of vortex flowmeters, in particular to an mA output circuit of a vortex flowmeter. Background Art

[0002] The vortex flowmeter measures the flow of different media by converting the measured force energy into electrical energy through a piezoelectric sensor, thereby completing the flow metering process. The vortex flowmeter is a primary meter installed on the pipeline. After completing the measurement, it will be used as a flow transmitter in the form of current output and applied to secondary meters or automatic control systems.

[0003] Since the current output link of the vortex flowmeter lacks an efficient and accurate current regulation mechanism, especially for the precise measurement of small flow rates under complex working conditions, the output signal is unstable, affecting the measurement accuracy. In view of this, a mA output circuit of a vortex flowmeter is provided. Utility Model Content

[0004] The main purpose of the utility model is to provide a mA output circuit for a vortex flowmeter to solve the problem that the current output link of the vortex flowmeter proposed in the related art lacks an efficient and accurate current regulation mechanism, especially for the precise measurement of small flow rates under complex working conditions, resulting in unstable output signals and affecting measurement accuracy.

[0005] In order to achieve the above-mentioned purpose, according to one aspect of the utility model, a mA output circuit of a vortex flowmeter is provided, comprising an MCU, wherein a PWM_OUT pin of the MCU outputs a PWM signal, and the output PWM signal is adjusted by the mA output circuit to obtain a required mA value, the mA output circuit comprises a U1 chip, and an IOUT output end of the U1 chip is connected to an amplifier circuit, the amplifier circuit comprises a buffer amplifier circuit and an instrument amplifier circuit, wherein a sampling resistor R7 and a current limiting resistor R1 are sequentially connected in series at the output end of the buffer amplifier circuit, and the current limiting resistor R1 outputs MA_OUT to a load circuit;

[0006] The input end of the instrument amplifier circuit is connected to the output end of the buffer amplifier circuit. The instrument amplifier circuit includes amplifiers U2.1, U2.3 and a differential amplifier circuit, and the output end of the differential amplifier circuit is connected to the FB pin of the U1 chip. The feedback voltage adjusted by the instrument amplifier circuit enters the U1 chip through the output end of the differential amplifier circuit.

[0007] Furthermore, the buffer amplifier circuit includes an anti-interference resistor R2, a capacitor C1 and a power tube Q1;

[0008] Among them, the IOUT output end of the U1 chip is connected to the base of the power tube Q1, and the anti-interference resistor R2 is connected in parallel to the common node between the IOUT output end of the U1 chip and the base of the power tube Q1, and the capacitor C1 is connected in parallel to the anti-interference resistor R2, the emitter of the power tube Q1 is sequentially connected in series with the sampling resistor R7 and the current limiting resistor R1, the sampling resistor R7 is connected in parallel with the capacitor C5, the output end MA_OUT of the current limiting resistor R1 is connected to the load circuit, and the collector of the power tube Q1 is connected to the power supply VCC.

[0009] Furthermore, the reverse end and the output end of the amplifier U2.1 are short-circuited to form a voltage follower circuit, the output end voltage is equal to the same direction input end voltage, the same direction end of the amplifier U2.1 is connected to the common node between the sampling resistor R7 and the emitter of the power tube Q1, and the positive power supply end of the amplifier U2.1 is connected to a +24V voltage, the positive power supply end of the amplifier U2.1 is connected in parallel with a capacitor C3, the other end of the capacitor C3 is grounded, and the negative power supply end of the amplifier U2.1 is grounded;

[0010] Capacitor C3 is used as a high-frequency bypass to reduce high-frequency noise or interference signals passing between the output and input of the amplifier;

[0011] Among them, the reverse end of the amplifier U2.3 is short-circuited with the output end, and also forms a voltage follower circuit. The same-direction end of the amplifier U2.3 is connected to the common node between the sampling resistor R7 and the current limiting resistor R1, and the voltage value of the same-direction end of the follower circuit U2.1 and U2.3 is the same as the output end voltage.

[0012] Further, the differential amplifier circuit includes an amplifier U2.2, an input resistor R3, an input resistor R5 and a balancing resistor R6;

[0013] The input end of the input resistor R3 is connected to the output end of the follower circuit U2.1, the output end of the input resistor R3 is connected to the reverse end of the amplifier U2.2, the reverse end of the amplifier U2.2 and the output end of the amplifier U2.2 are connected in series with a feedback resistor R4, and the output end of the amplifier U2.2 is connected to the FB pin of the U1 chip;

[0014] The input end of the input resistor R5 is connected to the output end of the follower circuit U2.3, and the output end of the input resistor R5 is connected to the same-direction end of the amplifier U2.2. A balancing resistor R6 is connected in parallel between the same-direction end of the amplifier U2.2 and the input resistor R5, and the output end of the balancing resistor R6 is grounded.

[0015] The balancing resistor R6 is connected to the non-inverting input of the amplifier, forming a current path. This path allows current to flow from the power supply to the non-inverting input of the amplifier, thereby providing the necessary bias current for the amplifier; the balancing resistor R6 not only provides the necessary bias current for the amplifier, but also affects the common-mode rejection capability and input impedance of the amplifier.

[0016] Furthermore, a capacitor C2 is connected in parallel to the common node between the sampling resistor R7 and the current limiting resistor R1, and a diode D1 is connected in parallel to the capacitor C2, one end of the diode D1 and the output end of C2 are grounded together, and the other end of the diode D1 is connected to the common node between the sampling resistor R7 and the current limiting resistor R1.

[0017] Furthermore, the E-PAD terminal of the U1 chip is connected in parallel with the GND terminal and is grounded together;

[0018] The V5V terminal of the U1 chip is connected to a capacitor C4, and the output terminal of the capacitor C4 is grounded;

[0019] The VCC terminal of the U1 chip is connected to a +24V power supply. Meanwhile, a capacitor C6 is connected in parallel to the +24V power supply side, and the other end of the capacitor C6 is grounded.

[0020] Compared with the prior art, the utility model has the following beneficial effects:

[0021] In the mA output circuit of the vortex flowmeter, the driving capability and stability of the current output are ensured by a buffer amplifier circuit, while the instrument amplifier circuit achieves precise regulation of the output current through precise differential amplification and feedback mechanisms. The two work together to enable the entire mA output circuit to accurately output the set current value according to the change of the PWM signal. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] Figure 1 This is a schematic diagram of the overall circuit flow of the preferred embodiment of the utility model;

[0023] Figure 2 This is a schematic diagram of the MCU pin structure in the preferred embodiment of the utility model;

[0024] Figure 3 This is a schematic diagram of the mA output circuit principle in the preferred embodiment of the utility model.

[0025] Illustration Description:

[0026] 1. MCU; 2. U1 chip;

[0027] 3. Amplifier circuit; 31. Buffer amplifier circuit; 32. Instrument amplifier circuit;

[0028] 4. Load circuit. DETAILED DESCRIPTION

[0029] In order to further explain the technical means and effects adopted by the present invention to achieve the predetermined purpose of the utility model, the specific implementation method, structure, characteristics and effects of the present invention are described in detail below in combination with the accompanying drawings and preferred embodiments.

[0030] See also Figure 1-Figure 3 As shown, the purpose of this embodiment is to provide a mA output circuit of a vortex flowmeter, including MCU1, wherein the PWM_OUT pin of MCU1 outputs a PWM signal, and the output PWM signal is adjusted by the mA output circuit to obtain the required mA value, and the mA output circuit includes a U1 chip 2, and the IOUT output end of the U1 chip 2 is connected to an amplifier circuit 3, and the amplifier circuit 3 includes a buffer amplifier circuit 31 and an instrument amplifier circuit 32, wherein the output end of the buffer amplifier circuit 31 is sequentially connected in series with a sampling resistor R7 and a current limiting resistor R1, and the current limiting resistor R1 outputs MA_OUT to a load circuit 4;

[0031] The buffer amplifier circuit 31 is used to ensure the driving capability and stability of the current output, while the instrument amplifier circuit 32 achieves precise regulation of the output current through differential amplification and feedback mechanism. The two work together to enable the entire mA output circuit to accurately output the set current value according to the change of the PWM signal.

[0032] In this embodiment, the input end of the instrument amplifier circuit 32 is connected to the output end of the buffer amplifier circuit 31. The instrument amplifier circuit 32 includes amplifiers U2.1, U2.3 and a differential amplifier circuit 3, and the output end of the differential amplifier circuit 3 is connected to the FB pin of the U1 chip 2. The feedback voltage adjusted by the instrument amplifier circuit 32 enters the U1 chip 2 through the output end of the differential amplifier circuit 3; the instrument amplifier circuit 32 is used to accurately control and stabilize the output current of the U1 chip 2.

[0033] In this embodiment, the buffer amplifier circuit 31 includes an anti-interference resistor R2, a capacitor C1 and a power tube Q1; the buffer amplifier circuit 31 is used to provide a current signal with a low output impedance to drive the subsequent circuit, and can isolate the front stage (i.e., the IOUT output of the U1 chip 2) and the rear stage circuit to reduce the interference between them;

[0034] Specifically, the IOUT output terminal of the U1 chip 2 is connected to the base of the power tube Q1, and the anti-interference resistor R2 is connected in parallel to the common node between the IOUT output terminal of the U1 chip 2 and the base of the power tube Q1, and the capacitor C1 is connected in parallel to the anti-interference resistor R2, the emitter of the power tube Q1 is sequentially connected in series with the sampling resistor R7 and the current limiting resistor R1, the sampling resistor R7 is connected in parallel with the capacitor C5, the output terminal MA_OUT of the current limiting resistor R1 is connected to the load circuit 4, and the collector of the power tube Q1 is connected to the power supply VCC.

[0035] The reverse end and the output end of the amplifier U2.1 are short-circuited to form a voltage follower circuit. The output end voltage is equal to the same-direction input end voltage. The same-direction end of the amplifier U2.1 is connected to the common node between the sampling resistor R7 and the emitter of the power tube Q1, and the positive power supply end of the amplifier U2.1 is connected to a +24V voltage. The positive power supply end of the amplifier U2.1 is connected in parallel with a capacitor C3, and the other end of the capacitor C3 is grounded. The negative power supply end of the amplifier U2.1 is grounded;

[0036] Capacitor C3 is used as a high-frequency bypass to reduce high-frequency noise or interference signals passing between the output and input of the amplifier;

[0037] Among them, the reverse end of the amplifier U2.3 is short-circuited with the output end, and also forms a voltage follower circuit. The same-direction end of the amplifier U2.3 is connected to the common node between the sampling resistor R7 and the current limiting resistor R1, and the voltage value of the same-direction end of the follower circuit U2.1 and U2.3 is the same as the output end voltage.

[0038] In this embodiment, the amplifier U2.1 acts as a voltage follower, directly reflecting the voltage change across the sampling resistor, and keeping the signal transmitted without distortion;

[0039] Amplifier U2.3 also acts as a voltage follower, but monitors the voltage between the sampling resistor and the current limiting resistor, which helps to accurately control the feedback signal, especially when the voltage drop across the current limiting resistor needs to be considered.

[0040] In this embodiment, the differential amplifier circuit 3 includes an amplifier U2.2, an input resistor R3, an input resistor R5 and a balancing resistor R6;

[0041] The voltage difference on the sampling resistor R7 is amplified by the differential amplifier circuit 3, and the amplified signal is sent back to the FB pin of the U1 chip 2 as feedback. This feedback mechanism forms a closed-loop control system, so that the U1 chip 2 can automatically adjust its output according to the difference between the actual output current and the target current (i.e., the error signal) to achieve the purpose of maintaining the set mA value;

[0042] Among them, the input end of the input resistor R3 is connected to the output end of the follower circuit U2.1, the output end of the input resistor R3 is connected to the reverse end of the amplifier U2.2, the reverse end of the amplifier U2.2 and the output end of the amplifier U2.2 are connected in series with a feedback resistor R4, and the output end of the amplifier U2.2 is connected to the FB pin of the U1 chip 2;

[0043] The input end of the input resistor R5 is connected to the output end of the follower circuit U2.3, and the output end of the input resistor R5 is connected to the same-direction end of the amplifier U2.2. A balancing resistor R6 is connected in parallel between the same-direction end of the amplifier U2.2 and the input resistor R5, and the output end of the balancing resistor R6 is grounded.

[0044] The balancing resistor R6 is connected to the non-inverting input of the amplifier, forming a current path. This path allows current to flow from the power supply to the non-inverting input of the amplifier, thereby providing the necessary bias current for the amplifier; the balancing resistor R6 not only provides the necessary bias current for the amplifier, but also affects the common-mode rejection capability and input impedance of the amplifier.

[0045] In this embodiment, a capacitor C2 is connected in parallel to the common node between the sampling resistor R7 and the current limiting resistor R1, and a diode D1 is connected in parallel to the capacitor C2. One end of the diode D1 is grounded together with the output end of C2, and the other end of the diode D1 is connected to the common node between the sampling resistor R7 and the current limiting resistor R1.

[0046] Specifically, the E-PAD end of U1 chip 2 is connected in parallel with the GND end and is grounded together; the V5V end of U1 chip 2 is connected to capacitor C4, and the output end of capacitor C4 is grounded; the VCC end of U1 chip 2 is connected to a +24V power supply, and the +24V power supply is used to power U1 chip 2. At the same time, a capacitor C6 is connected in parallel on the +24V power supply side, and the other end of capacitor C6 is grounded. Capacitor C6 is used to filter out noise on the power line to ensure the smoothness and stability of the VCC voltage. U1 chip 2 preferably uses the EFM32TG11B320F128GM64-B chip of the EFM32TG11 series.

[0047] Specifically, the PWM signal output by MCU1 enters the PWM pin of the U1 core, and the 0-100% PWM signal is converted into different voltage values ​​through the PAC circuit inside the U1 core, thereby adjusting the output current to obtain the required mA value.

[0048] The above are only preferred embodiments of the present invention, and are not intended to limit the present invention in any form. Although the present invention has been disclosed as a preferred embodiment as above, it is not intended to limit the present invention. Any technical personnel in this field can make some changes or modify the technical contents disclosed above into equivalent embodiments without departing from the scope of the technical solution of the present invention. However, any brief modifications, equivalent changes and modifications made to the above embodiments based on the technical essence of the present invention without departing from the content of the technical solution of the present invention are still within the scope of the technical solution of the present invention.

Claims

1. A mA output circuit of a vortex flowmeter, comprising an MCU (1), wherein: The PWM_OUT pin of the MCU (1) outputs a PWM signal, and the output PWM signal is adjusted by a mA output circuit to obtain a required mA value, characterized in that: the mA output circuit comprises a U1 chip (2), the IOUT output end of the U1 chip (2) is connected to an amplifier circuit (3), the amplifier circuit (3) comprises a buffer amplifier circuit (31) and an instrument amplifier circuit (32), wherein the output end of the buffer amplifier circuit (31) is connected in series with a sampling resistor R7 and a current limiting resistor R1 in sequence, and the current limiting resistor R1 outputs MA_OUT to a load circuit (4); The input end of the instrument amplifier circuit (32) is connected to the output end of the buffer amplifier circuit (31); the instrument amplifier circuit (32) comprises amplifiers U2.1, U2.3 and a differential amplifier circuit (3); the output end of the differential amplifier circuit (3) is connected to the FB pin of the U1 chip (2); and the feedback voltage regulated by the instrument amplifier circuit (32) enters the U1 chip (2) through the output end of the differential amplifier circuit (3).

2. The mA output circuit of the vortex flowmeter according to claim 1, characterized in that: The buffer amplifier circuit (31) comprises an anti-interference resistor R2, a capacitor C1 and a power tube Q1; The IOUT output terminal of the U1 chip (2) is connected to the base of the power tube Q1, and the anti-interference resistor R2 is connected in parallel to a common node between the IOUT output terminal of the U1 chip (2) and the base of the power tube Q1, and the capacitor C1 is connected in parallel to the anti-interference resistor R2, the emitter of the power tube Q1 is connected in series with a sampling resistor R7 and a current limiting resistor R1 in sequence, the sampling resistor R7 is connected in parallel with a capacitor C5, and the collector of the power tube Q1 is connected to a power supply VCC.

3. The mA output circuit of the vortex flowmeter according to claim 2, characterized in that: The reverse end of the amplifier U2.1 is short-circuited with the output end to form a voltage follower circuit. The same-direction end of the amplifier U2.1 is connected to the common node between the sampling resistor R7 and the emitter of the power tube Q1, and the positive power supply end of the amplifier U2.1 is connected to a +24V voltage. The positive power supply end of the amplifier U2.1 is connected in parallel with a capacitor C3, and the other end of the capacitor C3 is grounded. The negative power supply end of the amplifier U2.1 is grounded; Among them, the reverse end of the amplifier U2.3 is short-circuited with the output end, and also forms a voltage follower circuit. The same-direction end of the amplifier U2.3 is connected to the common node between the sampling resistor R7 and the current limiting resistor R1, and the voltage value of the same-direction end of the follower circuit U2.1 and U2.3 is the same as the output end voltage.

4. The mA output circuit of the vortex flowmeter according to claim 3, characterized in that: The differential amplifier circuit (3) comprises an amplifier U2.2, an input resistor R3, an input resistor R5 and a balancing resistor R6; The input end of the input resistor R3 is connected to the output end of the follower circuit U2.1, the output end of the input resistor R3 is connected to the reverse end of the amplifier U2.2, the reverse end of the amplifier U2.2 and the output end of the amplifier U2.2 are connected in series with a feedback resistor R4, and the output end of the amplifier U2.2 is connected to the FB pin of the U1 chip (2); The input end of the input resistor R5 is connected to the output end of the follower circuit U2.3, and the output end of the input resistor R5 is connected to the same-direction end of the amplifier U2.

2. A balancing resistor R6 is connected in parallel between the same-direction end of the amplifier U2.2 and the input resistor R5, and the output end of the balancing resistor R6 is grounded.

5. The mA output circuit of the vortex flowmeter according to claim 3, characterized in that: A capacitor C2 is connected in parallel to the common node between the sampling resistor R7 and the current limiting resistor R1, and a diode D1 is connected in parallel to the capacitor C2. One end of the diode D1 and the output end of C2 are grounded together, and the other end of the diode D1 is connected to the common node between the sampling resistor R7 and the current limiting resistor R1.

6. The mA output circuit of the vortex flowmeter according to claim 1, characterized in that: The E-PAD terminal and the GND terminal of the U1 chip (2) are connected in parallel and are grounded together; The V5V terminal of the U1 chip (2) is connected to a capacitor C4, and the output terminal of the capacitor C4 is grounded; The VCC terminal of the U1 chip (2) is connected to a +24V power supply. Meanwhile, a capacitor C6 is connected in parallel to the +24V power supply side, and the other end of the capacitor C6 is grounded.

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