Double-GPU (Graphics Processing Unit) computing blade

Abstract

The utility model relates to the technical field of GPUs, in particular to a double-GPU computing blade. Comprising a GPU daughter card, a bridge sheet, a micro-control unit, a VPX connector and a clock buffer, each GPU daughter card is connected with the bridge sheet through the PCIex4, a display interface of the GPU daughter card is connected to the VPX connector, the GPU daughter card adopts a single GPU graphic display chip, the bridge sheet is connected with the VPX connector through the PCIex8 and is connected with the micro-control unit, the MCU is connected with the VPX connector through the intelligent platform management bus, and the clock buffer provides clock signals for the bridge sheet, the GPU daughter card and the VPX connector. Through the design of the double GPUs, higher frame rate, smoother image display and higher floating point calculation performance are obtained, and higher calculation speed is provided.

Description

Technical Field

[0001] The present application relates to the field of GPU technology, and more particularly to a dual-GPU computing blade. Background Art

[0002] At present, because GPU has obvious advantages over CPU in processing power and memory bandwidth, it does not need to pay too much price in cost and power consumption. Due to the high parallelism of graphics rendering, GPU can improve processing power and memory bandwidth by adding parallel processing units and memory control units. GPU designers use more transistors as execution units, instead of using them as complex control units and caches like CPUs to improve the execution efficiency of a small number of execution units.

[0003] At present, due to the compact structure of 6UVPX blade equipment, the layout space of electronic components is very tight. In order to save the layout space of components, the existing technology mainly uses XMC to expand the GPU on the motherboard. Its main defects are:

[0004] 1) The interface line sequence and form of this type of GPU computing daughter card are not universal. Different manufacturers have not formed a unified line sequence and daughter card appearance. When the expansion card is partially damaged, the original manufacturer needs to replace the entire card, which has high equipment maintenance costs;

[0005] 2) The floating-point computing performance and storage performance are poor. The expansion cards are generally customized and different requirements require the redevelopment of sub-cards, which has a long development cycle and high costs.

[0006] It should be noted that the information disclosed in the above background technology section is only used to enhance the understanding of the background of the present application, and therefore may include information that does not constitute the prior art known to ordinary technicians in the field. Utility Model Content

[0007] In order to provide a basic understanding of some aspects of the disclosed embodiments, a brief summary is given below. The summary is not an extensive review, nor is it intended to identify key / critical components or delineate the scope of protection of these embodiments, but rather serves as a prelude to the detailed description that follows.

[0008] The disclosed embodiments provide a dual-GPU computing blade to solve the technical problems of poor computing performance and low data processing efficiency.

[0009] In some embodiments, the method comprises: a GPU daughter card, a bridge chip, a micro control unit, a VPX connector, and a clock buffer; each GPU daughter card is connected to the bridge chip via PCIex4, a display interface of the GPU daughter card is connected to the VPX connector, the GPU daughter card adopts a single-chip GPU graphics display chip, the bridge chip is connected to the VPX connector via PCIex8, and is connected to the micro control unit, the micro control unit is connected to the VPX via an intelligent platform management bus, and the clock buffer provides clock signals to the bridge chip, the GPU daughter card, and the VPX connector.

[0010] Preferably, it also includes peripheral circuits, which provide power, clock, reset, and memory signal support for the GPU daughter card, bridge chip, micro control unit, and VPX connector.

[0011] Preferably, the GPU daughter card includes a GPU, a MAM connector, a power supply and a Flash module, the GPU is connected to the MXM connector via PCIex8, the power supply supplies power to the GPU via a power interface on the MXM connector, and the GPU is connected to the Flash module.

[0012] Preferably, the GPU subcard outputs 4 DVI / HDMI interfaces, 2 eDP interfaces, and 1 analog VGA interface, which are connected to the VPX connector via an MXM connector for expansion.

[0013] Preferably, the clock signal provided by the clock buffer is transmitted to the GPU via an MXM connector.

[0014] Preferably, the GPU is installed in a dual MXM format, and each GPU module uses one set of PCIE3.0x4.

[0015] The dual-GPU computing blade provided by the embodiments of the present disclosure can achieve the following technical effects:

[0016] 1) Provide higher computing performance: The dual-GPU design uses the standard PCIE3.0 bus as the bus protocol, which means that there are two independent graphics processing units on the graphics card, which can handle more graphics computing tasks at the same time. This enables the graphics card to provide higher graphics processing performance, thereby achieving higher frame rates and smoother image display as well as higher floating-point computing performance in data computing, graphics rendering and other graphics-intensive applications;

[0017] 2) Parallel processing and accelerated algorithms: The dual-GPU design can effectively take advantage of parallel processing and accelerate computing tasks. Many computing tasks can be processed faster by parallel processing, and computing tasks can be performed in parallel on two GPUs, providing faster computing speeds.

[0018] 3) Large-scale data processing: The dual-GPU design can provide larger memory capacity and higher memory bandwidth, enabling the graphics card to more effectively process and manage large-scale data, improving the efficiency and speed of data processing;

[0019] 4) High energy efficiency: The dual-GPU design can achieve higher energy efficiency by distributing the workload to two GPUs, providing more powerful computing performance while maintaining relatively low power consumption.

[0020] The above general description and the following description are exemplary and explanatory only and are not intended to limit the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] One or more embodiments are exemplarily described by corresponding drawings, which do not limit the embodiments. Elements with the same reference numerals in the drawings are shown as similar elements, and the drawings do not constitute a scale limitation, and wherein:

[0022] Figure 1 It is a schematic diagram of the overall structure of a dual-GPU computing blade;

[0023] Figure 2 This is a schematic diagram of the GPU daughter card structure of a dual-GPU computing blade. DETAILED DESCRIPTION

[0024] In order to be able to understand the features and technical contents of the embodiments of the present disclosure in more detail, the implementation of the embodiments of the present disclosure is described in detail below in conjunction with the accompanying drawings. The attached drawings are for reference only and are not used to limit the embodiments of the present disclosure. In the following technical description, for the convenience of explanation, a full understanding of the disclosed embodiments is provided through multiple details. However, one or more embodiments can still be implemented without these details. In other cases, to simplify the drawings, well-known structures and devices can be simplified for display.

[0025] The terms "first", "second", etc. in the specification and claims of the embodiments of the present disclosure and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the terms used in this way can be interchanged where appropriate, so as to describe the embodiments of the embodiments of the present disclosure described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions.

[0026] Combination Figure 1A dual-GPU computing blade includes a GPU daughter card, a bridge chip, a micro control unit, a VPX connector, and a clock buffer; each GPU daughter card is connected to the bridge chip through PCIex4, the display interface of the GPU daughter card is connected to the VPX connector, the GPU daughter card uses a single-chip GPU graphics display chip, the bridge chip is connected to the VPX connector through PCIex8, and is connected to the micro control unit, the micro control unit is connected to the VPX through an intelligent platform management bus to achieve timing control and monitoring of the entire board temperature, voltage, etc., and the clock buffer provides clock signals to the bridge chip, GPU daughter card, and VPX connector.

[0027] Optionally, the dual-GPU computing blade also includes peripheral circuits, which provide power, clock, reset, and memory signal support for the GPU daughter card, bridge chip, micro control unit, and VPX connector. The GPU daughter card includes a GPU, a MAM connector, a power supply, and a Flash module. The GPU is connected to the MXM connector via PCIex8, the power supply supplies power to the GPU via the power interface on the MXM connector, and the GPU is connected to the Flash module. The GPU daughter card outputs 4 DVI / HDMI interfaces, 2 eDP interfaces, and 1 analog VGA interface, which are connected to the VPX connector through the MXM connector for expansion. The clock signal provided by the clock buffer is transmitted to the GPU through the MXM connector. The GPU adopts a dual MXM installation form, and each GPU module uses 1 set of PCIE3.0x4.

[0028] It uses dual-GPU graphics display chips, which are connected to the bridge chip through a PCI Express (PCIe) high-speed interface, and can provide powerful graphics processing and parallel computing capabilities to meet the needs of tasks such as high-performance computing (HPC) and deep learning.

[0029] The GPU daughter card is connected to the VPX connector via an MXM connector, supporting the expansion of multiple display interfaces (such as DVI / HDMI, eDP, VGA), allowing the computing blade to flexibly adapt to different application scenarios and display requirements.

[0030] Through the connection between the microcontroller unit and the intelligent platform management bus (IPMB), real-time monitoring of the temperature and voltage of the entire board is achieved, which helps to maintain system stability and prevent overheating and other potential problems. In addition, this monitoring function also improves the maintainability and reliability of the system.

[0031] The GPU daughter card adopts modular design, which is easy to upgrade, replace and maintain. At the same time, the dual MXM installation method allows each GPU module to fully utilize the bandwidth of PCIE3.0x4, improving data transmission efficiency.

[0032] The clock buffer provides stable clock signals for the bridge chip, GPU daughter card and VPX connector, ensuring the stability and accuracy of system operation.

[0033] Peripheral circuits provide necessary power, clock, reset and memory signal support for each component to ensure the normal operation of the entire system.

[0034] Through compact design and highly integrated components, the computing blade provides powerful computing capabilities while maintaining a small size and weight, making it easy to deploy in environments such as servers and data centers.

[0035] It should be noted that the key to the dual-GPU computing blade is that the 6UVPX blade uses the PCIE3.0x8 interface to expand communication and the GPU is expanded through the bridge chip. This topology is used as the computing processing module of the computing motherboard. The GPU adopts a dual MXM installation form. Each GPU module uses a set of PCIE3.0x4, and the display interface is led out as a reserved interface. The dual-GPU form can significantly improve the computing power, pixels, video memory and other performance of the GPU computing blade.

[0036] It adopts the standard 6UVPX form, and the GPU adopts dual MXM daughter card form for PCB layout. The single GPU core frequency is 1.5GHz, the computing power is not less than 1.5TFLOPS, the maximum storage capacity supported can reach 8GB, and the power consumption is no more than 30W.

[0037] Finally, it should be noted that the above is only a preferred embodiment of the present disclosure and is not intended to limit the present disclosure. Although the present disclosure is described in detail with reference to the aforementioned embodiments, those skilled in the art can still modify the technical solutions described in the aforementioned embodiments or replace some of the technical features therein by equivalents. Any modification, equivalent replacement, improvement, etc. made within the spirit and principles of the present disclosure shall be included in the protection scope of the present disclosure.

Claims

1. A dual-GPU computing blade, characterized in that: include: GPU daughter cards, bridge chips, microcontroller units, VPX connectors, clock buffers; Each GPU subcard is connected to the bridge chip via PCIex4, the display interface of the GPU subcard is connected to the VPX connector, the GPU subcard uses a single-chip GPU graphics display chip, the bridge chip is connected to the VPX connector via PCIex8, and is connected to a microcontroller unit, the microcontroller unit is connected to the VPX via an intelligent platform management bus, and the clock buffer provides clock signals to the bridge chip, GPU subcard and VPX connector.

2. The dual-GPU computing blade according to claim 1, characterized in that: It also includes peripheral circuits, which provide power, clock, reset, and memory signal support for the GPU daughter card, bridge chip, micro control unit, and VPX connector.

3. The dual-GPU computing blade according to claim 1, characterized in that: The GPU daughter card includes a GPU, a MAM connector, a power supply and a Flash module. The GPU is connected to the MXM connector via PCIex8, the power supply supplies power to the GPU via the power interface on the MXM connector, and the GPU is connected to the Flash module.

4. The dual-GPU computing blade according to claim 3, characterized in that: The GPU daughter card outputs 4 DVI / HDMI interfaces, 2 eDP interfaces, and 1 analog VGA interface, and is connected to the VPX connector through the MXM connector for expansion.

5. The dual-GPU computing blade according to claim 3, wherein: The clock signal provided by the clock buffer is transmitted to the GPU through the MXM connector.

6. The dual-GPU computing blade according to claim 1, characterized in that: The GPU adopts a dual MXM installation form, and each GPU module uses 1 set of PCIE3.0x4.

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