Display panel and display device

Abstract

The present application discloses a display panel and a display device with better image display effect. The display panel includes a display area and a non-display area arranged adjacent to each other, the display area includes a plurality of pixel units for performing image display, and the non-display area includes a first routing area and a second routing area adjacent to the two adjacent sides of the display area. The first routing area includes a plurality of data signal lines and a plurality of control signal lines, and some of the data signal lines and some of the control signal lines extend from the first routing area to the second routing area, wherein the data signal lines are used to connect the pixel units and transmit data signals to the pixel units, and the control signal lines are used to provide alternating electrical signals. A shielding line is included between the data signal lines and the control signals in the second routing area.

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to a display panel and a display device. Background Art

[0002] The display panel includes a pixel array of multiple pixel units, and scan lines and data lines connected to the corresponding pixel units. The driving circuit includes a scan driving circuit and a data driving circuit. The scan driving circuit provides a scan signal to the corresponding pixel unit through the scan line to select the pixel unit of a certain row, and the data driving circuit provides a data signal to the corresponding pixel unit through the data line, so that the selected pixel unit displays according to the data signal, so that the display panel can display the picture.

[0003] In the display panel, the display panel may include a display area and a non-display area. The display area is provided with a data line that can control the pixel unit to display the picture. The non-display area is provided with a driving circuit and a fan-out lead electrically connected thereto. Each fan-out lead can provide a data signal for displaying the above data line. In addition to the fan-out lead, other signal lines are also provided in the non-display area of ​​the display panel. The pulse signals transmitted by other signal lines will be coupled to the source line, affecting the display effect of the display panel. Utility Model Content

[0004] In view of the above-mentioned deficiencies in the prior art, the present application proposes a display panel and a display device with better image display effect.

[0005] The present application provides a display panel, comprising a display area and a non-display area arranged adjacent to each other, wherein the display area comprises a plurality of pixel units for performing image display, and the non-display area comprises a first routing area and a second routing area respectively adjacent to the two adjacent sides of the display area. The first routing area comprises a plurality of data signal lines and a plurality of control signal lines, and part of the data signal lines and part of the control signal lines extend from the first routing area to the second routing area, wherein the data signal lines are used to connect the pixel units and transmit data signals to the pixel units, and the pixel units perform image display according to the data signals, and the control signal lines are used to provide alternating electrical signals. In the second routing area, a shielding line is included between the data signal line and the control signal line.

[0006] In one embodiment of the present application, the first routing area also includes a multi-way selection circuit, which connects the multiple data signal lines and the multiple control signal lines. The multi-way selection circuit is used to receive data signals and select control signals. Under the control of the selection control signal, the multi-way selection circuit transmits the data signals to the multiple data signal lines in sequence and loads them to the multiple pixel units. Under the control of the selection control signal, the multi-way selection circuit also outputs control signals to the control signal lines, and controls the pixel units to perform image display through the control signal lines.

[0007] In one embodiment of the present application, the display area includes multiple data lines connected to the pixel units, and the data lines are respectively connected to some data signal lines in the first routing area for receiving the data signals from the data line signal lines, wherein the multiple data lines include at least one faulty data line, and the faulty data line includes a fault breakpoint, a first sub-fault line, and a second sub-fault line, the first sub-fault line and the second sub-fault line are disconnected from the fault breakpoint, the first sub-fault line is directly connected to the data signal line of the first routing area, and the second sub-fault line is connected to the multi-way selection circuit through the data signal line of the second routing area.

[0008] In one embodiment of the present application, the plurality of data lines include two faulty data lines, the second routing area includes two data signal lines respectively connected to the second sub-faulty line, and the two data signal lines in the second routing area are spaced a preset distance apart and parallel to each other.

[0009] In one embodiment of the present application, the plurality of data lines include two faulty data lines, the second routing area includes two data signal lines respectively connected to the second sub-faulty lines, and the two data signal lines in the second routing area are separated by a preset distance and include at least one intersection.

[0010] In one embodiment of the present application, the two data signal lines in the second routing area corresponding to the connection of the two faulty data lines include a first data signal line and a second data signal line. The first data signal line includes a first line segment, a second line segment and a third line segment, wherein the first line segment and the third line segment are spaced apart by the preset distance and arranged in parallel, and the second line segment connects the first line segment and the third line segment along a preset angle, respectively. The second data signal line includes a fourth line segment, a fifth line segment and a sixth line segment, wherein the fourth line segment and the sixth line segment are spaced apart by the preset distance and arranged in parallel, and the fifth line segment connects the fourth line segment and the sixth line segment along a preset angle, respectively. The first line segment is directly opposite to the fourth line segment and is spaced apart by a preset distance and arranged in parallel, the third line segment is directly opposite to the sixth line segment and is spaced apart by a preset distance and arranged in parallel, and the second line segment intersects with the fifth line segment at the intersection.

[0011] In an embodiment of the present application, the two adjacent data signal lines in the second routing area are spaced apart by the preset distance and include a plurality of intersections.

[0012] In one embodiment of the present application, the display panel includes two second wiring areas arranged on opposite sides of the display area;

[0013] Each first sub-fault line is connected to two data signal lines and the multi-way selection circuit in two oppositely arranged second wiring areas through a connecting line.

[0014] In one embodiment of the present application, the shielded wire is used to transmit a DC signal with a fixed potential.

[0015] In a second aspect, the present application further provides a display device, comprising a frame and the aforementioned display panel, wherein the frame is used to fix the display panel.

[0016] Compared with the problems in the prior art, in the embodiments of the present application, a shielding line for transmitting a DC signal with a fixed potential is arranged between the data signal line and the control signal line in the second wiring area, so that the coupling effect of the alternating signal in the control signal line on the data signal transmitted in the data signal line can be effectively reduced, that is, the coupling effect of the alternating electrical signal that jumps in the control signal line, such as the clock signal, on the data signal can be shielded, and the potential in the data signal is prevented from being pulled up or down due to the coupling effect, that is, the data signal transmitted in the data signal line is prevented from mutating, thereby ensuring the stability and accuracy of the data signal, effectively reducing or eliminating the display abnormality of the pixel unit connected to the data signal line, and thereby improving the display quality of the display panel.

[0017] Furthermore, in the embodiment of the present application, by setting at least one intersection point between adjacent data signal lines and adjusting the distance between the data signal line and the shielding line, the coupling effects on each line segment of each data signal line are basically balanced in terms of increasing capacitance and reducing capacitance, respectively, so that the coupling effects on each data signal line are basically the same, thereby ensuring that the data signals transmitted on each data signal line are basically consistent, further ensuring the stability and accuracy of data signal transmission. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the embodiments will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present application. For ordinary technicians, other drawings can be obtained based on these drawings without paying any creative work.

[0019] Figure 1A schematic diagram of a planar structure of a display device provided in one embodiment of the present application;

[0020] Figure 2 In the first embodiment of this application, Figure 1 A schematic diagram of the plan layout of the display panel is shown;

[0021] Figure 3 for Figure 2 Schematic diagram of the waveform of the signal transmitted by the control signal line, data signal line and shielding line;

[0022] Figure 4 In the second embodiment of the present application, Figure 1 A schematic diagram of the plan layout of the display panel;

[0023] Figure 5 For Figure 4 An enlarged schematic diagram of the dashed line IV region is shown;

[0024] Figure 6 For the third embodiment of the application Figure 4 An enlarged schematic diagram of the dashed line IV region is shown.

[0025] Reference numerals:

[0026] Display device-100, display panel-10, frame-50, display area-AA, non-display area-NA, data line-S, pixel unit-P, timing control circuit-11, data driving circuit-12, scan driving circuit-13, first direction-F1, second direction-F2, faulty data line-SF, first faulty data line-SF1, first sub-fault line-sf1, second sub-fault line-sf2, first fault point-SC1, second faulty data line-SF2, third sub-fault line-sf3, fourth sub-fault line-sf4 , second fault point-SC2, data signal-Data, fan-out area-FA, first routing area-NW1, second routing area-NW2, data signal line-LS, control signal line-LC, shielding line-SW, multi-way selection circuit-MU, multi-way switch line-LM, first data signal line-LS1, second data signal line-LS2, intersection-O, first line segment-L11, second line segment-L12, third line segment-L13, fourth line segment-L24, fifth line segment-L25, sixth line segment-L26, preset distance-D1. DETAILED DESCRIPTION

[0027] In order to facilitate the understanding of the present application, the present application will be described more fully below with reference to the relevant drawings. The preferred embodiments of the present application are given in the drawings. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the disclosure of the present application more thoroughly and comprehensively understood.

[0028] The following descriptions of the embodiments are with reference to the attached diagrams to illustrate specific embodiments that the present application can be used to implement. The serial numbers for the components herein, such as "first", "second", etc., are only used to distinguish the objects described and do not have any order or technical meaning. The "connection" and "coupling" mentioned in the present application, unless otherwise specified, include direct and indirect connections (couplings). The directional terms mentioned in the present application, such as "upper", "lower", "front", "back", "left", "right", "inside", "outside", "side", etc., are only with reference to the directions of the attached drawings. Therefore, the directional terms used are for better and clearer explanation and understanding of the present application, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation to the present application.

[0029] In the description of the present application, it should be noted that, unless otherwise clearly specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection; it can be directly connected, or indirectly connected through an intermediate medium, or it can be internal communication between two components. For ordinary technicians in this field, the specific meanings of the above terms in this application can be understood according to specific circumstances. It should be noted that the terms "first", "second", etc. in the specification, claims, and drawings of the present application are used to distinguish different objects, rather than to describe a specific order.

[0030] In addition, the terms "include", "may include", "contain", or "may include" used in the present application indicate the existence of the corresponding functions, operations, elements, etc. disclosed, and do not limit one or more other functions, operations, elements, etc. In addition, the terms "include" or "contain" indicate the existence of the corresponding features, numbers, steps, operations, elements, components, or combinations thereof disclosed in the specification, and do not exclude the existence or addition of one or more other features, numbers, steps, operations, elements, components, or combinations thereof, and are intended to cover non-exclusive inclusions. In addition, when describing the embodiments of the present application, "may" is used to indicate "one or more embodiments of the present application". And, the term "exemplary" is intended to refer to an example or illustration.

[0031] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which this application belongs. The terms used herein in the specification of this application are only for the purpose of describing specific embodiments and are not intended to limit this application.

[0032] See also Figure 1 , Figure 1This is a schematic diagram of the planar structure of a display device provided in one embodiment of the present application. Figure 1 As shown, the display device 100 includes a display panel 10 and a frame 50. The display panel 10 is fixed to the frame 50, and the frame 50 provides fixation and protection for the display panel 10. In other embodiments of the present application, the display device 100 can be a display, a mobile phone, a tablet computer, etc.

[0033] See also Figure 2 , Figure 2 In the first embodiment of this application, Figure 1 The schematic diagram of the planar layout of the display panel is shown in FIG. Figure 2 As shown, the display panel 10 includes a display area AA and a non-display area NA that are adjacently arranged, wherein the display area AA is provided with a plurality of scan lines (not shown) extending along a first direction F1 and sequentially arranged along a second direction F2, a plurality of data lines S extending along the second direction F2 and sequentially arranged along the first direction F1, and a plurality of pixel units P arranged in an array, the pixel units P are used to receive scan signals from the scan lines and receive data signals from the data lines S under the control of the scan signals to display images. In this embodiment, the data lines S are at least partially located in the display area AA, and also extend from the display area AA to the non-display area NA.

[0034] The non-display area NA is at least partially arranged around the display area AA, and a timing control circuit 11, a data driving circuit 12, a multiplexer circuit MU and a scan driving circuit 13 are arranged in the non-display area NA. The timing control circuit 11 receives an image signal representing image information, a horizontal synchronization signal and a vertical synchronization signal from an external signal source, and outputs a clock signal for controlling the scan driving circuit 13, a scan control signal, and a data control signal for controlling the data driving circuit 12.

[0035] In this embodiment, the scan driving circuit 13 can be directly formed in the non-display area NA in a corresponding process by using the same process as the pixel unit P through the GOA technology. The timing control circuit 11, the data driving circuit 12 and the multiplexer circuit MU can be arranged on a circuit board and connected to the data line S by means of signal routing.

[0036] In this embodiment, the non-display area NA includes a first wiring area NW1 and a second wiring area NW2 respectively located on two adjacent sides of the display area AA, and the corresponding first wiring area NW1 includes a fan-out area FA, and the multi-way selection circuit MU is arranged adjacent to the display area AA, and the fan-out area FA is located on the side of the multi-way selection circuit MU away from the display area AA, that is, the multi-way selection circuit MU and the fan-out area FA are arranged in sequence from the position adjacent to the display area AA in the direction away from the display area. In this embodiment, the display panel 10 includes two second wiring areas NW2, and the two second wiring areas NW2 are located on opposite sides of the display area AA, and the first wiring area NW1 is located between the two second wiring areas NW2.

[0037] The fan-out area FA is provided with a plurality of signal lines to connect the data driving circuit 12 with the multi-way selection circuit MU, and the multi-way selection circuit MU is connected to the display area AA through a plurality of multi-way switch signal lines LM. In this embodiment, the data driving circuit 12 is also correspondingly provided at one side of the fan-out area FA in the first wiring area NW1, and is used to output a data signal (Data) to the pixel unit P in the display area AA according to the data control signal.

[0038] In this embodiment, the multi-way switch signal line LM includes a data signal line LS and a control signal line LC, wherein the data signal line LS is used to connect the data line S, and receives the data signal from the data driving circuit 12 and transmits it to the pixel unit P through the data line S, and the control signal line LC is used to transmit control signals, such as clock signals and selection control signals. In this embodiment, the control signal line LC extends from the first wiring area NW1 to the second wiring area NW2, and is connected to the display area AA along the first direction F1. At the same time, part of the data signal line LS also extends from the first wiring area NW1 to the second wiring area NW2.

[0039] The multi-way selection circuit MU is connected to the data driving circuit 12 and the timing control circuit 11, and is used to receive the data signal Data and the selection control signal (not shown). Under the control of the selection control signal, the multi-way selection circuit MU sequentially transmits the data signal Data to the plurality of data signal lines LS and loads them to the corresponding plurality of pixel units P. Under the control of the selection control signal, the multi-way selection circuit MU also outputs a control signal to the control signal line LC, and controls the pixel unit to perform image display through the control signal line.

[0040] In this embodiment, the multi-way selection circuit MU can be a multi-way demultiplexer (Demux). The setting of the multi-way selection circuit MU can reduce the number of fan-out lines of the signal line L, thereby reducing the width of the signal line L along the fan-out area FA in the first direction F1, and then the size of the non-display area NA can be compressed as a whole, which is conducive to realizing a narrow frame design.

[0041] In the present embodiment, during the manufacturing process of the display panel 10, the data line S is usually disconnected. For example, the plurality of data lines S include a faulty data line SF, and the faulty data line SF includes a first endpoint A, a second endpoint B, and a first fault point SC1, wherein i is an integer greater than or equal to 1, the data line between the first endpoint A and the first fault point SC1 is a first sub-fault line sf1, and the data line between the second endpoint B and the first fault point SC1 is a second sub-fault line sf2. The first sub-fault line sf1 is far away from the data driving circuit 12 and is electrically disconnected from the data driving circuit 12, and the second sub-fault line sf2 is connected to the data driving circuit 12 via the second endpoint B. Since the second sub-fault line sf2 is connected to the data driving circuit 12, it can still receive a data signal from the data driving circuit 12, and the first sub-fault line sf1 cannot receive a data signal from the data driving circuit 12 because it is disconnected from the data driving circuit 12.

[0042] In this embodiment, the plurality of data lines S include two faulty data lines SF, and the two faulty data lines can be defined as a first faulty data line SF1 and a second faulty data line SF2, respectively, wherein the first faulty data line SF1 includes a first sub-faulty line sf1, a second sub-faulty line sf2, and a first fault point SC1, and correspondingly, the second faulty data line SF2 includes a third sub-faulty line sf3, a fourth sub-faulty line sf3, and a second fault point SC2. It can be understood that in this embodiment, for the faulty data line S, the faulty data line SF of the display panel 10 is connected to the data driving circuit 12 from two opposite directions via two data signal lines LS.

[0043] Thus, correspondingly, each second wiring area NW2 includes two data signal lines LS connecting the first fault data line SF1 and the second fault data line SF, and the two data signal lines LS are parallel to each other and have no intersection. For example, for the first fault data line SF1, the first sub-fault line sf1 connects the two data signal lines LS in the two opposite second wiring areas NW2 through the connecting lines (not shown) extending from the left and right opposite directions in the first direction F1, and then respectively connects to the multi-way selection circuit MU and the data driving circuit 12. Similarly, for the second fault data line SF2, the third sub-fault line sf3 connects the two data signal lines LS in the two opposite second wiring areas NW2 through the connecting lines (not shown) extending from the left and right opposite directions in the first direction F1, and then respectively connects to the multi-way selection circuit MU and the data driving circuit 12.

[0044] The second sub-fault line sf2 and the fourth sub-fault line sf4 adjacent to the second endpoint B still directly receive data signals from the data driving circuit 12. The data signal is transmitted to the first sub-fault line sf1 and the third sub-fault line sf3 through the data signal line LS, thereby realizing the repair of the faulty data line. It can be understood that the scan driving circuit 13 receives the timing control circuit 11 for outputting the scan signal to the pixel unit P in the display area AA according to the scan control signal. In this embodiment, the data driving circuit 12 can be formed on the display panel 10 by using a chip on film (COF) process, and then connected to the multi-way selection circuit MU through a plurality of signal lines L, and then connected to a plurality of data lines S through the multi-way selection circuit MU, and then the data signal is transmitted to each pixel unit P.

[0045] More specifically, Figure 2 As shown, the second wiring area NW1 includes a plurality of control signal lines LC, two data repair lines 15 and a shielding line SW. The shielding line SW is located between the control signal line LC and the data signal line LS to prevent interference between the control signal line LC and the data signal line LS when transmitting signals.

[0046] In this embodiment, the spacing distance Dw between the shielding line SW and the adjacent control signal line LC and the data repair line 15 is greater than 20 micrometers (μm).

[0047] Specifically, please combine Figure 2-Figure 3 ,in Figure 3 The waveform diagram of the signal transmitted by the control signal line LC, the data signal line LS and the shielding line SW is shown in FIG. Data0 is a waveform diagram of the data signal when the shielding line SW is not loaded with a DC signal of a fixed potential; Data0 is a waveform diagram of the data signal when the shielding line SW is loaded with a DC signal of a fixed potential; LC1 / LC2 are waveform diagrams of the alternating signal loaded on the control signal line; SW is a waveform diagram of the DC signal loaded with a fixed potential on the shielding line SW.

[0048] In this embodiment, the data signal line LS is used to transmit the data signal Data, the control signal line LC is used to transmit the clock signal (CK) or a pulse signal with a potential change, and the shielding line SW is used to transmit a DC signal with a fixed potential. Among them, the shielding line SW can be connected to a power supply circuit (not shown) to receive a DC signal with a potential fixed to a predetermined value or fixed to a preset range to ensure the stability of the transmission signal on the shielding line SW. In this embodiment, the shielding line SW can be connected to the high potential power supply terminal VGH, the high potential power supply terminal VGL, the common voltage terminal VCOM, etc. The specific connection method can be determined according to the type of the display device 100 itself, and it is only necessary to ensure that the electrical signal transmitted by the shielding line SW is fixed to a preset potential and does not alternate.

[0049] like Figure 3 As shown, the shielding line SW can obviously shield the coupling of the control signal line LC that transmits the electrical signal with periodic jumps (alternating changes) of high and low potentials to the data signal line LS, so that the data signal line LS can transmit the signal of the data line S in the display area AA with better stability, and prevent the data signal Data from being deformed due to the coupling effect of the signal in the control signal line LC. In other words, the shielding line SW can control the coupling effect brought by the high and low potential alternating signal transmitted by the signal line LC, and avoid the coupling from pulling up or down the potential of the data signal line LS and causing changes, thereby effectively reducing or eliminating the abnormality of the data signal Data received by the pixel unit P in the display area AA corresponding to the connection of the part of the data signal line LS. In this embodiment, the accuracy of the data signal received by the faulty data line SF can be effectively improved, thereby improving the accuracy of the image display of the display panel 10.

[0050] In other embodiments of the present application, when the control signal line LC is used as a transmission clock signal CK, it can be directly connected between the timing control circuit 11 and the scan driving circuit 13 without being extended through the multi-way switch circuit MU.

[0051] See also Figure 4 , Figure 4 In the second embodiment of the present application, Figure 1 Schematic diagram of the planar layout of the display panel. In this embodiment, Figure 4 The display panel 20 shown is Figure 2 The display panels 10 shown are substantially the same, except that Figure 4 The data signal lines LS are laid out in the second wiring area NW2, wherein two data signal lines LS have at least one intersection.

[0052] In this embodiment, a second wiring area NW2 includes two data signal lines LS, which can be defined as a first data signal line LS1 and a second data signal line LS2 respectively. The first data signal line LS1 and the second data signal line LS2 include an intersection O.

[0053] Specifically, see Figure 5 , which is as follows Figure 4 As shown in the enlarged schematic diagram of the dotted line IV area, the first data signal line LS1 includes a first line segment L11, a second line segment L12 and a third line segment L13, wherein the first line segment L11 and the third line segment L13 are spaced apart by a preset distance D1 and are arranged in parallel, and the second line segment L12 connects the first line segment L11 and the third line segment L13 along a preset angle.

[0054] The second data signal line LS2 includes a fourth line segment L24, a fifth line segment L25 and a sixth line segment L26, wherein the fourth line segment L24 and the sixth line segment L26 are spaced apart by a preset distance and arranged in parallel, and the fifth line segment L25 connects the fourth line segment L24 and the sixth line segment L26 along a preset angle.

[0055] The first line segment L11 and the fourth line segment L24 are opposite to each other and are spaced apart by a preset distance D1 and are arranged in parallel. The third line segment L13 and the sixth line segment L26 are opposite to each other and are spaced apart by a preset distance D1 and are arranged in parallel. The second line segment L12 and the fifth line segment L25 intersect at the intersection O.

[0056] In this embodiment, the first data signal line LS1 and the second data signal line LS2 exchange positions at the intersection O so that the distances between the first data signal line LS1 and the second data signal line LS2 and the shielding line SW are basically the same, so that the coupling effects generated by the first data signal line LS1 and the second data signal line LS2 and the shielding line SW are the same, for example, the capacitance generated by the coupling of the first data signal line LS1 and the second data signal line LS2 and the shielding line SW is the same.

[0057] Therefore, along the extension direction of the two data lines LS, the first data signal line LS1 and the second data signal line LS2, the coupling influences on each line segment of each data signal line LS are respectively increased capacitance and reduced capacitance, thereby effectively reducing the coupling influences on each data signal line LS to be basically the same, thereby ensuring that the data signals transmitted on each data signal line LS are basically consistent.

[0058] See also Figure 6 , Figure 6 In the third embodiment of the present application, Figure 4 The enlarged schematic diagram of the dotted line IV area is shown. In this embodiment, Figure 6 The display panel 30 is shown with Figure 5 The display panels 20 shown are substantially the same, except that Figure 6 The data signal lines LS are laid out in the second wiring area NW2, wherein two data signal lines LS have a plurality of intersections.

[0059] In this embodiment, a second wiring area NW2 includes two data signal lines LS, which can be defined as a first data signal line LS1 and a second data signal line LS2 respectively. The first data signal line LS1 and the second data signal line LS2 include two intersections O.

[0060] Specifically, the first data signal line LS1 includes two second line segments L12 and two third line segments L13, wherein the first line segment L11 and the third line segment L13 are spaced apart by a preset distance D1 and arranged in parallel, and the second line segment L12 connects the first line segment L11 and the third line segment L13 along a preset angle.

[0061] The second data signal line LS2 includes two fifth line segments L25 and two sixth line segments L26, wherein the fourth line segment L24 and the sixth line segment L26 are spaced apart by a preset distance and arranged in parallel, and the fifth line segment L25 connects the fourth line segment L24 and the sixth line segment L26 along a preset angle.

[0062] The first line segment L11 and the fourth line segment L24 are opposite to each other and are spaced apart by a preset distance D1 and are arranged in parallel. The third line segment L13 and the sixth line segment L26 are opposite to each other and are spaced apart by a preset distance D1 and are arranged in parallel. The second line segment L12 and the fifth line segment L25 intersect at two intersection points O at different positions.

[0063] In this embodiment, the first data signal line LS1 and the second data signal line LS2 exchange positions at multiple intersections O so that the distances between the first data signal line LS1 and the second data signal line LS2 and the shielding line SW are basically the same, so that the coupling effects between the first data signal line LS1 and the second data signal line LS2 and the shielding line SW are the same, for example, the capacitance generated by the coupling between the first data signal line LS1 and the second data signal line LS2 and the shielding line SW is the same.

[0064] Therefore, along the extension direction of the two data lines LS, the first data signal line LS1 and the second data signal line LS2, the coupling influences on each line segment of each data signal line LS are respectively increased capacitance and reduced capacitance, thereby effectively reducing the coupling influences on each data signal line LS to be basically the same, thereby ensuring that the data signals transmitted on each data signal line LS are basically consistent.

[0065] Compared with the prior art, in the embodiment of the present application, by setting a shielding line SW for transmitting a DC signal with a fixed potential between the data signal line LS and the control signal line LS in the second wiring area NW2, the coupling effect of the alternating signal in the control signal line LS on the data signal Data transmitted in the data signal line LS can be effectively reduced, that is, the coupling effect of the alternating electrical signal that jumps in the control signal line LS, such as the clock signal, on the data signal Data can be shielded, and the potential in the data signal Data is prevented from being pulled up or down due to the coupling effect, that is, the data signal Data transmitted in the data signal line LS is prevented from mutating, thereby ensuring the stability and accuracy of the data signal Data, effectively reducing or eliminating the display abnormality of the pixel unit connected to the data signal line LS, and thereby improving the display quality of the display panel 10 to the display panel 30.

[0066] Furthermore, by setting at least one intersection point between adjacent data signal lines LS and adjusting the distance between the data signal line LS and the shielding line SW, the coupling effects on each line segment of each data signal line LS are basically balanced in terms of increasing capacitance and reducing capacitance, thereby making the coupling effects on each data signal line LS basically the same, ensuring that the data signals transmitted on each data signal line LS are basically consistent, and further ensuring the stability and accuracy of the data signal Data during transmission.

[0067] It should be understood that the application of the present application is not limited to the above examples. For ordinary technicians in this field, improvements or changes can be made according to the above description, and all these improvements and changes should fall within the scope of protection of the present application.

Claims

1. A display panel, characterized in that: It includes a display area and a non-display area which are adjacent to each other, wherein the display area includes a plurality of pixel units for performing image display, and the non-display area includes a first wiring area and a second wiring area which are adjacent to two adjacent sides of the display area respectively; The first wiring area includes a plurality of data signal lines and a plurality of control signal lines, and some of the data signal lines and some of the control signal lines extend from the first wiring area to the second wiring area, wherein the data signal lines are used to connect the pixel units and transmit data signals to the pixel units, and the pixel units perform image display according to the data signals, and the control signal lines are used to provide alternating electrical signals; In the second wiring area, a shielding line is included between the data signal line and the control signal line.

2. The display panel according to claim 1, wherein: The first routing area also includes a multi-way selection circuit, which connects the multiple data signal lines and the multiple control signal lines. The multi-way selection circuit is used to receive data signals and select control signals. Under the control of the selection control signal, the multi-way selection circuit transmits the data signals to the multiple data signal lines in sequence and loads them to the multiple pixel units. Under the control of the selection control signal, the multi-way selection circuit also outputs control signals to the control signal lines, and controls the pixel units to perform image display through the control signal lines.

3. The display panel according to claim 2, wherein: The display area includes a plurality of data lines connected to the pixel units, and the data lines are respectively connected to some data signal lines in the first routing area for receiving the data signals from the data line signal lines, wherein the plurality of data lines include at least one faulty data line, and the faulty data line includes a faulty breakpoint, a first sub-fault line, and a second sub-fault line, the first sub-fault line and the second sub-fault line are disconnected from the faulty breakpoint, the first sub-fault line is directly connected to the data signal line of the first routing area, and the second sub-fault line is connected to the multi-way selection circuit via the data signal line of the second routing area.

4. The display panel according to claim 3, wherein: The plurality of data lines include two faulty data lines, the second routing area includes two data signal lines respectively connected to the second sub-faulty line, and the two data signal lines in the second routing area are spaced apart by a preset distance and are parallel to each other.

5. The display panel according to claim 3, wherein: The plurality of data lines include two faulty data lines, the second routing area includes two data signal lines respectively connected to the second sub-faulty lines, and the two data signal lines in the second routing area are spaced a preset distance apart and include at least one intersection.

6. The display panel according to claim 5, wherein: The two data signal lines in the second routing area corresponding to the two faulty data lines include a first data signal line and a second data signal line; The first data signal line includes a first line segment, a second line segment and a third line segment, wherein the first line segment and the third line segment are spaced apart by a preset distance and are arranged in parallel, and the second line segment connects the first line segment and the third line segment along a preset angle respectively; The second data signal line includes a fourth line segment, a fifth line segment and a sixth line segment, wherein the fourth line segment and the sixth line segment are spaced apart by the preset distance and are arranged in parallel, and the fifth line segment connects the fourth line segment and the sixth line segment along a preset angle respectively; The first line segment and the fourth line segment are opposite to each other and are spaced apart by a preset distance and are arranged in parallel; the third line segment and the sixth line segment are opposite to each other and are spaced apart by a preset distance and are arranged in parallel; and the second line segment and the fifth line segment intersect at the intersection.

7. The display panel according to claim 6, wherein: The two adjacent data signal lines in the second wiring area are spaced apart by the preset distance and include a plurality of intersections.

8. The display panel according to any one of claims 3 to 7, characterized in that: The display panel comprises two second wiring areas arranged at opposite sides of the display area; Each first sub-fault line is connected to two data signal lines and the multi-way selection circuit in two oppositely arranged second wiring areas through a connecting line.

9. The display panel according to any one of claims 1 to 7, characterized in that: The shielded wire is used to transmit a DC signal with a fixed potential.

10. A display device, characterized in that: A display panel comprising a frame as described in any one of claims 1 to 9, wherein the frame is used to fix the display panel.

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