Packaging structure and semiconductor device
By setting up an exposed base island at the bottom of the plastic seal body and opening a plastic seal groove, the problems of insufficient heat dissipation performance and insufficient creepage distance of multi-chip packaging are solved, and higher device service life and performance are achieved, while ensuring reliability.
Patent Information
- Application Number
- CN202421246466.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-06-03
- Publication Date
- 2025-04-08
- Estimated Expiration
- 2034-06-03
AI Technical Summary
The thermal dissipation performance of existing multi-chip packages is insufficient, resulting in limited device service life and performance. The reduction in creepage distance caused by increased pin width can easily lead to pin breakdown and cannot meet the reliability requirements.
An exposed base island is set at the bottom of the plastic seal body, and a plastic seal groove is opened between the exposed base islands to ensure sufficient creepage distance and improve the heat dissipation effect of the packaging structure.
By increasing creepage distance and improving heat dissipation, the service life and performance of the device are improved while meeting the reliability requirements.
Smart Images
Figure CN222734977U_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of semiconductor technology, and in particular to a packaging structure and a semiconductor device. Background Art
[0002] In recent years, with the rapid development of integrated circuit (IC) design and manufacturing industries, packaging technology has also been greatly improved. Packaging is an important part of the entire integrated circuit manufacturing process, which has heat dissipation and protection functions. The packaging process can seal the chip to isolate it from external pollution and damage to the chip by external forces. With the advancement of technology, packaging multiple chips in one package has become the direction of technological development. At present, one of the problems with multi-chip packaging is poor heat dissipation performance, which restricts the better promotion and application of the product.
[0003] In some packages, the width of the pins is increased for heat dissipation. However, as the pin width increases, the creepage distance between the pins decreases, especially between pins with large differences in high and low voltages. The reduced creepage distance will easily lead to pin breakdown, which cannot meet reliability requirements. Utility Model Content
[0004] The purpose of the present application is to provide a packaging structure and a semiconductor device, in which an exposed base island is arranged at the bottom of the plastic package body, and a plastic package groove is opened between the exposed base islands, so as to ensure sufficient creepage distance while improving the heat dissipation effect of the packaging structure, thereby improving the service life and performance of the device.
[0005] In a first aspect, the present application provides a packaging structure, which includes: a plastic package body; a plurality of pins located on opposite sides of the plastic package body; a plurality of exposed base islands arranged at the bottom of the plastic package body, the exposed base islands being used for mounting chips; and a first plastic package groove arranged at the bottom of the plastic package body between two adjacent exposed base islands.
[0006] Furthermore, the plurality of exposed base islands include a first exposed base island and a second exposed base island; the first exposed base island and the second exposed base island are used for mounting a power upper tube chip or a power lower tube chip, respectively.
[0007] Furthermore, the pins on one side of the plastic package body include multiple first type pins and one target second type pin; the pins on the other side of the plastic package body include multiple second type pins; and the width of the first type pins is greater than that of the second type pins.
[0008] Furthermore, the above-mentioned packaging structure further includes: a second plastic packaging groove, which is opened at the bottom of the plastic packaging body between the exposed base island and the at least one second type pin.
[0009] Furthermore, the above-mentioned packaging structure further includes: a third plastic packaging groove, and the third plastic packaging groove is opened on the side wall of the plastic packaging body between the first type pin and the target second type pin.
[0010] Furthermore, the third plastic packaging groove extends from the side wall of the plastic packaging body to the bottom of the plastic packaging body.
[0011] Furthermore, the first molding groove, the second molding groove and the third molding groove are all formed by chemical etching or laser etching.
[0012] Furthermore, a built-in base island is also provided inside the plastic package body; the built-in base island is used for mounting the control chip.
[0013] Further, the first type pin is a high voltage pin, the second type pin and the target second type pin are low voltage pins, and the first type pin is configured as a double pin or a single pin.
[0014] In a second aspect, the present application further provides a semiconductor device, which includes a chip and a packaging structure as described in the first aspect; the chip is mounted on a base island of the packaging structure.
[0015] In the packaging structure and semiconductor device provided by the present application, the packaging structure includes: a plastic package; a plurality of pins, located on opposite sides of the plastic package; a plurality of exposed base islands, arranged at the bottom of the plastic package, and the exposed base islands are used to mount chips; a first plastic package groove, arranged at the bottom of the plastic package between two adjacent exposed base islands. The present application arranges exposed base islands at the bottom of the plastic package and opens plastic package grooves between the exposed base islands, thereby ensuring sufficient creepage distance and improving the heat dissipation effect of the packaging structure, thereby improving the service life and performance of the device. BRIEF DESCRIPTION OF THE DRAWINGS
[0016] In order to more clearly illustrate the specific implementation methods of the present application or the technical solutions in the prior art, the drawings required for use in the specific implementation methods or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are some implementation methods of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.
[0017] Figure 1 A side cross-sectional view of a packaging structure provided in an embodiment of the present application;
[0018] Figure 2 A bottom plan view of a packaging structure provided in an embodiment of the present application;
[0019] Figure 3 A bottom plan view of another packaging structure provided in an embodiment of the present application;
[0020] Figure 4A bottom plan view of another packaging structure provided in an embodiment of the present application;
[0021] Figure 5 A bottom plan view of another packaging structure provided in an embodiment of the present application;
[0022] Figure 6 A schematic diagram of an internal frame of a packaging structure provided in an embodiment of the present application;
[0023] Figure 7 A schematic diagram of another packaging structure provided in an embodiment of the present application. DETAILED DESCRIPTION
[0024] The technical solution of the present application will be described clearly and completely below in conjunction with the embodiments. Obviously, the described embodiments are part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in the field without creative work are within the scope of protection of the present application.
[0025] In order to address the problem that in the existing chip packaging process, the chip is packaged inside the packaging body, resulting in poor heat dissipation of the device, which in turn affects the service life or performance of the device, the embodiment of the present application provides a packaging structure and a semiconductor device, in which an exposed base island is arranged at the bottom of the plastic packaging body, and a plastic packaging groove is opened between the exposed base islands, so as to ensure sufficient creepage distance while improving the heat dissipation effect of the packaging structure, thereby improving the service life and performance of the device.
[0026] Figure 1 A side cross-sectional view of a packaging structure provided in an embodiment of the present application, the packaging structure includes: a plastic package body 10; a plurality of pins (not shown in the figure), located on opposite sides of the plastic package body 10; a plurality of exposed base islands 11, arranged at the bottom of the plastic package body 10, the exposed base islands 11 are used for mounting chips; a first plastic package groove 12, arranged at the bottom of the plastic package body 10 between two adjacent exposed base islands 11.
[0027] In one embodiment, the exposed base island 11 is mainly used for mounting a power lower tube chip or a power upper tube chip, such as a MOSFET or an IGBT transistor. A first plastic sealing groove 12 is provided between two adjacent exposed base islands 11 to improve the insulation capacity between the two exposed base islands with a large voltage difference, that is, to provide a larger creepage distance, making the creepage current track longer and more complex.
[0028] In the embodiment of the present application, an exposed island for mounting a chip is provided at the bottom of the plastic package to further improve the heat dissipation capacity of the package, and a plastic package groove is opened between the exposed base islands to ensure sufficient creepage distance to improve the insulation capacity between the base islands.
[0029] Figure 2A bottom plan view of a packaging structure provided in an embodiment of the present application, such as Figure 2 As shown, the plurality of exposed base islands 11 include a first exposed base island 111 and a second exposed base island 112; the first exposed base island 111 and the second exposed base island 112 are used to mount a power upper tube chip or a power lower tube chip, respectively. The first exposed base island 111 and the second exposed base island 112 are both rectangular, and the first exposed base island 111 is disposed in the upper half of the bottom of the plastic package 10; the second exposed base island 112 is disposed in the lower half of the bottom of the plastic package 10.
[0030] The pins on one side of the plastic package body 10 include a plurality of first type pins 131 (such as Figure 2 The other side pins of the plastic package body 10 include a plurality of second type pins 132 (such as Figure 2 7 are shown in the figure); the width of the first type pin 131 is greater than the width of the second type pin 132. In one embodiment, the first type pin 131 is a high voltage pin, and the second type pin 132 is a low voltage pin. For example, in one embodiment, the two wide first type pins 131 in the middle of the right side of the plastic package 10 are switch pins SW led out from the common connection end of the power upper tube chip and the power lower tube chip; the wide first type pin 131 at the bottom right side of the plastic package 10 is the input voltage pin VIN; the narrow second type pin 132 on the left side of the plastic package 10 is a control signal input pin, a ground pin, and other low voltage signal pins; the target second type pin 132 on the right side of the plastic package 10 is a current sampling pin VS.
[0031] In one embodiment, the first type pins 131 may occupy a plurality of standard pin positions to achieve a target width. In other embodiments, the first type pins 131 may also be freely set in width regardless of specific pin positions or packaging forms, and the present invention does not limit this.
[0032] exist Figure 2In the illustrated embodiment, the first plastic encapsulation groove 12 is located between the first exposed base island 111 and the second exposed base island 112, and is used to increase the distance between the two exposed base islands 111 and 112 with a large voltage difference, that is, to provide a larger creepage distance to improve the insulation capacity between the two, and to ensure the reliability of the entire chip. The first plastic encapsulation groove 12 is schematically shown as a rectangular strip groove in the figure, and its width, length and depth can be set according to the actual creepage distance requirements. Of course, the first plastic encapsulation groove 12 is not limited to a rectangular strip shape, and can be any suitable groove structure shape for increasing the creepage distance of the two exposed base islands. In some embodiments, a plurality of first plastic encapsulation grooves 12 may be included between the first exposed base island 111 and the second exposed base island 112, and the plurality of first plastic encapsulation grooves 12 are arranged in parallel between the first exposed base island 111 and the second exposed base island 112 to further increase the creepage distance between the two exposed base islands.
[0033] In addition, in one embodiment, the two exposed base islands are used to mount the power lower tube chip or the power upper tube chip, so there is also a high voltage difference between the exposed base island and the low voltage pin 132 on the left side of the package structure in the figure. Figure 3 As shown, a second plastic sealing groove 122 can also be set between the exposed base islands 111, 112 and the low-voltage second type pins 132 to increase the creepage distance between the exposed base islands and the pins, so as to further ensure the reliability of the entire packaging structure. Similarly, the second plastic sealing groove 122 is also schematically shown as a rectangular strip groove in the figure, and its width, length and depth can be set according to the actual creepage distance requirements, but the second plastic sealing groove 122 is not limited to a rectangular strip shape, and can be any suitable groove structure shape. In some embodiments, a plurality of second plastic sealing grooves 122 may also be included, and the plurality of second plastic sealing grooves 122 are arranged in parallel between the exposed base islands and the second type pins 132 to further increase the creepage distance between the two.
[0034] In an embodiment of the present application, the wider first type pin 131 can achieve high thermal conductivity and quickly export the heat of the internal power device. The wider the first type pin 131, the better its heat dissipation performance. Power devices of the same specification can achieve a higher power application range, save heat sinks, and reduce application and production costs. However, at the same time, the wider the first type pin 131, the shorter the creepage distance between it and the target second type pin 132 on the same side. In addition, the creepage distance between the target second type pin 132 and the exposed base island also needs to be guaranteed to improve the insulation capacity between the two and ensure the reliability of the entire chip.
[0035] To this end, in one embodiment disclosed in the present utility model, a third plastic sealing groove 14 is provided on the side wall of the plastic sealing body between the target second type pin 132 and the first type pin 131. Figure 4As shown, in the embodiment of the present application, the third plastic encapsulation groove 14 can increase the creepage distance between the target second type pin 132 and the first type pin 131, and can also increase the creepage distance between the target second type pin 132 and the first exposed base island 111, so as to achieve higher reliability. In some embodiments, a plurality of third plastic encapsulation grooves 14 arranged in parallel can be provided on the side wall of the plastic encapsulation body between the target second type pin 132 and the first type pin 131.
[0036] In some embodiments, in order to further ensure the reliability between the target second type pin 132 and the first exposed base island 111, the third molding groove 14 can further extend from the side wall of the package body to the bottom of the package body, such as Figure 5 As shown. The extension length of the third plastic sealing groove 14 at the bottom of the package body can be set according to the specific creepage distance requirements. It can be understood that in a specific embodiment, according to the creepage distance requirements, any one or all of the first plastic sealing groove 12, the second plastic sealing groove 122 and the third plastic sealing groove 14 can be selected on the plastic sealing body to ensure its reliability.
[0037] Furthermore, the first molding groove 12 , the second molding groove 122 and the third molding groove 14 are formed by chemical etching or laser etching.
[0038] Furthermore, a built-in base island is also provided inside the plastic package body; the built-in base island is used for mounting the control chip.
[0039] Furthermore, among the above-mentioned multiple pins, the pin corresponding to the high voltage pin (such as the SW pin) can be set as a double pin or a single pin, such as Figure 6 As shown in the dashed box.
[0040] Figure 7 The schematic diagram of the appearance of a packaging structure provided by an embodiment of the present application is shown. In the packaging structure provided by an embodiment of the present application, an exposed base island is respectively provided on the upper and lower bottom of the plastic package body, a plastic sealing groove is also provided between the two exposed base islands, and a plastic sealing groove is also provided at the bottom of the plastic package body between the upper exposed base island and the second type of pin on the right. The chip is mounted on the exposed base island, which can improve the heat dissipation capacity and service life of the package; the creepage distance between the exposed base islands and the exposed base islands and between the exposed base islands and the pins can be guaranteed by setting the plastic sealing groove, thereby improving the insulation capacity.
[0041] Based on the above embodiments, the embodiments of the present application further provide a semiconductor device, which includes a chip and a packaging structure as described in the above embodiments; the chip is mounted on the base island of the packaging structure. The chips here include a control chip, a power upper tube chip and a power lower tube chip; wherein the control chip is mounted on the built-in base island of the packaging structure, and the power upper tube chip and the power lower tube chip are respectively mounted on the exposed base island of the packaging structure.
[0042] The semiconductor device provided in the embodiment of the present application has the same implementation principle and technical effects as those of the aforementioned packaging structure embodiment. For the sake of brief description, for matters not mentioned in the embodiment of the semiconductor device, reference may be made to the corresponding contents in the aforementioned packaging structure embodiment.
[0043] In the description of the present application, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc., indicating the orientation or positional relationship, are based on the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the present application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as limiting the present application. In addition, the terms "first", "second", and "third" are used for descriptive purposes only, and cannot be understood as indicating or implying relative importance.
[0044] Finally, it should be noted that the above-described embodiments are only specific implementation methods of the present application, which are used to illustrate the technical solutions of the present application, rather than to limit them. The protection scope of the present application is not limited thereto. Although the present application is described in detail with reference to the above-described embodiments, ordinary technicians in the field should understand that any technician familiar with the technical field can still modify the technical solutions recorded in the above-described embodiments within the technical scope disclosed in the present application, or can easily think of changes, or make equivalent replacements for some of the technical features therein; and these modifications, changes or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the present application, and should be included in the protection scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.
Claims
1. A packaging structure, characterized in that: The packaging structure comprises: Plastic sealing body; A plurality of pins are located on two opposite sides of the plastic package; A plurality of exposed base islands are arranged at the bottom of the plastic package body, and the exposed base islands are used for mounting chips; The first plastic sealing groove is arranged at the bottom of the plastic sealing body between two adjacent exposed base islands.
2. The packaging structure according to claim 1, characterized in that: The plurality of exposed base islands include a first exposed base island and a second exposed base island; the first exposed base island and the second exposed base island are used for mounting a power upper tube chip or a power lower tube chip respectively.
3. The packaging structure according to claim 1, characterized in that: The pins on one side of the plastic package body include a plurality of first type pins and a target second type pin; the pins on the other side of the plastic package body include a plurality of second type pins; and the width of the first type pins is greater than the width of the second type pins.
4. The packaging structure according to claim 3, characterized in that: The packaging structure further comprises: A second molding groove is provided at the bottom of the molding body between the exposed base island and at least one of the second type pins.
5. The packaging structure according to claim 4, characterized in that: The packaging structure further comprises: A third plastic packaging groove is provided on a side wall of the plastic packaging body between the first type pins and the target second type pins.
6. The packaging structure according to claim 5, characterized in that: The third molding groove extends from the side wall of the molding body to the bottom of the molding body.
7. The packaging structure according to claim 5, characterized in that: The first molding groove, the second molding groove and the third molding groove are all formed by chemical etching or laser etching.
8. The packaging structure according to claim 1, characterized in that: A built-in base island is also arranged inside the plastic package body; the built-in base island is used for mounting a control chip.
9. The packaging structure according to claim 3, characterized in that: The first type pin is a high voltage pin, the second type pin and the target second type pin are low voltage pins, and the first type pin is configured as a double pin or a single pin.
10. A semiconductor device, characterized in that: The semiconductor device comprises a chip and a packaging structure as claimed in any one of claims 1 to 9; the chip is mounted on a base island of the packaging structure.