Pulse generation circuit

Abstract

The utility model provides a pulse generation circuit. The pulse generation circuit comprises an input module, a control module, a selection module and an output end of the pulse generation circuit, the input module is connected with the first end of the control module and is used for sending pulse regulation and control information to the control module; the second end of the control module is connected with the control end of the selection module, and the control module is used for sending a control signal to the selection module; the first end of the selection module receives a first level signal, the second end of the selection module is connected with a second level signal, the output end of the selection module is connected with the output end of the pulse generation circuit, and the selection module is used for responding to a control signal and selectively conducting a conductive path between the first end of the selection module and the output end of the pulse generation circuit. Or the conductive path between the second end of the selection module and the output end of the pulse generation circuit is selectively conducted so as to output the pulse signal. Based on the circuit provided by the invention, diversified pulse signals can be provided.

Description

Technical Field

[0001] The present application relates to the field of digital circuits, and in particular to a pulse generating circuit. Background Art

[0002] In digital circuits, there are logic level signals and digital bus signals. During the development process, pulse signals can be injected to test the logic level signals and digital bus signals or to analyze and locate the faults of the signals.

[0003] Currently, pulse signals are generated by signal generators. However, signal generators are large in size, expensive, and have limited functions. They are unable to generate diverse pulse signals, resulting in low efficiency in signal testing and fault location processing, and are unable to meet the needs of diverse test scenarios. Utility Model Content

[0004] The present application provides a pulse generating circuit for providing diversified pulse signals.

[0005] The present application provides a pulse generating circuit, which includes: an input module, a control module, a selection module and an output end of the pulse generating circuit; wherein:

[0006] The input module is connected to the first end of the control module and is used to send pulse control information to the control module;

[0007] The second end of the control module is connected to the control end of the selection module, and the control module is used to send a control signal to the selection module based on the pulse control information;

[0008] The first end of the selection module receives a first level signal, the second end of the selection module receives a second level signal, the output end of the selection module is connected to the output end of the pulse generating circuit, and the selection module is used to select a conductive path between the first end of the selection module and the output end of the pulse generating circuit, or select a conductive path between the second end of the selection module and the output end of the pulse generating circuit in response to a control signal to output a pulse signal.

[0009] In one example, the input module includes a USB serial port circuit;

[0010] The input end of the USB serial port circuit is used to connect to the host computer, the output end of the USB serial port circuit is connected to the first IO pin of the control module, and the host computer is used to send pulse control information.

[0011] In one example, the input module further includes a key circuit;

[0012] The key circuit is connected to the second IO pin of the control module and is used to obtain pulse control information according to the key operation of the user.

[0013] In one example, the selection module includes: a first switch and a second switch;

[0014] A first end of the first switch receives a first level signal, a second end of the first switch is connected to a first end of the second switch and an output end of the pulse generating circuit, and a second end of the second switch receives a second level signal;

[0015] The control end of the first switch is connected to the first output end of the control module, and the control module is used to send a first control signal to the first switch through the first output end to control the first switch to be turned on or off;

[0016] The control end of the second switch is connected to the second output end of the control module, and the control module is used to send a second control signal to the second switch through the second output end to control the second switch to be disconnected or turned on.

[0017] In one example, the first switch is a PMOS and the second switch is an NMOS.

[0018] In one example, the selection module further includes: an operational amplifier;

[0019] The positive input terminal of the operational amplifier is connected to the third output terminal of the control module, and the negative input terminal and output terminal of the operational amplifier are both connected to the first end of the first switch, for amplifying and outputting the voltage output from the third output terminal of the control module.

[0020] In one example, the selection module further includes: a resistor;

[0021] The first end of the resistor is connected to the second end of the first switch, and the second end of the resistor is connected to the output end of the pulse generating circuit.

[0022] In one example, the pulse generating circuit further includes a display module;

[0023] The display module is connected to the third IO pin of the control module and is used to display the pulse regulation information received by the control module.

[0024] In one example, the circuit further includes a power module;

[0025] The power supply module is respectively connected with the input module, the control module, the selection module and the display module, and is used for providing working voltage to the input module, the control module, the selection module and the display module.

[0026] In one example, the control module is an MCU.

[0027] The pulse generating circuit provided in the present application has a control module that controls the timing and duration of the selection module outputting a pulse signal of the first level, as well as the timing and duration of the outputting a pulse signal of the second level, according to pulse regulation information. The control module can flexibly output pulse signals with any number of pulses for different types of signals that need to be tested, so as to provide diversified pulse signals. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present application and, together with the description, serve to explain the principles of the present application.

[0029] Figure 1 This is a schematic diagram of an application scenario for this application example;

[0030] Figure 2 A schematic diagram of the structure of a pulse generating circuit provided in Example 1 of the present application;

[0031] Figure 3 A schematic diagram of the structure of another pulse generating circuit provided in Embodiment 1 of the present application;

[0032] Figure 4 A schematic diagram of the structure of another pulse generating circuit provided in the first embodiment of the present application;

[0033] Figure 5 A schematic diagram of the structure of another pulse generating circuit provided in the first embodiment of the present application;

[0034] Figure 6 A schematic diagram of the structure of another pulse generating circuit provided in the first embodiment of the present application;

[0035] Figure 7 A schematic diagram of the structure of another pulse generating circuit provided in the first embodiment of the present application;

[0036] Figure 8 A schematic diagram of the structure of another pulse generating circuit provided in the first embodiment of the present application;

[0037] Fig. 9 A schematic diagram of the structure of another pulse generating circuit provided in the first embodiment of the present application;

[0038] Fig.10 A schematic diagram of the structure of another pulse generating circuit provided in the first embodiment of the present application;

[0039] Fig.11 This is a structural schematic diagram of another pulse generating circuit provided in Example 1 of the present application.

[0040] Figure ID:

[0041] Q1: first switch;

[0042] Q2: second switch;

[0043] R: resistance.

[0044] The above drawings have shown clear embodiments of the present application, which will be described in more detail later. These drawings and text descriptions are not intended to limit the scope of the present application in any way, but to illustrate the concept of the present application to those skilled in the art by referring to specific embodiments. DETAILED DESCRIPTION

[0045] Exemplary embodiments will be described in detail herein, examples of which are shown in the accompanying drawings. When the following description refers to the drawings, the same numbers in different drawings represent the same or similar elements unless otherwise indicated. The implementations described in the following exemplary embodiments do not represent all implementations consistent with the present application. Instead, they are merely examples of devices and methods consistent with some aspects of the present application as detailed in the appended claims.

[0046] It should be noted that the pulse generating circuit provided in the present application can be used in the field of digital circuits, and can also be used in any field other than digital circuits. The application field of the pulse generating circuit provided in the present application is not limited.

[0047] In digital circuits, there are logic level signals and digital bus signals, where logic level signals include: Power Good (PG), EN, Reset (RST) or General Purpose Input / Output (GPIO), and digital bus signals include: I2C, PMBus, SVID and AVS Bus, etc. In the development process, pulse signals can be injected to test logic level signals and digital bus signals or to analyze and locate signal failures;

[0048] Currently, pulse signals are generated by signal generators. However, signal generators are large in size, expensive, and have limited functions. They are unable to generate diverse pulse signals, resulting in low efficiency in signal testing and fault location processing, and are unable to meet the needs of diverse test scenarios.

[0049] Figure 1 The following is a schematic diagram of the application scenario of this application example. Figure 1As shown, the present application provides a pulse generating circuit, which generates any number of pulse signals through the pulse generating circuit, and injects the pulse signals into the logic level signal or the digital bus signal. Specifically, the input module in the pulse generating circuit sends pulse control information to the control module, and the control module sends a control signal to the selection module based on the pulse control information, and the control selection circuit selects to conduct the conductive path between the first level signal and the output end of the pulse generating circuit, or to conduct the conductive path between the second level signal and the output end of the pulse generating circuit, so as to output the first level or the second level pulse signal, so as to achieve the purpose of flexibly outputting the pulse signal of any number of pulses for different types of signals that need to be tested, so as to provide diversified pulse signals.

[0050] The technical solution of the present application and how the technical solution of the present application solves the above-mentioned technical problems are described in detail below with specific embodiments. The following specific embodiments can be combined with each other, and the same or similar concepts or processes may not be repeated in some embodiments. The embodiments of the present application will be described below in conjunction with the accompanying drawings.

[0051] Embodiment 1

[0052] Figure 2 A schematic diagram of a pulse generating circuit provided in the first embodiment of the present application is shown in FIG. Figure 2 As shown, the pulse generating circuit includes: an input module, a control module, a selection module and an output end of the pulse generating circuit; wherein,

[0053] The input module is connected to the first end of the control module and is used to send pulse control information to the control module;

[0054] The second end of the control module is connected to the control end of the selection module, and the control module is used to send a control signal to the selection module based on the pulse control information;

[0055] The first end of the selection module receives a first level signal, the second end of the selection module receives a second level signal, the output end of the selection module is connected to the output end of the pulse generating circuit, and the selection module is used to select a conductive path between the first end of the selection module and the output end of the pulse generating circuit, or select a conductive path between the second end of the selection module and the output end of the pulse generating circuit in response to a control signal to output a pulse signal.

[0056] Combined with the scenario example, the pulse control information sent by the input module to the control module includes the number of pulses and the width of the pulse signal to be output. For example, if the pulse control information indicates that the number of pulses of the output pulse signal is 100 and the pulse width is 1s, the control module can first send a first control signal to the selection module, and the selection module can conduct the path between the first end and Vout based on the first control signal. Vout is the input end of the pulse generating circuit. Since the first end of the selection module is connected to the first level signal, Vout will output a pulse signal corresponding to the first level at this time. After another 1s, the control module sends a second control signal to the selection module, and the selection module can conduct the path between the second end and Vout based on the second control signal. Since the second end of the selection module receives the second level signal, Vout will output a pulse signal corresponding to the second level at this time. Among the first level signal and the second level signal, one is a high level and the other is a low level. Then after another 1s, the control module sends the first control signal to the selection module again. In this way, it is cycled 100 times, and Vout can output a pulse signal with a number of pulses of 100 and a pulse width of 1s. Based on the method provided in this example, the pulse control information can be adjusted according to user needs so that the control module can flexibly adjust the number of pulses and pulse width of the output pulse signal based on the pulse control signal, thereby achieving the purpose of flexibly outputting pulse signals with any number of pulses for different types of signals that need to be tested, thereby providing diversified pulse signals.

[0057] Optional, Figure 3 This is a schematic diagram of the structure of another pulse generating circuit provided in the first embodiment of the present application. Figure 3 As shown, the input module includes a USB serial port circuit;

[0058] The input end of the USB serial port circuit is used to connect to the host computer, the output end of the USB serial port circuit is connected to the first IO pin of the control module, and the host computer is used to send pulse control information.

[0059] Combined with the scenario example, the host computer refers to a computer that can directly issue control commands. The user can adjust the number of pulses and the pulse width of the pulse signal to be issued through the host computer to obtain pulse control information. The Universal Serial Bus (USB) serial port circuit is connected to the host computer and the control module respectively. Specifically, it can be connected to the IO1 pin of the control module. The IO1 pin is the first input / output (IO) pin on the control module. After the host computer sends the pulse control information to the USB serial port circuit, the USB serial port circuit sends the pulse control information to the control module through the first IO pin. Based on the circuit provided in this example, the pulse control information can be obtained through the host computer, and the pulse control information can be sent to the control module through the USB serial port circuit.

[0060] Optional, Figure 4 A schematic diagram of the structure of another pulse generating circuit provided in the first embodiment of the present application is shown in FIG. Figure 4 As shown, the input module also includes a key circuit;

[0061] The key circuit is connected to the second IO pin of the control module and is used to obtain pulse control information according to the key operation of the user.

[0062] Combined with the scenario example, the key circuit can be composed of three keys, key 1 is parameter selection, key 2 is parameter change, and key 3 is start / stop. The function of the key circuit is to modify the pulse control information to obtain new pulse control information. The control module can retain the most recent historical pulse control information. If new pulse control information needs to be re-entered, the historical pulse control information can be modified through the key circuit. For example, if the historical pulse control information indicates that the number of pulses of the pulse signal to be input and output is 100 and the pulse width is 1s, and now the output pulse signal needs to be modified to 150 pulses and 0.5s pulse width, then the number of pulses and pulse width indicated in the historical pulse control information need to be modified. Specifically, the parameter can be selected as the number of pulses through key 1, and then the number of pulses can be modified to 150 through key 2, and then the parameter can be selected as the pulse width through key 1, and then the pulse width can be modified to 0.5s through key 2, so as to obtain new pulse control information. Finally, the new pulse control information can be sent to the control module through the start function of key 3. Based on the circuit provided in this example, the historical pulse control information can be modified through the key circuit to obtain new pulse control information.

[0063] Optional, Figure 5 A schematic diagram of the structure of another pulse generating circuit provided in the first embodiment of the present application is shown in FIG. Figure 5 As shown, the selection module includes: a first switch Q1 and a second switch Q2;

[0064] A first end of the first switch Q1 receives a first level signal, a second end of the first switch Q1 is connected to a first end of the second switch Q2 and an output end of the pulse generating circuit, and a second end of the second switch Q2 receives a second level signal;

[0065] The control end of the first switch Q1 is connected to the first output end of the control module, and the control module is used to send a first control signal to the first switch Q1 through the first output end to control the first switch Q1 to be turned on or off;

[0066] The control end of the second switch Q2 is connected to the second output end of the control module, and the control module is used to send a second control signal to the second switch Q2 through the second output end to control the second switch Q2 to be disconnected or turned on.

[0067] In combination with the scenario example, the control module sends the first control signal to the control end of the first switch Q1 through the first output end to control the on and off of the first switch Q1, and the control module sends the second control signal to the control end of the second switch Q2 through the second output end to control the on and off of the second switch Q2. Since Vout commands the output of a signal of a state at the same time, only one of the first switch Q1 and the second switch Q2 can be turned on at the same time. Therefore, when the first control signal sent by the control module controls the first switch Q1 to be turned on, the second control signal sent by the control module will control the second switch Q2 to be turned off. At this time, Vout is connected to the first level signal, and the pulse generating circuit outputs a pulse signal corresponding to the first level signal. Similarly, when the first control signal sent by the control module controls the first switch Q1 to be turned off, the second control signal sent by the control module will control the second switch Q2 to be closed, and the pulse generating circuit outputs a pulse signal corresponding to the second level signal. This example controls the level state of the pulse signal output by the pulse generating circuit by controlling the states of the first switch and the second switch.

[0068] Optional, Figure 6 A schematic diagram of the structure of another pulse generating circuit provided in the first embodiment of the present application is shown in FIG. Figure 6 As shown, the first switch is a PMOS and the second switch is an NMOS.

[0069] In combination with the scenario example, the first switch and the second switch can be selected as metal-oxide-semiconductor field-effect transistors (Metal-Oxide-Semiconductor Field-Effect Transistor, referred to as MOSFET), wherein the first switch can be selected as a P-channel PMOS, wherein the gate is connected to the first output terminal of the control module, the drain is connected to the first level signal, and the source is connected to the output terminal of the pulse generating circuit. The second switch can be selected as an N-channel NMOS, wherein the gate is connected to the second output terminal of the control module, the source is connected to the output terminal of the pulse generating circuit, and the drain is connected to the second level signal.

[0070] Optional, Figure 7 A schematic diagram of the structure of another pulse generating circuit provided in the first embodiment of the present application is shown in FIG. Figure 7 As shown, the selection module further includes: an operational amplifier;

[0071] The positive input terminal of the operational amplifier is connected to the third output terminal of the control module, and the negative input terminal and output terminal of the operational amplifier are both connected to the first end of the first switch, for amplifying and outputting the voltage output from the third output terminal of the control module.

[0072] Combined with the scenario example, if the first level signal is a high level and the second level signal is a low level, the first level signal can be obtained by the output voltage of the DAC pin of the control module, and the second level signal can be obtained through the drain connection of the second switch. However, the voltage value output by the DAC pin of the control module is small. The voltage value output by the DAC pin can be amplified by an operational amplifier to obtain outputs of different voltages, thereby achieving adaptation to different signal injection circuits. The signal injection circuit is a circuit where a logic level signal or a digital bus signal to be detected or where fault location is required is located.

[0073] Figure 8 A schematic diagram of the structure of another pulse generating circuit provided in the first embodiment of the present application is shown in FIG. Figure 8 As shown, the selection module also includes: a resistor;

[0074] The first end of the resistor is connected to the second end of the first switch, and the second end of the resistor is connected to the output end of the pulse generating circuit.

[0075] Combined with the scenario example, in order to prevent excessive current in the pulse generation circuit, a resistor can be added to the circuit to achieve the purpose of current limiting. The resistance value of the resistor can be determined according to the actual situation in the application.

[0076] Optional, Fig. 9 A schematic diagram of the structure of another pulse generating circuit provided in the first embodiment of the present application is shown in FIG. Fig. 9 As shown, the pulse generating circuit also includes a display module;

[0077] The display module is connected to the third IO pin of the control module and is used to display the pulse regulation information received by the control module.

[0078] In combination with the scenario example, the display module can be selected as a liquid crystal display screen, which can be connected to the third IO pin IO3 of the control module. On the one hand, it is used to display the number of pulses and pulse width in the pulse control information, and on the other hand, it is used to display the pull-up voltage after the operational amplifier amplifies the DAC pin output voltage.

[0079] Optional, Fig.10 A schematic diagram of the structure of another pulse generating circuit provided in the first embodiment of the present application is shown in FIG. Fig.10 As shown, the circuit also includes a power supply module;

[0080] The power supply module is respectively connected with the input module, the control module, the selection module and the display module, and is used for providing working voltage to the input module, the control module, the selection module and the display module.

[0081] Combined with the scenario example, the power module can be selected as a USB interface, and the power module is respectively connected to the USB serial port circuit in the input module, the display module, the control module, and the voltage amplifier in the selection module to provide working voltage for the USB serial port circuit in the input module, the display module, the control module, and the voltage amplifier in the selection module. When connected to the voltage amplifier, it can be connected to the VCC end of the voltage amplifier.

[0082] Optional, Fig.11 A schematic diagram of the structure of another pulse generating circuit provided in the first embodiment of the present application is shown in FIG. Fig.11 As shown, the control module is MCU.

[0083] Combined with the scenario example, the control module can be a chip, such as a microcontroller unit (MCU). Taking LPC1768 as an example, the minimum width of the regulated pulse signal can be achieved at the microsecond level, the number can be changed to an infinite cycle, and the MCU is selected as the control module. The resulting pulse generation circuit has the advantages of small size, easy use, and low cost.

[0084] Based on the method provided in this embodiment, the pulse control information can be adjusted according to the needs of the user, so that the control module can flexibly adjust the number of pulses and pulse width of the output pulse signal based on the pulse control signal, thereby achieving the purpose of flexibly outputting pulse signals with any number of pulses for different types of signals that need to be tested, thereby providing diversified pulse signals.

[0085] Those skilled in the art will readily appreciate other embodiments of the present application after considering the specification and practicing the utility model disclosed herein. The present application is intended to cover any variations, uses or adaptations of the present application, which follow the general principles of the present application and include common knowledge or customary techniques in the art that are not disclosed in the present application. The specification and examples are intended to be exemplary only, and the true scope and spirit of the present application are indicated by the following claims.

[0086] It should be understood that the present application is not limited to the precise structures that have been described above and shown in the drawings, and that various modifications and changes may be made without departing from the scope thereof. The scope of the present application is limited only by the appended claims.

Claims

1. A pulse generating circuit, characterized in that: The pulse generating circuit comprises: an input module, a control module, a selection module and an output end of the pulse generating circuit; wherein, The input module is connected to the first end of the control module and is used to send pulse control information to the control module; The second end of the control module is connected to the control end of the selection module, and the control module is used to send a control signal to the selection module based on the pulse control information; The first end of the selection module receives a first level signal, the second end of the selection module receives a second level signal, the output end of the selection module is connected to the output end of the pulse generating circuit, and the selection module is used to select a conductive path between the first end of the selection module and the output end of the pulse generating circuit, or select a conductive path between the second end of the selection module and the output end of the pulse generating circuit in response to the control signal to output a pulse signal.

2. The pulse generating circuit according to claim 1, characterized in that: The input module includes a USB serial port circuit; The input end of the USB serial port circuit is used to connect to a host computer, the output end of the USB serial port circuit is connected to the first IO pin of the control module, and the host computer is used to send pulse control information.

3. The pulse generating circuit according to claim 2, characterized in that: The input module also includes a key circuit; The key circuit is connected to the second IO pin of the control module and is used to obtain pulse control information according to the key operation of the user.

4. The pulse generating circuit according to claim 3, characterized in that: The selection module includes: a first switch and a second switch; The first end of the first switch receives a first level signal, the second end of the first switch is connected to the first end of the second switch and the output end of the pulse generating circuit, and the second end of the second switch receives a second level signal; The control end of the first switch is connected to the first output end of the control module, and the control module is used to send a first control signal to the first switch through the first output end to control the first switch to be turned on or off; The control end of the second switch is connected to the second output end of the control module, and the control module is used to send a second control signal to the second switch through the second output end to control the second switch to be disconnected or turned on.

5. The pulse generating circuit according to claim 4, characterized in that: The first switch is a PMOS, and the second switch is an NMOS.

6. The pulse generating circuit according to claim 5, characterized in that: The selection module further includes: an operational amplifier; The positive input terminal of the operational amplifier is connected to the third output terminal of the control module, and the negative input terminal and output terminal of the operational amplifier are both connected to the first end of the first switch, so as to amplify and output the voltage outputted from the third output terminal of the control module.

7. The pulse generating circuit according to claim 6, characterized in that: The selection module further includes: a resistor; The first end of the resistor is connected to the second end of the first switch, and the second end of the resistor is connected to the output end of the pulse generating circuit.

8. The pulse generating circuit according to claim 7, characterized in that: The pulse generating circuit also includes a display module; The display module is connected to the third IO pin of the control module and is used to display the pulse control information received by the control module.

9. The pulse generating circuit according to claim 8, characterized in that: The circuit also includes a power supply module; The power supply module is respectively connected to the input module, the control module, the selection module and the display module, and is used to provide working voltage to the input module, the control module, the selection module and the display module.

10. The pulse generating circuit according to any one of claims 1 to 9, characterized in that: The control module is MCU.

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