Solar cell and photovoltaic module

Abstract

The utility model provides a solar cell and a photovoltaic module. The solar cell comprises an N-type substrate layer and a P-type emitter layer. The thermoelectric part comprises at least one of an N-type thermoelectric layer and a P-type thermoelectric layer, at least part of the thermoelectric part is arranged on the side, away from the P-type emitter layer, of the N-type substrate layer, and / or at least part of the thermoelectric part is arranged on the side, away from the N-type substrate layer, of the P-type emitter layer, and / or at least part of the thermoelectric part is arranged on the side, away from the N-type substrate layer, of the P-type emitter layer. The thermoelectric part can be used as a selective passing layer of a solar cell carrier, so that the leakage current in the solar cell is reduced, the overall passivation performance of the solar cell is enhanced, and the energy conversion efficiency and the safety of the solar cell are improved.

Description

Technical Field

[0001] The utility model belongs to the technical field of photoelectric conversion, and specifically relates to a solar cell and a photovoltaic component. Background Art

[0002] In the field of solar cells, with the conversion and utilization of light energy into electrical energy in solar cells, carrier selectivity has always been a key factor affecting cell performance.

[0003] Impurities and defects in solar cell materials affect the carrier transmission and recombination process, which in turn causes an increase in leakage current. This leakage current not only reduces the energy conversion efficiency of solar cells, but also affects the overall safety and stability of solar cells. Utility Model Content

[0004] One purpose of the utility model is to provide a new technical solution for solar cells and photovoltaic modules.

[0005] According to a first aspect of the utility model, a solar cell is provided, comprising:

[0006] N-type substrate layer and P-type emitter layer;

[0007] A thermoelectric section, the thermoelectric section comprising at least one of an N-type thermoelectric layer and a P-type thermoelectric layer, at least a portion of the thermoelectric section being disposed on a side of the N-type substrate layer away from the P-type emitter layer, and / or at least a portion of the thermoelectric section being disposed on a side of the P-type emitter layer away from the N-type substrate layer.

[0008] Optionally, the thermoelectric portion includes an N-type thermoelectric layer and a P-type thermoelectric layer, the N-type thermoelectric layer is located on a side of the N-type substrate layer away from the P-type emitter layer, and the P-type thermoelectric layer is located on a side of the P-type emitter layer away from the N-type substrate layer.

[0009] Optionally, the N-type substrate layer is an N-type single crystal silicon layer, and the P-type emitter layer is a P-type doped emitter layer.

[0010] Optionally, the N-type thermoelectric layer is an N-type thermoelectric film, and the P-type thermoelectric layer is a P-type thermoelectric film.

[0011] Optionally, the N-type thermoelectric layer is an N-type doped bismuth telluride layer, an N-type doped lead telluride layer, an N-type doped cuprous selenide layer or an N-type doped selenium telluride layer.

[0012] Optionally, the P-type thermoelectric layer is a P-type doped bismuth telluride layer, a P-type doped lead telluride layer, a P-type doped cuprous selenide layer or a P-type doped selenium telluride layer.

[0013] Optionally, the solar cell includes a back electrode and a first passivation anti-reflection layer, and the first passivation anti-reflection layer is arranged between the N-type thermoelectric layer and the back electrode.

[0014] Optionally, the solar cell includes a positive electrode and a second passivation anti-reflection layer, and the second passivation anti-reflection layer is arranged between the P-type thermoelectric layer and the positive electrode.

[0015] Optionally, the solar cell further includes a tunneling layer, wherein the tunneling layer is located between the N-type substrate layer and the N-type thermoelectric layer.

[0016] Optionally, the tunneling layer includes an N-type polysilicon layer and a silicon oxide layer, the N-type polysilicon layer is disposed close to the N-type thermoelectric layer, and the silicon oxide layer is disposed close to the N-type substrate layer.

[0017] Optionally, the thickness of the silicon oxide layer is smaller than the thickness of the polysilicon layer.

[0018] Optionally, the solar cell further includes a passivation layer, wherein the passivation layer is located between the P-type emitter layer and the P-type thermoelectric layer.

[0019] Optionally, the thickness of the passivation layer is smaller than the thickness of the P-type emitter layer.

[0020] According to a first aspect of the utility model, a photovoltaic assembly is provided. The photovoltaic assembly comprises the solar cell according to the first aspect.

[0021] A technical effect of the utility model is:

[0022] An embodiment of the present application provides a solar cell, which includes an N-type substrate layer and a P-type emitter layer; a thermoelectric part, which includes at least one of an N-type thermoelectric layer and a P-type thermoelectric layer, at least a portion of the thermoelectric part is arranged on a side of the N-type substrate layer away from the P-type emitter layer, and / or at least a portion of the thermoelectric part is arranged on a side of the P-type emitter layer away from the N-type substrate layer, and the thermoelectric part can serve as a selective passage layer for carriers of the solar cell, reduce leakage current in the solar cell, enhance the overall passivation performance of the solar cell, and improve the energy conversion efficiency and safety of the solar cell.

[0023] Other features and advantages of the present invention will become apparent from the following detailed description of exemplary embodiments of the present invention with reference to the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] The accompanying drawings, which are incorporated in and constitute a part of the specification, illustrate embodiments of the present invention and, together with the description, serve to explain the principles of the present invention.

[0025] Figure 1 A schematic structural diagram of a solar cell provided in one embodiment of the utility model.

[0026] in:

[0027] 11. N-type substrate layer; 12. P-type emitter layer; 13. Tunneling layer; 131. N-type polysilicon layer; 132. Silicon oxide layer; 14. Passivation layer; 2. Thermoelectric part; 21. N-type thermoelectric layer; 22. P-type thermoelectric layer; 31. Back electrode; 32. First passivation anti-reflection layer; 41. Positive electrode; 42. Second passivation anti-reflection layer. DETAILED DESCRIPTION

[0028] Various exemplary embodiments of the present invention will now be described in detail with reference to the accompanying drawings. It should be noted that unless otherwise specifically stated, the relative arrangements of components and steps, numerical expressions and numerical values ​​set forth in these embodiments do not limit the scope of the present invention.

[0029] The embodiments of the present application will be described in detail below, and examples of the embodiments are shown in the accompanying drawings. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present application, and should not be understood as limiting the present application. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in the field without making creative work are within the scope of protection of the present application.

[0030] The term "first" or "second" in the specification and claims of this application may include one or more of the features explicitly or implicitly. In the description of this application, unless otherwise specified, "plurality" means two or more. In addition, "and / or" in the specification and claims means at least one of the connected objects, and the character " / " generally means that the objects connected before and after are in an "or" relationship.

[0031] In the description of the present application, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise", "axial", "radial", "circumferential" and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the referred device or element must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as a limitation on the present application.

[0032] In the description of this application, it should be noted that, unless otherwise clearly specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be indirectly connected through an intermediate medium, or it can be the internal communication of two components. For ordinary technicians in this field, the specific meanings of the above terms in this application can be understood according to specific circumstances.

[0033] It should be noted that like reference numerals and letters refer to similar items in the following figures, and therefore, once an item is defined in one figure, it need not be further discussed in subsequent figures.

[0034] When a solar cell works under lighting conditions, while generating electrical energy through the photoelectric effect, there will be leakage current in the solar cell, and the leakage current will reduce the energy conversion efficiency of the solar cell; the solar cell provided in the embodiment of the present application can use the thermoelectric part as a selective passage layer for solar cell carriers, reduce the leakage current in the solar cell, and improve the energy conversion efficiency of the solar cell.

[0035] In addition, solar cells also generate excess heat during operation, and the solar cells provided in the embodiments of the present application can utilize the excess heat of the solar cells through the thermoelectric unit to improve the operating efficiency of the solar cells.

[0036] Reference Figure 1 , an embodiment of the present application provides a solar cell, the solar cell comprising:

[0037] N-type substrate layer 11 and P-type emitter layer 12;

[0038] Thermoelectric section 2, the thermoelectric section 2 includes at least one of an N-type thermoelectric layer 21 and a P-type thermoelectric layer 22, at least a portion of the thermoelectric section 2 is arranged on a side of the N-type substrate layer 11 away from the P-type emitter layer 12, and / or, at least a portion of the thermoelectric section 2 is arranged on a side of the P-type emitter layer 12 away from the N-type substrate layer 11.

[0039] In this embodiment, the N-type substrate layer 11 and the P-type emitter layer 12 form a PN junction in the solar cell, and an N-type thermoelectric layer 21 and / or a P-type thermoelectric layer 22 are respectively disposed on both sides of the PN junction.

[0040] In one embodiment, the thermoelectric portion 2 includes an N-type thermoelectric layer 21, which is arranged on a side of the N-type substrate layer 11 away from the P-type emitter layer 12, that is, the N-type thermoelectric layer 21 can cooperate with the N-type substrate layer 11 to serve as a selective passage layer for carriers of the solar cell to reduce leakage current in the solar cell.

[0041] In another embodiment, the thermoelectric portion 2 includes a P-type thermoelectric layer 22, which is arranged on a side of the P-type emitter layer 12 away from the N-type substrate layer 11, that is, the P-type thermoelectric layer 22 and the P-type emitter layer 12 cooperate to serve as a selective passage layer for carriers of the solar cell to reduce leakage current in the solar cell.

[0042] In addition, the thermoelectric part 2 may also include an N-type thermoelectric layer 21 and a P-type thermoelectric layer 22. The materials of the N-type thermoelectric layer 21 and the P-type thermoelectric layer 22 may serve as selective passage layers for carriers of solar cells, thereby reducing leakage current in solar cells, enhancing the overall passivation performance of solar cells, and improving the energy conversion efficiency and safety of solar cells.

[0043] In one embodiment, see Figure 1 The thermoelectric portion 2 includes an N-type thermoelectric layer 21 and a P-type thermoelectric layer 22 . The N-type thermoelectric layer 21 is located on a side of the N-type substrate layer 11 away from the P-type emitter layer 12 , and the P-type thermoelectric layer 22 is located on a side of the P-type emitter layer 12 away from the N-type substrate layer 11 .

[0044] In this embodiment, the N-type substrate layer 11 and the P-type emitter layer 12 form a PN junction in the solar cell, and an N-type thermoelectric layer 21 and a P-type thermoelectric layer 22 are respectively arranged on both sides of the PN junction, the N-type thermoelectric layer 21 is close to the N-type substrate layer 11 and cooperates with the N-type substrate layer 11, and the P-type thermoelectric layer 22 is close to the P-type emitter layer 12 and cooperates with the P-type emitter layer 12, so that the thermoelectric device of the solar cell is jointly constituted by the N-type substrate layer 11, the P-type emitter layer 12 and the thermoelectric part 2.

[0045] When the solar cell is working, the N-type thermoelectric layer 21 and the P-type thermoelectric layer 22 in the thermoelectric device work under the influence of the temperature difference between the front and back sides of the PN junction after the N-type substrate layer 11 and the P-type emitter layer 12 are stacked. The N-type thermoelectric layer 21 and the P-type thermoelectric layer 22 can convert thermal energy into electrical energy to utilize the waste heat generated during the operation of the solar cell, thereby improving the energy conversion efficiency of the solar cell.

[0046] The solar cell provided in the embodiment of the present application includes an N-type substrate layer 11 and a P-type emitter layer 12; a thermoelectric part 2, the thermoelectric part 2 includes an N-type thermoelectric layer 21 and a P-type thermoelectric layer 22, the N-type thermoelectric layer 21 is located on the side of the N-type substrate layer 11 away from the P-type emitter layer 12, and the P-type thermoelectric layer 22 is located on the side of the P-type emitter layer 12 away from the N-type substrate layer 11. The thermoelectric layer is combined with the PN junction of the solar cell, so that the waste heat of the solar cell during operation can be utilized, thereby improving the heat dissipation effect and energy conversion efficiency of the solar cell, thereby increasing the overall stability and reliability of the solar cell.

[0047] In one embodiment, the solar cell provided in the embodiment of the present application may be a monocrystalline PERC cell, a polycrystalline PERC cell, an N-type TOPCon cell, a P-type TOPCon cell or a HJT cell, which is not limited in the embodiment of the present application.

[0048] In one embodiment, the N-type substrate layer 11 is an N-type single crystal silicon layer, and the P-type emitter layer 12 is a P-type doped emitter layer.

[0049] In this embodiment, the thermoelectric part 2 is combined into the N-type TOPCon solar cell structure, so that the N-type thermoelectric layer 21 is close to the N-type single crystal silicon layer and cooperates with the N-type single crystal silicon layer, and the P-type thermoelectric layer 22 is close to the P-type doped emitter layer and cooperates with the P-type doped emitter layer, so that the N-type single crystal silicon layer, the P-type doped emitter layer and the thermoelectric part 2 together constitute a thermoelectric device of the solar cell, thereby improving the energy conversion efficiency of the solar cell.

[0050] In one embodiment, the N-type thermoelectric layer 21 is an N-type thermoelectric thin film, and the P-type thermoelectric layer 22 is a P-type thermoelectric thin film.

[0051] In this embodiment, the N-type thermoelectric film is close to the N-type substrate layer 11 and cooperates with the N-type substrate layer 11. When one end of the N-type thermoelectric film is heated, due to the effect of the temperature gradient, electrons (negative charge carriers) move from the hot end to the cold end of the N-type thermoelectric film, thereby generating an electric potential difference at both ends of the N-type thermoelectric film, thereby realizing the conversion of thermal energy into electrical energy.

[0052] The P-type thermoelectric film is close to the P-type emitter layer 12 and cooperates with the P-type emitter layer 12. When one end of the P-type thermoelectric film is heated, holes (positive charge carriers) move from the hot end to the cold end of the P-type thermoelectric film under the action of the temperature gradient, thereby generating an electric potential difference at both ends of the P-type thermoelectric film, realizing the conversion of thermal energy into electrical energy.

[0053] In one embodiment, the thickness of the N-type thermoelectric film is in the range of 50-200 nm, and the thickness of the P-type thermoelectric film is in the range of 50-200 nm.

[0054] In this embodiment, the N-type thermoelectric film and the P-type thermoelectric film can form a thermocouple pair to achieve higher thermoelectric conversion efficiency.

[0055] Specifically, the thermocouple pair is composed of an N-type thermoelectric film and a P-type thermoelectric film connected in series. When there is a temperature difference between the two ends of the thermocouple pair, the N-type thermoelectric film and the P-type thermoelectric film respectively generate a potential difference. The two potential differences are added together, thereby enhancing the output voltage of the entire thermocouple pair and improving the thermoelectric conversion efficiency of the thermocouple pair.

[0056] In another embodiment, the N-type thermoelectric layer 21 is an N-type thermoelectric alloy layer, and the P-type thermoelectric layer 22 is a P-type thermoelectric alloy layer, which can achieve effective conversion of thermal energy into electrical energy while adapting to high temperatures.

[0057] In one embodiment, the N-type thermoelectric layer 21 is an N-type doped bismuth telluride layer, an N-type doped lead telluride layer, an N-type doped cuprous selenide layer, or an N-type doped selenium telluride layer.

[0058] In this embodiment, by performing an N-type doping modification process in bismuth telluride (Bi2Te3), lead telluride (PbTe), cuprous selenide (Cu2Se) or selenium telluride (Se2Te3), the N-type doped bismuth telluride layer, the N-type doped lead telluride layer, the N-type doped cuprous selenide layer or the N-type doped selenium telluride layer can have excellent thermoelectric and mechanical properties, thereby ensuring the stability of thermoelectric exchange of the thermoelectric part 2.

[0059] In one embodiment, the P-type thermoelectric layer 22 is a P-type doped bismuth telluride layer, a P-type doped lead telluride layer, a P-type doped cuprous selenide layer, or a P-type doped selenium telluride layer.

[0060] In this embodiment, by performing a P-type doping modification process in bismuth telluride (Bi2Te3), lead telluride (PbTe), cuprous selenide (Cu2Se) or selenide telluride (Se2Te3), the P-type doped bismuth telluride layer, the P-type doped lead telluride layer, the P-type doped cuprous selenide layer or the P-type doped selenide telluride layer can have excellent thermoelectric and mechanical properties, thereby ensuring the stability of thermoelectric exchange of the thermoelectric part 2.

[0061] In one embodiment, see Figure 1 The solar cell includes a back electrode 31 and a first passivation anti-reflection layer 32 , and the first passivation anti-reflection layer 32 is arranged between the N-type thermoelectric layer 21 and the back electrode 31 .

[0062] In this embodiment, a first passivation anti-reflection layer 32 is firstly arranged on the side of the N-type thermoelectric layer 21 away from the PN junction formed by the N-type substrate layer 11 and the P-type emitter layer 12, and then a back electrode 31 is arranged on the side of the first passivation anti-reflection layer 32 away from the N-type thermoelectric layer 21. The back electrode 31 can be a negative electrode, which absorbs photons, and the energy of the photons is absorbed by the electrons in the electrode material, thereby generating an internal photoelectric effect. These excited electrons are then separated by the electric field and directed to the positive electrode and flow in the circuit, thereby releasing electrical energy; and the first passivation anti-reflection layer 32 can reduce the reflection of sunlight on the surface of the battery, so that more sunlight is absorbed by the battery, thereby increasing the absorption rate of light by the solar cell, and thereby increasing the power generation.

[0063] In one embodiment, see Figure 1The solar cell includes a positive electrode 41 and a second passivation anti-reflection layer 42 , and the second passivation anti-reflection layer 42 is arranged between the P-type thermoelectric layer 22 and the positive electrode 41 .

[0064] In this embodiment, a second passivation anti-reflection layer 42 is firstly arranged on the side of the P-type thermoelectric layer 22 away from the PN junction formed by the N-type substrate layer 11 and the P-type emitter layer 12, and then a positive electrode 41 is arranged on the side of the second passivation anti-reflection layer 42 away from the P-type thermoelectric layer 22, and a path for current flow in the solar cell is formed between the back electrode 31 and the positive electrode, thereby releasing electric energy; and the second passivation anti-reflection layer 42 can reduce the reflection of sunlight on the surface of the battery, so that more sunlight is absorbed by the battery.

[0065] In this embodiment, the back electrode 31 and the first passivation anti-reflection layer 32 as well as the positive electrode 41 and the second passivation anti-reflection layer 42 cooperate with the N-type thermoelectric layer 21 and the P-type thermoelectric layer 22, respectively. Specifically, an electrically conductive path is formed between the back electrode 31 and the N-type thermoelectric layer 21, and an electrically conductive path is formed between the positive electrode 41 and the P-type thermoelectric layer 22, so as to form a conductive path of the solar cell.

[0066] In one embodiment, see Figure 1 The solar cell further includes a tunneling layer 13 , which is located between the N-type substrate layer 11 and the N-type thermoelectric layer 21 .

[0067] In this embodiment, the tunneling layer 13 is located between the back electrode 31 and the positive electrode 41. The tunneling layer 13 can realize the tunneling transmission of electrons, effectively reduce the resistance of electrons between the two electrodes, and improve the transmission rate of electrons, thereby optimizing the performance of the solar cell and improving the photoelectric conversion efficiency of the solar cell.

[0068] In this embodiment, see Figure 1 The tunneling layer 13 includes an N-type polysilicon layer 131 and a silicon oxide layer 132 . The N-type polysilicon layer 131 is disposed close to the N-type thermoelectric layer 21 , and the silicon oxide layer 132 is disposed close to the N-type substrate layer 11 .

[0069] In this embodiment, the N-type polysilicon layer 131 can be a phosphorus-doped polysilicon layer or a nitrogen-doped polysilicon layer. When light irradiates the N-type polysilicon layer 131, photons interact with silicon atoms to excite electrons and holes, thereby forming an electric current, which helps to transport and collect these electrons and holes; and the silicon oxide layer 132 can effectively reduce the reflection loss of light on the surface of the battery and improve the photoelectric conversion efficiency.

[0070] In one embodiment, see Figure 1 , the thickness of the silicon oxide layer 132 is less than the thickness of the N-type polysilicon layer 131 .

[0071] In this embodiment, the silicon oxide layer 132 plays a major role in passivation in the solar cell, reducing surface recombination and increasing minority carrier lifetime; however, a large thickness of the silicon oxide layer 132 is not conducive to the tunneling of majority carriers. Therefore, in order to simultaneously meet the requirements of passivation effect and majority carrier tunneling, the thickness of the silicon oxide layer 132 needs to be less than the thickness of the N-type polysilicon layer 131.

[0072] In one embodiment, the thickness of the N-type polysilicon layer 131 is in the range of 50-200 nm, and the thickness of the silicon oxide layer 132 is in the range of 0.5-2 nm, so as to meet the requirements of passivation effect and multi-carrier tunneling.

[0073] In one embodiment, see Figure 1 The solar cell further includes a passivation layer 14 , which is located between the P-type emitter layer 12 and the P-type thermoelectric layer 22 .

[0074] In this embodiment, the passivation layer 14 can be an aluminum oxide layer. The passivation layer 14 can form an oxide layer on the surface of the solar cell, effectively preventing oxidation or corrosion of the electrode surface, thereby improving the stability and service life of the solar cell; and the passivation layer 14 can effectively reduce the reflection loss on the surface of the cell, reduce the energy loss of sunlight during the penetration process, thereby improving the light absorption rate of the solar cell.

[0075] In one embodiment, see Figure 1 , the thickness of the passivation layer 14 is less than the thickness of the P-type emitter layer 12 .

[0076] In this embodiment, a positive electrode 41 and a passivation layer 14 are respectively provided on both sides of the P-type thermoelectric layer 22. In order to facilitate electrical conduction of the P-type thermoelectric layer 22, a conduction path is formed on one side of the P-type thermoelectric layer 22 through the positive electrode 41, and a conduction path is formed on the other side of the P-type thermoelectric layer 22 through the P-type emitter layer 12. This requires electrons to pass through the passivation layer 14 to reach the P-type emitter layer 12. Therefore, the thickness of the passivation layer 14 is set to be smaller than the thickness of the P-type emitter layer 12 to ensure the thermoelectric conversion efficiency of the P-type thermoelectric layer 22.

[0077] In one embodiment, the thickness of the passivation layer 14 is in the range of 3-40 nm, so as to improve the stability and service life of the solar cell while ensuring the thermoelectric conversion efficiency of the P-type thermoelectric layer 22 .

[0078] In one embodiment, the solar cell takes an N-type TOPCon-thermoelectric solar cell structure as an example, and the preparation process includes the following steps:

[0079] 1. Texturing: The N-type silicon wafer is immersed in an alkaline solution for double-sided texturing by using the texturing process;

[0080] 2. Boron diffusion: Boron diffusion doping is performed on the front side of the textured silicon wafer obtained after texturing to obtain a P-type doped emitter layer on the front side of the N-type silicon wafer;

[0081] 3. Remove the boron diffusion layer and BSG layer (borosilicate glass layer) on the back and side of the N-type silicon wafer: first remove the BSG layer on the back and side of the N-type silicon wafer, retain the BSG layer on the front of the N-type silicon wafer, and then polish the back of the N-type silicon wafer;

[0082] 4. Grow tunneling layer (using the method in 4.1 or 4.2 below):

[0083] 4.1. Growing a tunneling oxide layer and an intrinsic polysilicon layer on the back of the silicon wafer; diffusing phosphorus on the back of the silicon wafer by POCl3 diffusion and annealing to form a phosphorus-doped polysilicon layer on the back;

[0084] 4.2. A tunneling oxide layer and an in-situ phosphorus-doped polysilicon layer are grown on the back of the silicon wafer, wherein the thickness of the phosphorus-doped polysilicon layer is 50-200 nm;

[0085] 5. Remove the PSG (phosphosilicate glass layer) on the front and side of the N-type silicon wafer and the tunneling oxide layer (SiO X ): First remove the PSG layer on the front side of the N-type silicon wafer, retain the PSG layer on the back side of the N-type silicon wafer, then clean the front side of the N-type silicon wafer, remove the doped polysilicon layer on the front surface, and then remove the tunneling oxide layer (SiOx) and BSG on the front side and the PSG on the back side;

[0086] 6. Deposit an aluminum oxide film on the front of the N-type silicon wafer. The thickness of the aluminum oxide film is 3-40nm;

[0087] 7. Prepare a 50-200nm N-type thermoelectric layer on the N-type polysilicon layer on the back of the N-type silicon wafer using methods including but not limited to spin coating, thermal evaporation, PVD, PECVD, ALD, etc., wherein the material of the N-type thermoelectric layer is including but not limited to N-type doped Bi2Te3, PbTe, Cu2Se, Se2Te3 and other materials;

[0088] 8. Prepare a 50-200nm P-type thermoelectric layer on the aluminum oxide layer on the front side of the N-type silicon wafer using methods including but not limited to spin coating, thermal evaporation, PVD, PECVD, ALD, etc., wherein the material of the P-type thermoelectric layer is including but not limited to P-doped Bi2Te3, PbTe, Cu2Se, Se2Te3 and other materials;

[0089] 9. Prepare a first passivation anti-reflection layer and a second passivation anti-reflection layer on the back and front of the N-type silicon wafer respectively;

[0090] 10. Form a back electrode and a positive electrode on the first passivation anti-reflection layer and the second passivation anti-reflection layer respectively by screen printing to obtain an N-type TOPCon-thermoelectric solar cell structure.

[0091] An embodiment of the present application further provides a photovoltaic module, which includes the above-mentioned solar cell.

[0092] Although some specific embodiments of the present invention have been described in detail by way of examples, it should be understood by those skilled in the art that the above examples are for illustration only and are not intended to limit the scope of the present invention. It should be understood by those skilled in the art that the above embodiments may be modified without departing from the scope and spirit of the present invention. The scope of the present invention is defined by the appended claims.

Claims

1. A solar cell, characterized in that: include: An N-type substrate layer (11) and a P-type emitter layer (12); A thermoelectric section (2), the thermoelectric section (2) comprising at least one of an N-type thermoelectric layer (21) and a P-type thermoelectric layer (22), at least a portion of the thermoelectric section (2) being arranged on a side of the N-type substrate layer (11) away from the P-type emitter layer (12), and / or at least a portion of the thermoelectric section (2) being arranged on a side of the P-type emitter layer (12) away from the N-type substrate layer (11).

2. The solar cell according to claim 1, characterized in that The thermoelectric portion (2) comprises an N-type thermoelectric layer (21) and a P-type thermoelectric layer (22), wherein the N-type thermoelectric layer (21) is located on a side of the N-type substrate layer (11) away from the P-type emitter layer (12), and the P-type thermoelectric layer (22) is located on a side of the P-type emitter layer (12) away from the N-type substrate layer (11).

3. The solar cell according to claim 1, characterized in that The N-type substrate layer (11) is an N-type single crystal silicon layer, and the P-type emitter layer (12) is a P-type doped emitter layer.

4. The solar cell according to claim 1, characterized in that The N-type thermoelectric layer (21) is an N-type thermoelectric film, and the P-type thermoelectric layer (22) is a P-type thermoelectric film.

5. The solar cell according to claim 1, characterized in that: The N-type thermoelectric layer (21) is an N-type doped bismuth telluride layer, an N-type doped lead telluride layer, an N-type doped cuprous selenide layer or an N-type doped selenium telluride layer.

6. The solar cell according to claim 1, characterized in that The P-type thermoelectric layer (22) is a P-type doped bismuth telluride layer, a P-type doped lead telluride layer, a P-type doped cuprous selenide layer or a P-type doped selenium telluride layer.

7. The solar cell according to claim 1, characterized in that The solar cell comprises a back electrode (31) and a first passivation anti-reflection layer (32), wherein the first passivation anti-reflection layer (32) is arranged between the N-type thermoelectric layer (21) and the back electrode (31).

8. The solar cell according to claim 1, characterized in that The solar cell comprises a positive electrode (41) and a second passivation anti-reflection layer (42), wherein the second passivation anti-reflection layer (42) is arranged between the P-type thermoelectric layer (22) and the positive electrode (41).

9. The solar cell according to claim 1, characterized in that: The solar cell comprises a tunneling layer (13), wherein the tunneling layer (13) is located between the N-type substrate layer (11) and the N-type thermoelectric layer (21).

10. The solar cell according to claim 9, characterized in that: The tunneling layer (13) comprises an N-type polysilicon layer (131) and a silicon oxide layer (132); the N-type polysilicon layer (131) is arranged close to the N-type thermoelectric layer (21), and the silicon oxide layer (132) is arranged close to the N-type substrate layer (11).

11. The solar cell according to claim 10, characterized in that The thickness of the silicon oxide layer (132) is smaller than the thickness of the N-type polysilicon layer (131).

12. The solar cell according to claim 1, characterized in that It comprises a passivation layer (14), wherein the passivation layer (14) is located between the P-type emitter layer (12) and the P-type thermoelectric layer (22).

13. The solar cell according to claim 12, characterized in that: The thickness of the passivation layer (14) is smaller than the thickness of the P-type emitter layer (12).

14. A photovoltaic module, characterized in that: A solar cell comprising the solar cell according to any one of claims 1 to 13.

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