Back contact cell, cell assembly and photovoltaic system

Abstract

The utility model is applicable to the technical field of solar cells, and provides a back contact cell, a cell assembly and a photovoltaic system, in the back contact cell, a first surface of a silicon substrate comprises an edge region and a middle region, and the edge region is arranged around the middle region; a first doping layer, a first connecting layer, a second doping layer and a second connecting layer are arranged on the middle area, a third doping layer is arranged on the edge area, and the doping type of the third doping layer is the same as that of the first doping layer and is opposite to that of the silicon substrate. The third doped layer comprises a first doped section, a second doped section and a third doped section which are located on the three edges of the first surface respectively. Therefore, the first surface is divided into the edge region and the middle region, and the third doped layer which is provided with the three doped sections and is opposite to the silicon substrate in polarity is arranged on the edge region, so that the area of an emitter in the back contact battery can be increased, and the efficiency of the back contact battery is improved.

Description

Technical Field

[0001] The present application relates to the technical field of solar cells, and in particular to a back-contact cell, a cell assembly and a photovoltaic system. Background Art

[0002] Solar cell power generation is a sustainable source of clean energy. It uses the photovoltaic effect of semiconductor pn junction to convert sunlight into electrical energy. In solar cells, back-contact solar cells are cells in which both the p-region and the n-region are set on the back side (non-light-receiving side) of the cell. The light-receiving side of the cell is not blocked by any metal electrode, which effectively increases the short-circuit current of the cell.

[0003] In the related art, in the back-contact battery, the doping layer and the electrode are designed on the back side, and need to be designed as crossed p-regions and N-regions, where the p-regions and N-regions are evenly arranged in one direction, the area of ​​the back emitter region accounts for a small proportion, and the conversion efficiency of the battery is low. Utility Model Content

[0004] The present application provides a back-contact cell, a cell assembly and a photovoltaic system.

[0005] The present application is implemented in this way. The back contact battery of the embodiment of the present application includes:

[0006] A silicon substrate, the silicon substrate having a first surface and a second surface opposite to each other, the first surface having a first edge and a second edge opposite to each other along a first direction, and having a third edge and a fourth edge opposite to each other along a second direction, the second direction intersecting the first direction; the first surface comprising an edge region and a middle region, the edge region surrounding the middle region;

[0007] a plurality of first doped layers, a plurality of second doped layers, a plurality of first connection layers, and a plurality of second connection layers are disposed on the middle region, the plurality of first doped layers and the plurality of second doped layers are sequentially alternately arranged along the first direction and extend discontinuously along the second direction, a plurality of first connection layers and a plurality of second connection layers are sequentially alternately arranged along the second direction and extend along the first direction, the first doped layer is connected to the first connection layer and disconnected at the second connection layer, the second doped layer is connected to the second connection layer and disconnected at the first connection layer, and the first doped layer and the second doped layer have opposite doping types; and

[0008] A third doping layer is arranged on the edge area, the doping type of the third doping layer is opposite to the doping type of the silicon substrate, and the third doping layer has the same doping type as the first doping layer and the first connecting layer, the third doping layer includes a first doping segment, a second doping segment and a third doping segment, the first doping segment is arranged at the first edge and extends continuously along the second direction, the second doping segment is arranged at the second edge and extends continuously along the second direction, the third doping segment is arranged at the third edge and extends continuously along the first direction, and the first doping segment, the second doping segment and the third doping segment are all insulated and isolated from the second doping layer.

[0009] Furthermore, when the doping type of the silicon substrate is p-type doping, the doping type of the first doping layer and the first connecting layer is n-type doping, the doping type of the second doping layer and the second connecting layer is p-type doping, and the doping type of the third doping layer is n-type doping;

[0010] When the doping type of the silicon substrate is n-type doping, the doping type of the first doping layer and the first connecting layer is p-type doping, the doping type of the second doping layer and the second connecting layer is n-type doping, and the doping type of the third doping layer is p-type doping.

[0011] Furthermore, two ends of the third doping segment are connected to the first doping segment and the second doping segment respectively; and / or

[0012] The third doped segment is connected to a plurality of the first doped layers.

[0013] Furthermore, the first doped segment is connected to an end of the first connecting layer; and / or

[0014] The second doped segment is connected to an end of the first connecting layer.

[0015] Furthermore, a first auxiliary gate is provided on the first doped layer, a second auxiliary gate is provided on the second doped layer, and the first auxiliary gate and the second auxiliary gate both extend along the second direction;

[0016] The first auxiliary gate is disconnected at the second connection layer, and the second auxiliary gate is disconnected at the first connection layer;

[0017] A third sub-grid is disposed on the first doped segment, a fourth sub-grid is disposed on the second doped segment, the third sub-grid and the fourth sub-grid extend continuously along the second direction, a fifth sub-grid is disposed on the third doped segment, and the fifth sub-grid extends continuously along the first direction.

[0018] Furthermore, a first main grid is disposed on the first connection layer, and the first main grid extends along the first direction and is electrically connected to the first sub-grid, the third sub-grid and the fourth sub-grid;

[0019] A second main grid is disposed on the second connection layer. The second main grid extends along the first direction and is electrically connected to the second sub-grid, and the second main grid is not electrically connected to the first sub-grid, the third sub-grid and the fourth sub-grid.

[0020] Furthermore, the second main gate does not extend above the first doped segment and the second doped segment; or

[0021] The second main gate extends to above the first doped section and the second doped section and intersects with the third sub-gate and the fourth sub-gate. A first insulating layer is provided at the position where the third sub-gate and the fourth sub-gate intersect with the second main gate. The second main gate is located above the first insulating layer.

[0022] Furthermore, the fifth sub-grid is electrically connected to the third sub-grid and the fourth sub-grid, and the fifth sub-grid is not electrically connected to the second sub-grid.

[0023] Furthermore, the widths of the third sub-grid and the fourth sub-grid in the first direction are greater than the widths of the first sub-grid and the second sub-grid in the first direction.

[0024] Furthermore, a third main grid is further provided on the third doped segment, the third main grid continuously extends along the first direction and is electrically connected to the fifth sub-grid, and the third main grid is not electrically connected to the second sub-grid; and / or

[0025] The width of at least a portion of the fifth sub-gate in the second direction is greater than the widths of the first sub-gate and the second sub-gate in the first direction.

[0026] Furthermore, the third doping layer also includes a fourth doping segment, the fourth doping segment is arranged at the fourth edge and extends continuously along the first direction, the fourth doping segment is insulated and isolated from the second doping layer, and a sixth sub-gate is provided on the fourth doping segment, and the sixth sub-gate extends continuously along the first direction.

[0027] Furthermore, two ends of the fourth doping segment are connected to the first doping segment and the second doping segment respectively; and / or

[0028] The fourth doped segment is connected to a plurality of the first doped layers.

[0029] Furthermore, the sixth sub-gate is electrically connected to the third sub-gate and the fourth sub-gate, and the sixth sub-gate is not electrically connected to the second sub-gate; and / or, a fourth main gate is provided on the fourth doped segment, the fourth main gate extends continuously along the first direction and is electrically connected to the sixth sub-gate, and the fourth main gate is not electrically connected to the second sub-gate.

[0030] Furthermore, a fourth doping layer is stacked on the edge region, the fourth doping layer is arranged at the fourth edge and extends continuously along the first direction, the doping type of the fourth doping layer is opposite to the doping type of the third doping layer, and the fourth doping layer is insulated and isolated from the first doping layer, the first doping segment and the second doping segment;

[0031] A seventh sub-grid is disposed on the fourth doping layer. The seventh sub-grid extends continuously along the first direction and is not electrically connected to the third sub-grid and the fourth sub-grid.

[0032] Furthermore, the fourth doping layer is connected to a plurality of the second doping layers.

[0033] Furthermore, a fifth main gate is provided on the fourth doped layer, the fifth main gate extends continuously along the first direction and is electrically connected to the seventh sub-gate, and the fifth main gate is not electrically connected to the first sub-gate, the third sub-gate and the fourth sub-gate; and / or, the width of at least a portion of the seventh sub-gate in the second direction is greater than the width of the first sub-gate and the second sub-gate in the first direction.

[0034] Furthermore, an extension line of the fourth doping layer along the first direction intersects the first doping segment and the second doping segment;

[0035] Among them, the fifth main gate does not extend above the first doped segment and the second doped segment; or, the fifth main gate extends above the first doped segment and the second doped segment and intersects with the third sub-gate and the fourth sub-gate, and a second insulating layer is arranged at the position where the third sub-gate and the fourth sub-gate intersect with the fifth main gate, and the fifth main gate is located above the second insulating layer.

[0036] The present application also provides a battery assembly, comprising a plurality of back-contact batteries as described in any of the above items.

[0037] The present application also provides a photovoltaic system, which includes the above-mentioned battery assembly.

[0038] In the back contact cell, cell assembly and photovoltaic system in the embodiment of the present application, the first surface includes an edge region and a middle region, the edge region is arranged around the middle region, a first doping layer, a first connection layer, a second doping layer and a second connection layer are arranged on the middle region, a third doping layer is arranged on the edge region, the third doping layer has the same doping type as the first doping layer and is opposite to the doping type of the silicon substrate, and the third doping layer includes a first doping segment, a second doping segment and a third doping segment respectively located at three edges of the first surface. In this way, compared with the traditional solution of using doping layers of different polarities to be alternately and evenly arranged in one direction, the present application divides the first surface into an edge region and a middle region, and arranges a third doping layer having three doping segments and opposite to the polarity of the silicon substrate on the edge region, so as to increase the area of ​​the emitter in the back contact cell, thereby improving the efficiency of the back contact cell.

[0039] Additional aspects and advantages of the present application will be given in part in the description below, and in part will become apparent from the description below, or will be learned through the practice of the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0040] Figure 1 is a module schematic diagram of a photovoltaic system provided in an embodiment of the present application;

[0041] Figure 2 is a schematic diagram of the planar structure of a silicon substrate of a back contact battery provided in an embodiment of the present application;

[0042] Figure 3 is a schematic diagram of the planar structure of a back contact battery provided in an embodiment of the present application;

[0043] Figure 4 is another schematic diagram of the planar structure of a back-contact battery provided in an embodiment of the present application;

[0044] Figure 5 is another schematic diagram of the planar structure of a back-contact battery provided in an embodiment of the present application;

[0045] Figure 6 is another schematic diagram of the planar structure of the back contact battery provided in the embodiment of the present application;

[0046] Figure 7 is another schematic diagram of the planar structure of the back contact battery provided in the embodiment of the present application;

[0047] Figure 8 is another schematic diagram of the planar structure of the back contact battery provided in the embodiment of the present application;

[0048] Fig. 9 This is another schematic planar structure diagram of the back-contact battery provided in an embodiment of the present application.

[0049] Description of main component symbols:

[0050] Photovoltaic system 1000, battery component 200, back contact battery 100, silicon substrate 10, first surface 11, first edge 111, second edge 112, third edge 113, fourth edge 114, edge region 115, middle region 116, first doped layer 20, first sub-gate 21, second doped layer 30, second sub-gate 31, first connection layer 40, second connection layer 50, third doped layer 60, first doped segment 61, third sub-gate 611, second doped segment 62, fourth sub-gate 621, third doped segment 63, fifth sub-gate 631, fourth doped segment 64, sixth sub-gate 641, first main gate 70, second main gate 80, third main gate 90, first insulating layer 110, fourth main gate 120, fourth doped layer 130, seventh sub-gate 131, fifth main gate 140, second insulating layer 150. DETAILED DESCRIPTION

[0051] In order to make the purpose, technical solutions and advantages of the present application clearer, the present application is further described in detail below in conjunction with the accompanying drawings and embodiments. Examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements with the same or similar functions. It should be noted that the embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present application, and should not be construed as limiting the present application. In addition, it should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0052] In the description of the present application, it should be understood that the terms "up", "down", "left", "right", "horizontal", "vertical", etc., indicating orientations or positional relationships, are based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as a limitation on the present application.

[0053] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of this application, the meaning of "several" is two or more, unless otherwise clearly and specifically defined.

[0054] In the present application, unless otherwise clearly specified and limited, a first feature being "above" or "below" a second feature may include that the first and second features are in direct contact, or may include that the first and second features are not in direct contact but are in contact through another feature between them. Moreover, a first feature being "above", "above" and "above" a second feature includes that the first feature is directly above and obliquely above the second feature, or simply indicates that the first feature is higher in level than the second feature. A first feature being "below", "below" and "below" a second feature includes that the first feature is directly below and obliquely below the second feature, or simply indicates that the first feature is lower in level than the second feature.

[0055] The disclosure below provides many different embodiments or examples to realize the different structures of the present application. In order to simplify the disclosure of the present application, the parts and settings of specific examples are described below. Of course, they are only examples, and the purpose is not to limit the present application. In addition, the present application can repeat reference numbers and / or reference letters in different examples, and this repetition is for the purpose of simplification and clarity, and does not indicate the relationship between the various embodiments and / or settings discussed in itself. In addition, the various specific processes and examples of materials provided by the present application, but those of ordinary skill in the art can be aware of the application of other processes and / or the use scenarios of other materials.

[0056] See also Figure 1 The photovoltaic system 1000 in the embodiment of the present application may include the battery assembly 200 in the embodiment of the present application. The battery assembly 200 in the embodiment of the present application may include several back-contact batteries 100 in the embodiment of the present application. Several back-contact batteries 100 can be connected in series through welding ribbons to form several battery strings. Each battery string can form a battery assembly 200 in a series, parallel or series-parallel manner.

[0057] Please combine Figure 2 and Figure 3 The back contact cell 100 in the embodiment of the present application may include a silicon substrate 10 , a plurality of first doping layers 20 , a plurality of second doping layers 30 , a plurality of first connection layers 40 , a plurality of second connection layers 50 and a third doping layer 60 .

[0058] like Figure 2 As shown, the silicon substrate 10 has a first surface 11 and a second surface (not shown) opposite to each other, the first surface 11 has a first edge 111 and a second edge 112 opposite to each other along a first direction, and has a third edge 113 and a fourth edge 114 opposite to each other along a second direction, and the second direction intersects the first direction. The first surface 11 includes an edge region 115 and a middle region 116, and the edge region 115 is arranged around the middle region 116.

[0059] Specifically, the first surface 11 may be the back side of the silicon substrate 10 (i.e., the backlight side of the back contact battery 100), the second surface may be the front side of the silicon substrate 10, the first direction may be the longitudinal direction of the back contact battery 100, and the second direction may be the lateral direction of the back contact battery 100, and the two are perpendicular to each other. Figure 2 In the example shown, the first edge 111 is the upper edge in the longitudinal direction, the second edge 112 is the lower edge in the longitudinal direction, the third edge 113 is the left edge in the transverse direction, and the fourth edge 114 is the right edge in the transverse direction. Exemplarily, the edge region 115 may be a region located at four edges of the silicon substrate 10, which is roughly in the shape of a square, and the edge region 115 is arranged around the middle region 116.

[0060] Please combine Figure 2 and Figure 3 , a plurality of first doped layers 20, a plurality of second doped layers 30, a plurality of first connection layers 40 and a plurality of second connection layers 50 are all disposed on the middle region 116. A plurality of first doped layers 20 and a plurality of second doped layers 30 are sequentially arranged alternately along the first direction and extend intermittently along the second direction, a plurality of first connection layers 40 and a plurality of second connection layers 50 are sequentially arranged alternately along the second direction and extend along the first direction. The first doped layer 20 is connected to the first connection layer 40 and disconnected at the second connection layer 50, and the second doped layer 30 is connected to the second connection layer 50 and disconnected at the first connection layer 40. The doping types of the first doped layer 20 and the second doped layer 30 are opposite, the doping types of the first connection layer 40 and the second connection layer 50 are opposite, the doping types of the first connection layer 40 and the first doped layer 20 are the same, and the doping types of the second connection layer 50 and the second doped layer 30 are the same.

[0061] The third doping layer 60 is arranged on the edge area 115. The doping type of the third doping layer 60 is opposite to the doping type of the silicon substrate 10, and the third doping layer 60 has the same doping type as the first doping layer 20 and the first connecting layer 40. The third doping layer 60 includes a first doping segment 61, a second doping segment 62 and a third doping segment 63. The first doping segment 61 is arranged at the first edge 111 and extends continuously along the second direction. The second doping segment 62 is arranged at the second edge 112 and extends continuously along the second direction. The third doping segment 63 is arranged at the third edge 113 and extends continuously along the first direction. The first doping layer segment 61, the second doping segment 62 and the third doping segment 63 are all insulated and isolated from the second doping layer 30.

[0062] That is to say, in the embodiment of the present application, the first doping layer 20, the first connecting layer 40 and the third doping layer 60 are all opposite to the doping type of the silicon substrate 10, and all three are emitter doping layers of the back contact battery 100, while the second doping layer 30 is the same as the doping type of the silicon substrate 100, and it is the base doping layer of the back contact battery 100.

[0063] It should be noted that, in the embodiments of the present application, "intermittent extension" can be understood as the structure being a segmented structure in its extension direction, with a plurality of interruption zones in the middle. That is to say, in the text, "the first doped layer 20 and the second doped layer 30 extend intermittently along the second direction" means that from the third edge 113 to the fourth edge 114, the first doped layer 20 and the second doped layer 30 have a plurality of interruption zones, and the first connection layer 40 and the second connection layer 50 (such as Figure 3 That is, the first doped layer 20 is disconnected at the second connection layer 50, and the second doped layer 30 is disconnected at the first connection layer 40. In the following, if there is a description of "discontinuous extension", it can be understood by referring to this.

[0064] In addition, "continuous extension" can be understood as the structure being continuous and uninterrupted in the extension direction, without any interruption in the middle. That is to say, in this article, the first doping segment 61, the second doping segment 62 and the third doping segment 63 are continuous and uninterrupted structures in their respective extension directions. In the following, if there is a description of "continuous extension", please refer to this for understanding.

[0065] In the back-contact cell 100, the cell assembly 200 and the photovoltaic system 1000 in the embodiments of the present application, the first surface 11 includes an edge region 115 and a middle region 116, the edge region 115 is arranged around the middle region 116, a first doping layer 20, a first connection layer 40, a second doping layer 30 and a second connection layer 50 are arranged on the middle region 116, a third doping layer 60 is arranged on the edge region 115, the third doping layer 60 has the same doping type as the first doping layer 20 and is opposite to the doping type of the silicon substrate 10, and the third doping layer 60 includes a first doping segment 61, a second doping segment 62 and a third doping segment 63 respectively located at three edges of the first surface 11. Thus, compared with the conventional solution of arranging doping layers of different polarities alternately and uniformly in one direction, the present application divides the first surface 11 into an edge region 115 and a middle region 116, and provides a third doping layer 60 having three doping segments and opposite polarity to the silicon substrate 10 on the edge region 115, thereby increasing the area of ​​the emitter in the back contact battery 100 and improving the efficiency of the back contact battery 100.

[0066] Specifically, in some embodiments, the first doping segment 61 is arranged at the position of the first edge 111, and the upper edge of the first doping segment 61 may coincide with the first edge 111, or there may be a preset distance between the upper edge of the first doping segment 61 and the first edge 111, which may be determined according to a specific manufacturing process and is not specifically limited here. Similarly, the second doping segment 62 is arranged at the position of the second edge 112, and the lower edge of the second doping segment 62 may coincide with the second edge 112, or there may be a preset distance between the lower edge of the second doping segment 62 and the second edge 112. The third doping segment 63 is arranged at the position of the third edge 113, and the left edge of the third doping segment 63 may coincide with the third edge 113, or there may be a preset distance between the left edge of the third doping segment 63 and the third edge 113, which is not specifically limited here. It is shown in the figure that each doping segment has a preset distance from the edge, which is only for the purpose of being able to clearly express the existence of the silicon substrate 10, and is only schematic, and it is not necessary for each doping segment to have a preset distance from the edge.

[0067] Exemplarily, the first doped segment 61 may extend from the third edge 113 to the fourth edge 114 ; and / or, the second doped segment 62 may extend from the third edge 113 to the fourth edge 114 ; and / or, the third doped segment 63 may extend from the first edge 111 to the second edge 112 .

[0068] In addition, in the middle region 116, the arrangement of each doping layer and the connection layer is as follows: Figure 3 As shown, Figure 3 As shown, the first doping layer 20 and the second doping layer 30 both have a plurality of disconnection regions along the second direction, and the disconnection regions of two adjacent first doping layers 20 are substantially aligned in the first direction, and the disconnection regions of two adjacent second doping layers 30 are also substantially aligned in the first direction. The first connecting layer 40 is disposed at the disconnection region of the second doping layer 30, and is connected to the first doping layer 20 and insulated from the second doping layer 30. The second connecting layer 50 is disposed at the disconnection region of the first doping layer 20, and is connected to the second doping layer 30 and insulated from the first doping layer 20.

[0069] In the embodiment of the present application, the silicon substrate 10 may be a p-type silicon substrate or an N-type silicon substrate, that is, the doping type of the silicon substrate 10 may be p-type doping or n-type doping.

[0070] Exemplarily, when the doping type of the silicon substrate 10 is p-type doping, the doping type of the first doping layer 20 and the first connecting layer 40 is n-type doping, the doping type of the second doping layer 30 and the second connecting layer 50 is p-type doping, and the doping type of the third doping layer 60 is n-type doping.

[0071] Exemplarily, when the doping type of the silicon substrate 10 is n-type doping, the doping type of the first doping layer 20 and the first connecting layer 40 is p-type doping, the doping type of the second doping layer 30 and the second connecting layer 50 is n-type doping, and the doping type of the third doping layer 60 is p-type doping.

[0072] That is to say, no matter what doping type the silicon substrate 10 is, the first doping layer 20 located in the middle region 116, the first connection layer 40 and the third doping layer 60 located on the edge region 115 are all emitter doping layers of the back contact battery 100, and the second doping layer 30 is the base doping layer.

[0073] In this way, by disposing the third doping layers 60 with a doping type opposite to that of the silicon substrate 10 at the positions located at the three edges of the silicon substrate 10 in the edge region 115 , the area of ​​the emitter can be increased, thereby improving the efficiency.

[0074] In addition, it should be noted that in the embodiments of the present application, "insulation isolation" means that there is no conduction between the two. It can be achieved by directly forming a groove between the two, or by providing other insulating dielectric films between the two to achieve insulation between the two. There is no specific limitation here.

[0075] See also Figure 4 In some embodiments, two ends of the third doping segment 63 may be connected to the first doping segment 61 and the second doping segment 62 respectively.

[0076] In this way, the first doped segment 61, the second doped segment 62 and the third doped segment 63 can be used as a whole, without setting the third doped segment 63 and the first doped segment 61, and the third doped segment 63 and the second doped segment 62 in an isolated state, which can reduce the area of ​​the ineffective region of the entire silicon substrate 10 (i.e., the area not covered by the doped layer), and improve the efficiency of the back contact battery 100. At the same time, when the auxiliary grid is subsequently set for current collection and the main grid and / or welding strip are set for current convergence, it is only necessary to turn on the auxiliary grid on the first doped segment 61, the second doped segment 62 and the third doped segment 63 to realize the collection of the current of the third doped segment 63, and it is not necessary to set the main grid on the third doped segment 63 to realize the current collection of the third doped segment 63 located at the third edge 113.

[0077] Of course, in some embodiments, the two ends of the third doping segment 63 may not be connected to the first doping segment 61 and the second doping segment 62 , and no specific limitation is made here.

[0078] See also Figure 3 and Figure 4 In some embodiments, the third doped segment 63 may be connected to a plurality of first doped layers 20 .

[0079] In this way, the third doped segment 63 and the first doped layer 20 can be connected as a whole without isolating the two, and the area of ​​the ineffective region of the entire silicon substrate 10 (i.e., the area covered by the doped layer) can be reduced, thereby improving the efficiency of the back contact battery 100.

[0080] At the same time, if Figure 3 and Figure 4 As shown, when the connection layer most adjacent to the third doping segment 63 is the second connection layer 50, since the first doping layer 20 needs to be disconnected at the second connection layer 50, it will cause a part of the first doping layer 20 to be isolated between the third doping segment 63 and the second connection layer 50 adjacent to the third doping segment 63, resulting in the inability to collect the current of this part of the doping layer. By connecting the third doping segment 63 with the first doping layer 20, these isolated first doping layers 20 can form a whole with the third doping segment 63, thereby realizing the collection of current.

[0081] Of course, it is understandable that, in some embodiments, when the connection layer most adjacent to the third doped segment 63 is the first connection layer 40 , the third doped segment 63 may be disposed closer to the first connection layer 40 or directly connected to the first connection layer 40 as a whole.

[0082] See also Figure 3 and Figure 4 In some embodiments, the first doped segment 61 may be connected to an end of the first connection layer 40 .

[0083] In this way, the first doping segment 61 and the first connection layer 40 belonging to the same doping type can be connected into a whole without isolating the two, which can reduce the area of ​​the invalid region of the entire silicon substrate 10 (that is, the area covered by the doping layer) and improve the efficiency of the back contact battery 100.

[0084] Similarly, in some embodiments, the second doped segment 62 may be connected to the other end of the first connection layer 40. In this way, the second doped segment 62 and the first connection layer 40 of the same doping type may be connected as a whole without isolating the two, which may reduce the area of ​​the ineffective region of the entire silicon substrate 10 (i.e., the area covered by the doped layer), thereby improving the efficiency of the back contact cell 100.

[0085] See also Figure 3 and Figure 4In some embodiments, a first auxiliary gate 21 is provided on the first doping layer 20, and a second auxiliary gate 31 is provided on the second doping layer 30, and both the first auxiliary gate 21 and the second auxiliary gate 31 extend along the second direction. The first auxiliary gate 21 is disconnected at the second connection layer 50, and the second auxiliary gate 31 is disconnected at the first connection layer 40. A third auxiliary gate 611 is provided on the first doping segment 61, and a fourth auxiliary gate 621 is provided on the second doping segment 62, and the third auxiliary gate 611 and the fourth auxiliary gate 621 extend continuously along the second direction, and a fifth auxiliary gate 631 is provided on the third doping segment 63, and the fifth auxiliary gate 631 extends continuously along the first direction.

[0086] In this way, the current can be collected by arranging a secondary grid on each doping layer and each doping segment, and then the current can be outputted by merging the primary grid and / or the welding tape.

[0087] Specifically, in such an embodiment, the first sub-grid 21 is used to collect the current of the first doped layer 20, the second sub-grid 31 is used to collect the current of the second doped layer 30, the third sub-grid 611 is used to collect the current of the first doped segment 61, the fourth sub-grid 621 is used to collect the current of the second doped segment 62, and the fifth sub-grid 631 is used to collect the current of the third doped segment 63. It is not difficult to understand that in the back contact battery 100, the first surface 11 is covered with a passivation film layer, and each sub-grid can form an ohmic contact with the corresponding doped layer or doped segment by burning through the passivation film layer or laser grooving to achieve current collection.

[0088] For further information, see Figure 5 In some embodiments, the back contact cell 100 may be a main grid back contact cell. In this case, a first main grid 70 is provided on the first connection layer 40 . The first main grid 70 extends along the first direction and is electrically connected to the first sub-grid 21 , the third sub-grid 611 and the fourth sub-grid 621 .

[0089] A second main grid 80 is disposed on the second connection layer 50 . The second main grid 80 extends along the first direction and is electrically connected to the second sub-grid 31 . The second main grid 80 is not electrically connected to the first sub-grid 21 , the third sub-grid 611 and the fourth sub-grid 621 .

[0090] In this way, by setting the first main gate 70 and the second main gate 80 on the first connection layer 40 and the second connection layer 50, the first main gate 70 can converge the current collected by the first sub-gate 21, the third sub-gate 611 and the fourth sub-gate 621, and the second main gate 80 can converge the current collected by the second sub-gate 31.

[0091] Of course, in other embodiments, the back contact cell 100 may be a busbar-less back contact cell. In this case, a pad may be directly provided on the secondary grid to be welded to the welding ribbon, and no specific limitation is made here.

[0092] See also Figure 4 In some embodiments, the fifth sub-gate 631 is electrically connected to the third sub-gate 611 and the fourth sub-gate 621 , and the fifth sub-gate 631 is not electrically connected to the second sub-gate 31 .

[0093] In this way, by connecting the fifth sub-gate 631 on the third doped segment 63 with the third sub-gate 611 on the first doped segment 61 and the fourth sub-gate 621 on the second doped segment 62, the current collected by the fifth sub-gate 631 can be directly converged to the first main gate 70 through the third sub-gate 611 and the fourth sub-gate 621, without the need to set a main gate and welding tape on the third doped segment 63 to collect and output the current, and without the need to perform welding at the edge of the silicon substrate 10, which can avoid stress concentration at the edge during welding and causing cracks.

[0094] Specifically, in such an embodiment, portions at both ends of the third doping segment 63 can be connected to the first doping segment 61 and the second doping segment 62, respectively. In this case, when printing the sub-grid, a continuous sub-grid is formed on the first doping segment 61, the third doping segment 63 and the second doping segment 62, and the continuous sub-grid is in contact with the doping segment below, and the third sub-grid 611, the fifth sub-grid 631 and the fourth sub-grid 621 can be connected in sequence.

[0095] Furthermore, in some embodiments, the widths of the third sub-gate 611 and the fourth sub-gate 621 in the first direction are greater than the widths of the first sub-gate 21 and the second sub-gate 31 in the first direction.

[0096] In this way, when the main grid and the welding strip are not set on the third doped segment 63, the third sub-grid 611 and the fourth sub-grid 621 are used not only to collect the current of the first doped segment 61 and the second doped segment 62, but also to transmit the current collected by the fifth sub-grid 631. Setting the width of the third sub-grid 611 and the fourth sub-grid 621 wider can reduce the loss in the transmission process, thereby ensuring the reliability of collection and convergence.

[0097] like Figure 5 As shown, in some embodiments, a third main gate 90 may also be disposed on the third doped segment 63 , the third main gate 90 continuously extends along the first direction and is electrically connected to the fifth sub-gate 631 , and the third main gate 90 is not electrically connected to the second sub-gate 31 .

[0098] In such an embodiment, the third main grid 90 can be used to be welded with a welding strip to achieve busbar output, and the third main grid 90 can be covered on the fifth sub-grid 631 to form a whole with the fifth sub-grid 631 .

[0099] In some embodiments, the width of the fifth sub-gate 631 in the second direction is greater than the widths of the first sub-gate 21 and the second sub-gate 31 in the first direction.

[0100] In this way, it is not necessary to set a main grid on the fifth sub-grid 631, but a pad can be directly set on the fifth sub-grid 631 to be welded with the welding strip. If the fifth sub-grid 631 is set wider, the welding area between the welding strip and the fifth sub-grid 631 can be increased, and the reliability and stability of welding can be improved. That is to say, in the embodiment of the present application, the third main grid 90 may not be set on the third doping segment 63.

[0101] In some embodiments, the width of a portion of the fifth sub-grid 631 (eg, the position welded to the welding ribbon) in the second direction may be greater than the width of the first sub-grid 21 and the second sub-grid 31 in the first direction.

[0102] That is, in the embodiment of the present application, the width of at least a portion of the fifth sub-gate 631 in the second direction may be greater than the widths of the first sub-gate 21 and the second sub-gate 31 in the first direction.

[0103] See also Figure 5 In some embodiments, the second main gate 80 does not extend above the first doped segment 61 and the second doped segment 62 .

[0104] In this way, the second main grid 80 and the third sub-grid 611 and the fourth sub-grid 621 can be prevented from contacting and causing leakage.

[0105] Of course, see Figure 6 In some embodiments, the second main gate 80 may also extend to above the first doped segment 61 and the second doped segment 62 and intersect with the third sub-gate 611 and the fourth sub-gate 621. In this case, the first insulating layer 110 is disposed at the position where the third sub-gate 611 and the fourth sub-gate 621 intersect with the second main gate 80, and the second main gate 80 is located above the first insulating layer 110. In this way, even if the second main gate 80 extends to above the first doped segment 61 and the second doped segment 62, it can be insulated from the third sub-gate 611 and the fourth sub-gate 621 by the first insulating layer 110 to prevent leakage.

[0106] See also Figure 3-Figure 6In some embodiments, the third doping layer 60 may further include a fourth doping segment 64, which is disposed at the fourth edge 114 and extends continuously along the first direction, the fourth doping segment 64 is insulated and isolated from the second doping layer 30, and a sixth sub-gate 641 is disposed on the fourth doping segment 64, which extends continuously along the first direction. The fourth doping segment 64 may be disposed at the position of the fourth edge 114 so that the right edge of the fourth doping segment 64 coincides with the fourth edge 114, or there may be a preset distance between the upper edge of the fourth doping segment 64 and the fourth edge 114, which may be determined according to a specific manufacturing process and is not specifically limited herein. By way of example, the fourth doping segment 64 may extend from the first edge 111 to the second edge 112.

[0107] In this way, by disposing the fourth doping segment 64 with a doping type opposite to that of the silicon substrate 10 at the position of the fourth edge 114 , the area ratio of the emitter of the back contact cell 100 can be further increased, thereby improving the efficiency.

[0108] See also Figure 4 In some embodiments, two ends of the fourth doping segment 64 are connected to the first doping segment 61 and the second doping segment 62 respectively.

[0109] In this way, the first doping segment 61, the second doping segment 62 and the fourth doping segment 64 can be used as a whole, without setting the fourth doping segment 64 and the first doping segment 61 and the fourth doping segment 64 and the second doping segment 62 in an isolated state, which can reduce the area of ​​the ineffective region of the entire silicon substrate 10 (i.e., the area covered by the doping layer), and improve the efficiency of the back contact battery 100. At the same time, when the auxiliary grid is subsequently set for current collection and the main grid and / or welding strip are set for current convergence, it is only necessary to turn on the auxiliary grids on the first doping segment 61, the second doping segment 62 and the fourth doping segment 64 to realize the collection of the current of the fourth doping segment 64, without setting the main grid on the fourth doping segment 64.

[0110] Specifically, Figure 4 As shown, in such an embodiment, the first doping segment 61 , the third doping segment 63 , the second doping segment 62 and the fourth doping segment 64 may be connected end to end to form a square shape.

[0111] Of course, it is understandable that Figure 5 and Figure 6 As shown, in some other embodiments, the two ends of the fourth doping segment 64 may not be connected to the first doping segment 61 and the second doping segment 62 , which is not specifically limited herein.

[0112] See also Figure 3-Figure 6 In some embodiments, the fourth doped segment 64 may be connected to a plurality of first doped layers 20 .

[0113] In this way, the fourth doped segment 64 and the first doped layer 20 can be connected as a whole without isolating the two, and the area of ​​the ineffective region of the entire silicon substrate 10 (i.e., the area covered by the doped layer) can be reduced, thereby improving the efficiency of the back contact battery 100.

[0114] At the same time, when the connection layer most adjacent to the fourth doping segment 64 is the second connection layer 50, since the first doping layer 20 needs to be disconnected at the second connection layer 50, it will cause the existence of a partially isolated first doping layer 20 between the fourth doping segment 64 and the second connection layer 50 adjacent to the fourth doping segment 64, resulting in the circuit of this part of the doping layer being unable to be collected by convergence. By connecting the fourth doping segment 64 with the first doping layer 20, these isolated first doping layers 20 can form a whole with the fourth doping segment 64, thereby realizing the convergence and collection of current.

[0115] Of course, it is understandable that in some embodiments, when the connection layer most adjacent to the fourth doped segment 64 is the first connection layer 40 , the fourth doped segment 64 can be arranged closer to the first connection layer 40 or directly connected to the first connection layer 40 as a whole.

[0116] See also Figure 4 In some embodiments, the sixth sub-gate 641 is electrically connected to the third sub-gate 611 and the fourth sub-gate 621 , and the sixth sub-gate 641 is not electrically connected to the second sub-gate 31 .

[0117] In this way, by connecting the sixth sub-gate 641 on the fourth doped segment 64 with the third sub-gate 611 on the first doped segment 61 and the fourth sub-gate 621 on the second doped segment 62, the current collected by the sixth sub-gate 641 can be directly converged to the first main gate 70 through the third sub-gate 611 and the fourth sub-gate 621, without the need to set a main gate and welding tape on the fourth doped segment 64 to collect and output the current, and without the need to perform welding at the edge of the silicon substrate 10, which can avoid stress concentration at the edge during welding and causing cracks.

[0118] Specifically, in such an embodiment, the portions of the fourth doped segment 64 located at both ends can be connected to the first doped segment 61 and the second doped segment 62 respectively. In this case, when printing the sub-grid, a continuous sub-grid is formed on the first doped segment 61, the fourth doped segment 64 and the second doped segment 62, and the continuous sub-grid is in contact with the doped segment below, that is, the third sub-grid 611, the sixth sub-grid 641 and the fourth sub-grid 621 are connected in sequence.

[0119] like Figure 4As shown, in some embodiments, the first doped segment 61, the third doped segment 63, the second doped segment 62 and the fourth doped segment 64 are connected end to end in a U-shape, and the third sub-gate 611, the fifth sub-gate 631, the fourth sub-gate 621 and the sixth sub-gate 641 are also connected end to end in a U-shape.

[0120] like Figure 5 As shown, in some embodiments, a fourth main gate 120 may also be disposed on the fourth doped segment 64 , the fourth main gate 120 continuously extends along the first direction and is electrically connected to the fifth sub-gate 631 , and the fourth main gate 120 is not electrically connected to the second sub-gate 31 .

[0121] In such an embodiment, the fourth main grid 120 can be used to be welded with a welding strip to achieve busbar output, and the fourth main grid 120 can be covered on the sixth sub-grid 641 to form a whole with the fifth sub-grid 631 .

[0122] In some embodiments, the width of the sixth sub-gate 641 in the second direction is greater than the widths of the first sub-gate 21 and the second sub-gate 31 in the first direction.

[0123] In this way, it is not necessary to set a main grid on the sixth sub-grid 641, but a pad is directly set on the sixth sub-grid 641 to be welded with the welding strip. If the sixth sub-grid 641 is set wider, the welding area between the welding strip and the sixth sub-grid 641 can be increased, and the reliability and stability of welding can be improved. That is to say, in the embodiment of the present application, the fourth main grid 120 may not be set on the fourth doping segment 64.

[0124] In some embodiments, the width of a portion of the sixth sub-grid 641 (eg, the position welded to the welding ribbon) in the second direction may be greater than the width of the first sub-grid 21 and the second sub-grid 31 in the first direction.

[0125] That is, in the embodiment of the present application, the width of at least a portion of the sixth sub-gate 641 in the second direction may be greater than the widths of the first sub-gate 21 and the second sub-gate 31 in the first direction.

[0126] See also Figure 7-Figure 9 In some embodiments, the fourth edge 114 may not be a fourth doping segment 64 having a doping type opposite to that of the silicon substrate 10 , but a doping layer having the same doping type as that of the silicon substrate 10 .

[0127] Specifically, in such cases, see Figure 1 as well as Figure 7-Figure 9A fourth doping layer 130 may be stacked on the edge region 115, the fourth doping layer 130 is arranged at the fourth edge 114 and extends continuously along the first direction, the doping type of the fourth doping layer 130 is opposite to the doping type of the third doping layer 60 and is the same as the doping type of the silicon substrate 10, the fourth doping layer 130 is insulated and isolated from the first doping layer 20, the first doping segment 61 and the second doping segment 62, and a seventh sub-gate 131 is provided on the fourth doping layer 130, the seventh sub-gate 131 extends continuously along the first direction and is not electrically connected to the third sub-gate 611 and the fourth sub-gate 621.

[0128] Furthermore, if Figure 7 As shown, in some embodiments, when the type of connection layer closest to the fourth doping layer 130 is the first connection layer 40 and there are the first doping layer 20 and the second doping layer 30 between the first connection layer 40 and the fourth doping layer 130, the fourth doping layer 130 may be connected to a plurality of second doping layers 30. In this way, the fourth doping layer 130 and the second doping layer 30 may be connected as a whole without isolating the two, and the area of ​​the ineffective region of the entire silicon substrate 10 (i.e., the area covered by the doping layer) may be reduced, thereby improving the efficiency of the back contact cell 100.

[0129] At the same time, when the connection layer most adjacent to the fourth doping layer 130 is the first connection layer 40, since the second doping layer 30 needs to be disconnected at the first connection layer 40, it will cause the existence of partially isolated second doping layers 30 between the fourth doping layer 130 and the second connection layer 50 adjacent to the fourth doping layer 130, resulting in the circuit of this part of the doping layer being unable to be collected by convergence. By connecting the fourth doping layer 130 and the second doping layer 30 together, these isolated second doping layers 30 can form a whole with the fourth doping layer 130, thereby realizing the convergence and collection of current.

[0130] Of course, if Figure 8 and Fig. 9 As shown, in some embodiments, when the type of connection layer closest to the fourth doping layer 130 is the first connection layer 40 and there is no first doping layer 20 and second doping layer 30 between the first connection layer 40 and the fourth doping layer 130, the fourth doping layer 130 may be spaced apart from the first connection layer 40.

[0131] See also Figure 7-Figure 9 In some embodiments, a fifth main gate 140 is disposed on the fourth doping layer 130 , the fifth main gate 140 extends continuously along the first direction and is electrically connected to the seventh sub-gate 131 , and the fifth main gate 140 is not electrically connected to the first sub-gate 21 , the third sub-gate 611 and the fourth sub-gate 621 .

[0132] In this way, by disposing the fifth main gate 140 on the fourth doping layer 130 , current collection and output can be achieved.

[0133] In some embodiments, the width of the seventh sub-grid 131 in the second direction is greater than the width of the first sub-grid 21 and the second sub-grid 31 in the first direction. In this way, it is not necessary to set a main grid on the seventh sub-grid 131, but directly set a pad on the seventh sub-grid 131 to weld with the welding strip. Setting the seventh sub-grid 131 wider can increase the welding area between the welding strip and the seventh sub-grid 131, and improve the reliability and stability of welding. That is to say, in the embodiment of the present application, the fifth main grid 140 may not be set on the fourth doping layer 130.

[0134] In some embodiments, the width of a portion of the seventh sub-grid 131 (eg, the position welded to the welding ribbon) in the second direction may be greater than the width of the first sub-grid 21 and the second sub-grid 31 in the first direction.

[0135] That is, in the embodiment of the present application, the width of at least a portion of the seventh sub-gate 131 in the second direction may be greater than the widths of the first sub-gate 21 and the second sub-gate 31 in the first direction.

[0136] See also Figure 7 and Figure 8 In some embodiments, the extension line of the fourth doping layer 130 along the first direction intersects the first doping segment 61 and the second doping segment 62. The fifth main gate 140 does not extend above the first doping segment 61 and the second doping segment 62.

[0137] In this way, the fifth main gate 140 can be prevented from contacting the third sub-gate 611 and the fourth sub-gate 621 to cause leakage.

[0138] Of course, see Fig. 9 In some embodiments, the fifth main gate 140 may also extend to above the first doped segment 61 and the second doped segment 62 and intersect with the third sub-gate 611 and the fourth sub-gate 621. In this case, the second insulating layer 150 is disposed at the position where the third sub-gate 611 and the fourth sub-gate 621 intersect with the fifth main gate 140, and the fifth main gate 140 is located above the second insulating layer 150. In this way, even if the fifth main gate 140 extends to above the first doped segment 61 and the second doped segment 62, it can be insulated from the third sub-gate 611 and the fourth sub-gate 621 by the second insulating layer 150 to prevent leakage.

[0139] In the description of this specification, the description with reference to the terms "some embodiments", "illustrative embodiments", "examples", "specific examples", or "some examples" means that the specific features, structures, materials, or characteristics described in conjunction with the embodiments or examples are included in at least one embodiment or example of the present application. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials, or characteristics described may be combined in any one or more embodiments or examples in a suitable manner.

[0140] In addition, the above description is only a preferred embodiment of the present application and is not intended to limit the present application. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present application should be included in the protection scope of the present application.

Claims

1. A back contact battery, characterized in that: include: A silicon substrate, the silicon substrate having a first surface and a second surface opposite to each other, the first surface having a first edge and a second edge opposite to each other along a first direction, and having a third edge and a fourth edge opposite to each other along a second direction, the second direction intersecting the first direction; the first surface comprising an edge region and a middle region, the edge region surrounding the middle region; A plurality of first doped layers, a plurality of second doped layers, a plurality of first connection layers, and a plurality of second connection layers are arranged on the middle region, the plurality of first doped layers and the plurality of second doped layers are alternately arranged in sequence along the first direction and extend discontinuously along the second direction, the plurality of first connection layers and the plurality of second connection layers are alternately arranged in sequence along the second direction and extend along the first direction, the first doped layer is connected to the first connection layer and disconnected at the second connection layer, the second doped layer is connected to the second connection layer and disconnected at the first connection layer, and the first doped layer and the second doped layer have opposite doping types; and A third doping layer is arranged on the edge area, the doping type of the third doping layer is opposite to the doping type of the silicon substrate, and the third doping layer has the same doping type as the first doping layer and the first connecting layer, the third doping layer includes a first doping segment, a second doping segment and a third doping segment, the first doping segment is arranged at the first edge and extends continuously along the second direction, the second doping segment is arranged at the second edge and extends continuously along the second direction, the third doping segment is arranged at the third edge and extends continuously along the first direction, and the first doping segment, the second doping segment and the third doping segment are all insulated and isolated from the second doping layer.

2. The back contact cell according to claim 1, characterized in that: When the doping type of the silicon substrate is p-type doping, the doping types of the first doping layer and the first connecting layer are n-type doping, the doping types of the second doping layer and the second connecting layer are p-type doping, and the doping type of the third doping layer is n-type doping; When the doping type of the silicon substrate is n-type doping, the doping type of the first doping layer and the first connecting layer is p-type doping, the doping type of the second doping layer and the second connecting layer is n-type doping, and the doping type of the third doping layer is p-type doping.

3. The back contact cell according to claim 1, characterized in that: Two ends of the third doping segment are connected to the first doping segment and the second doping segment respectively; and / or The third doped segment is connected to a plurality of the first doped layers.

4. The back contact cell according to claim 1, characterized in that: The first doped segment is connected to an end of the first connecting layer; and / or The second doped segment is connected to an end of the first connecting layer.

5. The back contact cell according to claim 1, characterized in that: A first auxiliary gate is disposed on the first doped layer, and a second auxiliary gate is disposed on the second doped layer, and both the first auxiliary gate and the second auxiliary gate extend along the second direction; The first auxiliary gate is disconnected at the second connection layer, and the second auxiliary gate is disconnected at the first connection layer; A third sub-grid is disposed on the first doped segment, a fourth sub-grid is disposed on the second doped segment, the third sub-grid and the fourth sub-grid extend continuously along the second direction, a fifth sub-grid is disposed on the third doped segment, and the fifth sub-grid extends continuously along the first direction.

6. The back contact cell according to claim 5, characterized in that: A first main grid is disposed on the first connection layer, the first main grid extends along the first direction and is electrically connected to the first sub-grid, the third sub-grid and the fourth sub-grid; A second main grid is disposed on the second connection layer. The second main grid extends along the first direction and is electrically connected to the second sub-grid, and the second main grid is not electrically connected to the first sub-grid, the third sub-grid and the fourth sub-grid.

7. The back contact cell according to claim 6, characterized in that: The second main gate does not extend above the first doped segment and the second doped segment; or The second main gate extends to above the first doped section and the second doped section and intersects with the third sub-gate and the fourth sub-gate. A first insulating layer is provided at the position where the third sub-gate and the fourth sub-gate intersect with the second main gate. The second main gate is located above the first insulating layer.

8. The back contact cell according to claim 5, characterized in that: The fifth sub-grid is electrically connected to the third sub-grid and the fourth sub-grid, and the fifth sub-grid is not electrically connected to the second sub-grid.

9. The back contact battery according to claim 5, characterized in that: The widths of the third sub-grid and the fourth sub-grid in the first direction are greater than the widths of the first sub-grid and the second sub-grid in the first direction.

10. The back contact cell according to claim 5, characterized in that: A third main grid is further disposed on the third doped segment, the third main grid continuously extends along the first direction and is electrically connected to the fifth sub-grid, and the third main grid is not electrically connected to the second sub-grid; and / or The width of at least a portion of the fifth sub-gate in the second direction is greater than the widths of the first sub-gate and the second sub-gate in the first direction.

11. The back contact cell according to claim 5, characterized in that: The third doping layer further includes a fourth doping segment, which is arranged at the fourth edge and extends continuously along the first direction, the fourth doping segment is insulated and isolated from the second doping layer, and a sixth sub-gate is arranged on the fourth doping segment, which extends continuously along the first direction.

12. The back contact cell according to claim 11, characterized in that: Two ends of the fourth doping segment are respectively connected to the first doping segment and the second doping segment; and / or The fourth doped segment is connected to a plurality of the first doped layers.

13. The back contact cell according to claim 12, characterized in that: The sixth sub-gate is electrically connected to the third sub-gate and the fourth sub-gate, and the sixth sub-gate is not electrically connected to the second sub-gate; and / or a fourth main gate is provided on the fourth doped segment, the fourth main gate extends continuously along the first direction and is electrically connected to the sixth sub-gate, and the fourth main gate is not electrically connected to the second sub-gate.

14. The back contact cell according to claim 5, characterized in that: A fourth doping layer is further stacked on the edge region, the fourth doping layer is arranged at the fourth edge and extends continuously along the first direction, the doping type of the fourth doping layer is opposite to the doping type of the third doping layer, and the fourth doping layer is insulated and isolated from the first doping layer, the first doping segment and the second doping segment; A seventh sub-grid is disposed on the fourth doping layer. The seventh sub-grid extends continuously along the first direction and is not electrically connected to the third sub-grid and the fourth sub-grid.

15. The back contact cell according to claim 14, characterized in that The fourth doping layer is connected to a plurality of the second doping layers.

16. The back contact cell according to claim 14, characterized in that A fifth main grid is disposed on the fourth doped layer, the fifth main grid continuously extends along the first direction and is electrically connected to the seventh auxiliary grid, and the fifth main grid is not electrically connected to the first auxiliary grid, the third auxiliary grid and the fourth auxiliary grid; And / or, the width of at least a part of the seventh sub-gate in the second direction is greater than the widths of the first sub-gate and the second sub-gate in the first direction.

17. The back contact cell according to claim 16, characterized in that: An extension line of the fourth doping layer along the first direction intersects the first doping section and the second doping section; Among them, the fifth main gate does not extend above the first doped segment and the second doped segment; or, the fifth main gate extends above the first doped segment and the second doped segment and intersects with the third sub-gate and the fourth sub-gate, and a second insulating layer is arranged at the position where the third sub-gate and the fourth sub-gate intersect with the fifth main gate, and the fifth main gate is located above the second insulating layer.

18. A battery assembly, characterized in that: A back contact battery comprising any one of claims 1-17.

19. A photovoltaic system, characterized in that: A battery assembly comprising the battery assembly of claim 18.

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