Chip tantalum capacitor packaging substrate
By setting pads and flaps on the packaging substrate of the chip tantalum capacitor, the problems of poor bonding and poor shearing force of the packaging substrate are solved, and higher structural strength and mass stability are achieved.
Patent Information
- Application Number
- CN202421707093.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-07-18
- Publication Date
- 2025-05-13
- Estimated Expiration
- 2034-07-18
AI Technical Summary
The existing leadless frame-free tantalum capacitor packaging substrate has flat and smooth surfaces, and the molded material does not match the PCB board enough, resulting in poor bonding force between the packaging layer and the packaging substrate and peeling off; at the same time, the packaging substrate has no pad structure, and metal plating is used instead, and there is a situation of poor shear force after welding.
A chip-type tantalum capacitor packaging substrate is designed. By setting a pad on the substrate instead of the copper-plated bonding area and setting a flap on the pad, the structural strength of the packaging substrate and the shear force after installation are improved.
This design is embedded in the packaging layer after molding, avoiding the poor bonding force between the PCB board and the packaging layer. At the same time, due to the existence of metal pads, the shear force after installation and welding is improved, and the quality stability of the tantalum capacitor is enhanced.
Smart Images

Figure CN222867453U_ABST
Abstract
Description
Technical Field
[0001] The utility model belongs to the technical field of tantalum capacitors, and in particular relates to a chip-type tantalum capacitor packaging substrate. Background Art
[0002] Leadless tantalum chip capacitors are new structure tantalum chip capacitors developed in recent years to achieve higher volume efficiency and more efficient packaging efficiency.
[0003] Usually, the package substrate is obtained by copper plating on the PCB board and etching. Since the surface of the PCB board is flat and smooth, some molding materials are not compatible with the PCB board, and the bonding strength between the package layer and the package substrate is not good after molding, and there is peeling and falling off. At the same time, the package substrate does not have a pad structure, but uses a metal plating layer instead, which has poor shear force after welding.
[0004] For example, the Chinese patent with the publication number CN117831957A discloses a leadless chip tantalum capacitor and its manufacturing method, which belongs to the technical field of tantalum capacitor manufacturing. The tantalum capacitor includes a substrate and a tantalum core, one side of the tantalum core is connected to a cathode connecting member through a conductive layer, and the tantalum core is arranged on the substrate through the conductive layer, the tantalum core is encapsulated in a packaging part, both ends of the packaging part are provided with a metal coating, the tantalum wire of the tantalum core is connected to the metal coating at one end of the packaging part, and the cathode connecting member is connected to the metal coating at one end of the packaging part away from the tantalum wire. The structure of the tantalum capacitor is optimized, the lead frame and the anode connecting member are removed, the positive electrode of the tantalum capacitor is connected to the metal coating at one end of the packaging part through the tantalum wire, and the negative electrode of the tantalum capacitor is connected to the metal coating at the other end of the packaging part through the cathode connecting member, thereby improving the volumetric efficiency and capacitance of the tantalum capacitor and reducing the ESR of the tantalum capacitor. However, the substrate in the patent is a PCB board. Since the surface of the PCB board is flat and smooth, the molded material and the PCB board are not well matched. After molding, the packaging layer and the packaging substrate are not well bonded, and there is peeling. At the same time, the substrate of the patent does not have a pad structure, but uses a metal plating layer instead, which has poor shear force after welding. Utility Model Content
[0005] In order to solve the above technical problems, the utility model provides a chip-type tantalum capacitor packaging substrate.
[0006] The utility model is realized through the following technical solutions.
[0007] The utility model provides a chip-type tantalum capacitor packaging substrate, comprising a substrate, a positioning hole, a metal rib and a packaging station; the positioning hole, the metal rib and the packaging station are respectively arranged on the substrate, and the packaging station and the metal rib are connected.
[0008] Preferably, the packaging station comprises a hollow groove and a pad; the pad is arranged in the hollow groove, and the pad is connected to the metal rib.
[0009] Preferably, a wing is provided on the pad.
[0010] Preferably, the thickness of the pad is smaller than the thickness of the substrate.
[0011] Preferably, the pad is formed by digging grooves of equal depth on the upper and lower sides of the substrate, and the depth of the grooves is 0.05 mm to 3.0 mm.
[0012] Preferably, it also includes a weight-reducing groove; the weight-reducing groove is arranged between the metal ribs.
[0013] Preferably, the substrate has a thickness of 0.05 mm to 3.0 mm.
[0014] The beneficial effects of the utility model are:
[0015] The utility model optimizes the structure of the package substrate of the leadless frame chip tantalum capacitor, cancels the PCB board and the copper-plated bonding area structure on the conventional package substrate, replaces the copper-plated bonding area by providing a soldering pad, and a wing is provided on the soldering pad. This package substrate structure is embedded in the package layer after molding, thereby avoiding the situation that the PCB board and the package layer have poor bonding strength. At the same time, the shear force after installation and welding is improved due to the presence of the metal soldering pad. BRIEF DESCRIPTION OF THE DRAWINGS
[0016] Figure 1 It is a schematic diagram of the overall structure provided by an embodiment of the utility model;
[0017] Figure 2 It is a three-dimensional schematic diagram of the overall structure provided by an embodiment of the utility model.
[0018] In the figure: 1-substrate, 2-positioning hole, 3-metal rib, 4-packaging station, 5-hollow groove, 6-soldering pad, 7-wing, 8-weight reduction groove. DETAILED DESCRIPTION
[0019] The technical solution of the utility model is further described below, but the scope of protection required is not limited to the description.
[0020] like Figure 1 , 2 As shown, a chip tantalum capacitor packaging substrate includes a substrate 1, a positioning hole 2, a metal rib 3 and a packaging station 4; the positioning hole 2, the metal rib 3 and the packaging station 4 are respectively arranged on the substrate 1, and the packaging station 4 and the metal rib 3 are connected.
[0021] The substrate 1 is made of one or more materials selected from the group consisting of copper, silver, iron, nickel and chromium.
[0022] The base plate 1 is provided with metal ribs 3 to ensure the integrity of the base plate 1 and the structural strength of the base plate 1 .
[0023] The positioning hole 2 ensures that the chip tantalum capacitor package substrate is accurately positioned during mold packaging, avoiding errors caused by inaccurate positioning, thereby reducing the production defect rate of the tantalum capacitor and improving production efficiency.
[0024] The packaging station 4 is used to package other components of the tantalum capacitor.
[0025] In this embodiment, the substrate 1 is provided with 6 upper positioning holes and 6 lower positioning holes, and 36 packaging stations 4 are provided in the middle, so that 36 tantalum capacitors can be packaged at the same time.
[0026] The packaging station 4 includes a hollow groove 5 and a pad 6 ; the pad 6 is arranged in the hollow groove 5 , and the pad 6 is connected to the metal rib 3 .
[0027] The hollow groove 5 is beneficial to the structural integration of the tantalum capacitor after packaging.
[0028] The pad 6 is a conductive metal and is connected to the metal rib 3 to keep its position fixed. By setting the pad 6, the ESR, i.e., the equivalent series resistance, of the leadless frame chip tantalum capacitor can be effectively reduced, while the shear force of the tantalum capacitor after installation can be increased, thereby increasing the quality stability of the tantalum capacitor.
[0029] The pad 6 is provided with a fin 7 .
[0030] The fin 7 is arranged on the pad 6 and will be embedded in the molding material after the tantalum capacitor is packaged to prevent the molding material from being separated from the packaging substrate, thereby further enhancing the structural stability of the tantalum capacitor.
[0031] The thickness of the pad 6 is smaller than the thickness of the substrate 1 .
[0032] The pad 6 and the substrate 1 are an integrated structure. The metal pad is obtained by digging, cutting, stamping, etc. on the substrate 1, thereby ensuring the integrity of the substrate 1 and enhancing the structural stability of the package substrate.
[0033] The pad 6 is formed by digging grooves of equal depth on the upper and lower sides of the substrate 1, and the depth of the grooves is 0.05 mm to 3.0 mm.
[0034] In this embodiment, the pad 6 is formed by digging grooves of equal depth at the top and bottom, which is simple and convenient to operate. The groove depth is 0.05mm to 3.0mm, and the wing can be formed at the same time. Two structures can be easily formed in one step, and the manufacturing is simple.
[0035] It also includes weight-reducing grooves 8 ; the weight-reducing grooves 8 are arranged between the metal ribs 3 .
[0036] Weight-reducing grooves 8 are provided between the metal ribs 3 to reduce the weight of the packaging substrate while ensuring the integrity and structural stability of the packaging substrate.
[0037] The thickness of the substrate 1 is 0.05 mm to 3.0 mm.
[0038] The thickness of the substrate 1 is set according to the actual needs. 0.05 mm to 3.0 mm ensures the structural strength of the package substrate while having good conductivity and easy processing, and is conducive to controlling the volume of the tantalum capacitor.
[0039] The utility model optimizes the structure of the package substrate of the leadless frame chip tantalum capacitor, cancels the PCB board and the copper-plated bonding area structure on the conventional package substrate, replaces the copper-plated bonding area by providing a soldering pad, and a wing is provided on the soldering pad. This package substrate structure is embedded in the package layer after molding, thereby avoiding the situation that the PCB board and the package layer have poor bonding strength. At the same time, the shear force after installation and welding is improved due to the presence of the metal soldering pad.
Claims
1. A chip tantalum capacitor packaging substrate, characterized in that: It comprises a substrate (1), a positioning hole (2), a metal rib (3) and a packaging station (4); the positioning hole (2), the metal rib (3) and the packaging station (4) are respectively arranged on the substrate (1), and the packaging station (4) and the metal rib (3) are connected.
2. The packaging substrate according to claim 1, wherein: The packaging station (4) comprises a hollow groove (5) and a solder pad (6); the solder pad (6) is arranged in the hollow groove (5), and the solder pad (6) is connected to the metal rib (3).
3. The packaging substrate according to claim 2, wherein: The pad (6) is provided with a wing (7).
4. The packaging substrate according to claim 2, wherein: The thickness of the solder pad (6) is smaller than the thickness of the substrate (1).
5. The packaging substrate according to claim 2, wherein: The pad (6) is formed by digging grooves of equal depth on the upper and lower sides of the substrate (1), and the depth of the grooves is 0.05 mm to 3.0 mm.
6. The packaging substrate according to claim 1, wherein: It also includes a weight-reducing groove (8); the weight-reducing groove (8) is arranged between the metal ribs (3).
7. The packaging substrate according to claim 1, wherein: The thickness of the substrate (1) is 0.05 mm to 3.0 mm.
Citation Information
Patent Citations
Chip tantalum capacitor without lead frame and manufacturing method thereof
CN117831957A