Heterojunction cell and photovoltaic module
By adopting specific layer structures and material combinations in heterojunction batteries, optical performance and carrier collection efficiency are optimized, and the problem of insufficient optical performance and efficiency of existing heterojunction batteries is solved, and more efficient sunlight collection and conversion efficiency is achieved.
Patent Information
- Application Number
- CN202421812675.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-07-29
- Publication Date
- 2025-05-13
- Estimated Expiration
- 2034-07-29
AI Technical Summary
The optical performance and efficiency of existing heterojunction batteries have not yet reached the optimal level, making it difficult to effectively collect sunlight and improve conversion efficiency.
By using a silicon substrate, a hydrogenated amorphous silicon carbide layer as the intrinsic passivation layer, and a hydrogenated microcrystalline silicon carbide layer as the doping layer in a heterojunction battery, and adjusting the thickness and structure of each layer, the optical performance and carrier collection efficiency of the battery are optimized.
It realizes more efficient optical performance of heterojunction batteries, improves the sunlight collection efficiency and short-circuit current, and thus improves the conversion efficiency and service life of the battery.
Smart Images

Figure CN222869328U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to the technical field of photovoltaics, and in particular to a heterojunction battery and a photovoltaic module. Background Art
[0002] Heterojunction solar cell (HJT) is a high-performance photovoltaic cell technology; its main feature is that it uses a combination of different types of semiconductor materials to form a heterojunction structure to improve the photoelectric conversion efficiency and stability of the cell. Moreover, due to its unique double-sided structure and the passivation effect of the intrinsic layer, heterojunction cells have many natural advantages such as high conversion efficiency, no light-induced degradation, good temperature characteristics, and a short manufacturing process. Therefore, heterojunction cells have great market potential.
[0003] However, the optical performance and efficiency of heterojunction cells provided by related technologies need to be further improved. Utility Model Content
[0004] The purpose of the utility model is to provide a heterojunction battery and a photovoltaic module. The heterojunction battery can be used in a photovoltaic module. The heterojunction battery has better optical properties so as to collect sunlight more effectively. The heterojunction battery can increase short-circuit current and improve conversion efficiency.
[0005] The embodiment of the utility model is achieved as follows:
[0006] In a first aspect, the utility model provides a heterojunction battery, comprising:
[0007] A silicon substrate having a first surface and a second surface disposed opposite to each other;
[0008] A first intrinsic layer, the first intrinsic layer is deposited on the first surface;
[0009] A second intrinsic layer, the second intrinsic layer is deposited on the second surface;
[0010] A first doped layer, the first doped layer is deposited on a side of the first intrinsic layer away from the first surface;
[0011] A second doped layer, the second doped layer is deposited on a side of the second intrinsic layer away from the second surface;
[0012] A first transparent conductive layer, the first transparent conductive layer is deposited on a side of the first doped layer away from the first intrinsic layer; and
[0013] A second transparent conductive layer is deposited on a side of the second doped layer away from the second intrinsic layer; wherein,
[0014] The first intrinsic layer and the second intrinsic layer both include a hydrogenated amorphous silicon carbide layer, and a thickness of the first intrinsic layer is smaller than a thickness of the second intrinsic layer.
[0015] In an optional embodiment, the thickness of the first intrinsic layer is 5-15 nm; the thickness of the second intrinsic layer is 1.05-1.6 times the thickness of the first intrinsic layer.
[0016] In an optional embodiment, the thickness of the first doping layer is 15-40 nm; the thickness of the second doping layer is 20-35 nm.
[0017] In an optional embodiment, the thickness of the second doping layer is 1.2-1.5 times the thickness of the first doping layer.
[0018] In an optional embodiment, the first doping layer and the second doping layer both include hydrogenated microcrystalline silicon carbide layers.
[0019] In an optional embodiment, the first doped layer includes a hydrogenated microcrystalline silicon carbon oxide layer; the first intrinsic layer also includes a hydrogenated amorphous silicon carbon oxide layer deposited on the first surface and a hydrogenated amorphous silicon carbide layer deposited on the hydrogenated amorphous silicon carbon oxide layer away from the silicon substrate; wherein,
[0020] The hydrogenated microcrystalline silicon oxycarbide layer is deposited on a side of the hydrogenated amorphous silicon carbide layer facing away from the hydrogenated amorphous silicon oxycarbide layer.
[0021] In an optional embodiment, the thickness of the hydrogenated microcrystalline silicon oxycarbon layer is 8-15 times the thickness of the hydrogenated amorphous silicon oxycarbon layer.
[0022] In an optional embodiment, the ratio of the thickness of the hydrogenated amorphous silicon carbide layer to the thickness of the hydrogenated amorphous silicon oxycarbon layer is 3:(1-2.5).
[0023] In an optional embodiment, the thickness of the first transparent conductive layer is 70-120 nm; the thickness of the second transparent conductive layer is 80-140 nm.
[0024] In an optional embodiment, the thickness of the second transparent conductive layer is greater than the thickness of the first transparent conductive layer.
[0025] In an optional embodiment, the thickness of the second transparent conductive layer is 15-25 nm greater than the thickness of the first transparent conductive layer.
[0026] In a second aspect, the utility model provides a photovoltaic module, comprising: any one of the heterojunction cells described above.
[0027] The beneficial effects of the heterojunction battery of the embodiment of the utility model include: the heterojunction battery provided by the embodiment of the utility model includes a silicon substrate, a first intrinsic layer, a second intrinsic layer, a first doped layer and a second doped layer, the silicon substrate has a first surface and a second surface distributed opposite to each other; the first intrinsic layer is deposited on the first surface; the second intrinsic layer is deposited on the second surface; the first doped layer is deposited on the side of the first intrinsic layer away from the first surface; the second doped layer is deposited on the side of the second intrinsic layer away from the second surface; the first intrinsic layer and the second intrinsic layer both include hydrogenated amorphous silicon carbide layers, and the thickness of the first intrinsic layer is less than the thickness of the second intrinsic layer. The first intrinsic layer and the second intrinsic layer both include hydrogenated amorphous silicon carbide layers (a-SiC:H). Hydrogenated amorphous silicon carbide (a-SiC:H) has a wide band gap, usually between 2.0 and 2.5 eV, which makes it have good absorption capacity for the ultraviolet and visible light parts of the solar spectrum, that is, the heterojunction battery can collect sunlight more effectively. In addition, using hydrogenated amorphous silicon carbide (a-SiC:H) as an intrinsic passivation layer can reduce the defect density on the surface of the silicon substrate, thereby reducing the recombination of carriers and improving the open circuit voltage and efficiency of the battery. Moreover, compared with pure silicon or amorphous silicon, hydrogenated amorphous silicon carbide (a-SiC:H) has less performance degradation when exposed to high-energy particle radiation, and it has higher chemical stability and can withstand more severe environments to improve the durability and service life of heterojunction batteries.
[0028] The thickness of the first intrinsic layer is smaller than that of the second intrinsic layer. The first intrinsic layer can be used as the front intrinsic layer, and the second intrinsic layer can be used as the back intrinsic layer. Relatively thinning the thickness of the front intrinsic layer can reduce light reflection and ensure a larger amount of light entering the heterojunction battery, which helps to improve the light absorption rate of the heterojunction battery and thus improve the battery efficiency. Relatively increasing the thickness of the back intrinsic layer can improve the collection efficiency of carriers; in heterojunction batteries, the back intrinsic layer acts as a carrier transport layer, and its thickness directly affects the transmission efficiency of carriers (electrons and holes) to the electrodes of the heterojunction battery. A thicker back intrinsic layer can provide a longer carrier transmission path, reducing the recombination probability of carriers before reaching the electrode, thereby improving the fill factor and open circuit voltage of the heterojunction battery.
[0029] The first intrinsic layer and the second intrinsic layer are both passivation layers, which play a role in surface passivation, reduce surface recombination, and improve battery efficiency; among them, a thicker back intrinsic layer can also provide a better passivation effect, reduce surface defects on the back, thereby reducing non-radiative recombination of carriers and increasing the open circuit voltage of the battery. A thicker back intrinsic layer can also optimize the electric field distribution inside the heterojunction battery, help separate and directional movement of carriers, and further improve the performance of the heterojunction battery.
[0030] Relatively thinning the thickness of the front intrinsic layer can also improve the efficiency of preparation and reduce the amount of raw materials used to reduce costs.
[0031] The photovoltaic module of the embodiment of the utility model includes all the beneficial effects of the aforementioned heterojunction battery: for example, the open circuit voltage and conversion efficiency are improved, and the service life is longer. BRIEF DESCRIPTION OF THE DRAWINGS
[0032] In order to more clearly illustrate the technical solutions of the embodiments of the utility model, the drawings required for use in the embodiments will be briefly introduced below. It should be understood that the following drawings only show certain embodiments of the utility model and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other relevant drawings can be obtained based on these drawings without paying creative work.
[0033] Figure 1 A cross-sectional view of a heterojunction battery in an embodiment of the utility model;
[0034] Figure 2 A cross-sectional view of a heterojunction battery in another embodiment of the present invention;
[0035] Figure 3 A cross-sectional view of a heterojunction battery in some embodiments of the present invention;
[0036] Figure 4 A cross-sectional view of a heterojunction battery in some other embodiments of the present invention;
[0037] Figure 5 It is a cross-sectional view of a heterojunction battery in some other embodiments of the present invention.
[0038] Icon: 010-heterojunction cell; 100-silicon substrate; 210-first intrinsic layer; 211-hydrogenated amorphous silicon carbon oxide layer; 212-hydrogenated amorphous silicon carbide layer; 220-second intrinsic layer; 310-first doped layer; 320-second doped layer; 410-first transparent conductive layer; 420-second transparent conductive layer; 500-electrode; 610-metal nanowire film; 620-anti-reflection layer. DETAILED DESCRIPTION
[0039] In order to make the purpose, technical scheme and advantages of the embodiments of the utility model clearer, the technical scheme in the embodiments of the utility model will be clearly and completely described below in conjunction with the drawings in the embodiments of the utility model. Obviously, the described embodiments are part of the embodiments of the utility model, not all of the embodiments. Generally, the components of the embodiments of the utility model described and shown in the drawings here can be arranged and designed in various different configurations.
[0040] Therefore, the following detailed description of the embodiments of the present invention provided in the accompanying drawings is not intended to limit the scope of the present invention to be protected, but merely represents selected embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.
[0041] It should be noted that similar reference numerals and letters denote similar items in the following drawings, and therefore, once an item is defined in one drawing, further definition and explanation thereof is not required in subsequent drawings.
[0042] In the description of the present utility model, it should be noted that the terms "upper", "lower", etc. indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, or the orientation or positional relationship in which the utility model product is usually placed when in use, which is only for the convenience of describing the utility model and simplifying the description, and does not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present utility model. In addition, the terms "first", "second", etc. are only used to distinguish the description, and cannot be understood as indicating or implying relative importance.
[0043] In the description of the present invention, it is also necessary to explain that, unless otherwise clearly specified and limited, the terms "setting" and "connection" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be an indirect connection through an intermediate medium, or it can be the internal communication of two components. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.
[0044] Please refer to Figure 1 The present embodiment provides a photovoltaic module, which includes a heterojunction cell 010; the heterojunction cell 010 includes a silicon substrate 100, a first intrinsic layer 210, a second intrinsic layer 220, a first doped layer 310, a second doped layer 320, a first transparent conductive layer 410, and a second transparent conductive layer 420, wherein the silicon substrate 100 has a first surface and a second surface that are oppositely distributed; the first intrinsic layer 210 is deposited on the first surface; the second intrinsic layer 220 is deposited on the second surface; the first doped layer 310 is deposited on a side of the first intrinsic layer 210 that is away from the first surface; the second doped layer 320 is deposited on a side of the second intrinsic layer 220 that is away from the second surface; the first transparent conductive layer 410 is deposited on a side of the first doped layer 310 that is away from the first intrinsic layer 210, and the second transparent conductive layer 420 is deposited on a side of the second doped layer 320 that is away from the second intrinsic layer 220; electrodes 500 are provided on both the first transparent conductive layer 410 and the second transparent conductive layer 420.
[0045] The first intrinsic layer 210 and the second intrinsic layer 220 both include a hydrogenated amorphous silicon carbide layer 212 , and the thickness of the first intrinsic layer 210 is smaller than the thickness of the second intrinsic layer 220 .
[0046] The first intrinsic layer 210 and the second intrinsic layer 220 both include a hydrogenated amorphous silicon carbide layer 212 (a-SiC:H). Hydrogenated amorphous silicon carbide (a-SiC:H) has a wide band gap, usually between 2.0 and 2.5 eV, which makes it have good absorption capacity for the ultraviolet and visible light parts in the solar spectrum, that is, the heterojunction battery 010 can collect sunlight more effectively. In addition, using hydrogenated amorphous silicon carbide (a-SiC:H) as an intrinsic passivation layer can reduce the defect density on the surface of the silicon substrate 100, thereby reducing the recombination of carriers and improving the open circuit voltage and efficiency of the battery. Moreover, compared with pure silicon or amorphous silicon, hydrogenated amorphous silicon carbide (a-SiC:H) has less performance degradation when exposed to high-energy particle radiation, and it has higher chemical stability and can withstand more severe environments to improve the durability and service life of the heterojunction battery 010.
[0047] The thickness of the first intrinsic layer 210 is smaller than that of the second intrinsic layer 220. The first intrinsic layer 210 can be used as the front intrinsic layer, and the second intrinsic layer 220 can be used as the back intrinsic layer. Relatively thinning the thickness of the front intrinsic layer can reduce the reflection of light and ensure a larger amount of light entering the heterojunction battery 010, which helps to improve the light absorption rate of the heterojunction battery 010, thereby improving the battery efficiency. Relatively increasing the thickness of the back intrinsic layer can improve the collection efficiency of carriers; in the heterojunction battery 010, the back intrinsic layer acts as a carrier transport layer, and its thickness directly affects the transmission efficiency of carriers (electrons and holes) to the electrode 500 of the heterojunction battery 010. A thicker back intrinsic layer can provide a longer carrier transmission path, reduce the recombination probability of carriers before reaching the electrode 500, and thus improve the fill factor and open circuit voltage of the heterojunction battery 010.
[0048] The first intrinsic layer 210 and the second intrinsic layer 220 are both passivation layers, which play a role in surface passivation, reduce surface recombination, and improve battery efficiency; wherein, a thicker back intrinsic layer can also provide a better passivation effect, reduce surface defects on the back, thereby reducing non-radiative recombination of carriers and improving the open circuit voltage of the battery. A thicker back intrinsic layer can also optimize the electric field distribution inside the heterojunction battery 010, help the separation and directional movement of carriers, and further improve the performance of the heterojunction battery 010.
[0049] Relatively thinning the thickness of the front intrinsic layer can also improve the efficiency of preparation and reduce the amount of raw materials used to reduce costs.
[0050] Optionally, the thickness of the silicon substrate 100 is 90-130 μm, for example, 90 μm, 95 μm, 100 μm, 105 μm, 110 μm, 115 μm, 120 μm, 125 μm, 130 μm, etc., which is not specifically limited here.
[0051] A thicker silicon substrate 100 can absorb photons in a wider spectral range, especially can absorb long-wavelength light more fully, and improve the short-circuit current (Isc) of the battery; however, an overly thick silicon substrate 100 will also increase the transmission distance of photogenerated carriers inside the substrate, increase the probability of carrier recombination, and thus may reduce the open circuit voltage (Voc) and fill factor (FF). Correspondingly, a thinner silicon substrate 100 can reduce the transmission distance of photogenerated carriers, reduce the recombination rate, and help improve the open circuit voltage and fill factor, but due to the poor absorption capacity of the thin sheet for long-wavelength light, a part of the short-circuit current may be sacrificed. Therefore, optimizing the thickness of the silicon substrate 100 and controlling it at 90-130μm can effectively ensure the open circuit voltage (Voc) and fill factor (FF) of the heterojunction battery 010.
[0052] Controlling the thickness of the silicon substrate 100 to 90-130 μm can also ensure that the silicon substrate 100 has better thermal stability, which is conducive to making the heterojunction battery 010 have greater heat capacity and heat dissipation capacity, thereby enabling the heterojunction battery 010 to be used in a high temperature environment and reducing the problem of the heterojunction battery 010 being easily damaged due to high temperature. Controlling the thickness of the silicon substrate 100 to 90-130 μm can also improve the problem of reduced mechanical strength due to the thin thickness of the silicon substrate 100, and reduce the breakage rate of the heterojunction battery 010.
[0053] Optionally, the thickness of the first intrinsic layer 210 is 5-15nm, for example: 5nm, 6nm, 7nm, 8nm, 9nm, 10nm, 11nm, 12nm, 13nm, 14nm, 15nm, etc., which are not specifically limited here. The thickness of the first intrinsic layer 210 as the front intrinsic layer is controlled to be 5-15nm, ensuring that the heterojunction battery 010 has a thinner front intrinsic layer, which helps to reduce the reflection of the surface of the heterojunction battery 010, thereby improving the light incidence and absorption efficiency; one of the main functions of the intrinsic layer is to provide surface passivation, reduce the recombination center on the silicon surface, and improve the open circuit voltage (Voc) of the battery; the front intrinsic layer is within the range of 5-15nm, which can effectively passivate the silicon surface without increasing surface recombination or internal recombination due to excessive thickness; the relatively thin front intrinsic layer also helps to quickly transmit photogenerated carriers (electrons and holes) to the corresponding collection electrode 500, reducing the recombination loss of carriers during transmission, thereby improving the fill factor (FF) of the battery.
[0054] It should be noted that if the front intrinsic layer is too thick, it may increase the dark current, that is, the current spontaneously generated in the battery in the absence of light; controlling the front intrinsic layer within the range of 5-15nm helps reduce the dark current and improve the photoelectric conversion efficiency of the battery.
[0055] Optionally, the thickness of the second intrinsic layer 220 is 1.05-1.6 times the thickness of the first intrinsic layer 210, for example: 1.05 times, 1.1 times, 1.2 times, 1.3 times, 1.4 times, 1.5 times, 1.6 times, etc., which are not specifically limited here. The second intrinsic layer 220 as the back intrinsic layer and the first intrinsic layer 210 as the front intrinsic layer can work together to form an effective heterojunction; the thin front intrinsic layer can work in conjunction with the thicker back intrinsic layer to optimize the carrier separation and collection of the battery.
[0056] For example, in some embodiments, the thickness of the first intrinsic layer 210 is 5 nm, and the thickness of the second intrinsic layer 220 is 7 nm. In other embodiments, the thickness of the first intrinsic layer 210 is 10 nm, and the thickness of the second intrinsic layer 220 is 13 nm. In still other embodiments, the thickness of the first intrinsic layer 210 is 15 nm, and the thickness of the second intrinsic layer 220 is 16 nm.
[0057] Optionally, the thickness of the first doping layer 310 is 15-40 nm, for example, 15 nm, 18 nm, 20 nm, 22 nm, 25 nm, 27 nm, 30 nm, 33 nm, 35 nm, 37 nm, 40 nm, etc., which is not specifically limited here.
[0058] Optionally, the thickness of the second doping layer 320 is 20-35 nm, for example, 20 nm, 22 nm, 25 nm, 27 nm, 30 nm, 33 nm, 35 nm, etc., which is not specifically limited here.
[0059] Among them, the first doping layer 310 is an n-type doping layer, and the second doping layer 320 is a p-type doping layer; in a preferred embodiment, the thickness of the second doping layer 320 as a p-type doping layer can be controlled to be greater than the first doping layer 310 as an n-type doping layer; exemplarily, the thickness of the second doping layer 320 is 5-9nm greater than the thickness of the first doping layer 310.
[0060] Optionally, the thickness of the second doping layer 320 is 1.2-1.5 times the thickness of the first doping layer 310, for example, 1.2 times, 1.25 times, 1.3 times, 1.35 times, 1.4 times, 1.45 times, 1.5 times, etc., which is not specifically limited here.
[0061] A thicker p-type doping layer can provide a longer electron transmission path, thereby reducing the recombination probability of electrons before reaching the electrode 500 on the front side of the heterojunction battery 010; in this way, less electrons are lost during the transmission process, which is beneficial for improving the fill factor (FF) and open circuit voltage (Voc) of the heterojunction battery 010. Moreover, although the n-type doping layer is important for increasing the current density (Isc), the thickness of the p-type doping layer is also critical for ensuring the effective collection of holes. By optimizing the thickness of the p-type doping layer, the current density and the fill factor can be balanced to achieve a higher photoelectric conversion efficiency. A p-type doping layer that is thicker than the n-type doping layer helps to optimize the electric field distribution inside the heterojunction battery 010, ensure that the photogenerated carriers can effectively move toward the electrode 500, reduce the non-radiative recombination of the carriers, and improve the performance of the battery.
[0062] It should be noted that, generally, the process of the p-type doping layer is easier to control, and setting the p-type doping layer to be relatively thick can also ensure the consistency and repeatability of the heterojunction battery 010 .
[0063] In this embodiment, both the first doping layer 310 and the second doping layer 320 include hydrogenated microcrystalline silicon carbide layers.
[0064] The use of hydrogenated microcrystalline silicon carbide (μc-SiC:H) as a doping layer includes the following benefits: 1. High carrier mobility: Microcrystalline silicon carbide layers have higher electron and hole mobility than amorphous silicon carbide or microcrystalline silicon of the same structure; this helps to improve the efficiency of carrier transmission to the electrode 500 and reduce carrier recombination, thereby improving the fill factor and open circuit voltage of the battery. 2. Wide bandgap material: μc-SiC:H has a wide bandgap, which can absorb short-wavelength light in the solar spectrum while allowing long-wavelength light to be absorbed deep inside the battery, which helps to increase the short-circuit current of the battery. 3. Stable chemical and physical properties: Hydrogenated microcrystalline silicon carbide has good chemical stability and mechanical strength, can resist corrosion and wear in harsh environments, and improve the stability and service life of the battery. 4. Radiation resistance: Compared with amorphous or crystalline silicon, the μc-SiC:H layer has less performance degradation when exposed to high-energy particle radiation, which makes it suitable for applications requiring high durability. 5. Process compatibility: The hydrogenated microcrystalline silicon carbide layer can be prepared by plasma enhanced chemical vapor deposition (PECVD) and other technologies, which is compatible with the heterojunction battery 010 manufacturing process provided by related technologies, and is easy to integrate into existing production lines. 6. Optimize the electric field distribution: As a doping layer, μc-SiC:H can optimize the electric field distribution inside the battery, promote the effective separation and directional movement of carriers, and further improve the performance of the battery.
[0065] It should be understood, please refer to Figure 2In other embodiments, the first doping layer 310 includes a hydrogenated microcrystalline carbon oxide silicon layer (μc-SiCO:H); the first intrinsic layer 210 also includes a hydrogenated amorphous carbon oxide silicon layer 211 (a-SiCO:H), wherein the hydrogenated amorphous carbon oxide silicon layer 211 is deposited on the first surface of the silicon substrate 100, the hydrogenated amorphous silicon carbide layer 212 is deposited on the side of the hydrogenated amorphous carbon oxide silicon layer 211 away from the silicon substrate 100, and the hydrogenated microcrystalline carbon oxide silicon layer is deposited on the side of the hydrogenated amorphous silicon carbide layer 212 away from the hydrogenated amorphous carbon oxide silicon layer 211; that is, in this embodiment, the front side of the heterojunction battery 010 includes from top to bottom: a hydrogenated microcrystalline carbon oxide silicon layer (μc-SiCO:H), a hydrogenated amorphous silicon carbide layer 212 (a-SiC:H), and a hydrogenated amorphous carbon oxide silicon layer 211 (a-SiCO:H).
[0066] The hydrogenated microcrystalline silicon carbon oxide layer (μc-SiCO:H) is a doped layer, the hydrogenated amorphous silicon carbide layer 212 (a-SiC:H) is the main structure of the first intrinsic passivation layer, and the hydrogenated amorphous silicon carbon oxide layer 211 (a-SiCO:H) is a passivation layer in contact with the silicon substrate 100; such a configuration can ensure the passivation effect while preventing epitaxial growth from causing defects at the interface; the hydrogenated amorphous silicon carbon oxide layer 211 (a-SiCO:H) has an improved effect on preventing epitaxial growth compared to oxygen doping in the hydrogenated amorphous silicon carbide layer 212; the hydrogenated microcrystalline silicon carbon oxide layer (μc-SiCO:H) can not only improve the bandgap width of the material to bring better optical properties, but also improve the carrier mobility by oxygen doping.
[0067] Optionally, the thickness of the hydrogenated microcrystalline silicon oxycarbon layer is 8-15 times the thickness of the hydrogenated amorphous silicon oxycarbon layer 211 , for example, 8 times, 9 times, 10 times, 11 times, 12 times, 13 times, 14 times, 15 times, etc., which is not specifically limited here. The thickness of the hydrogenated microcrystalline silicon oxycarbide doping layer is configured to be relatively thick, which is convenient for providing a longer carrier transmission path, helping to reduce the chance of carrier recombination before reaching the electrode 500, improving the carrier collection efficiency, and improving the fill factor (FF) and open circuit voltage (Voc) of the heterojunction battery 010; the increase in the thickness of the doping layer helps to form a stronger electric field, promote the rapid separation of photogenerated carriers, reduce the recombination of carriers at the interface, and improve the overall efficiency of the battery; the thicker doping layer can provide better interface contact, reduce contact resistance, and ensure that carriers can be smoothly transmitted from the silicon substrate 100 to the transparent conductive layer (TCO); the doping layer can serve as a carrier selective transmission layer, and the thicker doping layer can more effectively prevent the transmission of non-target carriers, reduce back recombination, and improve the performance of the battery; the thicker doping layer helps to reduce dark current, that is, the current spontaneously generated inside the battery under no light conditions, thereby improving the photoelectric conversion efficiency of the battery.
[0068] Optionally, the thickness ratio of the hydrogenated amorphous silicon carbide layer 212 to the hydrogenated amorphous silicon oxycarbon layer 211 is 3:(1-2.5), for example: 3:1, 3:1.2, 3:1.5, 3:1.8, 3:2, 3:2.2, 3:2.5, etc., which are not specifically limited here. Increasing the thickness of the hydrogenated amorphous silicon carbide layer 212 compared to the hydrogenated amorphous silicon oxycarbon layer 211 can more effectively ensure the conversion efficiency of the heterojunction battery 010.
[0069] Exemplarily, in an embodiment where the thickness of the first passivation layer is 5.2 nm, the thickness of the hydrogenated amorphous silicon carbide layer 212 (a-SiC:H) may be 3 nm, the thickness of the hydrogenated amorphous silicon carbon oxide layer 211 (a-SiCO:H) may be 2.2 nm; and the thickness of the hydrogenated microcrystalline silicon carbon oxide layer (μc-SiCO:H) may be 22 nm.
[0070] Optionally, the second doping layer 320 also includes a hydrogenated microcrystalline carbon oxide silicon layer (μc-SiCO:H); the second intrinsic layer 220 also includes a hydrogenated amorphous carbon oxide silicon layer 211 (a-SiCO:H), wherein the hydrogenated amorphous carbon oxide silicon layer 211 of the second intrinsic layer 220 is deposited on the second surface of the silicon substrate 100, and the hydrogenated amorphous silicon carbide layer 212 of the second intrinsic layer 220 is deposited on the second surface of the corresponding hydrogenated amorphous carbon oxide silicon layer 211 away from the silicon substrate 100. On one side, the hydrogenated microcrystalline carbon oxide layer as the second doping layer 320 is deposited on the side of the hydrogenated amorphous silicon carbide layer 212 of the second intrinsic layer 220 away from the corresponding hydrogenated amorphous carbon oxide layer 211; that is, in this embodiment, the back side of the heterojunction battery 010 includes from bottom to top: hydrogenated microcrystalline carbon oxide layer (μc-SiCO:H), hydrogenated amorphous silicon carbide layer 212 (a-SiC:H), hydrogenated amorphous carbon oxide layer 211 (a-SiCO:H). Among them, the thickness ratio of the hydrogenated microcrystalline carbon oxide layer to the hydrogenated amorphous carbon oxide layer 211 on the back side of the heterojunction battery 010, and the thickness ratio of the hydrogenated amorphous silicon carbide layer 212 to the hydrogenated amorphous carbon oxide layer 211 are similar to those on the front side, and will not be repeated here.
[0071] Optionally, see Figure 1 The thickness of the first transparent conductive layer 410 is 70-120 nm, for example, 70 nm, 75 nm, 80 nm, 85 nm, 90 nm, 95 nm, 100 nm, 105 nm, 110 nm, 115 nm, 120 nm, etc., which is not specifically limited here.
[0072] Optionally, the thickness of the second transparent conductive layer 420 is 80-140 nm, for example, 80 nm, 85 nm, 90 nm, 95 nm, 100 nm, 105 nm, 110 nm, 115 nm, 120 nm, 125 nm, 130 nm, 135 nm, 140 nm, etc., which is not specifically limited here.
[0073] Optionally, the thickness of the second transparent conductive layer 420 is greater than the thickness of the first transparent conductive layer 410 .
[0074] The first transparent conductive layer 410 is a front TCO layer. Setting the thickness of the first transparent conductive layer 410 to be thinner helps to reduce reflection on the surface of the heterojunction battery 010, thereby improving the absorption rate of incident light, that is, a thin transparent conductive layer can serve as a more effective anti-reflection coating, allowing more light to enter the battery and increase the short-circuit current (Isc) of the battery; a thin front TCO layer can reduce the scattering and absorption of light inside the TCO layer, ensuring that more photons can reach the absorption layer of the battery and improve the utilization rate of light. The second transparent conductive layer 420 is a back TCO layer. Setting the thickness of the second transparent conductive layer 420 to be thicker can provide better carrier collection capability, reduce the recombination of carriers before reaching the back electrode 500, and help improve the fill factor (FF) and open circuit voltage (Voc) of the battery. A thicker TCO layer on the back can provide better mechanical stability and reduce possible damage during handling and installation. At the same time, it can also provide more stable electrical contact, reduce contact resistance, and optimize current transmission. A thicker back TCO layer can also help improve the heat dissipation capability of the battery and reduce efficiency loss due to increased temperature.
[0075] It should be noted that for the double-sided heterojunction cell 010, the thicker TCO layer on the back side can allow some light to pass through, while collecting carriers generated by incident light on the back side, thereby increasing the total power generation of the cell.
[0076] Furthermore, the thickness of the second transparent conductive layer 420 is 15-25 nm greater than the thickness of the first transparent conductive layer 410 , for example, 15 nm, 17 nm, 20 nm, 22 nm, 25 nm, etc., which is not specifically limited herein.
[0077] Optionally, the materials of the first transparent conductive layer 410 and the second transparent conductive layer 420 include but are not limited to tin-doped indium oxide (ITO), tungsten-doped indium oxide (IWO), titanium-doped indium oxide (ITiO), and aluminum-doped zinc oxide (AZO).
[0078] Optionally, see Figure 3In some embodiments, a metal nanowire film 610 is further formed on a side of at least one of the first transparent conductive layer 410 and the second transparent conductive layer 420 away from the corresponding doping layer; the electrode 500 is disposed on the metal nanowire film 610, that is, the electrode 500 is disposed on the transparent conductive layer through the metal nanowire film 610. By forming a good ohmic contact between the metal nanowire film 610 and the electrode 500, the short-circuit current and fill factor of the heterojunction battery 010 can be improved, thereby improving the conversion efficiency of the heterojunction battery 010.
[0079] Optionally, the thickness of the metal nanowire film 610 may be 10-30 nm, for example, 10 nm, 15 nm, 20 nm, 25 nm, 30 nm, etc., which is not specifically limited herein.
[0080] Optionally, the thickness ratio of the metal nanowire film 610 on the front side of the heterojunction battery 010 to the thickness ratio of the metal nanowire film 610 on the back side is 1:(1.2-2), for example: 1:1.2, 1:1.5, 1:1.8, 1:2, etc., which are not specifically limited here. The thickness of the metal nanowire film 610 on the front side is set to be relatively thin, which can better ensure the conversion efficiency of the heterojunction battery 010.
[0081] It should be noted that the preparation method of the metal nanowire film 610 is similar to the related technology and will not be described in detail here.
[0082] Optionally, see Figure 4 In other embodiments, the heterojunction cell 010 further includes an anti-reflection layer 620. For example, the anti-reflection layer 620 is deposited on the side of at least one of the first transparent conductive layer 410 and the second transparent conductive layer 420 that is away from the corresponding doping layer. The anti-reflection layer 620 is additionally provided on the surface of the transparent conductive layer to further reduce the light in the heterojunction cell 010, increase the light flux entering the cell, and improve the light absorption efficiency of the heterojunction cell 010; moreover, the anti-reflection layer 620 can further optimize the spectral response of the cell, especially in the visible light and near infrared spectral range, thereby improving the short-circuit current density and overall efficiency of the cell.
[0083] Optionally, the anti-reflection layer material includes but is not limited to silicon dioxide (SiO2), silicon nitride (SiN x ), titanium oxide (TiO2).
[0084] Optionally, the thickness ratio of the anti-reflection layer 620 on the front side of the heterojunction cell 010 to the thickness ratio of the gold anti-reflection layer 620 on the back side is (1.5-2.5):1, for example: 1.5:1, 1.8:1, 2:1, 2.1:1, 2.3:1, 2.5:1, etc., which are not specifically limited here. Setting the thickness of the anti-reflection layer 620 on the front side to be relatively thick is beneficial to further improve the short-circuit current density and conversion efficiency of the heterojunction cell 010.
[0085] Optionally, see Figure 5 In some other embodiments, a metal nanowire film 610 is further disposed on a side of the anti-reflection layer 620 facing away from the corresponding transparent conductive layer.
[0086] In summary, the heterojunction cell 010 can be used in photovoltaic modules. The heterojunction cell 010 has better optical properties so as to collect sunlight more effectively. The heterojunction cell 010 can increase the short-circuit current and improve the conversion efficiency.
[0087] The above are only preferred embodiments of the present invention and are not intended to limit the present invention. For those skilled in the art, the present invention may be subject to various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included in the protection scope of the present invention.
Claims
1. A heterojunction battery, characterized in that: include: A silicon substrate (100), wherein the silicon substrate (100) has a first surface and a second surface disposed opposite to each other; A first intrinsic layer (210), wherein the first intrinsic layer (210) is deposited on the first surface; A second intrinsic layer (220), wherein the second intrinsic layer (220) is deposited on the second surface; A first doping layer (310), wherein the first doping layer (310) is deposited on a side of the first intrinsic layer (210) facing away from the first surface; a second doped layer (320), the second doped layer (320) being deposited on a side of the second intrinsic layer (220) facing away from the second surface; A first transparent conductive layer (410), wherein the first transparent conductive layer (410) is deposited on a side of the first doped layer (310) facing away from the first intrinsic layer (210); as well as, A second transparent conductive layer (420), wherein the second transparent conductive layer (420) is deposited on a side of the second doped layer (320) away from the second intrinsic layer (220); wherein: The first intrinsic layer (210) and the second intrinsic layer (220) both include a hydrogenated amorphous silicon carbide layer (212), and the thickness of the first intrinsic layer (210) is smaller than the thickness of the second intrinsic layer (220).
2. The heterojunction battery according to claim 1, characterized in that: The thickness of the first intrinsic layer (210) is 5-15 nm; the thickness of the second intrinsic layer (220) is 1.05-1.6 times the thickness of the first intrinsic layer (210).
3. The heterojunction battery according to claim 1, characterized in that: The thickness of the first doping layer (310) is 15-40 nm; the thickness of the second doping layer (320) is 20-35 nm.
4. The heterojunction battery according to claim 1, characterized in that: The thickness of the second doping layer (320) is 1.2-1.5 times the thickness of the first doping layer (310).
5. The heterojunction battery according to any one of claims 1 to 4, characterized in that: The first doping layer (310) and the second doping layer (320) both include hydrogenated microcrystalline silicon carbide layers.
6. The heterojunction battery according to any one of claims 1 to 4, characterized in that: The first doping layer (310) includes a hydrogenated microcrystalline carbon oxide silicon layer; the first intrinsic layer (210) further includes a hydrogenated amorphous carbon oxide silicon layer (211) deposited on the first surface and the hydrogenated amorphous silicon carbide layer (212) deposited on the hydrogenated amorphous carbon oxide silicon layer (211) away from the silicon substrate (100); wherein, The hydrogenated microcrystalline silicon oxycarbon layer is deposited on a side of the hydrogenated amorphous silicon carbide layer (212) that is away from the hydrogenated amorphous silicon oxycarbon layer (211).
7. The heterojunction battery according to claim 6, characterized in that: The thickness of the hydrogenated microcrystalline silicon oxycarbon layer is 8-15 times the thickness of the hydrogenated amorphous silicon oxycarbon layer (211).
8. The heterojunction battery according to claim 6, characterized in that: The ratio of the thickness of the hydrogenated amorphous silicon carbide layer (212) to the thickness of the hydrogenated amorphous silicon oxycarbon layer (211) is 3:(1-2.5).
9. The heterojunction battery according to claim 1, characterized in that: The thickness of the first transparent conductive layer (410) is 70-120 nm; the thickness of the second transparent conductive layer (420) is 80-140 nm.
10. The heterojunction battery according to claim 9, characterized in that: The thickness of the second transparent conductive layer (420) is greater than the thickness of the first transparent conductive layer (410).
11. The heterojunction battery according to claim 10, characterized in that: The thickness of the second transparent conductive layer (420) is 15-25 nm greater than the thickness of the first transparent conductive layer (410).
12. A photovoltaic module, characterized in that: It comprises the heterojunction battery as described in any one of claims 1-11.