Display panel and display device

Abstract

The embodiment of the utility model provides a display panel and a display device, relates to the technical field of display, and is used for improving the product yield of the display panel. The display panel comprises a substrate, an isolation structure and a light-emitting device, the isolation structure defines a first opening; the isolation structure comprises two isolation parts, and each isolation part comprises a first film layer, a second film layer and a third film layer which are stacked in the direction away from the substrate; in the two isolation parts, the third film layer comprises a first edge and a second edge, the first edge is close to the first opening relative to the second film layer, the second edge is far away from the first opening relative to the second film layer, and the size of the first edge in the first direction is smaller than that of the second edge in the first direction; the light-emitting device comprises a first electrode, a light-emitting layer and a second electrode which are stacked in the direction away from the substrate, and the edge of the second electrode makes contact with and is electrically connected with the side face, close to the first opening, of the isolation part. The display panel is used for displaying images.

Description

Technical Field

[0001] The present disclosure relates to the field of display technology, and in particular to a display panel and a display device. Background Art

[0002] Organic Light-Emitting Diode (OLED) display panels have gradually become one of the mainstream products in the display field due to their excellent properties such as self-luminescence, high contrast, thin thickness, wide viewing angle, fast response speed, can be used for flexible panels, wide operating temperature range, simple structure and process, etc.

[0003] OLED display panels can be widely used in terminal products such as smartphones, tablets, TVs and wearable devices (such as watches). How to improve the product yield of display panels is a technical problem that needs to be solved urgently in display panels. Utility Model Content

[0004] An object of the embodiments of the present disclosure is to provide a display panel and a method for manufacturing the same, and a display device, so as to improve the product yield of the display panel.

[0005] To achieve the above objectives, the embodiments of the present disclosure provide the following technical solutions:

[0006] In one aspect, a display panel is provided. The display panel includes a substrate, an isolation structure, and a light-emitting device. The isolation structure is provided on the substrate; the isolation structure defines a first opening; the isolation structure includes two isolation parts, each of which includes a first film layer, a second film layer, and a third film layer stacked in a direction away from the substrate; in the two isolation parts, there is a spacing between the two second film layers and between the two third film layers in a first direction, and the first direction is parallel to the direction of the line connecting the centers of adjacent first openings; the third film layer includes a first edge and a second edge, the first edge is close to the first opening relative to the second film layer, the second edge is away from the first opening relative to the second film layer, and the size of the first edge in the first direction is smaller than the size of the second edge in the first direction; the light-emitting device includes a first electrode, a light-emitting layer, and a second electrode stacked in a direction away from the substrate, and the edge of the second electrode is in contact with and electrically connected to the side of the isolation part close to the first opening.

[0007] In the above display panel, since the isolation structure includes two isolation parts, the second edge of the third film layer of the isolation part extends outward relative to the second film layer, which is larger than the first edge of the third film layer extends outward relative to the second film layer, so the second edge can ensure that the light-emitting layer of the light-emitting device is effectively isolated, and the first edge is smaller than the second film layer, so the first edge can ensure that the second electrode of the light-emitting device is in contact with and electrically connected to the side of the isolation part, so that the second electrode and the side of the isolation part are effectively overlapped, that is, the edge of the second electrode is in contact with and electrically connected to the side of the isolation part close to the first opening, so that the VSS voltage signal is transmitted to the second electrodes of the plurality of light-emitting devices through the isolation structure, for example, the second electrodes of the plurality of light-emitting devices can be electrically connected through the isolation structure, so that the VSS voltage signal can be transmitted to the second electrode of each light-emitting device, so as to ensure that the light-emitting device emits light normally. In the case where the edge of the third film layer of the isolation structure is larger than that of the second film layer, resulting in the second electrode not being effectively overlapped on the side of the isolation structure, the technical solution provided by the embodiment of the present disclosure can not only ensure the effective isolation of the light-emitting layer of the light-emitting device, but also ensure the overlap effect of the second electrode and the isolation part. In summary, the display panel provided in this embodiment has a high product yield.

[0008] In addition, since the isolation structure defines the first opening and the light-emitting device is arranged in the first opening, the isolation structure can separate the light-emitting devices in the display panel from each other, which not only avoids crosstalk between light emitted by different light-emitting devices, but also during the preparation process of the display panel, the arrangement density of each light-emitting device is not limited by the size of the FMM, which is beneficial to improving the pixel density of the display panel, and there is no need to use FMM, avoiding the occurrence of problems such as inaccurate alignment.

[0009] In some embodiments, the first film layers of the two isolation parts have a spacing in the first direction; the display panel also includes: a pixel defining layer and a transfer pattern; the pixel defining layer is located between the isolation structure and the substrate, and a via is provided in the pixel defining layer; the first film layer of at least one of the two isolation parts is connected to the transfer pattern through the via.

[0010] In some embodiments, the two first film layers in the two isolation parts are connected to the transfer pattern through the same via hole.

[0011] In some embodiments, there are a plurality of via holes, and the two first film layers in the two isolation portions are respectively connected to the transfer pattern through different via holes.

[0012] In some embodiments, among the two isolation parts, the first film layer of one of the isolation parts is connected to the transfer pattern through the via hole, and the first film layer of the other isolation part is located on the surface of the pixel definition layer away from the substrate.

[0013] In some embodiments, the distance from the surface of the isolation portion connected to the transfer pattern close to the substrate to the substrate is smaller than the distance from the surface of the isolation portion located on the surface of the pixel definition layer away from the substrate close to the substrate to the substrate.

[0014] In some embodiments, the light emitting device is surrounded by an isolation portion, and at least one position in the first film layer of the isolation portion surrounding the light emitting device is connected to the transfer pattern through the via hole.

[0015] In some embodiments, in the pixel defining layer surrounding the light emitting device, there are a plurality of via holes, and the plurality of via holes are arranged at intervals.

[0016] In some embodiments, the first film layers of the two isolation parts are directly electrically connected.

[0017] In some embodiments, the method further includes: a pixel defining layer located between the isolation structure and the substrate; and two first film layers in the two isolation parts are both located on a surface of the pixel defining layer away from the substrate.

[0018] In some embodiments, it also includes: a pixel defining layer and a transfer pattern; the pixel defining layer is located between the isolation structure and the substrate, and a via is provided in the pixel defining layer; the two first film layers in the two isolation parts are connected to form an integrated structure film layer, and the integrated structure film layer is connected to the transfer pattern through the via.

[0019] In some embodiments, it further includes: a VSS signal line, which is disposed in the display area of ​​the display panel and is located between the substrate and the pixel defining layer; and the transfer pattern is electrically connected to the VSS signal line.

[0020] In some embodiments, the multiple light-emitting devices include a first light-emitting device and a second light-emitting device; the isolation portion surrounding the first light-emitting device is a first isolation portion, and the isolation portion surrounding the second light-emitting device is a second isolation portion; the transfer pattern includes a first transfer pattern and a second transfer pattern, the pixel defining layer is provided with a first via hole and a second via hole, the first film layer of the first isolation portion is electrically connected to the first transfer pattern through the first via hole, and the first film layer of the second isolation portion is electrically connected to the second transfer pattern through the second via hole; the display panel also includes: a first VSS signal line and a second VSS signal line, which are arranged in the display area of ​​the display panel and located between the substrate and the pixel defining layer; the first transfer pattern is electrically connected to the first VSS signal line, and the second transfer pattern is electrically connected to the second VSS signal line.

[0021] In some embodiments, the first light emitting device and the second light emitting device emit different colors of light, and the first VSS signal line and the second VSS signal line are configured to transmit VSS signals with different voltage values.

[0022] In some embodiments, the multiple light-emitting devices also include a third light-emitting device, and the light-emitting colors of the first light-emitting device, the second light-emitting device and the third light-emitting device are different; the isolation portion surrounding the third light-emitting device is a third isolation portion, the display panel also includes a third transfer pattern, the pixel defining layer is also provided with a third via hole, and the first film layer of the third isolation portion is electrically connected to the third transfer pattern through the third via hole; the display panel also includes: a third VSS signal line, which is provided in the display area of ​​the display panel and is located between the substrate and the pixel defining layer; the third transfer pattern is electrically connected to the third VSS signal line.

[0023] In some embodiments, it further includes: a VSS bus disposed in a border area of ​​the display panel; and the transfer pattern is electrically connected to the VSS bus.

[0024] In some embodiments, it also includes: a VSS bus, which is arranged in the frame area of ​​the display panel; and the first film layer in the isolation part is electrically connected to the VSS bus.

[0025] In some embodiments, it also includes: a first VSS bus and a second VSS bus, which are arranged in the border area of ​​the display panel; the first VSS bus is electrically connected to the first VSS signal line, and the second VSS bus is electrically connected to the second VSS signal line.

[0026] In some embodiments, the transfer pattern is made of the same material as the first electrode and is disposed in the same layer.

[0027] In some embodiments, the second film layer of the isolation portion includes a first side surface, a second side surface, a first end surface, and a second end surface, the first side surface and the second side surface are arranged opposite to each other in the first direction, and the first side surface is closer to the light-emitting device than the second side surface; the first end surface and the second end surface are arranged opposite to each other in a direction perpendicular to the substrate, and the first end surface is closer to the substrate than the second end surface;

[0028] The included angle between the first side surface and the first end surface is greater than the included angle between the second side surface and the first end surface; the included angle between the first side surface and the second end surface is smaller than the included angle between the second side surface and the second end surface.

[0029] On the other hand, a method for preparing a display panel is provided, comprising: forming a first electrode on a substrate; forming an isolation film stack on the substrate having the first electrode formed thereon; the isolation film stack comprising a first film, a second film and a third film stacked in sequence in a direction away from the substrate; etching the isolation film stack to form an isolation structure; the isolation structure defines a first opening, and the orthographic projection of the first electrode on the substrate at least partially overlaps with the orthographic projection of the first opening on the substrate; the isolation structure comprises two isolation parts, each of the isolation parts comprising a first film layer, a second film layer and a third film layer stacked in a direction away from the substrate; of the two isolation parts, two of the There is a spacing between the second film layers and between the two third film layers in the first direction, and the first direction is parallel to the direction of the line connecting the centers of adjacent first openings; the third film layer includes a first edge and a second edge, the first edge is close to the first opening relative to the second film layer, and the second edge is far away from the first opening relative to the second film layer, and the size of the first edge in the first direction is smaller than the size of the second edge in the first direction; a light-emitting layer and a second electrode are formed in sequence in the first opening, and the light-emitting layer, the second electrode and the first electrode form a light-emitting device, and the edge of the second electrode is in contact with and electrically connected to the side of the isolation portion close to the first opening.

[0030] In another aspect, a display device is provided, comprising: a display panel as in any of the above embodiments, and a cover plate disposed on a light emitting side of the display panel.

[0031] The above-mentioned display device has the same structure and beneficial technical effects as the display panels provided in some of the above-mentioned embodiments, which will not be described in detail here. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] In order to more clearly illustrate the technical solutions in the present disclosure, the following briefly introduces the drawings required to be used in some embodiments of the present disclosure. Obviously, the drawings described below are only drawings of some embodiments of the present disclosure. For ordinary technicians in this field, other drawings can also be obtained based on these drawings. In addition, the drawings described below can be regarded as schematic diagrams, and are not limitations on the actual size of the product involved in the embodiments of the present disclosure, the actual process of the method, the actual timing of the signal, etc.

[0033] Figure 1 is a structural diagram of a display device provided according to some embodiments;

[0034] Figure 2 for Figure 1 A cross-sectional view of the display device along the AA direction;

[0035] Figure 3is a structural diagram of a display panel provided according to some embodiments;

[0036] Figure 4 for Figure 3 A top view of an isolation structure in a display panel;

[0037] Figure 5 is a structural diagram of a display panel provided according to some other embodiments;

[0038] Figure 6 for Figure 5 A top view of an isolation structure in a display panel;

[0039] Figure 7 for Figure 5 An enlarged view of the display panel at the dotted circle S;

[0040] Figure 8 for Figure 7 An enlarged view of the display panel at the dotted circle P;

[0041] Fig. 9 is a structural diagram of a display panel provided according to some other embodiments;

[0042] Fig.10 is a structural diagram of a display panel provided according to some other embodiments;

[0043] Fig.11 is a structural diagram of a display panel provided according to some other embodiments;

[0044] Fig.12 is a structural diagram of a display panel provided according to some other embodiments;

[0045] Fig.13 is a structural diagram of a display panel provided according to some other embodiments;

[0046] Fig.14 is a structural diagram of a display panel provided according to some other embodiments;

[0047] Fig.15 is a structural diagram of a display panel provided according to some other embodiments;

[0048] Fig.16 is a structural diagram of a display panel provided according to some other embodiments;

[0049] Fig.17 is a structural diagram of a display panel provided according to some other embodiments;

[0050] Fig.18 is a structural diagram of a display panel provided according to some other embodiments;

[0051] Fig.19 A top view of a pixel definition layer provided according to some other embodiments;

[0052] Fig. 20 A top view of a pixel definition layer provided according to some other embodiments;

[0053] Fig.21 is a structural diagram of a display panel provided according to some other embodiments;

[0054] Fig. 22 is a structural diagram of a display panel provided according to some other embodiments;

[0055] Fig.23 A flow chart of a method for preparing a display panel provided for some embodiments of the present disclosure;

[0056] Figure 24 to Figure 28 The diagram is a structural diagram corresponding to each step in a method for preparing a display panel according to some embodiments. DETAILED DESCRIPTION

[0057] The following will be combined with the accompanying drawings to clearly and completely describe the technical solutions in some embodiments of the present disclosure. Obviously, the described embodiments are only part of the embodiments of the present disclosure, rather than all the embodiments. Based on the embodiments provided by the present disclosure, all other embodiments obtained by ordinary technicians in this field belong to the scope of protection of the present disclosure.

[0058] Unless the context requires otherwise, throughout the specification and claims, the term "including" is to be interpreted as an open, inclusive meaning, that is, "including, but not limited to". In the description of the specification, the terms "one embodiment", "some embodiments", "exemplary embodiments", "examples" or "some examples" and the like are intended to indicate that specific features, structures, materials or characteristics associated with the embodiment or example are included in at least one embodiment or example of the present disclosure. The schematic representations of the above terms do not necessarily refer to the same embodiment or example. In addition, the specific features, structures, materials or characteristics described may be included in any one or more embodiments or examples in any appropriate manner.

[0059] In the following, the terms "first" and "second" are used for descriptive purposes only and are not to be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the features. In the description of the embodiments of the present disclosure, unless otherwise specified, "plurality" means two or more.

[0060] When describing some embodiments, the expression "connection" and its derivatives may be used. The term "connection" should be understood in a broad sense. For example, "connection" can be a fixed connection, a detachable connection, or an integral connection; it can be directly connected or indirectly connected through an intermediate medium. The embodiments disclosed herein are not necessarily limited to the contents of this document.

[0061] “At least one of A, B, and C” has the same meaning as “at least one of A, B, or C” and both include the following combinations of A, B, and C: A only, B only, C only, the combination of A and B, the combination of A and C, the combination of B and C, and the combination of A, B, and C.

[0062] “A and / or B” includes the following three combinations: A only, B only, and a combination of A and B.

[0063] The use of "adapted to" or "configured to" herein is meant to be open and inclusive language that does not exclude devices adapted or configured to perform additional tasks or steps.

[0064] Additionally, the use of “based on” is meant to be open and inclusive, as a process, step, calculation, or other action “based on” one or more stated conditions or values ​​may, in practice, be based on additional conditions or values ​​beyond those stated.

[0065] As used herein, "parallel", "perpendicular", and "equal" include the situations described and situations similar to the situations described, and the range of the similar situations is within the acceptable deviation range, wherein the acceptable deviation range is determined by a person of ordinary skill in the art taking into account the measurement in question and the errors associated with the measurement of a particular quantity (i.e., the limitations of the measurement system). For example, "parallel" includes absolute parallelism and approximate parallelism, wherein the acceptable deviation range of approximate parallelism may be, for example, a deviation within 5°; "perpendicular" includes absolute perpendicularity and approximate perpendicularity, wherein the acceptable deviation range of approximate perpendicularity may also be, for example, a deviation within 5°. "Equal" includes absolute equality and approximate equality, wherein the acceptable deviation range of approximate equality may be, for example, the difference between the two equalities is less than or equal to 5% of either one.

[0066] It will be understood that when a layer or an element is referred to as being on another layer or substrate, it can be directly on the other layer or substrate, or intervening layers may be present between the layer or element and the other layer or substrate.

[0067] Exemplary embodiments are described herein with reference to cross-sectional views and / or plan views that are idealized exemplary drawings. In the drawings, the thickness of the layers and the area of ​​the regions are exaggerated for clarity. Therefore, variations in the shapes relative to the drawings due to, for example, manufacturing techniques and / or tolerances are conceivable. Therefore, the exemplary embodiments should not be interpreted as being limited to the shapes of the regions shown herein, but include shape deviations due to, for example, manufacturing. For example, an etched region shown as a rectangle will typically have curved features. Therefore, the regions shown in the drawings are schematic in nature, and their shapes are not intended to illustrate the actual shapes of the regions of the device, and are not intended to limit the scope of the exemplary embodiments.

[0068] like Figure 1 As shown, an embodiment of the present disclosure provides a display device 1000, which is a product with an image display function. Exemplarily, the display device 1000 can be any device that displays either motion (e.g., video) or fixed (e.g., still image) and whether text or image.

[0069] For example, the display device 1000 may be a television, a laptop computer, a tablet computer, a personal digital assistant (PDA), a mobile phone (cell phone), a watch, a clock, a calculator, a GPS receiver / navigator, a camera, a display of a camera view (e.g., a display of a rear-view camera in a vehicle), a wearable device, an augmented reality (AR) device, a virtual reality (VR) device, a vehicle display, a flight display, or any other product or component having a display function. For example, Figure 1 As shown, the display device 1000 may be a mobile phone.

[0070] From the perspective of the light-emitting type of the display device 1000, the display device 1000 may be an OLED display device or a quantum dot electroluminescent display device (Quantum Dot Light Emitting Diodes; QLED for short). From the perspective of the form of the display device 1000, the display device 1000 may be a flat display device, a curved display device, or a foldable display device, etc. From the perspective of the shape of the display device 1000, the display device 1000 may be rectangular or circular, etc. The embodiments of the present disclosure do not specifically limit this. Below, some embodiments of the present disclosure are schematically described by taking the display device 1000 as a rectangular and planar organic light-emitting diode display device as an example, but the embodiments of the present disclosure are not limited to this, and any other display devices may also be considered as long as the same technical ideas are applied.

[0071] refer to Figure 2 The display device 1000 includes a display panel 1001 and a cover plate 1002 disposed on the light-emitting side of the display panel 1001. When the display device 1000 is an OLED display device, the display panel 1001 is an OLED display panel. The cover plate 1002 supports and protects the display panel 1001 and ensures that the display panel 1001 can still maintain a good display effect when it is hit or scratched.

[0072] By way of example, the cover plate 1002 may include a glass cover plate, a ceramic cover plate, a plastic cover plate, and an optical composite material cover plate.

[0073] The structure of the display panel 1001 is described in detail below.

[0074] refer to Figure 3 The display panel 1001 includes a substrate 100, a pixel circuit layer 200 and a light emitting device 300 which are stacked.

[0075] The material of the substrate 100 is a transparent material. For example, the substrate 100 may be a transparent flexible substrate; or a transparent rigid substrate such as glass or ultra-thin glass.

[0076] The pixel circuit layer 200 includes a plurality of pixel circuits configured to drive the light emitting device 300 to emit light.

[0077] The light emitting device 300 includes a first electrode 301, a light emitting layer 302, and a second electrode 303 stacked in a direction away from the substrate 100. The display panel 1001 may further include a pixel defining layer PDL, which is disposed on a side of the first electrode 301 away from the substrate 100, and the pixel defining layer PDL defines a plurality of pixel openings h, and at least a portion of one light emitting layer 302 is located in one pixel opening h.

[0078] In some embodiments, the first electrode 301 is configured as an anode of the light emitting device 300, and the second electrode 303 is configured as a cathode of the light emitting device 300. The display panel 1001 further includes: a VDD signal line (not shown) and a VSS signal line (not shown), the VDD signal line is used to input a high voltage signal, and the VSS signal line is used to input a low voltage signal. In this case, the first electrode 301 of the light emitting device 300 is electrically connected to the VDD signal line (not shown), and the second electrode 303 of the light emitting device 300 is electrically connected to the VSS signal line (not shown), so that a voltage is formed between the first electrode 301 and the second electrode 303, so that the holes from the first electrode 301 and the electrons from the second electrode 303 are recombined in the light emitting layer 302, thereby emitting light.

[0079] In other embodiments, the first electrode 301 is configured as a cathode of the light emitting device 300 , and correspondingly, the second electrode 303 is configured as an anode of the light emitting device 300 .

[0080] The light-emitting layer 302 includes an organic light-emitting layer. When the light-emitting device 300 is a WOLED, the organic light-emitting layer is formed of a light-emitting material capable of emitting white light. The light-emitting layer 302 may also include at least one of a hole injection layer, a hole transport layer, an electron blocking layer, a hole blocking layer, an electron transport layer, and an electron injection layer.

[0081] The light-emitting layer 302 in the light-emitting device 300 can be prepared by using an evaporation process, using a high-precision metal mask (Fine Metal Mask, referred to as FMM) to perform whole-layer evaporation to form the light-emitting layer 302. In this way, the display panel 1001 to be evaporated needs to be aligned with the FMM, and when the pixel density of the display panel 1001 is high, it is difficult to align the display panel 1001 to be evaporated with the FMM, and the alignment accuracy is difficult to ensure, the preparation is difficult, and the pixel aperture ratio of the display panel 1001 is limited by the size of the FMM, which is not conducive to the preparation of a display panel 1001 with a high pixel density, and is not conducive to saving preparation costs.

[0082] Based on this, combined with reference Figure 3 and Figure 4 The display panel 1001 provided in this embodiment also includes: an isolation structure 400, the isolation structure 400 is arranged on the substrate 100; the isolation structure 400 is provided with a plurality of first openings k, and a light-emitting device 300 is arranged in a first opening k; the isolation structure 400 between adjacent first openings k includes an isolation portion T, and the isolation portion T includes a first film layer T1, a second film layer T2 and a third film layer T3 stacked in a direction away from the substrate; the third film layer T3 extends outward in a first direction X relative to the second film layer T2, and the first direction X is perpendicular to the extension direction of the isolation structure 400 between adjacent first openings k.

[0083] In some embodiments, the material of the first film layer T1 includes titanium, the material of the second film layer T2 includes aluminum, and the material of the third film layer T3 includes titanium. In other embodiments, the materials of the first film layer T1, the second film layer T2, and the third film layer T3 may also include other conductive materials, such as other metal materials or alloy materials.

[0084] The third film layer T3 extends outward relative to the second film layer T2 in the first direction X. Under ideal conditions, when the light-emitting layer 302 is prepared by using an evaporation process for the entire layer, the third film layer T3 can not only effectively isolate the light-emitting material of the light-emitting layer 302 of the adjacent light-emitting device 300, but also ensure that the edge of the second electrode 303 is in contact with and electrically connected to the side of the isolation portion T close to the first opening k, so that the second electrode 303 in the light-emitting device 300 can effectively form a continuous conduction path with the second electrodes 303 in the surrounding light-emitting devices 300.

[0085] However, the inventors have found that in order to ensure the isolation effect of the isolation portion T on the light-emitting material of the light-emitting layer 302, the third film layer T3 in the isolation portion T has a larger dimension extending outward in the first direction X relative to the second film layer T2. On this basis, when the second electrode 303 is formed in the actual process, the overlap between the second electrode 303 and the isolation portion T is not controllable, and there is a situation where the isolation portion T and the second electrode 303 cannot form an effective overlap, which easily leads to the second electrode 303 in the light-emitting device 300 being unable to effectively form a continuous conduction path with the second electrodes 303 in the surrounding light-emitting devices 300, affecting the VSS signal line access to the second electrode 303, causing display abnormality, and resulting in a low product yield of the display panel 1001.

[0086] In order to solve the above technical problems, the embodiment of the present disclosure provides a display panel 1001, Figure 5 , Figure 6 and Figure 7 , the display panel 1001 includes: a substrate 100 , an isolation structure 400 and a light emitting device 300 .

[0087] The isolation structure 400 is disposed on the substrate 100 ; the isolation structure 400 defines a first opening k, and the light emitting device 300 is disposed in the first opening k.

[0088] The isolation structure 400 includes two isolation parts T, each of which includes a first film layer T1, a second film layer T2, and a third film layer T3 stacked in a direction away from the substrate 100. In the two isolation parts T, there is a spacing between the two second film layers T2 and between the two third film layers T3 in the first direction X, and the first direction X is parallel to the direction of the line connecting the centers of adjacent first openings k.

[0089] The third film layer T3 includes a first edge L1 and a second edge L2. The first edge L1 extends in a direction close to the first opening k relative to the second film layer T2; the second edge L2 extends in a direction away from the first opening k relative to the second film layer T2. The dimension of the first edge L1 in the first direction X is smaller than the dimension of the second edge L2 in the first direction X, that is, the extension dimension of the first edge L1 on the side of the isolation portion T close to the first opening k is smaller than the extension dimension of the second edge L2 on the side of the isolation portion T away from the first opening k.

[0090] The light emitting device 300 includes a first electrode 301 , a light emitting layer 302 , and a second electrode 303 stacked in a direction away from the substrate 100 . The edge of the second electrode 303 contacts and is electrically connected to the side of the isolation portion T close to the first opening k.

[0091] In the display panel 1001 provided in the present embodiment, since the isolation structure 400 includes two isolation parts T, the second edge L2 of the third film layer T3 of the isolation part T extends outward relative to the second film layer T2, which is larger than the first edge L1 of the third film layer T3 extends outward relative to the second film layer T2. Therefore, the second edge L2 can ensure that the light-emitting layer 302 of the light-emitting device 300 is effectively isolated, and the first edge L1 has a smaller extension size relative to the second film layer T2. Therefore, the first edge L1 can ensure that the second electrode 303 of the light-emitting device 300 is effectively isolated from the isolation part T. The side of the second electrode 303 is in contact with and electrically connected to the side of the isolation part T, so that the second electrode 303 is effectively overlapped with the side of the isolation part T, that is, the edge of the second electrode 303 is in contact with and electrically connected to the side of the isolation part T close to the first opening k, so as to transmit the VSS voltage signal to the second electrodes 303 of the plurality of light-emitting devices 300 through the isolation structure 400. For example, the second electrodes 303 of the plurality of light-emitting devices 300 can be electrically connected through the isolation structure 400, so that the VSS voltage signal can be transmitted to the second electrode 303 of each light-emitting device 300, ensuring that the light-emitting device 300 emits light normally. In the case where the edge of the third film layer T3 of the isolation structure 400 is larger than that of the second film layer T2, resulting in the second electrode 303 not being effectively overlapped with the side of the isolation structure 400, the technical solution provided by the embodiment of the present disclosure can not only ensure that the light-emitting layer 302 of the light-emitting device 300 is effectively isolated, but also ensure the overlap effect of the second electrode 303 and the isolation part T. In summary, the display panel 1001 provided in this embodiment has a high product yield.

[0092] In addition, since the isolation structure 400 defines the first opening k, the light-emitting device 300 is arranged in the first opening k, so that the isolation structure 400 can separate the light-emitting devices 300 in the display panel 1001 from each other, which not only avoids crosstalk between light emitted by different light-emitting devices 300, but also during the preparation process of the display panel 1001, the arrangement density of each light-emitting device 300 is not limited by the size of the FMM, which is beneficial to improving the pixel density of the display panel 1001, and there is no need to use FMM, thereby avoiding the occurrence of problems such as inaccurate alignment.

[0093] In some embodiments, reference Figure 8 The second film layer T2 of the isolation portion T includes a first side surface C1, a second side surface C2, a first end surface D1, and a second end surface D2. The first side surface C1 and the second side surface C2 are arranged opposite to each other in the first direction X, and the first side surface C1 is closer to the light emitting device 300 than the second side surface C2. The first end surface D1 and the second end surface D2 are arranged opposite to each other in a direction perpendicular to the substrate 100, and the first end surface D1 is closer to the substrate 100 than the second end surface D2.

[0094] It can be understood that the above-mentioned “the first side surface C1 and the second side surface C2 are relatively arranged in the first direction X” means that the projections of the first side surface C1 and the second side surface C2 in the first direction X at least partially overlap; “the first end surface D1 and the second end surface D2 are relatively arranged in a direction perpendicular to the substrate 100” means that the first end surface D1 and the second end surface D2 at least partially overlap in the direction perpendicular to the substrate 100.

[0095] Among them, the angle α1 between the first side surface C1 and the first end surface D1 is greater than the angle α2 between the second side surface C2 and the first end surface D1; the angle β1 between the first side surface C1 and the second end surface D2 is smaller than the angle β2 between the second side surface C2 and the second end surface D2, which is beneficial to ensure that the light-emitting layer 302 of the light-emitting device 300 is effectively isolated at the second edge L2.

[0096] Specifically, the cross-sectional structure of the isolation portion T may be in the shape of an I. Figure 7 The isolation portion T can be formed by wet etching process, because the etching rate of the etching solution used for the second film layer T2 (the material of the second film layer T2 can be aluminum) is greater than the etching rate of the first film layer T1 (the material of the first film layer T1 can be titanium), and greater than the etching rate of the third film layer T3 (the material of the third film layer T3 can be titanium). Therefore, the isolation structure T is formed along the first direction X, and the two side edges of the third film layer T3 extend outward relative to the second film layer T2, and the two side edges of the first film layer T1 also extend outward relative to the second film layer T2, so that when the light-emitting layer 302 is formed, it is beneficial to separate the light-emitting layer 302 at the edge of the first film layer T1.

[0097] In some embodiments, the size of the first edge L1 in the first direction X may be 0.2 μm to 0.3 μm, for example, 0.2 μm, 0.23 μm, 0.25 μm, 0.26 μm, 0.28 μm, or 0.3 μm; the size of the second edge L2 in the first direction X may be 0.5 μm to 0.7 μm, for example, 0.5 μm, 0.53 μm, 0.55 μm, 0.6 μm, 0.65 μm, or 0.7 μm.

[0098] In some embodiments, continue to refer to Figure 5 The display panel 1001 further includes: a pixel defining layer PDL, which is located between the isolation structure 400 and the substrate 100. The pixel defining layer PDL defines a pixel opening h, and a light emitting device 300 is disposed in a pixel opening h. In this way, the pixel defining layer PDL can be used to define the light emitting device 300, so that the light emitted by the light emitting device 300 is emitted from the pixel opening h corresponding thereto, thereby avoiding color crosstalk between adjacent light emitting devices 300.

[0099] In some embodiments, the first film layers T1 of the two isolation parts T are directly electrically connected.

[0100] Exemplary, reference Figure 5 , the two first film layers T1 in the two isolation parts T are both located on the surface of the pixel defining layer PDL away from the substrate 100. The two first film layers T1 are directly connected on the surface of the pixel defining layer PDL away from the substrate 100. Since the second electrode 303 of the light-emitting device 300 is connected to the first film layer T1 of the isolation part T adjacent thereto, and the two first film layers T1 in the two isolation parts T between adjacent light-emitting devices 300 are directly connected, a conductive path interconnected is formed between the second electrodes 303 of adjacent light-emitting devices 300.

[0101] Here, since the two first film layers T1 are directly connected, there is no need to add additional process steps for connecting the two first film layers, thus simplifying the process.

[0102] exist Figure 5 The display panel 1001 shown is based on the reference Fig. 9, the display panel 1001 further includes: a VSS bus M, which is arranged in the frame area of ​​the display panel 1001; and the first film layer T1 in the isolation part T is electrically connected to the VSS bus M. In this arrangement, since the second electrodes 303 of the plurality of light-emitting devices 300 are in contact with the side surfaces surrounding the respective isolation parts T, and the two isolation parts T located between adjacent light-emitting devices 300 are electrically connected through the first film layer T1. Therefore, the second electrodes 303 of the plurality of light-emitting devices 300 are electrically connected through the isolation structure 400, and then directly connected to the VSS bus M arranged in the frame area of ​​the display panel 1001, it is possible to reduce the wiring difficulty, simplify the process, and save the manufacturing cost.

[0103] For ease of understanding, Fig. 9 FIG. 1 only illustrates the projection relationship between the first film layer T1 and the second electrode 303 on the substrate 100 .

[0104] The first film layers T1 of the two isolation parts T are directly electrically connected, or can be: Fig.10 The display panel 1001 further includes: a transfer pattern Q; a via hole g is provided in the pixel definition layer PDL; the two first film layers T1 in the two isolation parts T are connected to form an integrated structure film layer T11, and the integrated structure film layer T11 is connected to the transfer pattern Q through the via hole g.

[0105] Here, since the second electrode 303 of the light-emitting device 300 is connected to the first film layer T1 of the isolation portion T adjacent thereto, and in the two isolation portions T between the adjacent light-emitting devices 300, the two first film layers T1 are connected to form an integrated structure film layer T11, and the integrated structure film layer T11 is also connected to the transfer pattern Q. Therefore, a conductive path interconnected with each other is formed between the second electrodes 303 of the adjacent light-emitting devices 300.

[0106] The display panel 1001 in this embodiment can not only directly use the VSS bus located in the border area of ​​the display panel 1001 to input VSS signals to the second electrodes 303 of multiple light-emitting devices 300 through the transfer pattern Q, but also set a VSS signal line in the display area of ​​the display panel 1001 to input VSS signals to the second electrodes 303 of the light-emitting devices 300 through the transfer pattern Q.

[0107] Therefore, in Fig.10On the basis of the display panel 1001 shown, the display panel 1001 further includes: a VSS bus (not shown), which is arranged in the border area of ​​the display panel 1001; and a transfer pattern Q is electrically connected to the VSS bus. In this arrangement, since the second electrodes 303 of the plurality of light-emitting devices 300 are in contact with the side surfaces surrounding the respective isolation portions T, and the two isolation portions T between the adjacent light-emitting devices 300 are electrically connected through the first film layer T1, the second electrodes 303 of the plurality of light-emitting devices 300 are electrically connected through the isolation structure 400 and the transfer pattern Q, and then directly connected to the VSS bus arranged in the border area of ​​the display panel 1001, the wiring difficulty can be reduced, the process can be simplified, and the manufacturing cost can be saved.

[0108] exist Fig.10 The display panel 1001 shown in FIG. Fig.11 and Fig.12 The display panel 1001 may further include: a VSS signal line J, which is provided in the display area of ​​the display panel 1001 and is located between the substrate 100 and the pixel definition layer PDL; and a transfer pattern Q is electrically connected to the VSS signal line J. Since the VSS signal line is provided in the display area of ​​the display panel 1001, the transfer pattern Q is electrically connected to the VSS signal line J, so that the voltage provided to the second electrode 303 by the transfer pattern Q can reduce the voltage drop generated on the VSS signal line J.

[0109] In some embodiments, Fig.11 The display panel 1001 shown is based on the reference Fig.12 The display panel 1001 further includes: a VSS bus M, which is arranged in the border area of ​​the display panel 1001; and a VSS signal line J connected to the VSS bus M.

[0110] In some embodiments, reference Fig.13 , the first film layers T1 of the two isolation parts T have a spacing L in the first direction X; on this basis, the display panel 1001 also includes: a transfer pattern Q; a via g is provided in the pixel defining layer PDL; the first film layer T1 of at least one of the two isolation parts T is connected to the transfer pattern Q through the via g.

[0111] Exemplarily, the first film layers T1 in the two isolation parts T are connected to the transfer pattern Q through the via holes g. In this way, the transfer pattern Q can electrically connect the two first film layers T1.

[0112] For example, refer to Fig.13, the two first film layers T1 in the two isolation parts T are connected to the transfer pattern Q through the same via hole g. Since the second electrode 303 of the light-emitting device 300 is connected to the first film layer T1 of the isolation part T adjacent thereto, and between adjacent light-emitting devices 300, the two first film layers T1 in the two isolation parts T are connected to the transfer pattern Q through the same via hole g, a conductive path interconnected with each other is formed between the second electrodes 303 of adjacent light-emitting devices 300.

[0113] exist Fig.13 On the basis of the display panel 1001 shown, the display panel 1001 further includes: a VSS bus (not shown), which is arranged in the border area of ​​the display panel 1001; and the transfer pattern Q is electrically connected to the VSS bus.

[0114] exist Fig.13 The display panel 1001 shown is based on the reference Fig.14 The display panel 1001 may further include: a VSS signal line J, which is disposed in the display area of ​​the display panel 1001 and is located between the substrate 100 and the pixel definition layer PDL; and a transfer pattern Q is electrically connected to the VSS signal line J.

[0115] In some embodiments, in conjunction with reference Fig.14 and Fig.15 The display panel 1001 further includes: a VSS bus M, which is arranged in the border area of ​​the display panel 1001; and a VSS signal line J connected to the VSS bus M.

[0116] In some embodiments, reference Fig.16 , the number of via holes g in the pixel definition layer PDL is multiple, and the two first film layers T1 in the two isolation parts T are connected to the transfer pattern Q through different via holes g respectively. Fig.16 In the figure, the number of via holes g is two for illustration. In other embodiments, the number of via holes g may also be 3, 4 or 5, without limitation. The number of via holes g in the pixel definition layer PDL is multiple. Since the second electrode 303 of the light-emitting device 300 is connected to the first film layer T1 of the isolation part T adjacent thereto, and between adjacent light-emitting devices 300, the two first film layers T1 in the two isolation parts T are respectively connected to the transfer pattern Q through different via holes g, therefore, a conductive path interconnected is formed between the second electrodes 303 of adjacent light-emitting devices 300.

[0117] exist Fig.16 On the basis of the display panel 1001 shown, the display panel 1001 further includes: a VSS bus (not shown), which is arranged in the border area of ​​the display panel 1001; and the transfer pattern Q is electrically connected to the VSS bus.

[0118] exist Fig.16The display panel 1001 shown is based on the reference Fig.17 The display panel 1001 may further include: a VSS signal line J, which is disposed in the display area of ​​the display panel 1001 and is located between the substrate 100 and the pixel defining layer PDL; and a transfer pattern Q is electrically connected to the VSS signal line.

[0119] The first film layers T1 of the two isolation parts T have a spacing L in the first direction X; the first film layer T1 of at least one of the two isolation parts T is connected to the transfer pattern Q through the via g. Alternatively, the first film layer T1 of one of the two isolation parts T is connected to the transfer pattern Q through the via g.

[0120] For example, refer to Fig.18 Among the two isolation parts T, the first film layer T1 of one isolation part T is connected to the transfer pattern Q through the via g, and the first film layer T1 of the other isolation part T is located on the surface of the pixel definition layer PDL away from the substrate 100.

[0121] In some embodiments, continue to refer to Fig.17 , the distance from the surface of the isolation portion T connected to the transfer pattern Q close to the substrate 100 to the substrate 100 is smaller than the distance from the surface of the isolation portion located on the surface of the pixel definition layer PDL far from the substrate 100 close to the substrate 100 to the substrate 100. This facilitates the connection between the first film layer T1 and the transfer pattern Q.

[0122] In some embodiments, each light emitting device 300 is surrounded by an isolation portion T, and at least one position in the first film layer T1 of the isolation portion T surrounding the light emitting device 300 is connected to the transfer pattern Q through a via g. Since the second electrode 303 of each light emitting device 300 can be connected to the transfer pattern Q through the isolation portion T, it can be ensured that the VSS signal can be input to the second electrode 303 of each light emitting device 300 through the transfer pattern Q.

[0123] For example, reference Fig.19 In the pixel definition layer PDL surrounding the light emitting device 300 , the number of the via holes g is 1, and the via holes g are all located on the same side of the light emitting device 300 . In this way, the uniformity of the VSS signals input to the plurality of light emitting devices 300 can be improved.

[0124] For example, reference Fig. 20 In the pixel definition layer PDL surrounding the light emitting device 300, the number of via holes g is multiple, and the multiple via holes g are arranged at intervals. Fig. 20 The plurality of via holes g are spaced apart and evenly arranged, so that the uniformity of the VSS signal input to the plurality of light-emitting devices 300 can be improved.

[0125] Since each light emitting device 300 is surrounded by an isolation portion T, for ease of understanding, Fig.19 and Fig. 20 In the figure, the pixel defining layer PDL can be regarded as including a pixel defining portion PL surrounding a plurality of pixel openings h, and adjacent pixel defining portions are interconnected as an integrated film layer. The white dotted lines in the figure are auxiliary lines to define the pixel defining portion PL.

[0126] Continue to refer Fig.18 The display panel 1001 further includes: a VSS signal line J, which is provided in the display area of ​​the display panel 1001 and is located between the substrate 100 and the pixel definition layer PDL; and a transfer pattern Q is electrically connected to the VSS signal line J. Since the VSS signal line is provided in the display area of ​​the display panel 1001, the transfer pattern Q is electrically connected to the VSS signal line J, so that the voltage provided to the second electrode 303 by the transfer pattern Q can reduce the voltage drop generated on the VSS signal line J.

[0127] In other embodiments, reference Fig.21 The plurality of light-emitting devices 300 include a first light-emitting device 31 and a second light-emitting device 32, and the light-emitting colors of the first light-emitting device 31 and the second light-emitting device 32 are the same or different; the isolation portion T surrounding the first light-emitting device 31 is the first isolation portion T(A), and the isolation portion T surrounding the second light-emitting device 32 is the second isolation portion T(B); the transfer pattern Q includes a first transfer pattern Q1 and a second transfer pattern Q2, and the pixel defining layer PDL is provided with a first via hole g1 and a second via hole g2, and the first film layer T1 of the first isolation portion T(A) is electrically connected to the first transfer pattern Q1 through the first via hole g1, and the first film layer T1 of the second isolation portion T(B) is electrically connected to the second transfer pattern Q2 through the second via hole g2.

[0128] Continue to refer Fig.21 The display panel 1001 further includes: a first VSS signal line J1 and a second VSS signal line J2, which are arranged in the display area of ​​the display panel 1001 and located between the substrate 100 and the pixel definition layer PDL; a first transfer pattern Q1 is electrically connected to the first VSS signal line J1, and a second transfer pattern Q2 is electrically connected to the second VSS signal line J2.

[0129] In some embodiments, the first light emitting device 31 and the second light emitting device 32 emit different colors, and the first VSS signal line J1 and the second VSS signal line J2 are configured to transmit VSS signals with different voltage values. In the light emitting layer 302 of the first light emitting device 31 and the second light emitting device 32, the organic light emitting materials are different, which results in that when the first light emitting device 31 and the second light emitting device 32 reach the maximum light emitting efficiency, the maximum voltage required by each of them will be different. Therefore, different VSS signal lines are set, and according to the actual required voltage of the first light emitting device 31 and the second light emitting device 32, the voltage signals matching the respective light emitting devices can be input to reduce the power consumption of the display panel 1001.

[0130] In some embodiments, in conjunction with reference Fig.21 and Fig. 22 The display panel 1001 further includes: a first VSS bus M1 and a second VSS bus M2, which are arranged in the border area of ​​the display panel 1001; the first VSS bus M1 is electrically connected to the first VSS signal line J1, and the second VSS bus M2 is electrically connected to the second VSS signal line J2.

[0131] For further information, please refer to Fig.16 The plurality of light emitting devices 300 further include a third light emitting device 33. The light emitting colors of the first light emitting device 31, the second light emitting device 32 and the third light emitting device 33 are different. The isolation portion T surrounding the third light emitting device 33 is a third isolation portion T(C).

[0132] The first light emitting device 31, the second light emitting device 32, and the third light emitting device 33 emit different colors of light, so that the multiple light emitting devices 300 in the display panel 1001 can emit light of different colors, ensuring that the display panel 1001 can display pictures. For example, the first light emitting device 31 is a red light emitting device, the second light emitting device 32 is a green light emitting device, and the third light emitting device 33 is a blue light emitting device.

[0133] Continue to refer Fig.21 In the case where the plurality of light-emitting devices 300 further include a third light-emitting device 33, the display panel 1001 further includes a third transfer pattern Q3 and a third VSS signal line J3, the pixel defining layer PDL is further provided with a third via g3, and the first film layer T1 of the third isolation portion T(C) is electrically connected to the third transfer pattern Q3 through the third via g3. The third VSS signal line J3 is provided in the display area of ​​the display panel 1001 and is located between the substrate 100 and the pixel defining layer PDL; the third transfer pattern Q3 is electrically connected to the third VSS signal line J3. That is, according to the actual needs of the first light-emitting device 31, the second light-emitting device 32 and the third light-emitting device 33, signals matching the respective light-emitting devices are input to reduce the power consumption of the display panel 1001.

[0134] Among them, the first VSS signal line, the second VSS signal line and the third VSS signal line J3 can be configured to transmit VSS signals with different voltage values.

[0135] In some embodiments, reference Fig. 22 In the case where the plurality of light emitting devices 300 further include a third light emitting device 33, the display panel 1001 further includes: a third VSS bus M3, which is disposed in a border area of ​​the display panel 1001; and the third VSS bus M3 is electrically connected to a third VSS signal line J3.

[0136] In some embodiments, the transfer pattern Q is made of the same material and disposed in the same layer as the first electrode 301. In this way, the transfer pattern Q and the first electrode 301 can be prepared using the same etching process and the same mask plate to reduce the preparation steps. Therefore, this arrangement not only simplifies the preparation process but also reduces the preparation cost of the display panel 1001.

[0137] This embodiment also provides a method for preparing a display panel, referring to Fig.23 , including the following steps:

[0138] Step S1: Reference Fig.24 , a pixel circuit layer 200 is formed on the substrate 100 .

[0139] Here, the pixel circuit layer 200 includes a source-drain conductive layer. In the process of forming the pixel circuit layer 200, a VSS bus can be formed in the border area of ​​the pixel circuit layer 200. The VSS bus is made of the same material as the source-drain conductive layer and is arranged in the same layer. In this way, the VSS bus and the source-drain conductive layer can be prepared using the same etching process and the same mask plate to reduce the preparation steps and simplify the process.

[0140] Furthermore, in the process of forming the pixel circuit layer 200, a VSS signal line J can also be formed in the display area of ​​the pixel circuit layer 200. The VSS signal line J is made of the same material as the source-drain conductive layer and is disposed in the same layer, so that the VSS signal line J and the source-drain conductive layer can be prepared by the same etching process and the same mask plate, thereby reducing the preparation steps and simplifying the process.

[0141] Step S2: Continue to refer Fig.24 , a first electrode 301 is formed on the substrate 100 . Specifically, the first electrode 301 is formed on a side of the pixel circuit layer 200 away from the substrate 100 .

[0142] Here, when a VSS signal line J is provided in the display area of ​​the pixel circuit layer 200, a transfer pattern Q can also be formed during the process of forming the first electrode 301. The transfer pattern Q is electrically connected to the VSS signal line J. The transfer pattern Q is made of the same material as the first electrode 301 and is provided in the same layer.

[0143] Step S3: Reference Fig.24 , forming an initial pixel defining layer PDL1.

[0144] Here, in the case where there is a transfer pattern Q, a via hole g may be provided in the initial pixel defining layer PDL1 , and the via hole g exposes the transfer pattern Q. The initial pixel defining layer PDL1 is located on the substrate 100 on which the first electrode 301 is formed.

[0145] Step S4: Combine with reference Fig.24 , Fig.25 , Fig.26 and Fig. 27 , an isolation film stack 40 is formed on the substrate 100 formed with the first electrode 301. The isolation film stack 40 includes a first film T100, a second film T200 and a third film T300 which are sequentially stacked in a direction away from the substrate 100. For details, please refer to Fig.25 The isolation film stack 40 is located on a side of the initial pixel defining layer PDL1 away from the substrate 100 .

[0146] Here, the material of the first film T100 includes titanium, the material of the second film T200 includes aluminum, and the material of the third film T300 includes titanium.

[0147] In the case where the transfer pattern Q is present, the first film T100 is connected to the transfer pattern Q through the via hole g.

[0148] Step S5: etching the isolation film stack 40 to form an isolation structure 400.

[0149] Step S5: includes step S51: reference Fig.26 , forming a plurality of grooves G in the isolation film stack 40 between adjacent first electrodes 301; and step S52: referring to Fig. 27 , a first opening K is formed in the isolation film stack 40 .

[0150] In step S51, the process of forming the groove G includes an etching process, such as wet etching, and the etching solution used includes a ferric chloride solution. Since the etching rate of the ferric chloride solution on the second film T200 is greater than the etching rate of the first film T100, the morphology of the groove G finally formed is that the third film T300 extends outward in the first direction X relative to the second film T200.

[0151] Here, in the step of forming a plurality of grooves G, etching may be stopped at the first film T100, that is, only the second film T200 and the third film T300 are etched, so that Figure 5 Alternatively, a portion of the first film T100 may be etched to form a display panel 1001. Fig.10 or Fig.11 Alternatively, the first film T100 may be completely etched, so that a corresponding Fig.13 , Fig.16 , Fig.17 , Fig.18 or Fig.21 The display panel 1001 in FIG.

[0152] In step S52, the isolation structure 400 defines a first opening K, and the orthographic projection of the first electrode 301 on the substrate 100 at least partially overlaps with the orthographic projection of the first opening K on the substrate; the isolation structure 400 includes two isolation parts T, each isolation part T includes a first film layer T1, a second film layer T2 and a third film layer T3 stacked in a direction away from the substrate 100; in the two isolation parts T, there is a spacing between the two second film layers T2 and between the two third film layers T3 in the first direction X, and the first direction X is parallel to the direction of the line connecting the centers of adjacent first openings K; the third film layer T3 includes a first edge L1 and a second edge L2, the first edge L1 is close to the first opening K relative to the second film layer T2, the second edge L2 is away from the first opening K relative to the second film layer T2, and the size of the first edge L1 in the first direction X is smaller than the size of the second edge L2 in the first direction X.

[0153] It can be understood that the first film layer T1 is the first film T100 after etching, the second film layer T2 is the second film T200 after etching, and the third film layer T3 is the third film T300 after etching.

[0154] Here, while the first opening K is formed, a pixel opening h is also formed in the initial pixel defining layer PDL1. Fig. 27 , the pixel opening h is connected to the first opening k. After the pixel opening h is formed, the initial pixel defining layer PDL1 forms a pixel defining layer PDL.

[0155] In some embodiments, the pixel opening h and the first opening k may be etched using the same etching process and the same mask plate, so as to simplify the manufacturing process.

[0156] Here, the process of forming the first opening k includes an etching process, such as wet etching, and the etching solution used includes a ferric chloride solution. Since the etching rate of the ferric chloride solution on the second film T200 is greater than the etching rate of the first film T100, the morphology of the first opening k finally formed is that the third film layer T3 extends outward in the first direction X relative to the second film layer T.

[0157] It should be noted that the concentration of the etching solution used to form the groove G is greater than the concentration of the etching solution used to form the first opening k, and the etching time for forming the groove G is greater than the etching time for forming the first opening k. The angle α1 between the first side surface C1 and the first end surface D1 of the isolation portion T thus formed is greater than the angle α2 between the second side surface C2 and the first end surface D1, and the angle β1 between the first side surface C1 and the second end surface D2 is less than the angle β2 between the second side surface C2 and the second end surface D2. Figure 8 .

[0158] In some embodiments, α1 may be equal to β1. For example, α1=β1=90°. In this way, the first side surface C1 has a high verticality, and in the subsequent steps of manufacturing the display panel, it can be ensured that the second electrode of the light-emitting device is in contact with and electrically connected to the side surface of the isolation portion T, so that the second electrode and the side surface of the isolation portion are effectively overlapped.

[0159] In some embodiments, the sum of α2 and β2 may be 180°. For example, α2=60°, β2=120°. In this way, in a direction perpendicular to the substrate 100, the second side surface C2 is an inclined side surface, and in the subsequent steps of manufacturing the display panel, the light-emitting layer of the light-emitting device can be effectively isolated.

[0160] Step S6: Reference Fig.28 A light-emitting layer 302 and a second electrode 303 are sequentially formed in the first opening K. The light-emitting layer 302, the second electrode 303 and the first electrode 301 form a light-emitting device 300. The edge of the second electrode 303 contacts and is electrically connected to the side of the isolation portion T close to the first opening K.

[0161] In step S6, specifically, the pixel opening h of the display panel includes: a first pixel opening, a second pixel opening, and a third pixel opening. The first light-emitting material, the second electrode material, and the inorganic encapsulation layer are vapor-deposited on the entire surface of the display area of ​​the display panel 1001, and the first light-emitting material, the second electrode material, and the inorganic encapsulation layer outside the first pixel opening are removed to form a first light-emitting layer and a second electrode in the first pixel opening; the second light-emitting material, the second electrode material, and the inorganic encapsulation layer are vapor-deposited on the entire surface of the display area of ​​the display panel 1001, and the second light-emitting material, the second electrode material, and the inorganic encapsulation layer outside the second pixel opening are removed to form a second light-emitting layer and a second electrode in the second pixel opening; the third light-emitting material, the second electrode material, and the inorganic encapsulation layer are vapor-deposited on the entire surface of the display area of ​​the display panel 1001, and the third light-emitting material, the second electrode material, and the inorganic encapsulation layer outside the third pixel opening are removed to form a third light-emitting layer and a second electrode in the third pixel opening. In this way, a light-emitting layer 302 of a corresponding light-emitting color can be formed in the corresponding pixel opening.

[0162] In some embodiments, the process of removing the first light-emitting material, the second electrode material and the inorganic encapsulation layer outside the first pixel opening, removing the second light-emitting material, the second electrode material and the inorganic encapsulation layer outside the second pixel opening, and removing the third light-emitting material, the second electrode material and the inorganic encapsulation layer outside the third pixel opening may all include an etching process.

[0163] In some embodiments, the first light-emitting material may include one or more layers. When the first light-emitting material includes a layer of light-emitting material, the layer of light-emitting material is an organic light-emitting material. When the first light-emitting material includes multiple layers of light-emitting materials, the first light-emitting material includes a layer of organic light-emitting material and at least one layer of common material, and the common material may be at least one of the materials of the hole injection layer, the hole transport layer, the electron blocking layer, the hole blocking layer, the electron transport layer and the electron injection layer. The second light-emitting material and the third light-emitting material may also include one or more layers, and the details may refer to the first light-emitting material, which will not be described in detail here.

[0164] In the process of forming the light-emitting layer 302 , the inorganic encapsulation layer can encapsulate and protect the light-emitting layer 302 , thereby preventing the light-emitting layer 302 from being corroded by external water and oxygen.

[0165] The above is only a specific embodiment of the present disclosure, but the protection scope of the present disclosure is not limited thereto. Any changes or substitutions that can be thought of by any person skilled in the art within the technical scope disclosed in the present disclosure should be included in the protection scope of the present disclosure. Therefore, the protection scope of the present disclosure should be based on the protection scope of the claims.

Claims

1. A display panel, characterized in that: include: substrate; An isolation structure, disposed on the substrate; the isolation structure defines a first opening; The isolation structure comprises two isolation parts, each of which comprises a first film layer, a second film layer and a third film layer stacked in a direction away from the substrate; in the two isolation parts, there is a spacing between two second film layers and between two third film layers in a first direction, and the first direction is parallel to the direction of a line connecting the centers of adjacent first openings; the third film layer comprises a first edge and a second edge, the first edge is close to the first opening relative to the second film layer, the second edge is far away from the first opening relative to the second film layer, and the size of the first edge in the first direction is smaller than the size of the second edge in the first direction; A light emitting device comprises a first electrode, a light emitting layer and a second electrode stacked in a direction away from the substrate, wherein an edge of the second electrode contacts and is electrically connected to a side surface of the isolation portion close to the first opening.

2. The display panel according to claim 1, characterized in that: The first film layers of the two isolation parts have a spacing in the first direction; The display panel further includes: a pixel defining layer and a switching pattern; The pixel defining layer is located between the isolation structure and the substrate, and a via hole is provided in the pixel defining layer; The first film layer of at least one of the two isolation parts is connected to the transfer pattern through the via hole.

3. The display panel according to claim 2, characterized in that: The two first film layers in the two isolation parts are connected to the transfer pattern through the same via hole.

4. The display panel according to claim 2, characterized in that: There are a plurality of via holes, and the two first film layers in the two isolation parts are respectively connected to the transfer pattern through different via holes.

5. The display panel according to claim 2, characterized in that: Among the two isolation parts, the first film layer of one of the isolation parts is connected to the transfer pattern through the via hole, and the first film layer of the other isolation part is located on the surface of the pixel definition layer away from the substrate.

6. The display panel according to claim 5, characterized in that: The distance from the surface of the isolation part connected to the transfer pattern close to the substrate to the substrate is smaller than the distance from the surface of the isolation part located on the surface of the pixel definition layer away from the substrate close to the substrate to the substrate.

7. The display panel according to claim 5, characterized in that: The light emitting device is surrounded by an isolation portion, and at least one position in the first film layer of the isolation portion surrounding the light emitting device is connected to the transfer pattern through the via hole.

8. The display panel according to claim 7, characterized in that: In the pixel defining layer surrounding the light emitting device, there are a plurality of via holes, and the plurality of via holes are arranged at intervals.

9. The display panel according to claim 1, characterized in that: The first film layers of the two isolation parts are directly electrically connected.

10. The display panel according to claim 9, characterized in that: Also includes: A pixel defining layer, located between the isolation structure and the substrate; The two first film layers in the two isolation portions are both located on a surface of the pixel definition layer away from the substrate.

11. The display panel according to claim 9, characterized in that: Also includes: Pixel definition layer and transfer pattern; The pixel defining layer is located between the isolation structure and the substrate, and a via hole is provided in the pixel defining layer; The two first film layers in the two isolation parts are connected to form an integrated structure film layer, and the integrated structure film layer is connected to the transfer pattern through the via hole.

12. The display panel according to any one of claims 3 to 8 and 11, characterized in that: Also includes: A VSS signal line is provided in a display area of ​​the display panel and is located between the substrate and the pixel defining layer; The transfer pattern is electrically connected to the VSS signal line.

13. The display panel according to claim 5, characterized in that: The plurality of light emitting devices include a first light emitting device and a second light emitting device; The isolation portion surrounding the first light-emitting device is a first isolation portion, and the isolation portion surrounding the second light-emitting device is a second isolation portion; the transfer pattern includes a first transfer pattern and a second transfer pattern, the pixel defining layer is provided with a first via hole and a second via hole, the first film layer of the first isolation portion is electrically connected to the first transfer pattern through the first via hole, and the first film layer of the second isolation portion is electrically connected to the second transfer pattern through the second via hole; The display panel further includes: a first VSS signal line and a second VSS signal line, which are arranged in a display area of ​​the display panel and between the substrate and the pixel defining layer; The first transfer pattern is electrically connected to the first VSS signal line, and the second transfer pattern is electrically connected to the second VSS signal line.

14. The display panel according to claim 13, characterized in that: The first light emitting device and the second light emitting device emit different colors of light, and the first VSS signal line and the second VSS signal line are configured to transmit VSS signals with different voltage values.

15. The display panel according to claim 13, characterized in that: The plurality of light emitting devices further include a third light emitting device, and the light emitting colors of the first light emitting device, the second light emitting device and the third light emitting device are different; The isolation portion surrounding the third light emitting device is a third isolation portion, the display panel further includes a third transfer pattern, the pixel defining layer is further provided with a third via hole, and the first film layer of the third isolation portion is electrically connected to the third transfer pattern through the third via hole; The display panel further includes: a third VSS signal line, which is disposed in a display area of ​​the display panel and is located between the substrate and the pixel defining layer; The third transfer pattern is electrically connected to the third VSS signal line.

16. The display panel according to any one of claims 3, 4 and 11, characterized in that: Also includes: A VSS bus is provided in the frame area of ​​the display panel; The transfer pattern is electrically connected to the VSS bus.

17. The display panel according to claim 10, characterized in that: Also includes: A VSS bus is provided in the frame area of ​​the display panel; the first film layer in the isolation portion is electrically connected to the VSS bus.

18. The display panel according to claim 14, characterized in that: Also includes: A first VSS bus and a second VSS bus are provided in a border area of ​​the display panel; the first VSS bus is electrically connected to the first VSS signal line, and the second VSS bus is electrically connected to the second VSS signal line.

19. The display panel according to any one of claims 2 to 8 and 11 to 16, characterized in that: The transfer pattern is made of the same material as the first electrode and is disposed in the same layer.

20. The display panel according to any one of claims 1 to 11, characterized in that: The second film layer of the isolation portion includes a first side surface, a second side surface, a first end surface, and a second end surface, wherein the first side surface and the second side surface are arranged opposite to each other in the first direction, and the first side surface is closer to the light-emitting device than the second side surface; the first end surface and the second end surface are arranged opposite to each other in a direction perpendicular to the substrate, and the first end surface is closer to the substrate than the second end surface; The included angle between the first side surface and the first end surface is greater than the included angle between the second side surface and the first end surface; the included angle between the first side surface and the second end surface is smaller than the included angle between the second side surface and the second end surface.

21. A display device, characterized in that: include: The display panel according to any one of claims 1 to 20; as well as, A cover plate is arranged on the light emitting side of the display panel.

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