Packaging structure of semiconductor device and computing equipment

Abstract

The embodiment of the utility model provides a packaging structure of a semiconductor device and computing equipment, and the packaging structure of the semiconductor device comprises a substrate which comprises at least one chip located on the substrate; a package reinforcement on the substrate; the top surface structure of the packaging reinforcing member comprises a protruding part, the protruding direction of the protruding part faces the top surface direction of the chip, and the projection area of the protruding part covers the top surface area of the chip; the liquid blocking cover comprises an extensible liquid blocking arm structure; one end of the liquid blocking arm structure is fixed around the outer edge of the chip, and the other end is fixed on connecting parts at two ends of the top surface structure, and the connecting parts are far away from the area where the protruding parts are located; the liquid blocking cover, the packaging reinforcing piece and the top surface of the chip form a closed cavity; and the liquid thermal interface material layer is positioned in the closed cavity. According to the technical scheme provided by the embodiment of the invention, the heat dissipation effect of the packaging structure of the semiconductor device can be improved under the condition that the normal work of the semiconductor device is ensured.

Description

Technical Field

[0001] The embodiments of the present application relate to the field of semiconductor technology, and in particular to a packaging structure of a semiconductor device and a computing device. Background Art

[0002] With the continuous development of semiconductor device manufacturing technology and the rapid increase in chip computing power density, the power consumption and power density of chips are also rising accordingly, and the heat dissipation challenges of chips are also significantly increased. Therefore, chip heat dissipation technology is one of the key factors restricting chip design and application.

[0003] Improving the heat dissipation performance inside the semiconductor device packaging structure is the key development direction of chip heat dissipation technology. In this context, how to provide a technical solution to improve the heat dissipation effect of the semiconductor device packaging structure while ensuring the normal operation of the semiconductor device has become a technical problem that technicians in this field need to solve urgently. In this way, it is possible to improve the heat dissipation effect of the semiconductor device packaging structure while ensuring the normal operation of the semiconductor device. Utility Model Content

[0004] In view of this, an embodiment of the present application provides a packaging structure of a semiconductor device and a computing device, which improves the heat dissipation effect of the packaging structure of the semiconductor device while ensuring the normal operation of the semiconductor device.

[0005] To achieve the above objectives, the embodiments of the present application provide the following technical solutions.

[0006] In a first aspect, an embodiment of the present application provides a packaging structure of a semiconductor device, including:

[0007] a substrate, comprising at least one chip located on the substrate;

[0008] A packaging reinforcement member is located on the substrate; the top surface structure of the packaging reinforcement member includes a protrusion, the protrusion direction of the protrusion is toward the top surface direction of the chip, and the projection area of ​​the protrusion covers the top surface area of ​​the chip;

[0009] A liquid-blocking cover, comprising an extendable liquid-blocking arm structure; one end of the liquid-blocking arm structure is fixed around the outer edge of the chip, and the other end is fixed to the connecting parts at both ends of the top surface structure, and the connecting parts are far away from the area where the protrusion is located; the liquid-blocking cover, the packaging reinforcement and the top surface of the chip form a closed cavity;

[0010] The liquid thermal interface material layer is located in the closed cavity.

[0011] In a second aspect, an embodiment of the present application provides a computing device, comprising a packaging structure of a semiconductor device as described in the first aspect.

[0012] The packaging structure of the semiconductor device provided in the embodiment of the present application includes: a substrate, including at least one chip located on the substrate; a packaging reinforcement member, located on the substrate; the top surface structure of the packaging reinforcement member includes a protrusion, the protrusion direction of the protrusion is toward the top surface direction of the chip, and the projection area of ​​the protrusion covers the top surface area of ​​the chip; a liquid blocking cover, including an extendable liquid blocking arm structure; one end of the liquid blocking arm structure is fixed around the outer edge of the chip, and the other end is fixed to the connecting parts located at both ends of the top surface structure, and the connecting parts are far away from the area where the protrusion is located; the liquid blocking cover, the packaging reinforcement member and the top surface of the chip form a closed cavity; a liquid thermal interface material layer is located in the closed cavity.

[0013] It can be seen that the technical solution provided in the embodiment of the present application arranges the liquid thermal interface material layer in the closed cavity surrounded by the liquid blocking cover, the packaging reinforcement and the top surface of the chip. Since the liquid blocking arm structure of the liquid blocking cover is fixed to the connecting part of the top surface structure, and the connecting part is located at both ends of the top surface structure away from the protrusion, and the projection area of ​​the protrusion covers the top surface area of ​​the chip, the liquid thermal interface material layer arranged in the closed cavity, in addition to contacting the top surface and the protrusion of the chip, can have a part located below the connecting part; when in the process of packaging semiconductor devices, the substrate and the chip located on the substrate will warp and deform. At this time, since the liquid blocking arm structure is extensible, the liquid blocking arm structure can be stretched as the substrate and the chip located on the substrate warp and deform, thereby pushing the liquid thermal interface material layer located below the connecting part into between the top surface and the protrusion of the chip; thereby, the liquid thermal interface material layer can be kept in full contact with the top surface and the protrusion of the chip, thereby increasing the contact area and improving the heat dissipation performance of the packaging structure of the semiconductor device.

[0014] At the same time, since the liquid blocking arm and the outer edge of the chip and the connecting parts at both ends of the top surface structure form a closed cavity, and the liquid blocking arm structure is extensible, when the substrate and the chip on the substrate are deformed, the closed cavity is always airtight, so that in the process of packaging semiconductor devices, the liquid thermal interface material layer arranged in the closed cavity will not leak, and the damage of electronic components such as capacitors caused by the leakage of the liquid thermal interface material layer can be avoided. In this way, the heat dissipation effect of the packaging structure of the semiconductor device can be improved while ensuring the normal operation of the semiconductor device. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on the provided drawings without paying any creative work.

[0016] Figure 1 It is a cross-sectional view of the packaging structure of the semiconductor device provided in an embodiment of the present application.

[0017] Figure 2 is a cross-sectional view of arranging a layer of liquid thermal interface material using a ring structure.

[0018] Figure 3 yes Figure 2 The structure shown is a cross-sectional view of the structure that undergoes warping during the packaging process.

[0019] Figure 4 yes Figure 1 The structure shown is a cross-sectional view of the structure that undergoes warping during the packaging process.

[0020] Figure 5 yes Figure 1 Bottom view of the package stiffener of the illustrated structure.

[0021] Figure 6 yes Figure 1 A top view of the liquid retaining cover in the structure shown.

[0022] Figure 7 yes Figure 6 LL cross-sectional view of the liquid retaining cover in the structure shown.

[0023] Figure 8 It is another cross-sectional view of the packaging structure of the semiconductor device provided in an embodiment of the present application.

[0024] Fig. 9 This is another cross-sectional view of the semiconductor device packaging method provided by an embodiment of the present application.

[0025] Fig.10 It is a schematic diagram of a process of a semiconductor device packaging method provided in an embodiment of the present application.

[0026] Fig.11 This is a schematic diagram of the first process result of the semiconductor device packaging method provided in an embodiment of the present application.

[0027] Fig.12 It is a schematic diagram of the result of the second process of the semiconductor device packaging method provided in an embodiment of the present application.

[0028] Fig.13It is a schematic diagram of the result of the third process of the semiconductor device packaging method provided in an embodiment of the present application. DETAILED DESCRIPTION

[0029] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0030] With the continuous development of chip node technology, new trends have emerged in chip packaging technology to meet the needs of device packaging chips in different scenarios. For example, in mobile devices, chip packaging technology may need to meet special needs such as improving electrical performance, reducing device size, and reducing manufacturing costs.

[0031] With the continuous development of semiconductor device manufacturing technology and the rapid increase in chip computing power density, the power consumption and power density of chips continue to rise. The heat dissipation of the chip packaging structure (i.e., the packaging structure of the semiconductor device formed when the chip is packaged) is one of the factors that curb the improvement of chip computing power. From the perspective of the heat dissipation path, the heat emitted by the chip (die) must first be transferred to the board-level heat sink through the packaging structure of the semiconductor device. For example, in the packaging structure of a semiconductor device with a lid-shaped packaging reinforcement, the heat emitted by the chip will be successively dissipated through the TIM (Thermal Interface Material) and the packaging reinforcement located on the top surface of the chip. The internal thermal resistance of the packaging structure of the semiconductor device accounts for a large proportion of the total thermal resistance. Therefore, it is necessary to optimize the thermal resistance of the heat dissipation path of the chip-TIM material layer structure-packaging reinforcement inside the packaging structure of the semiconductor device to improve the heat dissipation performance of the packaging structure of the semiconductor device.

[0032] Liquid TIM has a wide range of applications due to its good thermal conductivity (ability to transfer heat quickly), low thermal resistance (reducing heat loss during heat transfer), and non-drying properties (will not dry out or harden after long-term use).

[0033] Liquid TIM can be placed in the gap between the top surface of the chip and the package reinforcement (top surface structure) to improve the thermal conductivity and help the chip dissipate heat. There are many types of liquid TIM, including silicone grease, metal-based paste, carbon-based paste, etc. Different types of liquid TIM are suitable for different application scenarios according to their composition and characteristics.

[0034] However, since the packaging structure of the semiconductor device may be warped and deformed due to the operating temperature generated during the packaging process, the gap between the top surface of the chip and the top surface structure may be deformed accordingly; as a result, the volume of the liquid TIM arranged in the gap cannot fill the space in the deformed gap, and sufficient contact between the liquid TIM and the top surface structure and the top surface of the chip cannot be guaranteed, affecting the heat dissipation effect; at the same time, the deformed gap may cause the liquid TIM filled inside to leak, so that the leaked liquid TIM may contact the capacitor on the substrate, damage the internal circuit of the semiconductor device, and affect the normal operation of the semiconductor device.

[0035] Based on this, an embodiment of the present application provides a packaging structure of a semiconductor device to improve the heat dissipation effect of the packaging structure of the semiconductor device while ensuring the normal operation of the semiconductor device.

[0036] Please refer to Figure 1 , Figure 1 It is a cross-sectional view of the packaging structure of the semiconductor device provided in an embodiment of the present application.

[0037] like Figure 1 As shown, the packaging structure of the semiconductor device includes:

[0038] A substrate 1, comprising at least one chip 11 located on the substrate 1;

[0039] A packaging reinforcement member 2 is located on the substrate 1; the top surface structure 21 of the packaging reinforcement member 2 includes a protrusion 211, the protrusion direction Y of the protrusion 211 is toward the top surface direction of the chip 11, and the projection area S1 of the protrusion 211 covers the top surface area S2 of the chip 11;

[0040] The liquid-blocking cover 3 comprises an extendable liquid-blocking arm structure; one end of the liquid-blocking arm structure is fixed around the outer edge of the chip 11, and the other end is fixed to the connecting parts 212 located at both ends of the top surface structure 21, and the connecting parts 212 are far away from the area where the protrusion 211 is located; the liquid-blocking cover 3, the packaging reinforcement 2 and the top surface of the chip 11 form a closed cavity A;

[0041] The liquid thermal interface material layer 4 is located in the closed cavity A.

[0042] One end of the liquid blocking cover 3 is fixed on the outer edge of the chip 11, and the other end of the liquid blocking cover 3 is fixed to the area where the non-protruding part 211 is located, that is, the connecting part 212 at both ends of the top surface structure 21; so that the area surrounded by the liquid blocking arm structure is disc-shaped, so as to prevent the liquid thermal interface material layer 4 from overflowing.

[0043] The packaging reinforcement member 2 can be made by stamping and other processes. Since the packaging reinforcement member 2 has a protrusion 211, and the projection area S1 of the protrusion 211 can cover the top surface area S2 of the chip 11. Therefore, in the initial packaging process of the semiconductor device, the protrusion 211 can keep the liquid thermal interface material layer 4 located below it, and can always be in full contact with the top surface of the chip 11, and squeeze part of the liquid thermal interface material layer 4 in the liquid shield 3 to the bottom of the connecting portion 212, so that when the packaging structure of the subsequent semiconductor device is warped and deformed, the liquid thermal interface material layer 4 located below the connecting portion 212 is used to supplement the required liquid thermal interface material layer 4 in the interval between the top surface of the chip 11 and the top surface structure 21, thereby maintaining the liquid thermal interface material layer 4 Full contact with the top surface of the chip 11 and the top surface structure 21.

[0044] The liquid-blocking cover 3 can be fixedly connected to the outer edge of the chip 11 and to the connecting portion 212 through the first adhesive 60. At the same time, in addition to bonding and fixing the liquid-blocking cover 3, the first adhesive 60 can also play a role in completely filling the gap between the two bonded structures. Therefore, the closedness of the space (i.e., the closed cavity A) surrounded by the chip 11, the liquid-blocking cover 3, and the top surface structure 21 is further ensured.

[0045] In the embodiment of the present application, a protrusion 211 is provided in the area opposite to the chip 11 at the bottom of the top surface structure 21. The protrusion direction Y of the protrusion 211 is toward the top surface of the chip 11. The protrusion 211 can relatively reduce the liquid level required to fill the gap between the top surface of the chip 11 and the lower surface of the protrusion 211. In other words, the liquid thermal interface material layer 4 originally filled in the liquid retaining cover 3 is partially transferred to the liquid retaining cover 3 located below the connecting portion 212 under the extrusion of the protrusion 211 (the liquid level of the liquid thermal interface material layer 4 initially filled is lower than the top of the liquid retaining cover 3); when the chip 11 and the substrate 1 are deformed later, the volume and contact area of ​​the liquid thermal interface material layer 4 can be maintained in the gap between the top surface of the chip 11 and the protrusion 211.

[0046] Due to process limitations, there may be a small gap between the highest point of the liquid level of the liquid thermal interface material layer 4 filled in the closed cavity A and the connecting portion 212 of the top surface structure 21, so that there is a small amount of air in the gap, but it does not affect the use of the liquid blocking cover 3 and the performance of the packaging structure of the semiconductor device as a whole.

[0047] Please refer to Figure 2 , Figure 2 is a cross-sectional view of arranging a layer of liquid thermal interface material using a ring structure.

[0048] like Figure 2As shown, in one embodiment, the annular structure 03 can be utilized so that the liquid thermal interface material layer 4 can be arranged between the top surface of the chip 11 and the planar top surface structure 021 of the metal packaging reinforcement, thereby using the liquid thermal interface material layer 4 to dissipate heat from the packaging structure of the semiconductor device.

[0049] Among them, the chip 11 and the substrate 1 can form a semiconductor device packaging structure by metal welding and the curing effect of the bottom filler 7. The liquid thermal interface material layer 04 is filled between the top surface of the chip 11 and the lower surface of the planar top surface structure 021. At the outer edge of the chip 11, a ring structure 03 is provided to prevent the liquid thermal interface material layer 04 from overflowing during the initial arrangement. The ring structure 03 can be fixed to the chip 11 alone or to the chip 11 and the planar top surface structure 021 at the same time, which can be selected according to the specific material and process.

[0050] The planar top surface structure 021 and the substrate 1 can also be firmly connected by the high temperature curing of the adhesive (second adhesive 61). A plurality of capacitors 8 are fixed on the upper surface of the substrate 1, and the capacitors 8 can optimize the electrical performance of the package. The lower surface of the substrate 1 can be in the form of BGA (Ball Grid Array) or LGA (Land Grid Array) to form an interconnection with a PCB (Printed Circuit Board).

[0051] Theoretically, compared with the semi-solid or solid thermal interface material layer formed by materials such as thermal conductive gel and graphite film, the liquid thermal interface material layer 04 has a higher thermal conductivity, so internal cracks, welding failure and other problems will not occur. Therefore, the liquid thermal interface material layer 04 can efficiently and reliably play the role of transferring heat. However, in practical applications, the liquid thermal interface material layer 04 will be adversely affected by the warping deformation of the packaging structure of the semiconductor device. In addition, since the ring structure 03 occupies a certain area of ​​the top surface of the chip 11, and the material of the ring structure 03 is usually resin and other materials, its thermal conductivity is worse than that of the liquid thermal interface material layer 04. Therefore, the heat dissipation effect at the periphery of the top surface of the chip 11 is poor, and it is difficult to arrange the IP (Intellectual Property Core: Intellectual Property Core) module with large heat generation, which is not conducive to the full utilization of the top surface area of ​​the chip 11, and ultimately affects the cost performance of the product.

[0052] Please refer to Figure 3 , Figure 3 yes Figure 2 The structure shown is a cross-sectional view of the structure that undergoes warping during the packaging process.

[0053] It should be noted that Figure 2The packaging structure of the semiconductor device shown in the figure has a flat morphology, which is more consistent with the structural appearance of the packaging structure of the semiconductor device when it is close to the curing temperature of the second adhesive 61 (usually around 150° C.). This is caused by the high-temperature softening effect of the material and conventional process factors.

[0054] like Figure 3 As shown, below the curing temperature of the second adhesive 61, that is, within the normal operating temperature range of the electronic device, since the thermal expansion coefficient of the chip 11 is smaller than that of the substrate 1, the cooling shrinkage of the chip 11 will be smaller than that of the substrate 1, causing the central area of ​​the structure composed of the chip 11, the substrate 1, and the bottom filler 7 to bulge upward. In addition, since the metal packaging reinforcement is usually made of materials with greater rigidity such as copper, it can better maintain a flat morphology than other components during temperature changes. Therefore, at the position where the metal packaging reinforcement and the substrate 1 are bonded and fixed (the position where the second adhesive 61 is fixed), the substrate 1 will be pulled by the metal packaging reinforcement and remain in its original position, so that the substrate 1 will eventually appear Figure 3 The curved shape of the "W" shown in FIG.

[0055] It can be seen that inside the packaging structure of the semiconductor device after the warping deformation, the central part of the interval between the chip 11 and the metal packaging reinforcement is reduced, and the edge part is increased, resulting in the liquid thermal interface material layer 04 having a tendency to flow to the periphery of the chip 11. When the liquid surface spreads out of the annular structure 03 and the surface tension of the liquid is not enough to confine the liquid thermal interface material layer 04 within the interval, part of the liquid thermal interface material layer 04 will overflow to the outside of the annular structure 03. Once this phenomenon occurs, it is irreversible and will directly lead to a reduction in the volume of the liquid thermal interface material layer 04 in the interval, affecting the filling effect of the liquid thermal interface material layer 04 at other operating temperature points, causing the liquid thermal interface material layer 04 to separate from the planar top surface structure 021, and ultimately causing the chip 11 to fail or be damaged by excessive heat. In addition, the liquid thermal interface material layer 04 that overflows to the outside of the annular structure 03 will also contact the capacitor 8 located on the substrate 1, causing it to short-circuit or other failures.

[0056] It should be noted that even if Figure 3 The middle ring structure 04 is fixedly connected to the metal package reinforcement. Due to the warping and deformation of the semiconductor device package structure, the spacing volume increases, which will also cause the liquid surface of the liquid thermal interface material layer 04 and the metal package reinforcement to separate. In addition, a large stress will be generated inside the ring structure 03, which will lead to the destruction of the ring structure 03 itself or the failure of the fixation between the chip 11 and the metal package reinforcement.

[0057] In the semiconductor packaging structure provided in the embodiment of the present application, since a liquid blocking cover 3 including an extendable liquid blocking arm structure is used, due to the ductility of the liquid blocking arm structure, when the substrate 1 and the chip 11 are deformed, the liquid blocking arm structure will stretch accordingly, thereby directing the liquid thermal interface material layer 4 arranged in the closed cavity A and located below the connecting portion 212 to the gap between the top surface of the chip 11 and the top surface structure 21, thereby maintaining the contact area between the liquid thermal interface material layer 4 and the top surface of the chip 11 and the top surface structure 21, thereby improving the heat dissipation effect of the semiconductor packaging structure.

[0058] Please refer to Figure 4 , Figure 4 yes Figure 1 The structure shown is a cross-sectional view of the structure that undergoes warping during the packaging process.

[0059] like Figure 4 As shown, under the effect of the aforementioned warping deformation mechanism, the central area of ​​the structure composed of the chip 11, the substrate 1, and the bottom filler 7 is arched upward, causing the liquid thermal interface material layer 4 to have a tendency to flow toward the periphery of the chip 11. Since the space enclosed by the chip 11, the liquid shield 3, and the top surface structure 21 of the package reinforcement 2 is closed (closed cavity A), the liquid thermal interface material layer 4 does not overflow onto the substrate 1 to affect the capacitor 8, or the liquid thermal interface material layer 4 on the top surface of the chip 11 is lost.

[0060] The interval between the chip 11 and the package reinforcement 2 is reduced in the center and enlarged in the edge. The liquid blocking cover 3 can be made of a flexible structure such as a thin metal sheet. Since it has an extendable liquid blocking arm structure, the liquid blocking arm structure can be stretched by the deformation of the chip 11 when the interval is deformed, so that the liquid thermal interface material layer 4 located below the connecting portion 212 enters the top surface area of ​​the chip 11 to supplement the interval between the top surface of the chip 11 and the lower surface of the protrusion 211; thereby, the liquid thermal interface material layer 4 is always located between the top surface of the chip 11 and the lower surface of the protrusion 211 of the top surface structure 21 inside the package structure of the warped and deformed semiconductor device, and maintains full contact with the top surface of the chip 11 and the lower surface of the protrusion 211. At the same time, although the liquid level of the liquid thermal interface material layer 4 at the periphery of the protrusion 211 (i.e., at the lower surface of the connection portion 212) has dropped to a certain extent, it is still at a higher position relative to the liquid level of the liquid thermal interface material layer 4 on the top surface of the chip 11. Therefore, even if the packaging structure of the warped and deformed semiconductor device is slightly shaken or placed at a slight tilt, the liquid thermal interface material layer 4 can still completely cover the top surface of the chip 11, and there is enough liquid in the liquid thermal interface material layer 4 at this location, so that the liquid level of the liquid thermal interface material layer 4 contacts the lower surface of the protrusion 211, forming an efficient and stable heat dissipation path.

[0061] It can be seen that the technical solution provided in the embodiment of the present application arranges the liquid thermal interface material layer in the closed cavity surrounded by the liquid blocking cover, the packaging reinforcement and the top surface of the chip. Since the liquid blocking arm structure of the liquid blocking cover is fixed to the connecting part of the top surface structure, and the connecting part is located at both ends of the top surface structure away from the protrusion, and the projection area of ​​the protrusion covers the top surface area of ​​the chip, the liquid thermal interface material layer arranged in the closed cavity, in addition to contacting with the top surface and the protrusion of the chip, can have a part located below the connecting part; when in the process of packaging semiconductor devices, the substrate and the chip located on the substrate will be deformed. At this time, since the liquid blocking arm structure is extensible, the liquid blocking arm structure can be stretched as the substrate and the chip located on the substrate are deformed, thereby pushing the liquid thermal interface material layer located below the connecting part into between the top surface and the protrusion of the chip; thereby increasing the contact area between the liquid thermal interface material layer and the top surface and the protrusion of the chip, and improving the heat dissipation performance of the packaging structure of the semiconductor device.

[0062] At the same time, since the outer edges of the liquid blocking arm and the chip and the connecting parts at both ends of the top surface structure form a closed cavity, and the liquid blocking arm structure is extensible; therefore, when the substrate and the chip located on the substrate are deformed, the closed cavity is always airtight, so that in the process of packaging semiconductor devices, the liquid thermal interface material layer arranged in the closed cavity will not leak, thereby avoiding the damage of electronic components such as capacitors due to leakage of the liquid thermal interface material layer.

[0063] In order to fix the liquid blocking cover so that the liquid blocking cover 3, the top surface structure 21 and the top surface of the chip 11 form a closed cavity A, in one embodiment, the packaging structure of the semiconductor device may further include:

[0064] The fixing structure is used to fix the liquid blocking arm structure and the connecting portion 212 , and to fix the liquid blocking arm structure and the outer edge of the chip 11 .

[0065] The fixed structure fills the gap between the liquid blocking arm structure and the top surface structure 21 and the top surface of the chip 11, and fixes the liquid blocking cover 3 as a whole between the top surface structure 21 and the top surface of the chip 11, thereby forming a closed cavity A, preventing the liquid thermal interface material layer 4 from overflowing from the top surface of the chip 11 to the capacitor 8 of the substrate 1, and damaging the internal circuit of the semiconductor device.

[0066] To enhance the flexibility of manufacturing process, in one embodiment, the fixing structure may be an adhesive, or a mortise and tenon structure, or a welding structure.

[0067] For example, please continue to refer to Figure 1 ,like Figure 1 As shown, the fixing structure for fixing the liquid-blocking cover 3 is an adhesive (first adhesive 60 ).

[0068] The first adhesive 60 can stably bond the liquid-blocking cover 3 and completely fill the gap between the liquid-blocking cover 3 and the top surface structure 21 , and the gap between the liquid-blocking cover 3 and the outer edge of the chip 11 .

[0069] Of course, according to actual engineering practice, under the premise of ensuring that the same function as the first adhesive 60 is played, the fixing structure can be improved or replaced by welding or mortise and tenon structure.

[0070] In order to allow a portion of the liquid thermal interface material layer 4 to be located below the connecting portion 212, in the embodiment of the present application, the top surface structure of the package reinforcement member 2 is designed to have a protruding portion 211 and a connecting portion 212. In one embodiment, the cross section of the protruding portion 211 is a trapezoidal structure, and the length of the planar structure on the side away from the top surface of the chip 11 is greater than the length of the planar structure on the side close to the top surface of the chip 11.

[0071] Please refer to Figure 5 , Figure 5 yes Figure 1 Bottom view of the package stiffener of the illustrated structure.

[0072] like Figure 5 As shown, the length of the planar structure b of the protrusion 211 away from the top surface of the chip 11 is greater than the length of the planar structure a on the top surface side close to the chip 11, which can ensure that part of the liquid thermal interface material layer is located below the connecting portion 212 as a supplementary material for subsequent warping deformation, ensuring that the top surface of the chip, the liquid thermal interface material layer, and the top surface structure are in full contact, thereby improving the heat dissipation performance of the packaging structure of the semiconductor device.

[0073] In one embodiment, the size of the plane structure a on the side of the protrusion 211 close to the top surface of the chip 11 can be slightly larger than the top surface of the chip 11, so that the vertical distance from each location of the top surface of the chip to the plane structure a is approximately the same, that is, the thickness difference of the liquid thermal interface material layer 4 arranged on the top surface of the chip 11 is small, so as to ensure that the heat dissipation effect of the heat source at each location on the top surface of the chip 11 is close, and to facilitate the chip back-end workers to maximize the use of the top surface area of ​​the chip 11. In the scenario where some heat sources are concentrated in the center of the chip 11 and the heat generation of the peripheral heat sources of the chip 11 is small, the size of the plane structure a can also be smaller than the top surface of the chip 11.

[0074] The plane structure b on the side of the protrusion 211 away from the top surface of the chip 11 is located in the same plane as the bottom surface of the connection portion 212 of the top surface structure 21. The length of the plane structure b is greater than the length of the plane structure a. An annular transition surface c is formed between the plane structure a and the plane structure b. In the extension direction q from the plane structure a to the plane structure b, the transition surface c can have a certain curvature. At the same time, in the direction R around the top surface of the chip 11, the transition surface can also have a certain curvature, that is, Figure 5 As shown, each intersection position of the transition surface c may not be a right angle C', but an angle with an arc.

[0075] Please combine Figure 1 And refer to Figure 5 ,like Figure 1 and Figure 5 As shown, the packaging reinforcement member 2 may further include:

[0076] The wall-like structure 22 and the top surface structure 21 are used to form a packaging space B with the substrate 1 , and the interior of the packaging space B is used to package the chip 11 located on the substrate 1 and the capacitor 8 located on the substrate 1 .

[0077] The bottom outer side of the top surface structure 21 has a wall structure 22 , which is used to form a fixed connection with the substrate 1 through the second adhesive 61 , so that the packaging reinforcement member 2 is fixed on the substrate 1 as a whole to package the chip 11 .

[0078] In order to ensure that the liquid thermal interface material layer 4 in the closed cavity A can still maintain sufficient contact with the top surface of the chip 11 and the top surface structure 21 after the packaging structure of the semiconductor device is warped and deformed, so as to optimize the internal heat dissipation path of the packaging structure of the semiconductor device. In one embodiment, the space of the closed cavity A can be increased by designing the composition of the liquid blocking arm structure.

[0079] Please combine Figure 1 And refer to Figure 6 and Figure 7 , Figure 6 yes Figure 1 A top view of the liquid retaining cover in the structure shown, Figure 7 yes Figure 6 LL cross-sectional view of the liquid retaining cover in the structure shown.

[0080] like Figure 6 and Figure 7 As shown, the liquid blocking arm structure includes a first liquid blocking arm structure 31 and a second liquid blocking arm structure 32;

[0081] One end of the first liquid blocking arm structure 31 is fixed around the outer edge of the chip 11, and the other end is connected to one end of the second liquid blocking arm structure 32 to form an angled groove 33 with the second liquid blocking arm structure 32; the bottom plane position of the angled groove 33 is lower than the plane position where the first liquid blocking arm structure 31 is fixed to the outer edge of the chip 11;

[0082] One end of the second liquid blocking arm structure 32 is connected to the first liquid blocking arm structure 31 , and the other end is fixed to the connecting portion 212 .

[0083] The second liquid-blocking arm structure 32 and the first liquid-blocking arm structure 31 can be made of flexible structures such as thin metal sheets. The function of the angled groove 33 is to store a portion of the liquid thermal interface material layer 4 when the chip 11 and the substrate 1 are in a flat state (i.e., when the liquid-blocking cover is just fixed to the outer edge of the chip), so that when the packaging structure of the semiconductor device is warped and deformed, the angled groove 33 is stretched by the stretching of the second liquid-blocking arm structure 32 and the first liquid-blocking arm structure 31, thereby guiding a portion of the liquid thermal interface material layer 4 stored thereto to the top surface of the chip 11.

[0084] In space, the bottom plane position of the angled groove 33 is lower than the inner edge of the liquid blocking cover 3 (the plane position where the first liquid blocking arm structure 31 is fixed to the outer edge of the chip 11). Since the first liquid blocking arm structure 31 is used to be fixed to the outer edge of the chip 11, when setting the area enclosed by the first liquid blocking arm structure 31, it can be roughly equal to the area of ​​the top surface of the chip 11, so as to have a better match with the outer edge size of the chip 11.

[0085] Of course, in other embodiments, the area enclosed by the first liquid blocking arm structure 31 may also be slightly larger than the area of ​​the top surface of the chip 11. At this time, during the assembly of the liquid blocking cover 3, the first liquid blocking arm structure 31 will be at a certain distance from the outer edge of the chip 11, and may fall on the position of the bottom filler 7. At this time, as long as the first adhesive 60 is compatible with the material of the bottom filler 7 and has good adhesion, the first adhesive 60 can fill the gap between the first liquid blocking arm structure 31 and the outer edge of the chip 11; so that the first liquid blocking arm structure 31 can still form a fixed connection with the outer edge of the chip 11, thereby not affecting the application of the technical solution proposed in the embodiment of the present application.

[0086] In addition, if the height of the top surface of the chip 11 is relatively small and there is insufficient space on the outer edge of the chip 11 to place the first liquid blocking arm structure 31, it is possible to consider fixing the first liquid blocking arm structure 31 on the outer edge of the top surface of the chip 11, and accordingly, add a structure on the liquid blocking cover 3 that can store part of the liquid thermal interface material layer 4.

[0087] The top surface of the second liquid-blocking arm structure 32 is used to carry the first adhesive 60 coated thereon so as to fix it to the connecting portion 212 .

[0088] exist Figure 6 and Figure 7 In the structure of the liquid blocking hood shown, the edges of the surfaces of the first liquid blocking arm structure 31, the second liquid blocking arm structure 32, and the angle groove 33 are all straight lines. In the actual processing and manufacturing process, some edges of the surface (such as the outer edge of the second liquid blocking arm structure 32) can be allowed to have a certain deformation according to factors such as precision requirements, equipment capabilities, materials selected for the liquid blocking hood 3, and manufacturing costs. The intersection of each edge can be an arc-shaped transition (for example, the intersection is a rounded corner), but it is still necessary to ensure that the edge of the first liquid blocking arm structure 31 is as close to the outer edge of the chip 11 as possible, and the angle groove 33 can play the role of storing the liquid thermal interface material layer.

[0089] In other embodiments, the form of the liquid blocking arm structure may be adjusted to further increase the space of the closed cavity A formed.

[0090] Please refer to Figure 8 , Figure 8 It is another cross-sectional view of the packaging structure of the semiconductor device provided in an embodiment of the present application.

[0091] like Figure 8 As shown, the liquid blocking arm structure includes a third liquid blocking arm structure 34, a fourth liquid blocking arm structure 35 and a fifth liquid blocking arm structure 36;

[0092] One end of the third liquid blocking arm structure 34 is fixed around the outer edge of the chip 11, and the other end is connected to one end of the fourth liquid blocking arm structure 35;

[0093] One end of the fourth liquid blocking arm structure 35 is connected to the third liquid blocking arm structure 34, and the other end is connected to one end of the fifth liquid blocking arm structure 36; the fourth liquid blocking arm structure 35 is a planar structure, and the planar position of the fourth liquid blocking arm structure 35 is lower than the planar position where the third liquid blocking arm structure 34 is fixed to the outer edge of the chip 11;

[0094] One end of the fifth liquid blocking arm structure 36 is connected to the fourth liquid blocking arm structure 35 , and the other end is fixed to the connecting portion 212 .

[0095] In order to ensure that the amount of liquid in the liquid thermal interface material layer 4 stored at the outer edge of the chip 11 is sufficient to fill the gap between the top surface of the chip 11 and the lower surface of the protrusion 211 when the chip 11 and the substrate 1 are in an initial flat state, a liquid blocking cover 3 that can store different amounts of liquid is designed.

[0096] Compared to Figure 1 The structural design of the liquid retaining cover 3 shown in FIG. Figure 8 In the structure of the liquid blocking cover 3 shown, the third liquid blocking arm structure 34 and the fifth liquid blocking arm structure 36 are connected by adding a bending method, that is, using a fourth liquid blocking arm structure 35 of a planar structure, so that the space for accommodating the liquid thermal interface material layer 4 is expanded at the formed bending structure d. When the packaging structure of the semiconductor device (such as the substrate 1 and the chip 11) is warped, a more reliable filling effect is achieved for the interval between the top surface of the chip 11 and the lower surface of the protrusion 211.

[0097] In other embodiments, the material of the liquid-blocking arm structure is a ductile material.

[0098] By selecting the material of the liquid-blocking arm structure, the extensibility of the liquid-blocking arm structure can be achieved by utilizing the characteristics of the material, thereby enhancing the design flexibility of the liquid-blocking arm structure.

[0099] Please refer to Fig. 9 , Fig. 9 This is another cross-sectional view of the semiconductor device packaging method provided by an embodiment of the present application.

[0100] like Fig. 9 As shown, when the ductility of the liquid blocking arm structure is realized by material properties, the liquid blocking arm structure can be directly connected to the outer edge and the connecting portion of the chip in a straight line, without having to adopt Figure 1 or Figure 8 The arrangement of the liquid-blocking arm structure shown here facilitates the manufacture of the liquid-blocking arm structure.

[0101] Of course, on the basis of ensuring the normal use of the packaging structure of the semiconductor device, the embodiment of the present application can also have other structural design schemes of the liquid blocking cover 3 to achieve the same purpose (increasing the amount of liquid in the liquid thermal interface material layer stored under the connecting portion 212), which are not listed one by one here.

[0102] An embodiment of the present application also provides a packaging method for a semiconductor device, which is used to obtain the packaging structure of the semiconductor device described in any of the aforementioned embodiments.

[0103] Please refer to Fig.10 , Fig.10 It is a schematic diagram of a process of a semiconductor device packaging method provided in an embodiment of the present application.

[0104] like Fig.10 As shown, the method comprises the following steps:

[0105] Step S100, providing a substrate.

[0106] Step S101, connecting at least one chip on the substrate.

[0107] In one embodiment, the chip may be soldered to the substrate using a plurality of solder joints (eg, ball solder joints), and a bottom filler may be filled under the chip to surround each solder joint, thereby ensuring the reliability of the solder joints under the chip.

[0108] Of course, in other implementations, multiple capacitors may be bonded on the substrate, and the multiple capacitors are distributed at both ends of the substrate to ensure that the packaging reinforcement has better electrical performance.

[0109] The structure formed by connecting the chip and the capacitor on the substrate can be referred to Fig.11 , Fig.11 This is a schematic diagram of the first process result of the semiconductor device packaging method provided in an embodiment of the present application.

[0110] like Fig.11 As shown, a chip 11 is connected on the substrate 1 , a bottom filler 7 is filled under the chip 11 , and capacitors 8 are bonded to the substrate 1 on both sides of the chip 11 .

[0111] Step S102: fix one end of the extendable liquid blocking arm structure of the liquid blocking cover around the outer edge of the chip.

[0112] The structure formed in step S102 can be referred to Fig.12 , Fig.12 It is a schematic diagram of the result of the second process of the semiconductor device packaging method provided in an embodiment of the present application.

[0113] Fig.12 The structure shown can be Fig.11 The structure shown is obtained on the basis of

[0114] like Fig.12 As shown, Fig.12 Based on the placement of the structure shown in FIG. 1 , the liquid blocking cover 3 is placed on the outer edge of the chip 11 from above the chip 11, so that the chip 11 passes through the first liquid blocking arm structure 31 ( Fig.12 The liquid blocking cover 3 shown is a square space surrounded by a structure with a corner groove 33. The first adhesive 60 is applied to the joint between the chip 11 and the edge of the first liquid blocking arm structure 31, and the amount used should play a role in stable bonding and completely filling the gap.

[0115] The material of the first adhesive 60 should be compatible with the chip 11, the liquid thermal interface material layer 4, the liquid shield 3, and the packaging reinforcement 2, and should not cause chemical reactions. Fig.12 The structure in the embodiment may be subjected to a high temperature environment to cure the first adhesive 60 .

[0116] Step S103, arranging a layer of liquid thermal interface material on the top surface of the liquid blocking arm structure and the chip.

[0117] like Fig.12 As shown, after the first liquid blocking arm structure 31 is fixed, the liquid blocking cover 3 and the top surface of the chip 11 can form a disk-shaped storage space, and a liquid thermal interface material layer can be arranged in the disk-shaped storage space.

[0118] The structure formed in step S103 can be referred to Fig.13 , Fig.13 It is a schematic diagram of the result of the third process of the semiconductor device packaging method provided in an embodiment of the present application.

[0119] Fig.13 The structure shown can be Fig.12 The structure shown is obtained on the basis of

[0120] like Fig.13 As shown, in the disk-shaped storage space surrounded by the chip 11 and the liquid shield 3, a liquid thermal interface material layer 4 is added by pouring or coating, and the amount should not overflow the liquid shield 3 and is adjusted according to actual engineering experience.

[0121] The first adhesive 60 is applied to the top surface of the second liquid retaining arm structure 32 of the liquid retaining cover 3. The amount of the first adhesive 60 used should also play a role in stabilizing the bonding and completely filling the gap between the second liquid retaining arm structure 32 and the top surface structure 21 (connecting portion 212). The second adhesive 61 is applied to the edge of the upper surface of the substrate 1 for subsequent bonding of the wall-like structure 22.

[0122] Step S104 , fixing the other end of the liquid blocking arm structure to the connecting parts located at both ends of the packaging reinforcement member.

[0123] By fixing the other end of the liquid blocking arm structure (for example, fixing the top surface of the second liquid blocking arm structure) to the connecting portion and utilizing the protruding portion of the top surface structure of the packaging reinforcement, the liquid thermal interface material layer is filled into the closed cavity formed by the packaging reinforcement, the liquid blocking cover and the top surface of the chip to obtain a packaging structure of the semiconductor device.

[0124] The top surface structure of the packaging reinforcement component includes the protrusion, the protrusion direction of the protrusion is toward the top surface direction of the chip, the projection area of ​​the protrusion covers the top surface area of ​​the chip, and the connecting portion is away from the area where the protrusion is located.

[0125] In one embodiment, the method may further include:

[0126] Step S105 , bonding the wall structure of the packaging reinforcement member on the substrate.

[0127] After the wall-like structure is bonded, the top surface structure of the packaging reinforcement, the wall-like structure and the substrate can form a packaging space, and the chip and the capacitor are located in the packaging space.

[0128] The packaging structure of the semiconductor device obtained after step S105 can refer to Figure 1 .

[0129] like Figure 1 As shown, in Fig.13 On the basis of the structure shown in the figure, the package reinforcement member 2 is placed from above the chip 11, and a certain pressure is applied to make the connection portion 212 fully contact with the first adhesive 60, the wall structure 22 fully contact with the second adhesive 61 on the substrate 1, and the first adhesive 60 and the second adhesive 61 are cured, finally forming Figure 1 The packaging structure of the semiconductor device in FIG.

[0130] It should be noted that if the chip 11 in the packaging structure of the semiconductor device is replaced with multiple chips, that is, a multi-chip form (Multi-Chip Module, MCM), or a circuit interconnection interposer made of silicon or organic material is added between the chip 11 and the substrate 1 (forming, for example, a high-performance computing packaging form (Chip-on-Wafer-on-Substrate, CoWoS) or a fan-out substrate chip packaging form (Fan Out Chip on Substrate, FOCoS)), there is no significant difference in the technical problems to be solved by the technical solutions improved in the embodiments of the present application, and therefore the present technical solution is equally applicable.

[0131] Due to the diversity of internal material selection and structural design schemes of the packaging structure, Figure 3 or Figure 4 In addition to the illustrated warping deformation state, there may be other warping states, such as the center of the chip 11 bulging downward or the package reinforcement 2 also having non-negligible deformation. In this solution, a space for accommodating a layer of liquid thermal interface material is designed at the outer edge of the chip 11, below the top surface of the chip 11, and above the lower surface of the protrusion 211. Therefore, for the above-mentioned other warping states, it can also play the role of filling the gap between the top surface of the chip 11 and the top surface structure 21. In addition, the first adhesive 60 for fixing the liquid retaining cover 3 should also play the role of stabilizing the bonding and completely filling the gap. According to the actual project, welding or mortise and tenon structure can also be used for improvement or replacement while ensuring the same role.

[0132] It can be seen that the technical solution provided in the embodiment of the present application arranges the liquid thermal interface material layer in the closed cavity surrounded by the liquid blocking cover, the packaging reinforcement and the top surface of the chip. Since the liquid blocking arm structure of the liquid blocking cover is fixed to the connecting part of the top surface structure, and the connecting part is located at both ends of the top surface structure away from the protrusion, and the projection area of ​​the protrusion covers the top surface area of ​​the chip, the liquid thermal interface material layer arranged in the closed cavity, in addition to contacting the top surface and the protrusion of the chip, can have a part located below the connecting part; when in the process of packaging semiconductor devices, the substrate and the chip located on the substrate will warp and deform. At this time, since the liquid blocking arm structure is extensible, the liquid blocking arm structure can be stretched as the substrate and the chip located on the substrate warp and deform, thereby pushing the liquid thermal interface material layer located below the connecting part into between the top surface and the protrusion of the chip; thereby, the liquid thermal interface material layer can be kept in full contact with the top surface and the protrusion of the chip, thereby increasing the contact area and improving the heat dissipation performance of the packaging structure of the semiconductor device.

[0133] At the same time, since the liquid blocking arm and the outer edge of the chip and the connecting parts at both ends of the top surface structure form a closed cavity, and the liquid blocking arm structure is extensible, when the substrate and the chip on the substrate are deformed, the closed cavity is always airtight, so that in the process of packaging semiconductor devices, the liquid thermal interface material layer arranged in the closed cavity will not leak, and the damage of electronic components such as capacitors caused by the leakage of the liquid thermal interface material layer can be avoided. In this way, the heat dissipation effect of the packaging structure of the semiconductor device can be improved while ensuring the normal operation of the semiconductor device.

[0134] An embodiment of the utility model further provides a computing device, comprising a packaging structure of a semiconductor device as described in any one of the above items.

[0135] The computing device may refer to a hardware device that can perform data processing and computing tasks. For example, the computing device may be a portable mobile device such as a smart phone or a tablet computer; or a computer device such as a supercomputer or a server.

[0136] It should be noted that the above-mentioned terminal device may also include other devices (not shown) that may not be necessary for understanding the contents disclosed in the embodiments of the present application; given that these other devices may not be necessary for understanding the contents disclosed in the embodiments of the present application, the embodiments of the present application will not introduce them one by one.

[0137] Although the embodiments of the present application are disclosed above, the present application is not limited thereto. Any person skilled in the art may make various changes and modifications without departing from the spirit and scope of the present application. Therefore, the scope of protection of the present application shall be subject to the scope defined by the claims.

Claims

1. A semiconductor device packaging structure, wherein: include: a substrate, comprising at least one chip located on the substrate; A packaging reinforcement member, located on the substrate; The top surface structure of the package reinforcement member includes a protruding portion, the protruding direction of the protruding portion is toward the top surface direction of the chip, and the projection area of ​​the protruding portion covers the top surface area of ​​the chip; A liquid-blocking cover, comprising an extendable liquid-blocking arm structure; one end of the liquid-blocking arm structure is fixed around the outer edge of the chip, and the other end is fixed to the connecting parts at both ends of the top surface structure, and the connecting parts are far away from the area where the protrusion is located; the liquid-blocking cover, the packaging reinforcement and the top surface of the chip form a closed cavity; The liquid thermal interface material layer is located in the closed cavity.

2. The semiconductor device packaging structure according to claim 1, wherein: The liquid blocking arm structure comprises a first liquid blocking arm structure and a second liquid blocking arm structure; One end of the first liquid blocking arm structure is fixed around the outer edge of the chip, and the other end is connected to one end of the second liquid blocking arm structure to form an angled groove with the second liquid blocking arm structure; the bottom plane position of the angled groove is lower than the plane position where the first liquid blocking arm structure is fixed to the outer edge of the chip; One end of the second liquid blocking arm structure is connected to the first liquid blocking arm structure, and the other end is fixed to the connecting portion.

3. The semiconductor device packaging structure according to claim 1, wherein: The liquid blocking arm structure includes a third liquid blocking arm structure, a fourth liquid blocking arm structure and a fifth liquid blocking arm structure; One end of the third liquid blocking arm structure is fixed around the outer edge of the chip, and the other end is connected to one end of the fourth liquid blocking arm structure; One end of the fourth liquid blocking arm structure is connected to the third liquid blocking arm structure, and the other end is connected to one end of the fifth liquid blocking arm structure; the fourth liquid blocking arm structure is a planar structure, and the planar position of the fourth liquid blocking arm structure is lower than the planar position where the third liquid blocking arm structure is fixed to the outer edge of the chip; One end of the fifth liquid blocking arm structure is connected to the fourth liquid blocking arm structure, and the other end is fixed on the connecting portion.

4. The semiconductor device packaging structure according to claim 1, wherein: The material of the liquid-blocking arm structure is a ductile material.

5. The semiconductor device packaging structure according to any one of claims 1 to 4, wherein: The cross section of the protrusion is a trapezoidal structure, and the length of the planar structure on the side away from the top surface of the chip is greater than the length of the planar structure on the side close to the top surface of the chip.

6. The semiconductor device packaging structure according to claim 5, wherein: The packaging reinforcement member further comprises: The wall-like structure and the top surface structure are used to form a packaging space with a substrate, and the interior of the packaging space is used to package a chip located on the substrate and a capacitor located on the substrate.

7. The semiconductor device packaging structure according to claim 6, wherein: Also includes: The fixing structure is used to fix the liquid blocking arm structure and the connecting portion, and to fix the liquid blocking arm structure and the outer edge of the chip.

8. The semiconductor device packaging structure according to claim 7, wherein: The fixing structure is an adhesive, or a mortise and tenon structure, or a welding structure.

9. A computing device, wherein: A packaging structure comprising a semiconductor device as claimed in any one of claims 1 to 8.

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