Surge test equipment
Through the surge generation circuit and scanning circuit in the surge test equipment, the electrical overstress damage caused by the coupling effect of the high and low voltage circuits in the device to be tested is solved, and the function of identifying severe coupling areas and weak points in the EMC design is realized.
Patent Information
- Application Number
- CN202520271931.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2025-02-20
- Publication Date
- 2025-05-27
- Estimated Expiration
- 2035-02-20
AI Technical Summary
In the device to be tested, due to the unreasonable layout of the high-voltage circuit and the low-voltage circuit, the coupling effect is caused. The surge energy is coupled to the low-voltage circuit through the distributed capacitance and the distributed inductance, causing electrical overstress damage.
A surge testing device is provided, including a surge generation circuit and a scanning circuit. The surge generation circuit adjusts the circuit parameters to generate surge waveforms that match the working conditions of the device to be tested and injects them into the device to be tested; the scanning circuit scans different areas of the device to be tested after the surge waveform is injected to obtain electromagnetic field intensity data of each area, and characterizes the surge transmission path.
By determining the transmission path of the surge energy in the device to be tested, the area with severe coupling effect of the device to be tested is identified to assist in identifying the weak points of the EMC design and the failure analysis of the device to be tested.
Smart Images

Figure CN222913735U_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the technical field of circuit design, and particularly to a surge test device. Background Art
[0002] Since the device under test is provided with a first voltage circuit and a second voltage circuit at the same time, and the voltage output by the first voltage circuit is higher than that output by the second voltage circuit, relatively speaking, the first voltage circuit is the high-voltage circuit in the device under test, and the second voltage circuit is the low-voltage circuit in the device under test. At present, in a device under test (such as a battery pack) that is provided with a high-voltage circuit and a low-voltage circuit with different output voltages at the same time, due to space limitations, the high-voltage circuit and the low-voltage circuit are often arranged adjacent and parallel to each other or in other unreasonable layouts, resulting in a coupling effect between the high-voltage circuit and the low-voltage circuit. For example, when the relay of the high-voltage circuit is opened and closed, a transient surge will be generated, and the surge energy will be coupled to the low-voltage circuit through distributed capacitance and distributed inductance, thereby causing electro-overstress damage to the low-voltage circuit.
[0003] Therefore, determining the high-low voltage coupling path (surge transmission path) in the device under test is of great significance for identifying the weak points in the EMC design of the device under test and for the failure analysis of the device under test. Summary of the Utility Model
[0004] The present application provides at least one surge test device.
[0005] The present application provides a surge test device, which is applied to a device under test provided with a first voltage circuit and a second voltage circuit, and the voltage output by the first voltage circuit is higher than that output by the second voltage circuit. The surge test device includes a surge generation circuit and a scanning circuit; the output end of the surge generation circuit is connected to the first voltage circuit of the device under test, and the surge generation circuit is used to generate a surge waveform matching the working condition of the device under test by adjusting circuit parameters and inject it into the device under test; the scanning circuit is used to scan different regions of the device under test after injecting the surge waveform to obtain the scanning results of each region, wherein the scanning results include the electromagnetic field intensity data of each region, and the electromagnetic field intensity data of each region can characterize the surge transmission path in the device under test.
[0006] Therefore, the surge generation circuit can generate a surge waveform matching the working conditions of the device under test by adjusting the circuit parameters and inject it into the device under test. That is to say, the surge generation circuit can simulate a surge waveform corresponding to the actual working conditions of the device under test for injection. By scanning different regions of the device under test after injecting the surge waveform, the transmission path of the surge energy in the device under test, that is, the surge transmission path, can be determined. Or rather, the coupling path existing between the first voltage circuit and the second voltage circuit in the device under test can be determined, so as to identify the regions with serious coupling effects in the device under test, assist in identifying the weak points in the EMC design of the device under test, and conduct failure analysis on the device under test.
[0007] Among them, the surge generation circuit includes a voltage generation circuit and an oscillation circuit. The voltage generation circuit is used to generate a first voltage signal. The input end of the oscillation circuit is connected to the output end of the voltage generation circuit, and is used to input the first voltage signal and generate an oscillation waveform to output as the surge waveform. Among them, the surge generation circuit adjusts the circuit parameters of the oscillation circuit to generate a surge waveform matching the working conditions of the device under test.
[0008] Therefore, by adjusting the circuit parameters of the oscillation circuit, an oscillation waveform can be generated to serve as a surge waveform matching the working conditions of the device under test. And since the surge generation circuit includes an oscillation circuit, the surge generation circuit can adjust the circuit parameters of the oscillation circuit to generate a surge waveform matching the working conditions of the device under test. Therefore, the surge generation circuit can be adjusted according to the actual surge waveforms under different devices under test and different working conditions to simulate a surge waveform corresponding to the actual working conditions of the device under test for injection.
[0009] Among them, the oscillation circuit includes a switching tube, an inductor circuit, and a capacitor circuit. The inductor circuit includes at least one first inductor, the capacitor circuit includes at least one first capacitor. The first connection end of the switching tube serves as the input end of the oscillation circuit. The control end of the switching tube is connected to the first AC power supply. The two ends of the inductor circuit are respectively connected to the second connection end of the switching tube and the capacitor circuit. Among them, the adjustable circuit parameters of the oscillation circuit include at least one of the following: the switching frequency of the switching tube, the inductance value of the inductor circuit, and the capacitance value of the capacitor circuit.
[0010] Therefore, by adjusting the switching frequency of the switching tube of the oscillation circuit, and / or the inductance value of the inductor circuit, and / or the capacitance value of the capacitor circuit, different oscillation waveforms can be generated, so as to obtain different surge waveforms. Therefore, subsequently, according to the needs of different devices under test and different working conditions, the switching frequency of the switching tube of the oscillation circuit, and / or the inductance value of the inductor circuit, and / or the capacitance value of the capacitor circuit can be adjusted to generate a surge waveform matching the working conditions of the device under test, and simulate a surge waveform corresponding to the actual working conditions of the device under test for injection.
[0011] Among them, the inductance circuit includes a first selection circuit and at least two first inductors connected to the first selection circuit. The first selection circuit is used to select at least one first inductor as the current effective inductor of the inductance circuit; the capacitance circuit includes a second selection circuit and at least two first capacitors connected to the second selection circuit. The second selection circuit is used to select at least one first capacitor as the current effective capacitor of the capacitance circuit.
[0012] Therefore, the inductance values of different first inductors are different. The inductance value of the inductance circuit can be adjusted by selecting a first inductor as the current effective inductor of the inductance circuit through the first selection circuit to generate different oscillation waveforms, thereby obtaining different surge waveforms; that is, the adjustment of the inductance value of the inductance circuit can be achieved by combining the first selection circuit and multiple first inductors. The capacitance values of different first capacitors are different. The inductance value of the capacitance circuit can be adjusted by selecting a first capacitor as the current effective capacitor of the capacitance circuit through the second selection circuit to generate different oscillation waveforms, thereby obtaining different surge waveforms; that is, the adjustment of the capacitance value of the capacitance circuit can be achieved by combining the second selection circuit and multiple first capacitors.
[0013] Among them, the inductance circuit further includes a first resistor. The first connection end of the first selection circuit is connected to the first resistor, and the second connection end of the second selection circuit is used to connect at least one first inductor to select at least one first inductor as the current effective inductor of the inductance circuit; and / or, at least one of the first selection circuit and the second selection circuit is a switching element.
[0014] Therefore, the circuit structure of the inductance circuit, the first selection circuit and the second selection circuit can be flexibly set.
[0015] Among them, the voltage generation circuit includes an AC power supply circuit, a transformer, a rectifier circuit and a boost circuit; the input end of the transformer is connected to the AC power supply circuit; the input end of the rectifier circuit is connected to the output end of the transformer; the input end of the boost circuit is connected to the output end of the rectifier circuit, and the output end of the boost circuit is used as the output end of the voltage generation circuit.
[0016] Therefore, the AC power supply circuit is the starting point of the entire voltage generation circuit, providing the original AC electrical energy; the transformer is used to change the voltage level of the alternating current output by the AC power supply circuit to meet the needs of the rectifier circuit so that the rectifier circuit can work more effectively; the rectifier circuit is used to convert the alternating current into direct current; the boost circuit is used to raise the rectified DC voltage to the level required by the oscillation circuit to provide a stable and compliant DC power supply to the oscillation circuit, enabling the oscillation circuit to generate high-quality oscillation waveforms for output as surge waveforms.
[0017] Among them, the AC power supply circuit includes a second AC power supply and a second resistor. One end of the first terminal of the second AC power supply is connected to one end of the second resistor, and the second terminal of the second AC power supply and the other end of the second resistor are respectively connected to the input terminal of the transformer; and / or, the rectifier circuit includes a rectifier bridge and a second capacitor. The input terminal of the rectifier bridge is connected to the output terminal of the transformer. One end of the second capacitor is grounded, and the other end of the second capacitor is connected to the output terminal of the rectifier bridge. The other end of the second capacitor serves as the output terminal of the rectifier circuit; and / or, the boost circuit includes a second inductor, a third AC power supply, a first control switch, a third resistor, a third capacitor, a fourth capacitor, and a diode. The second inductor, the diode, and the third resistor are connected in series. The second inductor is connected to the output terminal of the rectifier circuit. The first connection terminal of the first control switch is connected between the second inductor and the diode. The second connection terminal of the first control switch is connected to the first terminal of the third AC power supply. The second connection terminal of the first control switch is grounded. The second terminal of the third AC power supply is grounded. One end of the third capacitor is connected between the diode and the third resistor. The other end of the third capacitor is grounded. One end of the fourth capacitor is connected to the third resistor and serves as the output terminal of the boost circuit. The other end of the fourth capacitor is grounded.
[0018] Therefore, the circuit structures of the AC power supply circuit, the rectifier circuit, and the boost circuit can be flexibly set.
[0019] Among them, the scanning circuit includes a magnetic field probe, and the magnetic field probe is used to scan different regions of the device under test to obtain the electromagnetic field intensity data of each region.
[0020] Therefore, the magnetic field probe can be used to detect different regions of the device under test to detect the electromagnetic field intensity data of different regions of the device under test.
[0021] Among them, the magnetic field probe is annular; and / or, the electromagnetic field intensity data is the induced electric signal generated by the magnetic field probe; and / or, the magnetic field probe can rotate to sequentially scan different regions; and / or, the scanning circuit further includes an image acquisition device for synchronously acquiring the regional images corresponding to each region with the magnetic field probe. Among them, the scanning results of each region also include the regional images corresponding to each region.
[0022] Therefore, the annular magnetic field probe has extremely high sensitivity to magnetic field changes and can capture weak magnetic field signals; the data type of the electromagnetic field intensity data can be flexibly set; by setting the magnetic field probe to be rotatable, the scanning range of the magnetic field probe can be flexibly adjusted to realize the detection and scanning of different regions of the device under test to detect the electromagnetic field intensity data of different regions of the device under test; while the magnetic field probe scans a region to obtain the electromagnetic field intensity data of the region, the image acquisition device synchronously acquires the image of the region to obtain the regional image corresponding to the region.
[0023] Among them, the surge test device further includes an output circuit, which is used to output the scanning results of each area and / or the surge transmission path in the device under test, where the surge transmission path in the device under test is generated using the electromagnetic field intensity data of each area.
[0024] Therefore, when the output circuit is used to output the surge transmission path of the device under test, the transmission path of the surge energy in the device under test can be intuitively obtained, or in other words, the transmission path of the surge energy in the device under test can be visually presented; when the output circuit is used to output the scanning results of each area of the device under test, the scanning results of each area of the device under test can be intuitively obtained, or in other words, the scanning results of each area of the device under test can be visually presented.
[0025] Among them, the output circuit is used to analyze the electromagnetic field intensity data of each area, obtain the frequency and amplitude of the surge energy in each area, and fit the areas with the same frequency and the amplitude difference within the difference range to obtain the surge transmission path in the device under test.
[0026] Therefore, by screening the frequency and amplitude of the surge energy in each area of the device under test and connecting and fitting the areas with the same frequency and the amplitude difference within the difference range, the surge transmission path can be obtained to determine the transmission path of the surge energy in the device under test.
[0027] Among them, the scanning result of each area further includes the area image corresponding to each area. The output circuit is used to output a path transmission image, which is a surge transmission path marked at the corresponding position of the device image of the device under test, where the device image is obtained by combining the area images corresponding to each area.
[0028] Therefore, while scanning each area of the device under test to obtain the scanning results of each area, the area images of each area of the device under test will be synchronously collected. The area images of each area of the device under test are combined to obtain the device image of the device under test; the areas with the same frequency and the amplitude difference within the difference range in the device image are connected and fitted to mark the surge transmission path on the device image.
[0029] Among them, the device under test is a circuit board provided in the first voltage circuit and the second voltage circuit in the battery pack, or a battery pack with an exposed circuit board; and / or, the output end of the surge generation circuit is connected to the first voltage output end of the first voltage circuit of the device under test.
[0030] Therefore, the type of the device under test can be flexibly set.
[0031] In the above technical solution, the surge generation circuit can adjust circuit parameters to generate a surge waveform matching the working conditions of the device under test and inject it into the device under test. That is to say, the surge generation circuit can simulate a surge waveform corresponding to the actual working conditions of the device under test for injection; by scanning different regions of the device under test after injecting the surge waveform, the transmission path of the surge energy in the device under test can be determined, that is, the surge transmission path, or in other words, the coupling path existing between the first voltage circuit and the second voltage circuit in the device under test can be determined, so that the regions with serious coupling effects in the device under test can be identified, assisting in identifying the weak points in the EMC design of the device under test and performing failure analysis on the device under test. Description of the Drawings
[0032] Figure 1 is a schematic structural diagram of an embodiment of the surge test equipment provided by the present application;
[0033] Figure 2 is a schematic structural diagram of an embodiment of the surge generation circuit provided by the present application;
[0034] Figure 3 is a schematic structural diagram of an embodiment of the oscillation circuit provided by the present application;
[0035] Figure 4 is a schematic structural diagram of an embodiment of the voltage generation circuit provided by the present application;
[0036] Figure 5 is a schematic structural diagram of an embodiment of the AC power supply circuit provided by the present application;
[0037] Figure 6 is a schematic structural diagram of an embodiment of the rectification circuit provided by the present application;
[0038] Figure 7 is a schematic structural diagram of an embodiment of the boost circuit provided by the present application;
[0039] Figure 8 is a schematic structural diagram of another embodiment of the surge generation circuit provided by the present application;
[0040] Figure 9 is a schematic structural diagram of another embodiment of the surge test equipment provided by the present application;
[0041] Figure 10 is a partial schematic structural diagram of an embodiment of the surge test equipment provided by the present application. Detailed Embodiment
[0042] Next, the technical solutions in the embodiments of the present application will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present application.
[0043] It should be noted that if there are directional indications (such as up, down, left, right, front, back...) involved in the embodiments of the present application, then such directional indications are only used to explain the relative positional relationship and movement conditions between components in a specific posture (as shown in the accompanying drawings). If this specific posture changes, then the directional indications will also change accordingly.
[0044] In addition, if there are descriptions such as "first", "second", etc. involved in the embodiments of the present application, then such descriptions of "first", "second", etc. are only for descriptive purposes and cannot be understood as indicating or implying their relative importance or implicitly indicating the quantity of the indicated technical features. Thus, the features defined with "first" and "second" may explicitly or implicitly include at least one such feature. In addition, the technical solutions between various embodiments can be combined with each other, but it must be based on the fact that those of ordinary skill in the art can implement them. When the combination of technical solutions results in contradictions or cannot be implemented, it should be considered that such a combination of technical solutions does not exist and is not within the protection scope required by the present application.
[0045] To better understand the present application, the surge test equipment provided by the present application will be described in more detail below in conjunction with the accompanying drawings and specific embodiments.
[0046] Since the device under test is provided with a first voltage circuit and a second voltage circuit at the same time, and the voltage output by the first voltage circuit is higher than the voltage output by the second voltage circuit, relatively speaking, the first voltage circuit is the high-voltage circuit in the device under test, and the second voltage circuit is the low-voltage circuit in the device under test. Currently, in a device under test (such as a battery pack) that is provided with a high-voltage circuit and a low-voltage circuit with different output voltages at the same time, due to space limitations, the high-voltage circuit and the low-voltage circuit are often arranged adjacent and parallel to each other or in other unreasonable layouts, resulting in a coupling effect between the high-voltage circuit and the low-voltage circuit. For example, when the high-voltage circuit relay opens and closes, a transient surge will be generated, and the surge energy will be coupled to the low-voltage circuit through distributed capacitance and distributed inductance, thereby causing electro-overstress damage to the low-voltage circuit.
[0047] Please refer to Figure 1 , Figure 1FIG. 0 is a schematic structural diagram of an embodiment of a surge test device provided by the present application. The surge test device 10 is applied to a device under test 20 provided with a first voltage circuit and a second voltage circuit, and the voltage output by the first voltage circuit is higher than the voltage output by the second voltage circuit. Since the device under test 20 is provided with both a first voltage circuit and a second voltage circuit with different output voltages, and the voltage output by the first voltage circuit is higher than the voltage output by the second voltage circuit, relatively speaking, the first voltage circuit is the high-voltage circuit in the device under test 20, and the second voltage circuit is the low-voltage circuit in the device under test 20.
[0048] Please continue to refer to Figure 1 , the surge test device 10 includes a surge generation circuit 11 and a scanning circuit 12.
[0049] The output end of the surge generation circuit 11 is connected to the first voltage circuit of the device under test 20. The surge generation circuit 11 is used to generate a surge waveform matching the working condition of the device under test 20 by adjusting circuit parameters and inject it into the device under test 20. The surge generation circuit 11 can generate a surge waveform matching the working condition of the device under test 20 by adjusting circuit parameters and inject it into the device under test 20. That is to say, the surge generation circuit 11 can be adjusted according to the actual surge waveforms of different devices under test 20 and different working conditions to simulate a surge waveform corresponding to the actual working condition of the device under test 20 for injection. For example, the surge generation circuit 11 is used to generate a surge waveform with a frequency of 100Mhz and 50dB matching the working condition of the device under test 20 by adjusting circuit parameters and inject it into the device under test 20.
[0050] The scanning circuit 12 is used to scan different regions of the device under test 20 after injecting the surge waveform to obtain the scanning results of each region. Among them, the scanning results include the electromagnetic field intensity data of each region, and the electromagnetic field intensity data of each region can characterize the surge transmission path in the device under test 20. That is to say, by scanning different regions of the device under test 20 after injecting the surge waveform, the transmission path of the surge energy in the device under test 20 can be determined, that is, the surge transmission path, or in other words, the coupling path existing between the first voltage circuit and the second voltage circuit in the device under test 20 can be determined, so that the regions with serious coupling effects in the device under test 20 can be identified, assisting in identifying the weak points in the EMC design of the device under test 20 and the failure analysis of the device under test 20.
[0051] In one embodiment, the device under test 20 is a circuit board provided with a first voltage circuit and a second voltage circuit in a battery pack, or a battery pack with an exposed circuit board.
[0052] In one embodiment, the output end of the surge generation circuit 11 is connected to the first voltage output end of the first voltage circuit of the device under test 20.
[0053] In one embodiment, as Figure 2 shown, Figure 2 FIG. 5 is a schematic structural diagram of an embodiment of a surge generation circuit provided by the present application. The surge generation circuit 11 includes a voltage generation circuit 111 and an oscillation circuit 112. The voltage generation circuit 111 is used to generate a first voltage signal. The input end of the oscillation circuit 112 is connected to the output end of the voltage generation circuit 111, and is used to input the first voltage signal and generate an oscillation waveform to output as a surge waveform. Among them, the surge generation circuit 11 adjusts the circuit parameters of the oscillation circuit 112 to generate a surge waveform matching the working condition of the device under test 20.
[0054] That is to say, by adjusting the circuit parameters of the oscillation circuit 112, an oscillation waveform can be generated to serve as a surge waveform matching the working condition of the device under test 20. And the surge generation circuit 11 includes the oscillation circuit 112. Therefore, the surge generation circuit 11 can adjust the circuit parameters of the oscillation circuit 112 to generate a surge waveform matching the working condition of the device under test 20. Therefore, the surge generation circuit 11 can be adjusted according to the actual surge waveforms under different devices under test and different working conditions to simulate the surge waveform corresponding to the actual working condition of the device under test 20 for injection.
[0055] In a specific embodiment, as Figure 3 shown, Figure 3 FIG. 6 is a schematic structural diagram of an embodiment of the oscillation circuit provided by the present application. The oscillation circuit 112 includes a switching transistor Q1, an inductor circuit 1121, and a capacitor circuit 1122. The inductor circuit 1121 includes at least one first inductor L1, and the capacitor circuit 1122 includes at least one first capacitor C1. The first connection end of the switching transistor Q1 serves as the input end of the oscillation circuit 112. The control end of the switching transistor Q1 is connected to the first AC power supply AC1. Both ends of the inductor circuit 1121 are respectively connected to the second connection end of the switching transistor Q1 and the capacitor circuit 1122. Among them, the adjustable circuit parameters of the oscillation circuit 112 include at least one of the following: the switching frequency of the switching transistor Q1, the inductance value of the inductor circuit 1121, and the capacitance value of the capacitor circuit 1122.
[0056] That is to say, by adjusting the switching frequency of the switching transistor Q1 of the oscillation circuit 112, and / or the inductance value of the inductor circuit 1121, and / or the capacitance value of the capacitor circuit 1122, different oscillation waveforms can be generated, so as to obtain different surge waveforms. Therefore, subsequently, according to different devices under test 20 and different working condition requirements, the switching frequency of the switching transistor Q1 of the oscillation circuit 112, and / or the inductance value of the inductor circuit 1121, and / or the capacitance value of the capacitor circuit 1122 can be adjusted to generate a surge waveform matching the working condition of the device under test 20 and simulate the surge waveform corresponding to the actual working condition of the device under test 20 for injection.
[0057] Among them, the number of the first inductors L1 included in the inductor circuit 1121 and the number of the first capacitors C1 included in the capacitor circuit 1122 are not limited, and can be specifically set according to actual usage requirements. For example, the inductor circuit 1121 includes 2 first inductors L1, and the capacitor circuit 1122 includes 2 first capacitors C1.
[0058] In a specific embodiment, the inductor circuit 1121 includes a first selection circuit 11211 and at least two first inductors L1 connected to the first selection circuit 11211. The first selection circuit 11211 is configured to select at least one first inductor L1 as the current effective inductor of the inductor circuit 1121; the capacitor circuit 1122 includes a second selection circuit 11221 and at least two first capacitors C1 connected to the second selection circuit 11221. The second selection circuit 11221 is configured to select at least one first capacitor C1 as the current effective capacitor of the capacitor circuit 1122.
[0059] The inductance values of different first inductors L1 are different. The inductance value of the inductor circuit 1121 can be adjusted by selecting the first inductor L1 that serves as the current effective inductor of the inductor circuit 1121 through the first selection circuit 11211 to generate different oscillation waveforms, so as to obtain different surge waveforms; that is, by combining the first selection circuit 11211 and multiple first inductors L1, the adjustment of the inductance value of the inductor circuit 1121 can be realized. The capacitance values of different first capacitors C1 are different. The capacitance value of the capacitor circuit 1122 can be adjusted by selecting the first capacitor C1 that serves as the current effective capacitor of the capacitor circuit 1122 through the second selection circuit 11221 to generate different oscillation waveforms, so as to obtain different surge waveforms; that is, by combining the second selection circuit 11221 and multiple first capacitors C1, the adjustment of the capacitance value of the capacitor circuit 1122 can be realized.
[0060] In a specific embodiment, at least one of the first selection circuit 11211 and the second selection circuit 11221 is a switching element.
[0061] In a specific embodiment, the inductor circuit 1121 further includes a first resistor R1. The first connection end of the first selection circuit 11211 is connected to the first resistor R1, and the second connection end of the first selection circuit 11211 is configured to be connected to at least one first inductor L1 to select at least one first inductor L1 as the current effective inductor of the inductor circuit 1121.
[0062] In a specific embodiment, such as Figure 3As shown, the oscillation circuit 112 includes a switching transistor Q1, an inductor circuit 1121, and a capacitor circuit 1122. The inductor circuit 1121 includes a first resistor R1, two first inductors L1, and a first selection circuit 11211, and the first selection circuit 11211 is a first switching element. The capacitor circuit 1122 includes two first capacitors C1 and a second selection circuit 11221, and the second selection circuit 11221 is a second switching element. The first connection end of the switching transistor Q1 serves as the input end of the oscillation circuit 112, and the control end of the switching transistor Q1 is connected to a first AC power supply AC1. The first connection end of the first switching element is connected to one end of the first resistor R1, and the second connection end of the first switching element is used to connect at least one first inductor L1 to select at least one first inductor L1 as the currently effective inductor of the inductor circuit 1121. The other end of the first resistor R1 is connected to the second connection end of the switching transistor Q1. The first connection end of the second switching element is connected to the inductor circuit 1121, and the second connection end of the second switching element is used to connect at least one first capacitor C1 to select at least one first capacitor C1 as the currently effective capacitor of the capacitor circuit 1122.
[0063] In one embodiment, the voltage generation circuit 111 can be a voltage input terminal, and a first voltage signal is input through the voltage input terminal. Of course, in other embodiments, the voltage generation circuit 111 can also include a filter circuit, a rectifier circuit, a boost circuit, etc. to generate a first voltage signal that meets the requirements of the oscillation circuit 112.
[0064] In a specific embodiment, as Figure 4 shown, Figure 4FIG. 0 is a schematic structural diagram of an embodiment of the voltage generation circuit provided by the present application. The voltage generation circuit 111 includes an AC power supply circuit 1111, a transformer 1112, a rectification circuit 1113, and a boost circuit 1114. The input end of the transformer 1112 is connected to the AC power supply circuit 1111; the input end of the rectification circuit 1113 is connected to the output end of the transformer 1112; the input end of the boost circuit 1114 is connected to the output end of the rectification circuit 1113, and the output end of the boost circuit 1114 serves as the output end of the voltage generation circuit 111. The AC power supply circuit 1111 is the starting point of the entire voltage generation circuit 111, providing the original AC electrical energy. Among them, this AC power supply can be mains power (e.g., 220V or 110V), or other forms of AC power supply. The transformer 1112 is used to change the voltage level of the alternating current output by the AC power supply circuit 1111 to meet the requirements of the rectification circuit 1113, so that the rectification circuit 1113 can work more effectively. The rectification circuit 1113 is used to convert alternating current into direct current. The boost circuit 1114 is used to raise the rectified DC voltage to the level required by the oscillation circuit 112, so as to provide a stable and compliant DC power supply to the oscillation circuit 112, enabling the oscillation circuit 112 to generate high-quality oscillation waveforms for output as surge waveforms.
[0065] Of course, in other specific embodiments, the voltage generation circuit 111 can also be other forms of circuit structures, which are not limited herein.
[0066] In a specific embodiment, as Figure 5 shown, Figure 5 FIG. 10 is a schematic structural diagram of an embodiment of the AC power supply circuit provided by the present application. The AC power supply circuit 1111 includes a second AC power supply AC2 and a second resistor R2. The first end of the second AC power supply AC2 is connected to one end of the second resistor R2, and the second end of the second AC power supply AC2 and the other end of the second resistor R2 are connected. The first end 11111 of the AC power supply circuit 1111 is used to connect to the first end of the transformer 1112, and the second end 11112 of the AC power supply circuit 1111 is used to connect to the second end of the transformer 1112.
[0067] In other specific embodiments, the AC power supply circuit 1111 can also include a second AC power supply AC2, a second resistor R2, and a capacitor. The capacitor is connected to the second resistor R2 to form an RC filter circuit for smoothing the output of the AC power supply. Of course, in other specific embodiments, the AC power supply circuit 1111 can also be other forms of circuit structures, which are not limited herein.
[0068] In a specific embodiment, as Figure 6 shown, Figure 6It is a schematic structural diagram of an embodiment of the rectifier circuit provided by this application. The rectifier circuit 1113 includes a rectifier bridge 11131 and a second capacitor C2. The input end of the rectifier bridge 11131, as the first end 11132 of the rectifier circuit 1113, is used to connect to the output end of the transformer 1112 (i.e., the third end of the transformer 1112). The second end 11133 of the rectifier circuit 1113 is used to connect to the fourth end of the transformer 1112. One end of the second capacitor C2 is grounded, and the other end of the second capacitor C2 is connected to the output end of the rectifier bridge 11131. The other end of the second capacitor C2 serves as the output end of the rectifier circuit 1113, that is, the third end 11134 of the rectifier circuit 1113. The third end 11134 of the rectifier circuit 1113 is used to connect to the first end 11141 of the boost circuit 1114, and the fourth end 11135 of the rectifier circuit 1113 is used to connect to the second end 11142 of the boost circuit 1114.
[0069] In other specific embodiments, the rectifier circuit 1113 may also include a diode and a load resistor, and this rectifier circuit 1113 is a half-wave rectifier circuit. In other specific embodiments, the rectifier circuit 1113 may also include two diodes, and the two diodes are respectively connected between the two output ends of the transformer 1112 and the center tap to form two half-wave rectifier circuits. Of course, in other specific embodiments, the rectifier circuit 1113 may also be other forms of circuit structures, which are not limited herein.
[0070] In a specific embodiment, as Figure 7 shown, Figure 7FIG. 0 is a schematic structural diagram of an embodiment of the boost circuit provided by the present application. The boost circuit 1114 includes a second inductor L2, a third AC power supply AC3, a first control switch Q2, a third resistor R3, a third capacitor C3, a fourth capacitor C4, and a diode D1. The second inductor L2, the diode D1, and the third resistor R3 are connected in series. The first end of the second inductor L2 is used to connect to the output end of the rectifier circuit 1113 (i.e., the third end 11134 of the rectifier circuit 1113). The first end of the second inductor L2 serves as the first end 11141 of the boost circuit 1114. The second end 11142 of the boost circuit 1114 is used to connect to the fourth end 11135 of the rectifier circuit 1113. The first connection end of the first control switch Q2 is connected between the second inductor L2 and the diode D1. The second connection end of the first control switch Q2 is connected to the first end of the third AC power supply AC3. The second connection end of the first control switch Q2 is grounded. The second end of the third AC power supply AC3 is grounded. One end of the third capacitor C3 is connected between the diode D1 and the third resistor R3. The other end of the third capacitor C3 is grounded. One end of the fourth capacitor C4 is connected to the third resistor R3 and serves as the output end of the boost circuit 1114 (i.e., the third end 11143 of the boost circuit 1114). The other end of the fourth capacitor C4 is grounded. The third end 11143 of the boost circuit 1114 is used to connect to the first end 1123 of the oscillation circuit 112. The fourth end 11144 of the boost circuit 1114 is used to connect to the second end 1124 of the oscillation circuit 112.
[0071] Of course, in other specific embodiments, the boost circuit 1114 may also be other forms of circuit structures, which are not limited herein.
[0072] In a specific embodiment, as Figure 8 shown, Figure 8It is a schematic structural diagram of another embodiment of the surge generation circuit provided by this application. The surge generation circuit 11 includes a voltage generation circuit 111 and an oscillation circuit 112. The voltage generation circuit 111 includes an AC power supply circuit 1111, a transformer 1112, a rectification circuit 1113, and a boost circuit 1114. The AC power supply circuit 1111 includes a second AC power supply AC2 and a second resistor R2. The first end of the second AC power supply AC2 is connected to one end of the second resistor R2, and the second end of the second AC power supply AC2 and the other end of the second resistor R2 are respectively connected to the input end of the transformer 1112. The rectification circuit 1113 includes a rectifier bridge 11131 and a second capacitor C2. The input end of the rectifier bridge 11131 is connected to the output end of the transformer 1112. One end of the second capacitor C2 is grounded, and the other end of the second capacitor C2 is connected to the output end of the rectifier bridge 11131. The other end of the second capacitor C2 serves as the output end of the rectification circuit 1113. The boost circuit 1114 includes a second inductor L2, a third AC power supply AC3, a first control switch Q2, a third resistor R3, a third capacitor C3, a fourth capacitor C4, and a diode D1. The second inductor L2, the diode D1, and the third resistor R3 are connected in series. The second inductor L2 is connected to the output end of the rectification circuit 1113. The first connection end of the first control switch Q2 is connected between the second inductor L2 and the diode D1. The second connection end of the first control switch Q2 is connected to the first end of the third AC power supply AC3, and the second connection end of the first control switch Q2 is grounded. The second end of the third AC power supply AC3 is grounded. One end of the third capacitor C3 is connected between the diode D1 and the third resistor R3, and the other end of the third capacitor C3 is grounded. One end of the fourth capacitor C4 is connected to the third resistor R3 and serves as the output end of the boost circuit 1114, and the other end of the fourth capacitor C4 is grounded.
[0073] In one embodiment, as Figure 9 , Figure 10 shown, Figure 9 It is a schematic structural diagram of another embodiment of the surge test device provided by this application. Figure 10 It is a partial structural schematic diagram of an embodiment of the surge test device provided by this application. The scanning circuit 12 includes a magnetic field probe 121. The magnetic field probe 121 is used to scan different regions of the device under test 20 to obtain the electromagnetic field intensity data of each region. Specifically, after the surge generation circuit 11 generates a surge waveform matching the working condition of the device under test 20 and injects it into the device under test 20, the magnetic field probe 121 disposed directly above the device under test 20 can detect different regions of the device under test 20 to detect the electromagnetic field intensity data of different regions of the device under test 20.
[0074] In a specific embodiment, the magnetic field probe 121 is annular. The annular magnetic field probe 121 has extremely high sensitivity to magnetic field changes and can capture weak magnetic field signals. In addition, the annular magnetic field probe 121 also has a certain sensitivity to the direction of the magnetic field, which helps to analyze the vector characteristics of the electromagnetic field. Moreover, the annular magnetic field probe 121 is small in size and compact in structure, and is easy to be integrated with other electronic components and mechanical parts to form a complete scanning circuit system.
[0075] Of course, in other specific embodiments, the magnetic field probe 121 can also be square, circular or other shapes, which are not limited herein.
[0076] In a specific embodiment, the electromagnetic field intensity data is the induced electrical signal generated by the magnetic field probe 121. Specifically, the magnetic field probe 121 scans different regions of the device under test 20, obtains the electromagnetic radiation of different regions of the device under test 20 through scanning, and generates the induced electrical signal corresponding to the corresponding region based on the electromagnetic radiation of the corresponding region.
[0077] In a specific embodiment, the induced electrical signal can be an induced current.
[0078] In a specific embodiment, the magnetic field probe 121 is rotatable to sequentially scan different regions. By setting the magnetic field probe 121 to be rotatable, the scanning range of the magnetic field probe 121 can be flexibly adjusted to realize the detection and scanning of different regions of the device under test 20, so as to detect the electromagnetic field intensity data of different regions of the device under test 20.
[0079] Specifically, after the surge generating circuit 11 generates a surge waveform matching the working condition of the device under test 20 and injects it into the device under test 20, the magnetic field probe 121 rotates directly above the device under test 20 to scan the device under test 20 row by row or column by column, so as to realize the detection and scanning of different regions of the device under test 20, and detect the electromagnetic field intensity data of different regions of the device under test 20.
[0080] In a specific embodiment, as Figure 9 , Figure 10 shown, the scanning circuit 12 further includes an image acquisition device 122 for synchronously acquiring the regional images corresponding to each region with the magnetic field probe 121, wherein the scanning results of each region further include the regional images corresponding to each region. That is to say, the scanning circuit 12 includes the magnetic field probe 121 and the image acquisition device 122 that move synchronously. While the magnetic field probe 121 scans a region to obtain the electromagnetic field intensity data of the region, the image acquisition device 122 synchronously acquires the image of the region to obtain the regional image corresponding to the region.
[0081] In other specific embodiments, the scanning circuit 12 further includes an image acquisition device 122. The image acquisition device 122 and the magnetic field probe 121 may also move asynchronously, which is not limited herein.
[0082] In a specific embodiment, in a semi-anechoic chamber, the surge generation circuit 11 of the surge test device 10 generates a surge waveform matching the working condition of the device under test 20 and injects it into the device under test 20, and the scanning circuit 12 scans different regions of the device under test 20 after the surge waveform is injected to determine the surge transmission path in the device under test 20. In actual tests, external electromagnetic wave signals may interfere with the test signals, thereby affecting the accuracy of the test results. In a semi-anechoic chamber, due to the action of electromagnetic wave absorbing materials, the multipath effect on the test results caused by the reflection of the walls and ceiling can be greatly reduced, thus ensuring the reliability of the test results.
[0083] In one embodiment, as Figure 9 , Figure 10 shown, the surge test device further includes an output circuit 13. The output circuit 13 is used to output the scanning results of each region and / or the surge transmission path in the device under test 20. Among them, the surge transmission path in the device under test 20 is generated using the electromagnetic field intensity data of each region.
[0084] When the output circuit 13 is used to output the surge transmission path of the device under test 20, the transmission path of the surge energy in the device under test 20 can be intuitively obtained. Or rather, the transmission path of the surge energy in the device under test 20 can be visually presented.
[0085] When the output circuit 13 is used to output the scanning results of each region of the device under test 20, the scanning results of each region of the device under test 20 can be intuitively obtained. Or rather, the scanning results of each region of the device under test 20 can be visually presented. For example, the electromagnetic field intensity data of each region of the device under test 20 can be visually presented.
[0086] In a specific embodiment, the output circuit 13 is used to analyze the electromagnetic field intensity data of each region, obtain the frequency and amplitude of the surge energy of each region, and fit the regions with the same frequency and the amplitude difference within the difference range to obtain the surge transmission path in the device under test 20. That is to say, analyze the electromagnetic field intensity data of each region of the device under test 20 to obtain the frequency and amplitude of the surge energy of each region of the device under test 20; then, screen the frequency and amplitude of the surge energy of each region of the device under test 20, and connect and fit the regions with the same frequency and the amplitude difference within the difference range to obtain the surge transmission path, so as to determine the transmission path of the surge energy in the device under test 20.
[0087] Among them, the difference range is not limited and can be specifically set according to actual usage needs. For example, the difference range is less than or equal to 5 dB.
[0088] In a specific embodiment, the scanning results of each region further include the region image corresponding to each region. The output circuit is configured to output a path transmission image, and the path transmission image is to mark the surge transmission path at the corresponding position of the device image of the device under test, where the device image is obtained by combining the region images corresponding to each region.
[0089] While scanning each region of the device under test 20 to obtain the scanning results of each region, the region images of each region of the device under test 20 are synchronously collected, and the device images of the device under test 20 are obtained by combining the region images of each region of the device under test 20; regions with the same frequency and amplitude difference within the difference range in the device image are connected and fitted to mark the surge transmission path on the device image.
[0090] The above are only the embodiments of the present application, and do not limit the patent scope of the present application. Any equivalent structure or equivalent process transformation made by using the content of the specification and drawings of the present application, or directly or indirectly applied to other related technical fields, shall be equally included in the patent protection scope of the present application.
Claims
1. A surge test device, characterized in that: The surge test device is applied to a device to be tested provided with a first voltage circuit and a second voltage circuit, the voltage output by the first voltage circuit is higher than the voltage output by the second voltage circuit, and the surge test device comprises: A surge generating circuit, wherein an output end of the surge generating circuit is connected to a first voltage circuit of the device under test, and the surge generating circuit is used to generate a surge waveform matching the working condition of the device under test by adjusting circuit parameters, and inject the surge waveform into the device under test; The scanning circuit is used to scan different areas of the device under test after the surge waveform is injected to obtain scanning results of each area, wherein the scanning results include electromagnetic field strength data of each area, and the electromagnetic field strength data of each area can characterize the surge transmission path in the device under test.
2. The surge test equipment according to claim 1, characterized in that: The surge generating circuit comprises: A voltage generating circuit, used for generating a first voltage signal; An oscillation circuit, wherein the input end of the oscillation circuit is connected to the output end of the voltage generating circuit, and is used to input the first voltage signal and generate an oscillation waveform to output as the surge waveform, wherein the surge generating circuit generates a surge waveform matching the operating condition of the device under test by adjusting the circuit parameters of the oscillation circuit.
3. The surge test equipment according to claim 2, characterized in that: The oscillation circuit comprises a switch tube, an inductance circuit and a capacitance circuit, wherein the inductance circuit comprises at least one first inductance, the capacitance circuit comprises at least one first capacitance, the first connection end of the switch tube serves as the input end of the oscillation circuit, the control end of the switch tube is connected to a first AC power supply, and the two ends of the inductance circuit are respectively connected to the second connection end of the switch tube and the capacitance circuit; The adjustable circuit parameters of the oscillator circuit include at least one of the following: a switching frequency of the switch tube, an inductance value of the inductor circuit, and a capacitance value of the capacitor circuit.
4. The surge test equipment according to claim 3, characterized in that: The inductance circuit comprises a first selection circuit and at least two first inductors connected to the first selection circuit, wherein the first selection circuit is used to select at least one of the first inductors as a current effective inductance of the inductance circuit; The capacitor circuit includes a second selection circuit and at least two first capacitors connected to the second selection circuit, and the second selection circuit is used to select at least one of the first capacitors as a current effective capacitor of the capacitor circuit.
5. The surge test equipment according to claim 4, characterized in that: The inductance circuit further includes a first resistor, a first connection end of the first selection circuit is connected to the first resistor, a second connection end of the first selection circuit is used to connect at least one of the first inductors, and the at least one of the first inductors is selected as the current effective inductance of the inductance circuit; And / or, at least one of the first selection circuit and the second selection circuit is a switch element.
6. The surge test equipment according to any one of claims 2 to 5, characterized in that: The voltage generating circuit comprises: AC power circuit; A transformer, an input end of which is connected to the AC power supply circuit; A rectifier circuit, wherein an input end of the rectifier circuit is connected to an output end of the transformer; A boost circuit, wherein the input end of the boost circuit is connected to the output end of the rectifier circuit, and the output end of the boost circuit serves as the output end of the voltage generating circuit.
7. The surge test equipment according to claim 6, characterized in that: The AC power supply circuit includes a second AC power supply and a second resistor, a first end of the second AC power supply is connected to one end of the second resistor, and a second end of the second AC power supply and the other end of the second resistor are respectively connected to the input end of the transformer; And / or, the rectifier circuit includes a rectifier bridge and a second capacitor, the input end of the rectifier bridge is connected to the output end of the transformer, one end of the second capacitor is grounded, the other end of the second capacitor is connected to the output end of the rectifier bridge, and the other end of the second capacitor serves as the output end of the rectifier circuit; And / or, the boost circuit includes a second inductor, a third AC power supply, a first control switch, a third resistor, a third capacitor, a fourth capacitor and a diode, the second inductor, the diode and the third resistor are connected in series, the second inductor is connected to the output end of the rectifier circuit, the first connection end of the first control switch is connected between the second inductor and the diode, the second connection end of the first control switch is connected to the first end of the third AC power supply, the second connection end of the first control switch is grounded, the second end of the third AC power supply is grounded, one end of the third capacitor is connected between the diode and the third resistor, the other end of the third capacitor is grounded, one end of the fourth capacitor is connected to the third resistor as the output end of the boost circuit, and the other end of the fourth capacitor is grounded.
8. The surge test equipment according to any one of claims 1 to 5, characterized in that: The scanning circuit includes a magnetic field probe, and the magnetic field probe is used to scan different areas of the device to be tested to obtain electromagnetic field intensity data of each area.
9. The surge test equipment according to claim 8, characterized in that: The magnetic field probe is annular; And / or, the electromagnetic field strength data is an induced electrical signal generated by the magnetic field probe; And / or, the magnetic field probe can rotate to scan different areas in sequence; And / or, the scanning circuit further includes an image acquisition device for acquiring regional images corresponding to each of the regions synchronously with the magnetic field probe, wherein the scanning results of each of the regions further include regional images corresponding to each of the regions.
10. The surge test equipment according to any one of claims 1 to 5, characterized in that: The surge testing device further comprises an output circuit, which is used to output the scanning results of each of the regions and / or the surge transmission path in the device under test, wherein the surge transmission path in the device under test is generated using the electromagnetic field strength data of each of the regions.
11. The surge test equipment according to claim 10, characterized in that: The output circuit is used to analyze the electromagnetic field strength data of each of the regions to obtain the frequency and amplitude of the surge energy in each of the regions, and to fit the regions with the same frequency and amplitude difference within the difference range to obtain the surge transmission path in the device under test.
12. The surge test equipment according to claim 10, characterized in that: The scanning results of each of the areas also include area images corresponding to each of the areas. The output circuit is used to output a path transmission image, and the path transmission image is to mark the surge transmission path at the corresponding position of the device image of the device under test, wherein the device image is obtained by combining the area images corresponding to each of the areas.
13. The surge test equipment according to any one of claims 1 to 5, characterized in that: The device to be tested is a circuit board provided in the first voltage circuit and the second voltage circuit in a battery pack, or a battery pack with the circuit board exposed; And / or, the output end of the surge generating circuit is connected to the first voltage output end of the first voltage circuit of the device under test.