CameraLink high-speed parallel data transmission interface one-to-many device

Abstract

The utility model discloses a CameraLink high-speed parallel data transmission interface one-to-many device, which comprises a CameraLink input interface circuit for outputting high-speed parallel data and receiving returned control parameters; the one-to-four module is used for receiving the high-speed parallel data transmitted by the CameraLink input interface circuit, respectively dividing differential data, clock signals and serial control parameters in the high-speed parallel data into multiple paths, and respectively sending the differential data, the clock signals and the serial control parameters to each path of CameraLink output interface circuit; the differential to single-ended module is used for receiving the control parameters of the CameraLink output interface circuit and sending the control parameters to the one-out-of-four module; the one-out-of-four module receives the control parameters transmitted by the differential-to-single-ended module, and selects and outputs one path of control parameters to the single-ended-to-differential module; and the single-ended to differential module is used for transmitting an output differential control signal to the CameraLink input interface circuit. According to the utility model, one path of high-speed parallel data can be divided into multiple paths of high-speed parallel data in real time, different control parameters of multiple paths can be selected, and one path of control parameter is selectively output.

Description

Technical Field

[0001] The utility model belongs to the technical field of single-channel CameraLink transmission interfaces, and relates to a device for splitting one CameraLink high-speed parallel data transmission interface into multiple channels. Background Art

[0002] At present, most high-resolution industrial cameras and optoelectronic acquisition devices in the market adopt CameraLink high-speed parallel data transmission interfaces. In most usage scenarios of industrial cameras, it is necessary to copy 1-channel CameraLink high-speed parallel image data into 4-channel identical CameraLink high-speed parallel image data in real time and send it to receiving ends at 4 different positions for display. At the same time, in actual use, it is often necessary to select multiple control parameters and select 1 channel for transmission. However, there are no related products or utility models in the market at present. Content of the Utility Model

[0003] The utility model provides a device for splitting one CameraLink high-speed parallel data transmission interface into multiple channels, which can not only split one-channel high-speed parallel data into multiple-channel high-speed parallel data in real time, but also select multiple different control parameters and select and output one control parameter.

[0004] The utility model is realized through the following technical solutions:

[0005] A device for splitting one CameraLink high-speed parallel data transmission interface into multiple channels includes:

[0006] A CameraLink input interface circuit, which outputs high-speed parallel data and receives the transmitted back control parameters;

[0007] A 1-to-4 module, which receives the high-speed parallel data transmitted by the CameraLink input interface circuit, divides the differential data, clock signal and serial control parameters therein into multiple channels respectively, and gives them to each CameraLink output interface circuit respectively;

[0008] Multiple independent CameraLink output interface circuits, each of which receives the high-speed parallel data transmitted by the 1-to-4 module; each CameraLink output interface circuit transmits its own control parameter to the differential-to-single-ended module;

[0009] A differential-to-single-ended module, which receives the control parameters of the CameraLink output interface circuit and sends them to the 4-to-1 selection module;

[0010] 4-to-1 module, connected to the selection switch; receives the control parameters transmitted by the differential-to-single-ended module and selects and outputs one path of control parameters to the single-ended-to-differential module;

[0011] Single-ended-to-differential module, which gives the output differential control signal to the CameraLink input interface circuit.

[0012] Furthermore, the 1-to-4 module includes a clock signal distribution circuit, a differential data distribution circuit, and a serial control parameter distribution circuit;

[0013] The clock signal distribution circuit is a dual-input-port 1-to-4 clock buffer circuit that divides the differential clock of the CameraLink input interface into 4 paths and gives them to each path of the CameraLink output interface circuit respectively;

[0014] The differential data distribution circuit includes two dual-input-port 1-to-4 differential buffer circuits, and each dual-input-port 1-to-4 differential buffer circuit divides the differential data of the CameraLink input interface into 4 paths and gives them to each path of the CameraLink output interface circuit respectively;

[0015] The serial control parameter distribution circuit includes a differential-to-single-ended circuit and a four-input single-ended-to-differential circuit; among them, the CameraLink input interface circuit transmits the LVDS differential serial control signal SerTFG to the differential-to-single-ended circuit, and its output is a single-ended serial control signal SerTFG;

[0016] The four inputs of the four-input single-ended-to-differential circuit are all connected to the differential-to-single-ended circuit, and 4 paths of differential serial control signals SerTFG are output, which are given to each path of the CameraLink output interface circuit respectively.

[0017] Furthermore, the output of the control parameters of the CameraLink output interface circuit is as follows:

[0018] Each CameraLink output interface has 4 LVDS differential control signals CC1 - CC4, which are respectively connected to the four-input differential-to-single-ended circuit, and 4 paths of single-ended control signals CC1 - CC4 are output;

[0019] The four four-input differential-to-single-ended circuits altogether output 16 paths of LVDS single-ended control signals and 4 groups of CC1 - CC4 single-ended control signals;

[0020] The 4 paths of CC1 single-ended control signals are connected to the 4-to-1 module, and after selection, one path of CC1 single-ended control signal is output;

[0021] The 4 paths of CC2 single-ended control signals are connected to the 4-to-1 module, and after selection, one path of CC2 single-ended control signal is output;

[0022] The 4-channel CC3 single-ended control signals are connected to a 4-to-1 selection module, and after selection, one CC3 single-ended control signal is output;

[0023] The 4-channel CC4 single-ended control signals are connected to a 4-to-1 selection module, and after selection, one CC4 single-ended control signal is output;

[0024] The 4 single-ended control signals CC1 - CC4 output by selection are connected to a single-ended to differential module;

[0025] The single-ended to differential module is a four-input single-ended to differential circuit, which outputs 4-channel LVDS differential control signals CC1 - CC4 and transmits them to the CameraLink input interface circuit.

[0026] Furthermore, the control signals of the 4-to-1 selection module are the same group of A0 and A1, which are controlled by 2 switches SW1 and switch SW2;

[0027] When both switch SW1 and switch SW2 are closed, the 4-to-1 selection module transmits the control parameters of the first CameraLink output interface to the CameraLink input interface circuit through the single-ended to differential module;

[0028] When switch SW1 is closed and switch SW2 is open, the 4-to-1 selection module transmits the control parameters of the second CameraLink output interface to the CameraLink input interface circuit through the single-ended to differential module;

[0029] When switch SW1 is open and switch SW2 is closed, the 4-to-1 selection module transmits the control parameters of the third CameraLink output interface to the CameraLink input interface circuit through the single-ended to differential module;

[0030] When both switch SW1 and switch SW2 are open, the 4-to-1 selection module transmits the control parameters of the fourth CameraLink output interface to the CameraLink input interface circuit through the single-ended to differential module.

[0031] Compared with the prior art, the present utility model has the following beneficial technical effects:

[0032] The CameraLink high-speed parallel data transmission interface one-to-many device provided by the present utility model can not only divide one-way high-speed parallel data into multiple-way high-speed parallel data in real time, but also select from multiple different control parameters and output one-way control parameters; it fills the gap in the market and meets the urgent needs of people in engineering, scientific research and daily use. The present utility model has the advantages of simple structure, ingenious design, low cost, high performance, etc.

[0033] The one-to-many device for CameraLink high-speed parallel data transmission interface provided by the present utility model can stably and in real-time copy 1 path of CameraLink high-speed parallel data into 4 paths of the same CameraLink high-speed parallel data. The 4 paths of high-speed parallel data will not be interfered or attenuated, and the 4 paths of high-speed parallel data are independent of each other, work in parallel and do not affect each other. It can also control and select 4 different CameraLink control parameters and select to output 1 path of CameraLink control parameters. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] Figure 1 is the circuit principle block diagram of the present utility model;

[0035] Figure 2 is the circuit diagram of the present utility model;

[0036] Figure 3 is the schematic diagram of the package structure of the present utility model;

[0037] Wherein: 1 is a connector, 2 is a switch button, and 3 is a power switch. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0038] The present utility model will be further described in detail below with reference to the drawings. The following is an explanation rather than a limitation of the present utility model.

[0039] See Figures 1 - 3 , the one-to-many device for CameraLink high-speed parallel data interface includes:

[0040] 1 CameraLink input interface circuit,

[0041] 4 CameraLink output interface circuits,

[0042] 1 dual-input port 1-to-4 clock buffer circuit for dividing the clock of the CameraLink input interface into 4 paths and respectively giving them to 4 CameraLink output interfaces;

[0043] 2 dual-input port 1-to-4 differential buffer circuits for dividing the differential data of the CameraLink input interface into 4 paths and respectively giving them to 4 CameraLink output interfaces;

[0044] The control parameters of 4 CameraLink output interfaces are respectively given to the differential-to-single-ended module circuit. The 4 paths of single-ended control parameters output are given to the 4-to-1 selection module circuit, and after selection, 1 path of single-ended control parameter is output and given to the single-ended-to-differential module circuit;

[0045] The single-ended to differential module circuit converts single-ended control parameters into differential control parameters and supplies them to the CameraLink input interface.

[0046] The following will provide a detailed description of each device, signal acquisition, and processing of the present utility model.

[0047] As Figure 1 shown, the CameraLink input interface circuit supplies data, clock, and serial control parameters to the 1-to-4 module, and the data, clock, and serial control parameters are evenly divided into 4 paths and respectively supplied to the CameraLink output interface circuit.

[0048] The 4 CameraLink output interface circuits respectively supply their control parameters to the differential-to-single-ended module, and the 4 single-ended control parameters after conversion are supplied to the 4-to-1 module.

[0049] The 4-to-1 module selects and outputs one path of control parameters to the single-ended to differential module, and the single-ended to differential module supplies the output differential control signal to the CameraLink input interface circuit.

[0050] As Figure 2 shown, the CameraLink high-speed parallel data interface one-to-many device has a total of 5 CameraLink high-speed parallel data interfaces, and the specific hardware used is the 26-pin connector 12226-5150-00FR. The ground matching resistor R1 = 50Ω connected to pin 1, the ground matching resistor R2 = 50Ω connected to pin 13, the ground matching resistor R3 = 50Ω connected to pin 14, and the ground matching resistor R4 = 50Ω connected to pin 26.

[0051] The differential clock pins of the CameraLink input connector are connected to pins 9 and 10 of the dual-input 1-to-4 clock buffer CDCLVD2104, and the differential clock is divided into 4 identical paths and respectively supplied to 4 CameraLink output connectors.

[0052] CDCLVD2104 is a dual-input 1-to-4 low-jitter LVDS buffer produced by TI. It supports 3 input levels: LVDS, LVPECL, and LVCMOS. It supports a maximum clock rate of up to 800MHz, and its output delay is at most 35 picoseconds. The filtering matching resistors of its matching circuit are R5 = 50Ω, R6 = 50Ω, R7 = 50Ω, R8 = 50Ω. The filtering matching capacitors are C1 = 100nF, C2 = 100nF, C3 = 100nF, C4 = 100nF, C5 = 100nF, C6 = 100nF, C7 = 100nF, C8 = 100nF, C9 = 100nF.

[0053] The four groups of differential data input pins of the CameraLink input connector are pin 8, pin 10, pin 11, pin 12, pin 21, pin 23, pin 24, and pin 25 in sequence. The four groups of differential input data pins transfer the data to two dual-input port 1-to-4 differential buffers CDCLVD2104, divide each group of differential input data into four parts, and transfer them to the data pins of four CameraLink output connectors respectively.

[0054] The CameraLink input connector gives the LVDS differential serial control signal SerTFG to the DS90LV019 module for differential-to-single-ended conversion, and the output is a single-ended serial control signal. The single-ended serial control signal SerTFG is given to a 4-input single-ended-to-differential circuit (DS90LV047A), and all four inputs are connected to SerTFG, and the output is four-way differential serial control signals. The four-way differential serial control signals SerTFG are given to four CameraLink output connectors respectively.

[0055] DS90LV019 is a device produced by TI. It has two groups of input pins and has two functional characteristics. It has the function of single-ended-to-differential conversion and also has the function of differential-to-single-ended conversion. Its pin 9 and pin 10 are differential input pins, and pin 2 is a single-ended input pin. The highest data rate it supports is 100 Mbps, and the supported input voltage is 3.3 V. Its impedance matching resistors R18 = 4.7 K and R19 = 4.7 K, and its filtering capacitors C15 = 100 nF and C16 = 100 nF.

[0056] Each CameraLink output connector has an LVDS differential serial control signal SerTC, and there are a total of four LVDS differential serial control signals SerTC for the four CameraLink output interfaces. The four LVDS differential serial control signals SerTC are connected to a four-input differential-to-single-ended circuit (DS90LV048A), and four single-ended serial control signals SerTC are output. The four single-ended serial control signals SerTC are connected to a 4-to-1 selection circuit (TMUX1104), and after selection, a single-ended serial control signal SerTC is output. The selected single-ended serial control signal SerTC is connected to a single-ended-to-differential circuit (DS90LV019), and a differential serial control signal SerTC is output and given to the CameraLink input connector.

[0057] Each CameraLink output connector has 4 LVDS differential control signals CC1 - CC4, which are located at pins 2, 3, 4, 5, 15, 16, 17, and 18 in sequence. The LVDS differential control signals CC1 - CC4 are transmitted to a four - input differential - to - single - ended circuit, and the output is 4 single - ended control signals CC1 - CC4.

[0058] The core chip of the four - input differential - to - single - ended circuit uses DS90LV048A. DS90LV048A is a 4 - input LVDS - to - CMOS differential - to - single - ended signal module produced by TI. The maximum inter - channel delay of DS90LV048A is 150 picoseconds, the maximum output delay is 100 picoseconds, the input level supports 3.3V, its maximum power consumption is 40mW, and the maximum data transfer rate is 400Mbps. The filter matching resistors of the four - input differential - to - single - ended circuit are R10 = 4.7KΩ, R11 = 4.7KΩ, and the filter matching capacitors are C10 = 100nF, C11 = 100nF. Its output impedance matching resistors are R12 = 100Ω, R13 = 100Ω, R14 = 100Ω, R15 = 100Ω.

[0059] Because there are 4 CameraLink output connectors, 4 four - input differential - to - single - ended circuits need to be connected. The 4 four - input differential - to - single - ended circuits altogether output 16 LVDS single - ended control signals, 4 groups of CC1 - CC4 single - ended control signals. The 4 single - ended control signals of CC1 are connected to a 4 - to - 1 selector circuit, and after selection, one single - ended control signal of CC1 is output. The 4 single - ended control signals of CC2 are connected to a 4 - to - 1 selector circuit, and after selection, one single - ended control signal of CC2 is output. The 4 single - ended control signals of CC3 are connected to a 4 - to - 1 selector circuit, and after selection, one single - ended control signal of CC3 is output. The 4 single - ended control signals of CC4 are connected to a 4 - to - 1 selector circuit, and after selection, one single - ended control signal of CC4 is output. A total of 4 4 - to - 1 selector circuits are used.

[0060] The core device used in the 4 - to - 1 selector circuit is TMUX1104. Its input pins are pins 2, 9, 7, 4 in sequence, its selection control pins are pins 1, 10, and its output pin is pin 8. Its impedance matching resistor is R9 = 4.7KΩ, and the filter capacitor is C17 = 100nF.

[0061] The 4 selector circuits output single - ended control signals CC1 - CC4, which are connected to a 4 - input single - ended - to - differential circuit to output 4 LVDS differential control signals CC1 - CC4 and feed them to the CameraLink input connector.

[0062] The core device of the single-ended to differential circuit uses the DS90LV047A produced by TI. The DS90LV047A is a 4-input CMOS to LVDS single-ended to differential module. The maximum output delay is 300 picoseconds. The input level supports 3.3V. Its maximum power consumption is 13mW, and the maximum data transfer rate is 400Mbps. The input pins of the DS90LV047A are pin 2, pin 3, pin 6, and pin 7. Its impedance matching resistors are R16 = 4.7KΩ and R17 = 4.7KΩ, and the filtering matching capacitors are C13 = 100nF and C14 = 10uF.

[0063] The control signals of the 4-to-1 selection circuit are A0 and A1. The control signals of all 4-to-1 selection circuits are the same group of A0 and A1, which are controlled by two switch buttons SW1 and SW2.

[0064] As Figure 3 shown, its back is a 1-channel CameraLink input interface, and its front is a 4-channel CameraLink output interface. On the side are two push-button switches SW1 and SW2, which are used to control the 4-to-1 selection circuit. Its power button is next to the push-button switch and is used to control the power on and off of the device.

[0065] At the usage site of the industrial camera, video data is given to the CameraLink input interface. At this time, the 4 CameraLink output interfaces will output the same video data, which is given to the receivers at 4 different positions for display.

[0066] The above-given embodiments are the better examples to implement the present utility model. The present utility model is not limited to the above embodiments. Any non-essential addition or replacement made by those skilled in the art according to the technical features of the technical solution of the present utility model falls within the protection scope of the present utility model.

Claims

1. A CameraLink high-speed parallel data transmission interface one-to-many device, characterized in that: include: CameraLink input interface circuit, outputs high-speed parallel data, and receives control parameters sent back; The 1-to-4 module receives high-speed parallel data transmitted by the CameraLink input interface circuit, divides the differential data, clock signal and serial control parameters into multiple channels, and sends them to each CameraLink output interface circuit respectively; Multiple independent CameraLink output interface circuits, each of which receives high-speed parallel data transmitted by the 1-to-4 module; each CameraLink output interface circuit transmits its own control parameters to the differential-to-single-ended module; The differential to single-ended module receives the control parameters of the CameraLink output interface circuit and sends them to the 4-to-1 output module; The 4-to-1 module is connected to the selection switch; it receives the control parameters transmitted by the differential-to-single-ended module, and selects to output one control parameter to the single-ended-to-differential module; The single-ended to differential module outputs the differential control signal to the CameraLink input interface circuit.

2. The CameraLink high-speed parallel data transmission interface one-to-many device as claimed in claim 1, characterized in that: The 1-to-4 module includes a clock signal distribution circuit, a differential data distribution circuit and a serial control parameter distribution circuit; The clock signal distribution circuit is a dual-input port 1-to-4 clock buffer circuit, which divides the differential clock of the CameraLink input interface into 4 channels and supplies them to each CameraLink output interface circuit respectively; The differential data distribution circuit includes two dual-input port 1-to-4 differential buffer circuits, each of which divides the differential data of the CameraLink input interface into 4 paths and respectively provides them to each CameraLink output interface circuit; The serial control parameter distribution circuit includes a differential to single-ended circuit and a four-input single-ended to differential circuit; wherein the CameraLink input interface circuit transmits the LVDS differential serial control signal SerTFG to the differential to single-ended circuit, and its output is the single-ended serial control signal SerTFG; The four input ends of the four-input single-ended to differential circuit are all connected to the differential to single-ended circuit, and output 4 differential serial control signals SerTFG, which are respectively given to each CameraLink output interface circuit.

3. The CameraLink high-speed parallel data transmission interface one-to-many device as claimed in claim 1, characterized in that: The output of the control parameters of the CameraLink output interface circuit is: Each CameraLink output interface has four LVDS differential control signals CC1-CC4, which are connected to four-input differential-to-single-ended circuits respectively, and output four single-ended control signals CC1-CC4; 4 four-input differential to single-ended circuits output a total of 16 LVDS single-ended control signals, 4 groups of CC1-CC4 single-ended control signals; 4 CC1 single-ended control signals are connected to the 4-to-1 module, and one CC1 single-ended control signal is output after selection; 4 CC2 single-ended control signals are connected to the 4-to-1 module, and one CC2 single-ended control signal is output after selection; 4-way CC3 single-ended control signal is connected to the 4-to-1 module, and one CC3 single-ended control signal is output after selection; 4-way CC4 single-ended control signal is connected to the 4-to-1 module, and one CC4 single-ended control signal is output after selection; 4-way selection output of single-ended control signals CC1-CC4, connected to the single-ended to differential module; The single-ended to differential module is a four-input single-ended to differential circuit, which outputs four LVDS differential control signals CC1-CC4 to the CameraLink input interface circuit.

4. The CameraLink high-speed parallel data transmission interface one-to-many device as claimed in claim 1, characterized in that: The control signals of the 4-to-1 selection module are the same group A0 and A1, which are controlled by two switches SW1 and SW2; When both switch SW1 and switch SW2 are closed, the 4-to-1 selection module transmits the control parameters of the first CameraLink output interface to the CameraLink input interface circuit via the single-ended to differential conversion module; When the switch SW1 is closed and the switch SW2 is opened, the 4-to-1 selection module transmits the control parameters of the second CameraLink output interface to the CameraLink input interface circuit via the single-ended to differential conversion module; When the switch SW1 is turned on and the switch SW2 is turned off, the 4-to-1 selection module transmits the control parameters of the third CameraLink output interface to the CameraLink input interface circuit via the single-ended to differential conversion module; When the switch SW1 and the switch SW2 are both turned on, the 4-to-1 selection module transmits the control parameters of the fourth CameraLink output interface to the CameraLink input interface circuit via the single-ended to differential conversion module.

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