CAN (Controller Area Network) to USB (Universal Serial Bus) conversion circuit
By designing a CAN to USB conversion circuit, the problem that the CAN bus cannot easily connect to the USB interface is solved, and the real-time data improvement effect is achieved.
Patent Information
- Application Number
- CN202422046027.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-08-22
- Publication Date
- 2025-05-30
- Estimated Expiration
- 2034-08-22
AI Technical Summary
The CAN bus cannot be conveniently connected directly to the computer's USB interface, resulting in poor real-time performance of data transmitted through the CAN bus during observation.
A CAN to USB conversion circuit is designed, including a first conversion circuit, a signal processing circuit and a second conversion circuit. The CAN signal is converted into a TTL signal through the first conversion circuit. The signal processing circuit processes the TTL signal, and finally the processed TTL signal is converted into a USB signal by the second conversion circuit.
It realizes convenient connection between the CAN bus and the computer USB interface, improving the real-time data observation.
Smart Images
Figure CN222927040U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to the technical field of circuits, and particularly relates to a CAN-to-USB conversion circuit. Background Art
[0002] The CAN bus is a communication bus technology widely used in the field of industrial control. It is widely used because of its simple hardware design and reliable communication protocol. The CAN bus can be regarded as an extended form of serial communication. Compared with the 485 bus, the CAN bus also uses differential signals for data transmission, thus ensuring the anti-interference ability of data and the stability of transmission. The advantage of the CAN bus lies in its complex communication protocol, which makes it significantly superior to the 485 bus in terms of communication security.
[0003] Although the CAN bus has many advantages, its special differential interface has certain limitations during debugging and cannot be conveniently connected directly to the USB interface of a computer. This inconvenience in connection results in poor real-time performance when observing the data transmitted through the CAN bus. Summary of the Utility Model
[0004] Therefore, an embodiment of the utility model provides a CAN-to-USB conversion circuit to solve the problem in the prior art that the CAN bus cannot be conveniently connected directly to the USB interface of a computer, resulting in poor real-time performance when observing the data transmitted through the CAN bus.
[0005] To achieve the above object, the embodiment of the utility model provides the following technical solutions:
[0006] A CAN-to-USB conversion circuit includes a first conversion circuit, a signal processing circuit, and a second conversion circuit;
[0007] The input end of the first conversion circuit is connected to the output end of the CAN signal, the output end of the first conversion circuit is connected to the input end of the signal processing circuit, the output end of the signal processing circuit is connected to the input end of the second conversion circuit, and the output end of the second conversion circuit is connected to the USB port;
[0008] Wherein, the first conversion circuit is used to convert the CAN signal output from the output end of the CAN signal into a TTL signal; the signal processing circuit is used to process the TTL signal output by the first conversion circuit to obtain a processed TTL signal; the second conversion circuit is used to convert the processed TTL signal into a USB signal.
[0009] Optionally, the first conversion circuit includes a first chip U1, and the first chip U1 includes a CAN transceiver TJA1050T / CM, 118.
[0010] Optionally, the first pin and the fourth pin of the first chip U1 are respectively connected to the signal processing circuit; the second pin of the first chip U1 is grounded; the third pin of the first chip U1 is divided into two paths, one path is connected to the power supply VCC, and the other path is grounded through the forty-first capacitor C41; the fifth pin of the first chip U1 is grounded through the forty-second capacitor C42; the sixth pin and the seventh pin of the first chip U1 are respectively connected to the output end of the CAN signal; the eighth pin of the first chip U1 is grounded through the forty-first resistor R41.
[0011] Optionally, the signal processing circuit includes a second chip U2, and the second chip U2 includes an STM32F103C8T6 chip.
[0012] Optionally, the fifth pin of the second chip U2 is divided into two paths, one path is grounded through the thirty-first capacitor C31, and the other path is connected to one end of the second crystal oscillator X2; the sixth pin of the second chip U2 is divided into two paths, one path is grounded through the thirty-second capacitor C32, and the other path is connected to the other end of the second crystal oscillator X2.
[0013] Optionally, the forty-fifth pin of the second chip U2 is connected to the first pin of the first chip U1; the forty-sixth pin of the second chip U2 is connected to the fourth pin of the first chip U1; the twelfth pin and the thirteenth pin of the second chip U2 are respectively connected to the second conversion circuit.
[0014] Optionally, the forty-fourth pin of the second chip U2 is grounded through the thirty-first resistor R31.
[0015] Optionally, the second conversion circuit includes a third chip U3, and the third chip U3 includes a CH340G chip.
[0016] Optionally, the second pin of the third chip U3 is connected to the thirteenth pin of the second chip U2; the third pin of the third chip U3 is connected to the twelfth pin of the second chip U2; the fifth pin and the sixth pin of the third chip U3 are respectively connected to the USB port.
[0017] Optionally, the seventh pin of the third chip U3 is divided into two paths, one path is grounded through the twenty-first capacitor C21, and the other path is connected to one end of the first crystal oscillator X1; the eighth pin of the third chip U3 is divided into two paths, one path is grounded through the twenty-second capacitor C22, and the other path is connected to the other end of the first crystal oscillator X1.
[0018] The utility model has at least the following beneficial effects:
[0019] The utility model provides a CAN-to-USB conversion circuit, which includes a first conversion circuit, a signal processing circuit and a second conversion circuit. First, the CAN signal is converted into a TTL signal through the first conversion circuit, and then the TTL signal output by the first conversion circuit is processed by the signal processing circuit to obtain the processed TTL signal. Finally, the processed TTL signal is converted into a USB signal through the second conversion circuit, so as to facilitate the convenient connection between the CAN bus and the computer USB interface and improve the real-time performance of data observation. BRIEF DESCRIPTION OF THE DRAWINGS
[0020] In order to more clearly illustrate the prior art and the present utility model, the drawings required for describing the prior art and the embodiments of the present utility model will be briefly introduced below. Obviously, the drawings described below are only exemplary, and those of ordinary skill in the art can also obtain other drawings according to the provided drawings without creative efforts.
[0021] The structures, ratios, sizes, etc. illustrated in this specification are only used to cooperate with the content disclosed in the specification for those who are familiar with this technology to understand and read, and are not used to limit the limited conditions under which the present utility model can be implemented. Any modification of the structure, change of the proportional relationship or adjustment of the size should still fall within the scope covered by the technical content disclosed in the present utility model without affecting the effects that the present utility model can produce and the purposes that can be achieved.
[0022] Figure 1 It is a circuit principle block diagram of a CAN-to-USB conversion circuit provided by an embodiment of the present utility model;
[0023] Figure 2 It is a circuit schematic diagram of a first conversion circuit provided by an embodiment of the present utility model;
[0024] Figure 3 It is a circuit schematic diagram of a signal processing circuit provided by an embodiment of the present utility model;
[0025] Figure 4 It is a circuit schematic diagram of a second conversion circuit provided by an embodiment of the present utility model. DETAILED DESCRIPTION OF THE EMBODIMENTS
[0026] In order to make the purpose, technical solutions and advantages of the present application clearer, the present application will be further described in detail below with reference to the drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.
[0027] In the description of the present utility model, unless otherwise specified, the meaning of "a plurality of" is two or more. Terms such as "first", "second", "third", "fourth", etc. (if any) in the specification, claims and above-mentioned drawings of the present utility model are intended to distinguish the objects being referred to. For a solution with a time sequence process, such a term expression does not necessarily need to be understood as describing a specific order or sequence. For a solution of a device structure, such a term expression also does not distinguish the importance level, positional relationship, etc.
[0028] In addition, the terms "comprising", "having" and any of their variations are intended to cover non-exclusive inclusion. For example, a process, method, system, product or device comprising a series of steps or units does not necessarily have to be limited to those steps or units that are clearly listed, but may also include other steps or units that are inherent to these processes, methods, products or devices although not clearly listed, or steps or units added based on further optimized solutions conceived from the present utility model.
[0029] As Figure 1 shown, a CAN-to-USB conversion circuit includes a first conversion circuit, a signal processing circuit and a second conversion circuit;
[0030] The input end of the first conversion circuit is connected to the output end of the CAN signal, the output end of the first conversion circuit is connected to the input end of the signal processing circuit, the output end of the signal processing circuit is connected to the input end of the second conversion circuit, and the output end of the second conversion circuit is connected to the USB port;
[0031] Among them, the first conversion circuit is used to convert the CAN signal output from the output end of the CAN signal into a TTL signal; the signal processing circuit is used to process the TTL signal output by the first conversion circuit to obtain a processed TTL signal; the second conversion circuit is used to convert the processed TTL signal into a USB signal.
[0032] It should be noted that the first conversion circuit uses the first chip U1 to convert the differential form of the CAN signal into a normal TTL form, which is convenient for the second chip U2 in the signal processing circuit, as a transfer station, to receive.
[0033] It should be noted that the signal processing circuit uses the STM32F103C8T6 chip to process the received TTL signal and send it to the second conversion circuit.
[0034] It should be noted that the second conversion circuit converts the TTL signal sent by the received signal processing circuit into a USB signal and transmits it to the USB port.
[0035] In an embodiment of the present application, a CAN-to-USB conversion circuit is provided, which includes a first conversion circuit, a signal processing circuit, and a second conversion circuit. First, the CAN signal is converted into a TTL signal through the first conversion circuit, and then the TTL signal output by the first conversion circuit is processed by the signal processing circuit to obtain a processed TTL signal. Finally, the processed TTL signal is converted into a USB signal through the second conversion circuit, so as to facilitate the convenient connection between the CAN bus and the computer USB interface and improve the real-time performance of data observation.
[0036] As Figure 2 shown, in an embodiment of the present application, the first conversion circuit includes a first chip U1, and the first chip U1 includes a CAN transceiver TJA1050T / CM, 118.
[0037] As Figure 2 shown, in an embodiment of the present application, the first pin and the fourth pin of the first chip U1 are respectively connected to the signal processing circuit; the second pin of the first chip U1 is grounded; the third pin of the first chip U1 is divided into two paths, one path is connected to the power supply VCC, and the other path is grounded through the forty-first capacitor C41; the fifth pin of the first chip U1 is grounded through the forty-second capacitor C42; the sixth pin and the seventh pin of the first chip U1 are respectively connected to the output end of the CAN signal; the eighth pin of the first chip U1 is grounded through the forty-first resistor R41.
[0038] It should be noted that the VCC pin of the CAN transceiver TJA1050T / CM, 118 is connected to the power supply VCC, and in order to filter it, the forty-first capacitor C41 is added between the power supply VCC and the ground for voltage stabilization.
[0039] The GND pin, S pin, and VREF pin of the CAN transceiver TJA1050T / CM, 118 are all grounded. The difference is that the GND pin is directly grounded, the S pin is grounded through the forty-first resistor R41 in the middle, and the VREF pin is filtered by adding the forty-second capacitor C42 between the ground.
[0040] The CANH and CANL of the CAN transceiver TJA1050T / CM are used to receive the differential signal of the external CAN.
[0041] The TXD and RXD in the CAN transceiver are TTL signal pins.
[0042] As Figure 3 shown, in an embodiment of the present application, the signal processing circuit includes a second chip U2, and the second chip U2 includes an STM32F103C8T6 chip.
[0043] It should be noted that the VDD_1 pin, VSS_1 pin, and VBAT pin of the second chip U2 are all connected to the corresponding power supply and ground to supply power to the second chip U2.
[0044] As Figure 3 shown, in an embodiment of the present application, the 5th pin of the second chip U2 is divided into two paths, one path is grounded through the thirty-first capacitor C31, and the other path is connected to one end of the second crystal oscillator X2; the 6th pin of the second chip U2 is divided into two paths, one path is grounded through the thirty-second capacitor C32, and the other path is connected to the other end of the second crystal oscillator X2.
[0045] It should be noted that PD0_OSC_IN and PD1_OSC_OUT are the crystal oscillator pins of the second chip U2, both of which are connected to GND, and the thirty-first capacitor C31 and the thirty-second capacitor C32 are respectively added between them and GND for filtering. And a second crystal oscillator X2 is added between its two lines to provide a heartbeat for the second chip U2.
[0046] As Figure 3 shown, in an embodiment of the present application, the 45th pin of the second chip U2 is connected to the 1st pin of the first chip U1; the 46th pin of the second chip U2 is connected to the 4th pin of the first chip U1; the 12th pin and the 13th pin of the second chip U2 are respectively connected to the second conversion circuit.
[0047] It should be noted that the PB9 pin and PB8 pin of the second chip U2 are CAN_TX and CAN_RX respectively, which are used to receive signals and process them. The PA2 pin and PA3 pin of the second chip U2 are used as communication pins with the second conversion circuit.
[0048] As Figure 3 shown, in an embodiment of the present application, the 44th pin of the second chip U2 is grounded through the thirty-first resistor R31.
[0049] It should be noted that the BOOT0 sets the 32-bit startup mode to startup mode 0.
[0050] As Figure 4 shown, in an embodiment of the present application, the second conversion circuit includes a third chip U3, and the third chip U3 includes a CH340G chip.
[0051] It should be noted that the VCC and GND of the CH340G chip are respectively connected to the power supply and ground to supply power to the third chip U3.
[0052] In an embodiment of the present application, the second pin of the third chip U3 is connected to the thirteenth pin of the second chip U2; the third pin of the third chip U3 is connected to the twelfth pin of the second chip U2; the fifth and sixth pins of the third chip U3 are respectively connected to the USB port.
[0053] In an embodiment of the present application, the seventh pin of the third chip U3 is divided into two paths. One path is grounded through the twenty-first capacitor C21, and the other path is connected to one end of the first crystal oscillator X1; the eighth pin of the third chip U3 is divided into two paths. One path is grounded through the twenty-second capacitor C22, and the other path is connected to the other end of the first crystal oscillator X1.
[0054] It should be noted that the TXD and RXD pins of the third chip U3 serve as the communication interfaces with the 32 transfer circuit.
[0055] The XI and XO pins of the third chip U3 are respectively grounded, and the twenty-first capacitor C21 and the twenty-second capacitor C22 are respectively added between their lines. The first crystal oscillator X1 is added between its two lines.
[0056] The UD+ and UD- pins of the third chip U3 are the USB communication interfaces with the outside world.
[0057] A CAN-to-USB conversion circuit provided by the present utility model solves the problem that there is no suitable interface on the computer side of the CAN communication in the circuit to observe the communication, and makes it more convenient to communicate and debug between devices.
[0058] In the manufacturing process of a CAN-to-USB conversion circuit provided by the present utility model, first, the schematic diagram is drawn, and the PCB is drawn; second, the PCB is manufactured by an external cooperation manufacturer, and SMT soldering is performed on the PCB board; finally, the PCB board is tested and finalized.
[0059] Components: According to the BOM list of the PCB, purchase microprocessors, resistors, inductors, capacitors, relays, connectors, etc. from reliable component manufacturers.
[0060] Circuit board: Manufactured by a professional circuit board manufacturer. Send the Gerber file to the PCBA manufacturer, and also give the purchased components to the manufacturer for SMT soldering.
[0061] The above-described embodiments only represent the specific implementation manners of the present utility model, and the description is relatively specific and detailed, but it should not be construed as a limitation on the scope of the patent of the present utility model. It should be noted that for those of ordinary skill in the art, without departing from the concept of the present utility model, several modifications and improvements can still be made, and these all belong to the protection scope of the present utility model.
Claims
1. A CAN to USB conversion circuit, characterized in that: comprising a first conversion circuit, a signal processing circuit and a second conversion circuit; The input end of the first conversion circuit is connected to the output end of the CAN signal, the output end of the first conversion circuit is connected to the input end of the signal processing circuit, the output end of the signal processing circuit is connected to the input end of the second conversion circuit, and the output end of the second conversion circuit is connected to the USB port; Among them, the first conversion circuit is used to convert the CAN signal output from the output end of the CAN signal into a TTL signal; the signal processing circuit is used to process the TTL signal output by the first conversion circuit to obtain a processed TTL signal; the second conversion circuit is used to convert the processed TTL signal into a USB signal.
2. A CAN to USB conversion circuit according to claim 1, characterized in that: The first conversion circuit includes a first chip U1 , and the first chip U1 includes a CAN transceiver TJA1050T / CM, 118 .
3. A CAN to USB conversion circuit according to claim 2, characterized in that: The 1st pin and the 4th pin of the first chip U1 are respectively connected to the signal processing circuit; the 2nd pin of the first chip U1 is grounded; the 3rd pin of the first chip U1 is divided into two paths, one path is connected to the power supply VCC, and the other path is grounded via the forty-first capacitor C41; the 5th pin of the first chip U1 is grounded via the forty-second capacitor C42; the 6th pin and the 7th pin of the first chip U1 are respectively connected to the output end of the CAN signal; the 8th pin of the first chip U1 is grounded via the forty-first resistor R41.
4. A CAN to USB conversion circuit according to claim 3, characterized in that: The signal processing circuit includes a second chip U2, and the second chip U2 includes an STM32F103C8T6 chip.
5. A CAN to USB conversion circuit according to claim 4, characterized in that: The 5th pin of the second chip U2 is divided into two paths, one path is grounded through the thirty-first capacitor C31, and the other path is connected to one end of the second crystal oscillator X2; the 6th pin of the second chip U2 is divided into two paths, one path is grounded through the thirty-second capacitor C32, and the other path is connected to the other end of the second crystal oscillator X2.
6. A CAN to USB conversion circuit according to claim 4, characterized in that: Pin 45 of the second chip U2 is connected to pin 1 of the first chip U1; pin 46 of the second chip U2 is connected to pin 4 of the first chip U1; pins 12 and 13 of the second chip U2 are respectively connected to the second conversion circuit.
7. A CAN to USB conversion circuit according to claim 4, characterized in that: The 44th pin of the second chip U2 is grounded via a 31st resistor R31.
8. The CAN to USB conversion circuit according to claim 6, characterized in that: The second conversion circuit includes a third chip U3, and the third chip U3 includes a CH340G chip.
9. A CAN to USB conversion circuit according to claim 8, characterized in that: The second pin of the third chip U3 is connected to the 13th pin of the second chip U2; the third pin of the third chip U3 is connected to the 12th pin of the second chip U2; the fifth pin and the sixth pin of the third chip U3 are connected to the USB port respectively.
10. The CAN to USB conversion circuit according to claim 8, characterized in that: The 7th pin of the third chip U3 is divided into two paths, one path is grounded through the 21st capacitor C21, and the other path is connected to one end of the first crystal oscillator X1; the 8th pin of the third chip U3 is divided into two paths, one path is grounded through the 22nd capacitor C22, and the other path is connected to the other end of the first crystal oscillator X1.