Display panel

Abstract

The utility model provides a display panel, which comprises a substrate, a first conducting layer, a first insulating layer, a second conducting layer, a second insulating layer and a lapping wire, and is characterized in that a first insulating part of the first insulating layer is arranged on the first conducting layer, and the second conducting layer is arranged on a second insulating part; the surface, deviating from the substrate, of the second insulating part is closer to the substrate than the surface, deviating from the substrate, of the first insulating part, so that the height difference between the upper surface of the second conductive layer and the upper surface of the first insulating part can be reduced, and the flatness of the second insulating layer is improved; therefore, the risk of fracture of the lapping wire can be reduced, the lapping wire is arranged to be of the grid-shaped structure, even if part of the grid-shaped structure in the lapping wire is fractured, conduction of the circuit can still be kept, and therefore the problem that due to poor lapping of the first conducting layer and the second conducting layer, poor display of the display panel is caused can be solved.

Description

Technical Field

[0001] The utility model relates to the technical field of displays, and particularly to a display panel. Background Art

[0002] In order to save costs, the preparation process of the existing display panel adopts a three-mask process, using the same mask to prepare the passivation layer and the pixel electrode. The specific method is to perform flocking treatment on the photoresist above the passivation layer. By using the surface features of the uneven fluff structure, the transparent conductive material covering its surface can be broken. Then, a stripping solution is used to strip the photoresist and the pixel electrode material simultaneously to form the pixel electrode and the wiring connected to the pixel electrode on the same layer. The wiring is connected to two metal layers through deep and shallow transfer holes, thereby realizing the bridging between different metal layers.

[0003] Combined with Figure 1 and Figure 2 shown, Figure 1 is a top view of the deep and shallow holes of the existing display panel, Figure 2 is a cross-sectional view of the display panel along the Figure 1 shown A-A' direction. The display panel includes a first conductive layer 11, a first insulating layer 12, a second conductive layer 13, a second insulating layer 14, and a wiring 15 that are sequentially stacked on a substrate 10. The wiring 15 is electrically connected to the first conductive layer 11 through a deep hole H1 penetrating the second insulating layer 14 and the first insulating layer 12, and the wiring 15 is electrically connected to the second conductive layer 13 through a shallow hole H2 penetrating the second insulating layer 14, thereby realizing the connection between the second conductive layer 13 and the first conductive layer 11. As Figure 2 shown, when etching to form the deep hole H1 and the shallow hole H2, since the second conductive layer 13 is directly formed on the surface of the first insulating layer 12, the upper surface of the second conductive layer 13 is higher than the upper surface of the first insulating layer 12, making the height difference at the deep hole H1 greater than the height difference at the shallow hole H2. After exposing the photoresist covering the second insulating layer 14, Figure 2 the photoresist thickness at the dotted box a in is thicker than the photoresist at the shallow hole H2, making the photoresist at the deep hole H1 more likely to have residues after ashing treatment. The pixel electrode material deposited on the residual photoresist is stripped together with the photoresist, causing the wiring 15 at the deep and shallow holes to break, resulting in poor connection between the first conductive layer 11 and the second conductive layer 13 at the deep and shallow holes, affecting the normal supply of voltage in the display area, and ultimately causing problems with the display of the display panel.

[0004] Therefore, it is necessary to provide a display panel to improve this defect. Summary of the Utility Model

[0005] An embodiment of the present utility model provides a display panel, which can avoid the residue of photoresist after ashing treatment and solve the problem of poor display of the display panel caused by poor lap joint at the deep and shallow holes.

[0006] An embodiment of the present utility model provides a display panel. The display panel includes a display area and a non-display area adjacent to the display area. The display panel further includes:

[0007] A substrate;

[0008] A first conductive layer disposed on the substrate, and the first conductive layer is located in the non-display area;

[0009] A first insulating layer disposed on the substrate and the first conductive layer;

[0010] A second conductive layer disposed on the second insulating portion, and the second conductive layer is located in the non-display area;

[0011] A second insulating layer disposed on the first insulating layer and the second conductive layer. The second insulating layer is provided with a first opening and a second opening. The first opening penetrates through the second insulating layer and the first insulating layer, and the second opening penetrates through the second insulating layer; and

[0012] A connecting wire disposed on the second insulating layer. The connecting wire passes through the first opening and is connected to the first conductive layer, and the connecting wire passes through the second opening and is connected to the second conductive layer. The connecting wire is a grid-like structure;

[0013] Wherein, the first insulating layer includes a first insulating portion and a second insulating portion. The first insulating portion is disposed on the first conductive layer. In a top view, the second insulating portion does not overlap with the first conductive layer. The surface of the second insulating portion facing away from the substrate is closer to the substrate than the surface of the first insulating portion facing away from the substrate. The second conductive layer is disposed on the second insulating portion. In a top view, the second conductive layer does not overlap with the first conductive layer.

[0014] According to an embodiment of the present utility model, in a top view, at least part of the first conductive layer surrounds the second conductive layer. The second insulating layer is provided with a plurality of the first openings. In a top view, the plurality of first openings are spaced apart and distributed around the second conductive layer. The connecting wire passes through the plurality of first openings and is connected to the first conductive layer.

[0015] According to an embodiment of the present invention, a plurality of second openings are provided on the second insulating layer. In a top view perspective, the first conductive layer at least partially surrounds the plurality of second openings, and the jumper wire passes through the plurality of second openings to be connected to the second conductive layer.

[0016] According to an embodiment of the present invention, the minimum distance between the surface of the second conductive layer facing away from the substrate and the substrate is a first distance, the minimum distance between the surface of the first insulating portion facing away from the substrate and the substrate is a second distance, and the absolute value of the difference between the first distance and the second distance is less than the thickness of the second conductive layer.

[0017] According to an embodiment of the present invention, the absolute value of the difference between the first distance and the second distance is less than or equal to 0.13 micrometers.

[0018] According to an embodiment of the present invention, the surface of the second conductive layer facing away from the substrate is flush with the surface of the first insulating portion facing away from the substrate.

[0019] According to an embodiment of the present invention, the display panel includes a display area and a non-display area disposed around the display area. The non-display area includes a gate driving circuit area disposed on at least one side of the display area, and the first opening and the second opening are disposed in the gate driving circuit area.

[0020] According to an embodiment of the present invention, the display panel further includes a floating electrode, and the floating electrode is disposed on the second insulating layer;

[0021] Wherein, the jumper wire is disposed in the gate driving circuit area, the floating electrode is disposed in the non-display area, the floating electrode is a grid-like structure, and the floating electrode is insulated from the jumper wire.

[0022] According to an embodiment of the present invention, the display panel further includes a pixel electrode. The jumper wire, the floating electrode, and the pixel electrode are disposed in the same layer, and the materials of the jumper wire, the floating electrode, and the pixel electrode are all transparent conductive materials.

[0023] According to an embodiment of the present invention, the display panel further includes a gate metal layer and a source-drain electrode metal layer. The first conductive layer is disposed in the same layer as the gate metal layer, and the second conductive layer is disposed in the same layer as the source-drain electrode metal layer.

[0024] Advantages of the embodiments of the present utility model: The embodiments of the present utility model provide a display panel, which includes a substrate, a first conductive layer, a first insulating layer, a second conductive layer, a second insulating layer, and a jumper wire stacked on the substrate. By disposing a first insulating portion of the first insulating layer on the first conductive layer and disposing the second conductive layer on the second insulating portion, since the second insulating portion does not overlap with the first conductive layer in a top view, the surface of the second insulating portion facing away from the substrate is closer to the substrate than the surface of the first insulating portion facing away from the substrate. In this way, the height difference between the upper surface of the second conductive layer and the upper surface of the first insulating layer can be reduced, thereby improving the flatness of the second insulating layer, avoiding photoresist residue at the first opening and the second opening, and thus reducing the risk of the jumper wire breaking. On this basis, by setting the jumper wire as a grid-like structure, even if some of the grid-like structures in the jumper wire break, the other connected grid-like structures can still maintain the conduction of the circuit, thereby solving the problem of poor display of the display panel caused by poor connection between the first conductive layer and the second conductive layer. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] Figure 1 Is a top view of the deep and shallow holes of the existing display panel;

[0026] Figure 2 For the display panel along Figure 1 The cross-sectional view taken along the A-A' direction shown;

[0027] Figure 3 Is a top view of the display panel provided by the first embodiment of the present utility model at the first opening and the second opening;

[0028] Figure 4 For along Figure 3 The cross-sectional view taken along the B-B' direction shown;

[0029] Figure 5 Is a top view of the display panel provided by the second embodiment of the present utility model at the first opening and the second opening;

[0030] Figure 6 For along Figure 5 The cross-sectional view taken along the C-C' direction shown;

[0031] Figure 7 Is a top view of the display panel provided by the second embodiment of the present utility model;

[0032] Figure 8 Is a schematic diagram of the film layer structure of the display panel provided by the second embodiment of the present utility model in the display area;

[0033] Figure 9 Is a top view of the display panel provided by the third embodiment of the present application;

[0034] Figure 10 is Figure 9 a cross-sectional view in the D-D' direction as shown;

[0035] Figures 11a to 11d is a schematic diagram of the manufacturing process of the display panel provided by the embodiment of the present invention. Specific Embodiments

[0036] The following description of each embodiment refers to the accompanying drawings, which are used to illustrate specific embodiments in which the present invention can be implemented. Directional terms mentioned in the present invention, such as [up], [down], [front], [back], [left], [right], [inside], [outside], [side], etc., are only references to the directions in the accompanying drawings. Therefore, the directional terms used are for explaining and understanding the present invention, rather than for limiting the present invention. In the drawings, units with similar structures are denoted by the same reference numerals.

[0037] The present invention will be further described below with reference to the accompanying drawings and specific embodiments.

[0038] The embodiment of the present invention provides a display panel, which can avoid the residue of photoresist after ashing treatment and solve the problem of poor display of the display panel caused by poor lamination at the deep and shallow holes.

[0039] Combined with Figure 3 and Figure 4 as shown, Figure 3 is a top view of the display panel provided by the first embodiment of the present invention at the first opening V1 and the second opening V2, Figure 4 is Figure 3 a cross-sectional view in the B-B' direction as shown, and the display panel includes a substrate 20, a first conductive layer 21, a first insulating layer 22, a second conductive layer 23, a second insulating layer 24, and a connecting wire 25.

[0040] The substrate 20 is a rigid substrate, specifically but not limited to a glass substrate.

[0041] The first conductive layer 21 is disposed on the substrate 20. It should be noted that the first conductive layer 21 being disposed on the substrate 20 may mean that the first conductive layer 21 is located on the substrate 20 and is in direct contact with one side surface of the substrate 20, or it may mean that the first conductive layer 21 is located on the substrate 20, and a buffer layer or a barrier layer formed of an inorganic insulating material is interposed between the first conductive layer 21 and one side surface of the substrate 20.

[0042] The first insulating layer 22 is disposed on the substrate 20 and the first conductive layer 21. The first insulating layer 22 includes a first insulating portion 221 and a second insulating portion 222. The first insulating portion 221 is disposed on the first conductive layer 21. In a top view perspective, the second insulating portion 222 does not overlap with the first conductive layer 21. The surface of the second insulating portion 222 facing away from the substrate 20 is closer to the substrate 20 than the surface of the first insulating portion 221 facing away from the substrate.

[0043] Exemplarily, as Figure 4 shown, the first insulating portion 221 is disposed on the first conductive layer 21, and the second insulating portion 222 is disposed on the substrate 20. In a top view perspective, the second insulating portion 222 does not overlap with the first conductive layer 21. The top view perspective is the perspective of the top view as Figure 3 shown. The observation direction of the top view perspective is parallel to the thickness direction of the display panel. The surface of the second insulating portion 222 facing away from the substrate 20 is closer to the substrate 20 than the surface of the first insulating portion 221 facing away from the substrate, that is, the distance between the surface of the second insulating portion 222 facing away from the substrate 20 and the substrate 20 is less than the distance between the surface of the first insulating portion 221 facing away from the substrate 20 and the substrate 20.

[0044] Since there is a height difference between the surface of the first conductive layer 21 facing away from the substrate 20 and the upper surface of the substrate 20, and this height difference is the thickness of the first conductive layer 21, the surface of the first insulating portion 221 formed on the first conductive layer 21 facing away from the substrate 20 is higher than the surface of the second insulating portion 222 formed on the substrate 20 facing away from the substrate 20, thereby causing the surface of the second insulating portion 222 facing away from the substrate 20 to be recessed in the direction towards the substrate 20.

[0045] The second conductive layer 23 is disposed on the first insulating layer 22. Specifically, the second conductive layer 23 is disposed on the second insulating portion 222. In a top view perspective, the second conductive layer 23 does not overlap with the first conductive layer 21, that is, the orthographic projection of the second conductive layer 23 on the substrate 20 does not overlap with the orthographic projection of the first conductive layer 21 on the substrate 20.

[0046] The second insulating layer 24 is disposed on the first insulating layer 22 and the second conductive layer 23. The first opening V1 and the second opening V2 are provided on the second insulating layer 24. The first opening V1 and the second opening V2 are adjacent to each other. The first opening V1 penetrates through the second insulating layer 24 and the first insulating layer 22, and the first opening V1 exposes the surface of the first conductive layer 21 facing away from the substrate 20. The second opening V2 penetrates through the second insulating layer 24, and the second opening V2 exposes the surface of the second conductive layer 23 facing away from the substrate 20.

[0047] The jumper wire 25 is disposed on the second insulating layer 24. The jumper wire 25 passes through the first opening V1 and is connected to the first conductive layer 21, and the jumper wire 25 also passes through the second opening V2 and is connected to the second conductive layer 23.

[0048] As Figure 4 shown, since the surface of the second insulating portion 222 facing away from the substrate 20 is closer to the substrate 20 than the surface of the first insulating portion 221 facing away from the substrate, by disposing the second conductive layer 23 on the second insulating portion 222, it is equivalent to embedding the second conductive layer 23 in the first insulating layer 22. In this way, the height difference between the surface of the second conductive layer 23 facing away from the substrate 20 and the surface of the first insulating portion 221 facing away from the substrate 20 can be reduced, thereby improving the flatness of the second insulating layer 24 on the first insulating layer 22 and the second conductive layer 23. Subsequently, when depositing photoresist on the second insulating layer 24 for etching to form the first opening V1 and the second opening V2, it is possible to avoid the residue of photoresist at the first opening V1 and the second opening V2, thereby reducing the risk of the jumper wire breaking.

[0049] As Figure 3 shown, the jumper wire 25 has a grid-like structure. The jumper wire 25 is formed by intersecting a plurality of first lines 251 extending along the first direction X and second lines 252 extending along the second direction Y. The first direction X and the second direction Y are intersectingly arranged. The first direction X can be Figure 3 the horizontal transverse direction in the top view shown, and the second direction Y can be the vertical direction. The first lines 251 and the second lines 252 are arranged on the same layer and intersect with each other to define a plurality of rectangular grids. When a first line 251 or a second line 252 in the jumper wire 25 breaks, the other unbroken and interconnected first lines 251 and second lines 252 can still maintain the conduction of the circuit, thereby avoiding the situation that the display panel has a display defect due to the poor connection between the first conductive layer 21 and the second conductive layer 23 caused by the breakage of the jumper wire 25.

[0050] In practical applications, the grid shape of the jumper wire 25 is not limited to Figure 3 the rectangle shown, and can also be a square, a circle, an oval, and other regular or irregular polygons, etc.

[0051] Combined with Figure 5 and Figure 6 shown, Figure 5 is a top view of the display panel provided by the second embodiment of the present invention at the first opening and the second opening. Figure 6 is along Figure 5As shown in the cross-sectional view along the C-C' direction, the structure of the display panel provided in the second embodiment is substantially the same as that provided in the first embodiment, with the difference being that, in a top-down perspective, the first conductive layer 21 at least partially surrounds the second conductive layer 23, and a plurality of first openings V1 are provided on the second insulating layer 24; in a top-down perspective, the plurality of first openings V1 are spaced apart around the second conductive layer 23, and the jumper wires 25 pass through the plurality of first openings V1 and are connected to the first conductive layer 21.

[0052] For example, in combination Figure 5 and Figure 6 As shown, in a top view, the first conductive layer 21 completely surrounds the second conductive layer 23, the first conductive layer 21 is a closed zigzag structure, the first insulating portion 221 of the first insulating layer 22 is also a closed zigzag structure, and surrounds the second insulating portion 222 therein, and 12 circular first openings V1 are formed on the second insulating layer 24. In a top view, the 12 first openings V1 are spaced apart on the upper and lower sides and the left and right sides of the second conductive layer 23, surrounding the second conductive layer 23, and the overlapping wire 25 passes through the 12 first openings V1 to connect with the first conductive layer 21. When the overlapping wire 25 at one or more of the first openings V1 is broken, the overlapping wires 25 at other first openings V1 still overlap the first conductive layer 21 and the second conductive layer 23, thereby further reducing the risk of poor overlapping between the first conductive layer 21 and the second conductive layer 23 on the basis of the first embodiment.

[0053] In practical applications, the number of the first openings V1 is not limited to 12 in the above embodiment, but may also be 2, 3 or more. The shape of the first opening V1 is not limited to the circle in the above embodiment, but may also be elliptical, semicircular, etc.

[0054] Exemplarily, in a top-down perspective, the first conductive layer 21 partially surrounds the second conductive layer 23. For example, in a top-down perspective, the first conductive layer 21 surrounds the upper and lower sides and the left side of the second conductive layer 23, but does not surround the right side of the second conductive layer 23. A plurality of first openings V1 are formed on the second insulating layer 24. In a top-down perspective, the plurality of first openings V1 are spaced apart on the upper and lower sides and the left side of the second conductive layer 23. The overlapping wire 25 passes through the plurality of first openings V1 and is connected to the first conductive layer 21. When the overlapping wire 25 at one or more of the first openings V1 is broken, the overlapping wires 25 at other first openings V1 still overlap the first conductive layer 21 and the second conductive layer 23, thereby further reducing the risk of poor overlapping between the first conductive layer 21 and the second conductive layer 23 on the basis of the first embodiment.

[0055] Further, a plurality of second openings V2 are provided on the second insulating layer 24. In a top-down view, the first conductive layer 21 at least partially surrounds the plurality of second openings V2, and the jumper wire 25 passes through the plurality of second openings V2 to be connected to the second conductive layer 23.

[0056] Exemplarily, as shown in conjunction with Figure 5 and Figure 6 In a top-down view, the first conductive layer 21 completely surrounds the second conductive layer 23. There are 4 circular second openings V2 provided on the second insulating layer 24. In a top-down view, the first conductive layer 21 completely surrounds the 4 second openings V2. The jumper wire 25 passes through the 4 second openings V2 to be connected to the second conductive layer 23. When the jumper wire 25 at one or more of the second openings V2 is broken, the jumper wire 25 at the other second openings V2 still laps the first conductive layer 21 and the second conductive layer 23, thereby further reducing the risk of poor lap between the first conductive layer 21 and the second conductive layer 23.

[0057] In practical applications, the number of the second openings V2 is not limited to 4 in the above embodiments, and can also be 2, 3 or more. The shape of the second openings V2 is not limited to the circular shape in the above embodiments, and can also be an elliptical shape, a semi-circular shape, etc.

[0058] Further, the minimum distance between the surface of the second conductive layer 23 facing away from the substrate 20 and the substrate 20 is a first distance d1, and the minimum distance between the surface of the first insulating portion 221 facing away from the substrate 20 and the substrate 20 is a second distance d2. The absolute value of the difference between the first distance d1 and the second distance d2 is less than the thickness of the second conductive layer 23. This can ensure the flatness of the second insulating layer 24 formed on the first insulating portion 221 and the second conductive layer 23, and avoid the situation that the height difference between the surface of the second conductive layer 23 facing away from the substrate 20 and the surface of the first insulating portion 221 facing away from the substrate 20 is too large, resulting in photoresist residue at the second openings V2 and causing the jumper wire 25 to break at the second openings V2, thereby further reducing the risk of poor lap between the first conductive layer 21 and the second conductive layer 23 due to the breakage of the jumper wire 25.

[0059] Further, the absolute value of the difference between the first distance d1 and the second distance d2 is less than or equal to 0.13 microns. For example, the absolute value of the difference between the first distance d1 and the second distance d2 is 0.13 microns, 0.1 micron, 0.08 micron, 0.06 micron, 0.04 micron, 0.02 micron or 0, etc.

[0060] Exemplarily, the absolute value of the difference between the first distance d1 and the second distance d2 is 0, that is, the surface of the second conductive layer 23 facing away from the substrate 20 is flush with the surface of the first insulating portion 221 facing away from the substrate 20. In this way, the height difference between the surface of the second insulating layer 24 in the area with the second conductive layer 23 and the surface of the second insulating layer 24 in the area without the second conductive layer 23 can be eliminated, so as to planarize the topography of the second insulating layer 24 on the first insulating layer 22 and the second conductive layer 23, thereby further reducing the risk of poor connection between the first conductive layer 21 and the second conductive layer 23 due to the breakage of the jumper wire 25.

[0061] Exemplarily, the surface of the second conductive layer 23 facing away from the substrate 20 may also be slightly higher or slightly lower than the surface of the first insulating portion 221 facing away from the substrate 20. It is only necessary to make the absolute value of the difference between the first distance d1 and the second distance d2 less than or equal to 0.13 micrometers to avoid the situation where the height difference between the surface of the second conductive layer 23 facing away from the substrate 20 and the surface of the first insulating portion 221 facing away from the substrate 20 is too large, resulting in photoresist residue at the second opening V2 and causing the jumper wire 25 to break at the second opening V2.

[0062] Furthermore, as Figure 7 shown, Figure 7 FIG. 10 is a top view of a display panel provided by the second embodiment of the present invention. The display panel includes a display area AA and a non-display area NA adjacent to the display area AA. The non-display area NA includes a gate driving circuit area GOA provided on at least one side of the display area AA. The gate driving circuit area GOA is provided with a gate driving circuit. A plurality of sub-pixels arranged in multiple rows and multiple columns are provided in the display area AA. The gate driving circuit is electrically connected to the sub-pixels through scan lines to control the sub-pixels to emit light and turn off in response to timing signals.

[0063] The first opening V1, the second opening V2, the first conductive layer 21, the second conductive layer 23, and the jumper wire 25 are all provided in the gate driving circuit area GOA. The first conductive layer 21 transmits the data signal, source signal, or drain signal through the jumper wire 25 to the second conductive layer 23, and the second conductive layer 23 transmits the above signals to the display area AA.

[0064] Furthermore, the display panel further includes a gate metal layer 26 and a source-drain electrode metal layer 27. The first conductive layer 21 is provided on the same layer as the gate metal layer 26, and the second conductive layer 23 is provided on the same layer as the source-drain electrode metal layer 27.

[0065] Exemplarily, as Figure 8 shown, Figure 8Schematic diagram of the film layer structure in the display area of the display panel provided for the second embodiment of the present invention. In the display area of the display panel, it includes a gate metal layer 26, a gate insulating layer 201, an active layer 202, a source-drain electrode metal layer 27, a passivation protection layer 203, and a pixel electrode 28 stacked on a substrate 20. The first conductive layer 21 is provided on the same layer as the gate metal layer 26 and has the same material as the gate metal layer 26. The first conductive layer 21 and the gate metal layer 26 can be prepared simultaneously by the same process. The materials of the first conductive layer 21 and the gate metal layer 26 are metals. Specifically, the first conductive layer 21 and the gate metal layer 26 can be a single-layer structure formed by any one of metal materials such as copper, silver, molybdenum, aluminum, and titanium, or a multi-layer structure formed by stacking two or more layers.

[0066] Combined with Figure 6 and Figure 8 As shown, the first insulating layer 22 is provided on the same layer as the gate insulating layer 201 and has the same material as the gate insulating layer 201. The first insulating layer 22 and the gate insulating layer 201 can be prepared simultaneously by the same process. The materials of the first insulating layer 22 and the gate insulating layer 201 are inorganic insulating materials, specifically, they can be silicon nitride, silicon oxide, or silicon oxynitride.

[0067] The second conductive layer 23 is provided on the same layer as the source-drain electrode metal layer 27 and has the same material as the source-drain electrode metal layer 27. The second conductive layer 23 and the source-drain electrode metal layer 27 can be prepared simultaneously by the same process. The materials of the second conductive layer 23 and the source-drain electrode metal layer 27 are metals. Specifically, the materials of the second conductive layer 23 and the source-drain electrode metal layer 27 can be a single-layer structure formed by any one of metal materials such as copper, silver, molybdenum, aluminum, and titanium, or a multi-layer structure formed by stacking two or more layers.

[0068] The second insulating layer 24 is provided on the same layer as the passivation protection layer 203 and has the same material as the passivation protection layer 203. The second insulating layer 24 and the passivation protection layer 203 can be prepared simultaneously by the same process. The materials of the second insulating layer 24 and the passivation protection layer 203 are inorganic insulating materials, specifically, they can be silicon nitride, silicon oxide, or silicon oxynitride.

[0069] The jumper wire 25 is provided on the same layer as the pixel electrode 28 and has the same material as the pixel electrode 28. The jumper wire 25 and the pixel electrode 28 can be prepared simultaneously by the same process. The materials of the jumper wire 25 and the pixel electrode 28 are transparent conductive materials, specifically, they can be indium tin oxide (ITO).

[0070] Exemplarily, combined with Figure 9 and Figure 10 shown, Figure 9A top view of the display panel provided in the third embodiment of the present application. Figure 10 is Figure 9 A cross-sectional view taken along the direction D-D' shown in the figure. The display panel further includes a floating electrode 204. The floating electrode 204 is disposed on the second insulating layer 24. The jumper wire 25 is disposed in the gate driving circuit region GOA. The floating electrode 204 is disposed in the non-display region NA. The floating electrode 204 has a mesh structure, and the floating electrode 204 is insulated from the jumper wire 25.

[0071] It should be noted that since large pieces of photoresist are not easily peeled off, have low efficiency, and can cause clogging of the filter screen of the peeling machine, in this embodiment, the floating electrode 204 is arranged in a mesh structure, thereby dividing the large piece of photoresist into multiple small pieces. In this way, it is convenient for photoresist peeling, improves the photoresist peeling efficiency, and can also prevent the large piece of photoresist from clogging the filter screen of the peeling machine. In addition, by insulating the jumper wire 25 from the floating electrode 204, it is possible to avoid the generation of parasitic capacitance between the large-area floating electrode 204 and other signal lines, and at the same time, it is also possible to avoid the risk of electrostatic shock caused by excessive charge accumulation on the floating electrode 204.

[0072] Further, as shown in combination with Figure 9 and Figure 10 shown, the jumper wire 25 is disposed on the same layer as the floating electrode 204 and the pixel electrode 28. The materials of the jumper wire 25, the floating electrode 204, and the pixel electrode 28 are all transparent conductive materials, and the jumper wire 25, the floating electrode 204, and the pixel electrode 28 can be prepared simultaneously by the same process.

[0073] Exemplarily, as shown in combination with Figure 7 and Figure 9 shown, the non-display region NA further includes a bonding region BA disposed on one side of the display region AA. The first opening V1, the second opening V2, the first conductive layer 21, the second conductive layer 23, and the jumper wire 25 are all disposed between the bonding region BA and the display region AA. In practical applications, the first opening V1, the second opening V2, the first conductive layer 21, the second conductive layer 23, and the jumper wire 25 can also be disposed in other regions within the non-display region NA that require different metal film layers to be overlapped by using deep and shallow holes, except for the bonding region BA and the gate driving circuit region GOA.

[0074] Exemplarily, as shown in combination with Figures 11a to 11d shown, Figures 11a to 11d A schematic diagram of the manufacturing process of the display panel provided in the embodiment of the present invention. The manufacturing method of the display panel includes:

[0075] Step 1: As shown in Figure 11a shown, a first conductive layer 21, a first insulating layer 22, a second conductive layer 23, and a second insulating layer 24 are sequentially formed on the substrate 20.

[0076] Step 2: As shown in Figure 11b Figure 11b , a layer of photoresist material is formed on the second insulating layer 24, and the photoresist material is patterned to form a photoresist layer 3.

[0077] Step 3: As shown in Figure 11c Figure 11c , the second insulating layer 24 and the first insulating layer 22 are etched to form a first opening V1 and a second opening V2.

[0078] Step 4: The photoresist layer 3 is first ashed and then flocked so that a fluff structure is formed on the surface of the photoresist layer 3.

[0079] Step 5: As shown in Figure 11d Figure 11d , a layer of transparent conductive material is deposited on the photoresist layer 3, the first conductive layer 21, the first insulating layer 22, the second conductive layer 23, and the second insulating layer 24, and the photoresist layer 3 and the transparent conductive material deposited on the photoresist layer 3 are peeled off to form a jumper wire 25.

[0080] Beneficial effects of the embodiments of the present utility model: The embodiments of the present utility model provide a display panel, which includes a substrate and a first conductive layer, a first insulating layer, a second conductive layer, a second insulating layer, and a jumper wire that are stacked on the substrate. By disposing the first insulating portion of the first insulating layer on the first conductive layer, staggering the second insulating portion of the first insulating layer from the first conductive layer, making the surface of the second insulating portion facing away from the substrate concave with respect to the surface of the first insulating portion facing away from the substrate, and disposing the second conductive layer on the second insulating portion, the height difference between the upper surface of the second conductive layer and the upper surface of the first insulating layer can be reduced, thereby improving the flatness of the second insulating layer, avoiding photoresist residue at the first opening and the second opening, and reducing the risk of the jumper wire breaking. On this basis, by setting the jumper wire as a grid-like structure, even if some of the grid-like structures in the jumper wire break, the other connected grid-like structures can still maintain the conduction of the circuit, thus solving the problem of poor connection between the first conductive layer and the second conductive layer resulting in poor display of the display panel.

[0081] In summary, although the present utility model is disclosed above with preferred embodiments, the above preferred embodiments are not intended to limit the present utility model. Those of ordinary skill in the art can make various changes and modifications without departing from the spirit and scope of the present utility model. Therefore, the protection scope of the present utility model is based on the scope defined by the claims.

Claims

1. A display panel, characterized in that: The display panel includes a display area and a non-display area adjacent to the display area, and the display panel further includes: substrate substrate; A first conductive layer is disposed on the base substrate, and the first conductive layer is located in the non-display area; A first insulating layer, disposed on the base substrate and the first conductive layer; A second conductive layer is disposed on the first insulating layer, and the second conductive layer is located in the non-display area; a second insulating layer, disposed on the first insulating layer and the second conductive layer, wherein the second insulating layer is provided with a first opening and a second opening, wherein the first opening penetrates the second insulating layer and the first insulating layer, and the second opening penetrates the second insulating layer; and A bonding wire is disposed on the second insulating layer, the bonding wire passes through the first opening and is connected to the first conductive layer, the bonding wire passes through the second opening and is connected to the second conductive layer, and the bonding wire is a grid structure; Among them, the first insulating layer includes a first insulating part and a second insulating part, the first insulating part is arranged on the first conductive layer, and the second insulating part does not overlap with the first conductive layer in a top view, and the surface of the second insulating part facing away from the base substrate is closer to the base substrate than the surface of the first insulating part facing away from the base substrate, and the second conductive layer is arranged on the second insulating part, and the second conductive layer does not overlap with the first conductive layer in a top view.

2. The display panel according to claim 1, wherein: In a top view, the first conductive layer at least partially surrounds the second conductive layer, and a plurality of the first openings are provided on the second insulating layer. In a top view, the plurality of the first openings are spaced apart and distributed around the second conductive layer, and the lap wire passes through the plurality of the first openings and is connected to the first conductive layer.

3. The display panel according to claim 2, wherein: The second insulating layer is provided with a plurality of the second openings. In a top view, the first conductive layer at least partially surrounds the plurality of the second openings. The bonding wire passes through the plurality of the second openings and is connected to the second conductive layer.

4. The display panel according to claim 1, wherein: The minimum distance between the surface of the second conductive layer facing away from the substrate and the substrate is a first distance, the minimum distance between the surface of the first insulating portion facing away from the substrate and the substrate is a second distance, and the absolute value of the difference between the first distance and the second distance is less than the thickness of the second conductive layer.

5. The display panel according to claim 4, wherein: An absolute value of a difference between the first distance and the second distance is less than or equal to 0.13 micrometers.

6. The display panel according to claim 4, wherein: A surface of the second conductive layer facing away from the base substrate is flush with a surface of the first insulating portion facing away from the base substrate.

7. The display panel according to claim 1, wherein: The non-display area includes a gate driving circuit area disposed on at least one side of the display area, and the first opening and the second opening are disposed in the gate driving circuit area.

8. The display panel according to claim 7, wherein: The display panel further comprises a floating electrode, wherein the floating electrode is disposed on the second insulating layer; The jumper wire is arranged in the gate driving circuit area, the floating electrode is arranged in the non-display area, the floating electrode is a grid structure, and the floating electrode is insulated from the jumper wire.

9. The display panel according to claim 8, wherein: The display panel further includes a pixel electrode. The bonding wire is disposed in the same layer as the floating electrode and the pixel electrode, and the bonding wire, the floating electrode and the pixel electrode are all made of transparent conductive materials.

10. The display panel according to claim 1, wherein: The display panel further includes a gate metal layer and a source-drain electrode metal layer. The first conductive layer is disposed in the same layer as the gate metal layer, and the second conductive layer is disposed in the same layer as the source-drain electrode metal layer.

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