Semiconductor device and laminated structure
By designing a first conductive protrusion including a conductive part and a protective part in the semiconductor device, the problem of unreliable electrical connection when the semiconductor package is large in size and severe warping is solved, and a reliable electrical connection in this case is achieved.
Patent Information
- Application Number
- CN202421705938.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-07-18
- Publication Date
- 2025-05-30
- Estimated Expiration
- 2034-07-18
AI Technical Summary
The existing stacked packages cannot guarantee the reliability of electrical connections between semiconductor packages when the semiconductor packages are large in size and severely warped.
A semiconductor device is designed, including a substrate, a chip, a first conductive protrusion and a second conductive protrusion. The first conductive protrusion includes a conductive portion and a protective portion, and the side of the conductive portion facing away from the substrate is exposed from the protective portion for connection with the second conductive protrusion of the other semiconductor device. When the semiconductor device is warped largely, the reliability of the electrical connection is ensured by the consistency of the plurality of first conductive protrusions.
When the semiconductor device is warped too much, the reliability of electrical connections between the semiconductor devices is ensured, and the stability of the stacked structure and the firmness of the connection are improved.
Smart Images
Figure CN222927494U_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of semiconductor packaging technology, and more particularly, to a semiconductor device and a stacked structure. Background Art
[0002] With the rapid development of semiconductor integrated circuits, the functional requirements of integrated circuits are increasing, and the need to improve integration by multi-chip interconnection is becoming more and more prominent. Stacked packaging has developed rapidly because it can improve packaging density, reduce the interconnection length between chips, and achieve functional diversification through the combination of multiple chips.
[0003] In order to complete the interconnection of the upper and lower semiconductor packages in the vertical direction, the existing stacked packaging generally routes wires inside the semiconductor package and then uses solder balls to connect the wiring layers of the upper and lower semiconductor packages. This method can achieve a good interconnection effect when the size of the semiconductor package is small. However, when the size of the semiconductor package is large and the warping phenomenon is serious, the reliability of the electrical connection between the semiconductor packages cannot be guaranteed. Utility Model Content
[0004] The purpose of this application is to provide a semiconductor device and a stacked structure that can ensure the reliability of the electrical connection between semiconductor devices when the warping of the semiconductor device is large, aiming at the deficiencies in the above-mentioned existing technologies.
[0005] To achieve the above purpose, the technical solutions adopted in the embodiments of this application are as follows:
[0006] On the one hand, an embodiment of this application provides a semiconductor device, including: a substrate, a chip and a first conductive bump disposed on the first surface of the substrate, and a second conductive bump disposed on the second surface of the substrate, the second surface being opposite to the first surface, the first conductive bump including a conductive portion and a protective portion wrapped around the outer surface of the conductive portion, the exposed portion of the conductive portion facing away from the substrate being used to connect to the second conductive bump of another semiconductor device.
[0007] Optionally, the material of the conductive portion is tin, and the material of the protective portion is copper.
[0008] Optionally, the conductive portion is spherical, and the protective portion is spherical with a hollow interior.
[0009] Optionally, it further includes a plastic encapsulation layer disposed on the first surface of the substrate, the plastic encapsulation layer wrapping the chip and the protective portion, and the conductive portion being exposed from the plastic encapsulation layer.
[0010] Optionally, the number of the first conductive bumps and the second conductive bumps is multiple, and their positions correspond one by one.
[0011] Optionally, the multiple first conductive bumps are arranged around the chip.
[0012] Optionally, the second conductive protrusion is cylindrical, one end face of the second conductive protrusion is connected to the second surface, and the other end face is used for connecting to the conductive part of another semiconductor device.
[0013] Optionally, the side of the chip facing away from the first surface is exposed from the encapsulation layer.
[0014] In another aspect of the embodiments of the present application, a stacked structure is provided, including at least two semiconductor devices as described in any one of the above, and the conductive part of one semiconductor device is connected to the second conductive protrusion of an adjacent another semiconductor device.
[0015] Optionally, the second conductive protrusion of the lowermost semiconductor device is spherical, and the second conductive protrusions of the remaining semiconductor devices are cylindrical.
[0016] The beneficial effects of the present application include:
[0017] The present application provides a semiconductor device, including: a substrate, a chip and a first conductive protrusion disposed on the first surface of the substrate, and a second conductive protrusion disposed on the second surface of the substrate, the second surface being opposite to the first surface, the first conductive protrusion including a conductive part and a protection part wrapped around the outer surface of the conductive part, the side of the conductive part facing away from the substrate being exposed from the protection part, and the exposed part of the conductive part being used for connecting to the second conductive protrusion of another semiconductor device. The first conductive protrusion in this semiconductor device adopts a structure in which the protection part wraps the conductive part. When the semiconductor device has a large warpage and the number of the first conductive protrusions is multiple, the multiple first conductive protrusions have good consistency in the height direction, which can ensure the reliability of the electrical connection between semiconductor devices. Description of the Drawings
[0018] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required to be used in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of the present application, and therefore should not be regarded as limiting the scope. For those of ordinary skill in the art, other related drawings can be obtained based on these drawings without creative efforts.
[0019] Figure 1 It is a schematic structural diagram of the semiconductor device provided by the embodiment of the present application;
[0020] Figure 2 It is a schematic structural diagram of the stacked structure provided by the embodiment of the present application;
[0021] Figure 3 It is one of the schematic diagrams of the manufacturing process of the semiconductor device provided by the embodiment of the present application;
[0022] Figure 4This is the second schematic diagram of the manufacturing process of the semiconductor device provided by the embodiments of the present application.
[0023] Icons: 100 - semiconductor device; 110 - substrate; 111 - first surface; 112 - second surface; 120 - chip; 130 - first conductive bump; 131 - conductive portion; 132 - protective portion; 140 - second conductive bump; 150 - encapsulation layer; 200 - stacked structure. Detailed implementation manners
[0024] To make the objectives, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present application. Apparently, the described embodiments are some but not all of the embodiments of the present application. Components of the embodiments of the present application generally described and illustrated in the drawings herein may be arranged and designed in a variety of different configurations.
[0025] Therefore, the following detailed description of the embodiments of the present application provided in the drawings is not intended to limit the scope of the present application claimed, but merely represents selected embodiments of the present application. It should be noted that, without conflict, the various features in the embodiments of the present application may be combined with each other, and the combined embodiments are still within the protection scope of the present application.
[0026] It should be noted that like reference numerals and letters denote like items in the following drawings. Therefore, once an item is defined in one drawing, it does not need to be further defined and explained in subsequent drawings.
[0027] In the description of the present application, it should be noted that the orientation or positional relationship indicated by the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc. is based on the orientation or positional relationship shown in the drawings, or the orientation or positional relationship in which the product of this application is usually placed during use. It is only for the convenience of describing the present application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and thus should not be construed as a limitation to the present application. In addition, the terms "first", "second", "third", etc. are only used for descriptive distinction and cannot be construed as indicating or implying relative importance.
[0028] In the description of the present application, it should also be noted that, unless otherwise clearly specified and defined, the terms "arranged", "installed", "connected", and "coupled" should be understood in a broad sense. For example, it may be a fixed connection, a detachable connection, or an integral connection; it may be a mechanical connection or an electrical connection; it may be directly connected or indirectly connected through an intermediate medium, and it may be the communication inside two components. For those of ordinary skill in the art, the specific meanings of the above terms in the present application can be understood according to specific circumstances.
[0029] In one aspect of the embodiments of the present application, please refer to Figure 1 , a semiconductor device 100 is provided, including: a substrate 110, a chip 120 and a first conductive bump 130 arranged on a first surface 111 of the substrate 110, and a second conductive bump 140 arranged on a second surface 112 of the substrate 110. The second surface 112 is opposite to the first surface 111. The first conductive bump 130 includes a conductive portion 131 and a protection portion 132 wrapped around an outer surface of the conductive portion 131. A side of the conductive portion 131 facing away from the substrate 110 is exposed from the protection portion 132, and the exposed portion of the conductive portion 131 is used to connect to the second conductive bump 140 of another semiconductor device 100.
[0030] The substrate 110 is in a plate shape. Preferably, a cross-section of the substrate 110 is rectangular. The substrate 110 has opposite first and second surfaces 111 and 112. Preferably, the first surface 111 is parallel to the second surface 112. The first surface 111 is used to arrange the chip 120 and the first conductive bump 130, and the second surface 112 is used to arrange the second conductive bump 140. Generally speaking, the substrate 110 is a circuit board, and the chip 120, the first conductive bump 130, and the second conductive bump 140 are electrically connected through the substrate 110.
[0031] The first conductive bump 130 includes a conductive portion 131 and a protection portion 132. The conductive portion 131 is located inside the protection portion 132. The conductive portion 131 is used to connect to the second conductive bump 140 of another semiconductor device 100, so as to realize the connection between the two semiconductor devices 100. The protection portion 132 is wrapped around the outer surface of the conductive portion 131 to protect the conductive portion 131. There is a notch on the protection portion 132, and this notch exposes the conductive portion 131 inside the protection portion 132, so as to connect to the second conductive bump 140. Please refer to Figure 2, to facilitate the connection between the conductive part 131 and the second conductive protrusion 140, the notch is preferably located on the side of the protection part 132 away from the substrate 110. In this way, after the conductive part 131 is connected to the second conductive protrusion 140 of another semiconductor device 100, the other semiconductor device 100 is just located on the side where the first surface 111 of the semiconductor device 100 where the conductive part 131 is located, thereby realizing the stacked connection of the two semiconductor devices 100.
[0032] In the above semiconductor device 100, its first conductive protrusion 130 adopts a structure in which the protection part 132 wraps the conductive part 131. When the semiconductor device 100 has a large warpage and the number of the first conductive protrusions 130 is multiple, the multiple first conductive protrusions 130 have good consistency in the height direction, which can ensure the reliability of the electrical connection between the semiconductor devices 100.
[0033] It can be understood that the materials of the conductive part 131 and the protection part 132 are different, but both can conduct electricity. Generally speaking, the connection between the conductive part 131 and the second conductive protrusion 140 is realized by welding. Therefore, the material of the conductive part 131 is preferably a metal material with excellent welding performance and good compatibility. The function of the protection part 132 is to protect the conductive part 131. Therefore, the material of the protection part 132 is preferably a metal material with higher hardness.
[0034] Optionally, the material of the conductive part 131 is tin, and the material of the protection part 132 is copper.
[0035] The melting point of tin is relatively low, and it has good fluidity after heating. It can fully contact the second conductive protrusion 140 during the welding process, thereby ensuring the firmness, fullness and beauty of the welding. In addition, tin has good compatibility. After being welded to the second conductive protrusion 140, it can not only ensure the firmness of the welding, but also has good electrical and heat conduction performance. Therefore, choosing tin as the material of the conductive part 131 can achieve better welding effects.
[0036] Copper has a higher hardness and covers the outside of tin, which can effectively improve the mechanical strength of the entire first conductive protrusion 130. And copper has high thermodynamic stability and is not easy to oxidize, which can provide good protection for the internal tin.
[0037] Optionally, the conductive part 131 is spherical, the protection part 132 is a spherical shape with a hollow interior, and the hollow area of the protection part 132 accommodates the spherical conductive part 131.
[0038] It should be noted that since the conductive part 131 needs to be exposed from the protection part 132, the conductive part 131 may not be a complete sphere, and the protection part 132 may not be a complete hollow sphere either.
[0039] Optionally, the number of the first conductive bumps 130 and the second conductive bumps 140 is plural, and their positions correspond to each other one by one.
[0040] When two semiconductor devices 100 are connected, all the second conductive bumps 140 on one semiconductor device 100 can be connected to all the first conductive bumps 130 on the other semiconductor device 100 in a one-to-one correspondence, so that the obtained stacked structure 200 is more stable.
[0041] Optionally, the plurality of first conductive bumps 130 are arranged around the chip 120, so as to form a plurality of stable electrical connection paths around the chip 120.
[0042] Optionally, the second conductive bump 140 is cylindrical. One end face of the second conductive bump 140 is connected to the second surface 112, and the other end face is used for connecting to the conductive part 131 of another semiconductor device 100.
[0043] The cylindrical second conductive bump 140 is more convenient for connecting with the conductive part 131 of another semiconductor device 100.
[0044] Optionally, the semiconductor device 100 further includes a plastic encapsulation layer 150 disposed on the first surface 111 of the substrate 110. The plastic encapsulation layer 150 wraps the chip 120 and the protection part 132, and the conductive part 131 is exposed from the plastic encapsulation layer 150.
[0045] After the chip 120 and the first conductive bumps 130 are fixed on the substrate 110, the chip 120 and the first conductive bumps 130 can be plastic encapsulated. The obtained plastic encapsulation layer 150 fits on the first surface 111 of the substrate 110 and wraps the protection part 132 of the chip 120 and the first conductive bumps 130, thereby improving the stability of the semiconductor device 100. The plastic encapsulation operation is a prior art and will not be elaborated in this embodiment.
[0046] Optionally, one side of the chip 120 facing away from the first surface 111 is exposed from the plastic encapsulation layer 150.
[0047] Please refer to Figure 3 、 Figure 4 and Figure 1 , after plastic encapsulation, a thinning operation can be performed on the side of the plastic encapsulation layer 150 facing away from the first surface 111 to remove part of the plastic encapsulation layer 150, the chip 120 and the first conductive bumps 130, so that the conductive part 131 of the first conductive bumps 130 and the chip 120 are exposed from the plastic encapsulation layer 150.
[0048] This embodiment also provides a stacked structure 200. Please refer to Figure 2The stacked structure 200 includes at least two semiconductor devices 100 as described above, and the conductive portion 131 of one semiconductor device 100 is connected to the second conductive protrusion 140 of another adjacent semiconductor device 100 .
[0049] The stacked structure 200 has the same structure and benefits as the semiconductor device 100 in the aforementioned embodiment. The structure and benefits of the semiconductor device 100 have been described in detail in the aforementioned embodiment and will not be repeated here.
[0050] Optionally, the second conductive protrusions 140 of the bottom semiconductor device 100 are spherical, and the second conductive protrusions 140 of the remaining semiconductor devices 100 are cylindrical.
[0051] The spherical second conductive protrusion 140 is used for connecting with an external device, and the cylindrical second conductive protrusion 140 is used for connecting between two semiconductor devices 100 .
[0052] This embodiment also provides a method for processing the laminated structure 200. Please refer to Figure 3 , Figure 4 , Figure 1 and Figure 2 , the chip 120 and the first conductive protrusion 130 are arranged on the first surface 111 of the substrate 110; the chip 120 and the first conductive protrusion 130 are plastic-sealed to obtain a plastic-sealing layer 150, which is adhered and fixed to the surface of the substrate 110 and wraps the chip 120 and the first conductive protrusion 130; the plastic-sealing layer 150 is thinned on the side of the plastic-sealing layer 150 away from the substrate 110 to remove part of the plastic-sealing layer 150, the chip 120 and the first conductive protrusion 130, and expose the conductive part 131 inside the first conductive protrusion 130 to the plastic-sealing layer 150; the second conductive protrusion 140 is arranged on the second surface 112 of the substrate 110; the first conductive protrusion 130 of one semiconductor device 100 is connected to the second conductive protrusion 140 of another semiconductor device 100 to obtain a stacked structure 200.
[0053] The above description is only the preferred embodiment of the present application and is not intended to limit the present application. For those skilled in the art, the present application may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included in the protection scope of the present application.
Claims
1. A semiconductor device, characterized in that: include: A substrate, a chip and a first conductive protrusion arranged on a first surface of the substrate, and a second conductive protrusion arranged on a second surface of the substrate, wherein the second surface is opposite to the first surface, the first conductive protrusion comprises a conductive part and a protective part wrapped around the outer surface of the conductive part, the conductive part is exposed to the protective part on a side away from the substrate, and the exposed portion of the conductive part is used to connect to the second conductive protrusion of another semiconductor device.
2. The semiconductor device according to claim 1, wherein The conductive part is made of tin, and the protective part is made of copper.
3. The semiconductor device according to claim 1, wherein The conductive part is spherical, and the protective part is spherical with a hollow interior.
4. The semiconductor device according to claim 1, wherein It also includes a plastic encapsulation layer disposed on the first surface of the substrate, the plastic encapsulation layer wraps the chip and the protection part, and the conductive part is exposed from the plastic encapsulation layer.
5. The semiconductor device according to claim 1, wherein: The number of the first conductive protrusions and the number of the second conductive protrusions are both plural, and the positions thereof correspond one to one.
6. The semiconductor device according to claim 5, characterized in that A plurality of the first conductive protrusions are arranged around the chip.
7. The semiconductor device according to claim 1, wherein: The second conductive protrusion is cylindrical, one end surface of the second conductive protrusion is connected to the second surface, and the other end surface is used to connect to the conductive part of another semiconductor device.
8. The semiconductor device according to claim 4, wherein: A side of the chip facing away from the first surface is exposed from the plastic packaging layer.
9. A laminated structure, characterized in that: The method comprises at least two semiconductor devices according to any one of claims 1 to 8, wherein the conductive portion of one semiconductor device is connected to the second conductive protrusion of another adjacent semiconductor device.
10. The laminate structure according to claim 9, characterized in that The second conductive protrusions of the semiconductor device at the bottom layer are spherical, and the second conductive protrusions of the remaining semiconductor devices are cylindrical.