Gallium nitride half-bridge surface-mounted packaging structure

Abstract

The utility model relates to a gallium nitride half-bridge surface-mounted packaging structure, which comprises an upper bridge chip, a lower bridge chip, an output electrode, an input positive electrode, an input negative electrode, an upper bridge grid control electrode, a lower bridge grid control electrode and a substrate, the upper portion of the lower bridge chip is connected with the output electrode, the lower bridge grid control electrode and the input negative electrode through lower bridge tin beads. The lower portion of the upper bridge chip is connected with the output electrode, the upper bridge grid control electrode and the input positive electrode through upper bridge tin beads. The chip is arranged in an up-and-down structure, and the input positive electrode and the input negative electrode are arranged in a laminated structure, so that the whole packaging structure is more compact, stray inductance and distributed resistance are smaller, and the electrical performance stability and the packaging stability are high.

Description

Technical Field

[0001] The utility model belongs to the technical field of surface-mounted power device packaging, and particularly relates to a gallium nitride half-bridge surface-mount packaging structure. Background Art

[0002] The existing surface-mounted power device packaging technology usually adopts a planar packaging structure. No matter how many chips are inside the package, all chips are on the same plane, and then the potential is led out by bonding wires. This leads to a large overall area when packaging a circuit that requires multiple chips, and it has no advantage for multi-chip packaging of half-bridge or full-bridge circuits. In order to improve the surface-mounted power device packaging technology, some related literatures have disclosed improved technical solutions for the surface-mounted power device packaging technology.

[0003] For example, the patent with the publication number CN111211103A discloses a gallium nitride device, a gallium nitride packaging structure and method. A first lead frame is attached to the lower end of the gallium nitride chip, a metal plate is attached to the lower end of the first lead frame, a second lead frame attached to the upper side of the metal plate is arranged on the right side of the first printed lead frame, and a silicon chip is attached to the upper end of the second lead frame; a plurality of protrusions are integrally connected to the upper ends of the gallium nitride chip and the silicon chip, and the protrusions are respectively connected to the respective electrodes of the gallium nitride chip and the silicon chip. Insulating protective layers are attached to the upper surfaces of the gallium nitride chip and the silicon chip. In the present invention, the gallium nitride chip and the silicon chip use the convex metal protrusions as electrodes for external electrical connection, without the need to additionally provide pins, reducing the packaging volume and facilitating installation.

[0004] However, the above-mentioned existing gallium nitride packaging structure still has the following problems:

[0005] (1) The packaging structure is still on the same plane, the structure is scattered, and it cannot well meet the packaging requirements of high-integration compact products;

[0006] (2) The internal electrode connection distance is long, the stray inductance and distributed resistance are large, resulting in low overall electrical performance stability. Content of the Utility Model

[0007] Aiming at the problems existing in the prior art, the utility model provides a gallium nitride half-bridge surface-mount packaging structure and process.

[0008] The present utility model is realized as follows. A gallium nitride half-bridge surface mount package structure includes an upper bridge chip, a lower bridge chip, an output electrode, an input positive electrode, an input negative electrode, an upper bridge gate control electrode, a lower bridge gate control electrode, and a substrate. The lower bridge chip is fixedly connected to the substrate below. Above the lower bridge chip, it is respectively connected to the output electrode, the lower bridge gate control electrode, and the input negative electrode through lower bridge solder balls. Below the upper bridge chip, it is respectively connected to the electrode output electrode, the upper bridge gate control electrode, and the input positive electrode through upper bridge solder balls.

[0009] Further, the upper bridge chip and the lower bridge chip are placed in alignment. The gate of the upper bridge chip is aligned with the gate of the lower bridge chip. The drain D of the upper bridge chip is aligned with the source S of the lower bridge chip. The S pole of the upper bridge chip and the D pole of the lower bridge chip are connected through an electrode and lead out a leg from the left side.

[0010] Further, the output electrode, the input positive electrode, the input negative electrode, the upper bridge gate control electrode, and the lower bridge gate control electrode all have leg structures to lead the electrodes to the same plane as the substrate.

[0011] Further, an insulating plate is arranged at the middle position between the input negative electrode and the input positive electrode for electrical isolation between the input positive and negative electrodes.

[0012] Further, the input negative electrode and the input positive electrode are of a laminated structure and are laminated in alignment to reduce some stray inductance.

[0013] Further, the output electrode includes two electrodes, OUT and S1. The input negative electrode includes two electrodes, DC- and S2. The four electrodes, S1, S2, G1, and G2, are led out from the same side.

[0014] Further, the substrate is made of an alloy material.

[0015] Further, the lower bridge chip is fixedly connected to the substrate below by means of solder sintering.

[0016] Further, the whole package structure is wrapped with a plastic encapsulation material, and only the legs for electrical connection are exposed.

[0017] In summary, the beneficial effects of the present utility model are as follows:

[0018] (1) By placing the lower bridge chip on the substrate at the bottommost side, connecting the lower bridge chip to the electrodes through lower bridge solder balls, and then connecting to the inverted upper bridge chip through upper bridge solder balls on the electrodes, the present utility model changes the planar connection mode of the conventional package structure, and the whole presents a more compact new up-and-down structure mode, which can meet the packaging requirements of high-integration compact products and has a wider application range.

[0019] (2) The positive and negative input electrodes of the present utility model are in a laminated structure, which makes full use of the space structure. The electrode structures of each part are relatively simple, and the distance between the electrodes is very short, resulting in small stray inductance, distributed resistance, and parasitic inductance of the present packaging structure. It is applicable to various packaging scenarios and can be used for the packaging of multiple chips required in half-bridge or full-bridge circuits.

[0020] (3) The output electrodes of the present utility model include two electrodes, OUT and S1; the negative input electrode includes two electrodes, DC- and S2; the four electrodes S1, S2, G1, and G2 are led out from the same side; the lead-out pins are distributed in three directions, one direction for input, one direction for output, and one direction for signal control. This distribution separates the signal electrodes from the power electrodes, which is beneficial to the packaging structure with separation of strong and weak electricity, reduces interference, and enhances the stability of electrical performance. Description of the Drawings

[0021] In order to more clearly illustrate the technical solutions of the embodiments of the present utility model, the drawings required for the description of the embodiments will be briefly introduced below.

[0022] Figure 1 It is a schematic diagram of the overall internal structure of the present utility model;

[0023] Figure 2 It is a circuit schematic diagram of the present utility model;

[0024] Figure 3 It is a chip layout of the present utility model;

[0025] Figure 4 It is a schematic diagram of the overall external shape after plastic packaging of the present utility model.

[0026] Explanation of the reference numerals in the drawings: 1. Upper bridge chip; 2. Upper bridge solder ball; 3. Output electrode; 4. Upper bridge gate control electrode; 5. Lower bridge gate control electrode; 6. Lower bridge solder ball; 7. Lower bridge chip; 8. Substrate; 9. Positive input electrode; 10. Insulating plate; 11. Negative input electrode; 12. Plastic packaging material. Detailed Embodiments

[0027] Next, the technical solutions in the embodiments of the present utility model will be clearly and completely described in conjunction with the drawings in the embodiments of the present utility model. Obviously, the described embodiments are only a part of the embodiments of the present utility model, rather than all of the embodiments. Based on the embodiments of the present utility model, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present utility model.

[0028] Combined with Figures 1 to 4 The following shows a specific embodiment of a gallium nitride half-bridge surface-mount packaging structure and process provided by the present utility model, and the specific content is as follows:

[0029] The embodiment of the present utility model provides a gallium nitride half-bridge surface mount packaging structure, which includes: an upper bridge chip 1, upper bridge solder balls 2, output electrodes 3, upper bridge gate control electrodes 5, lower bridge gate control electrodes 5, lower bridge solder balls 6, lower bridge chips 7, a substrate 8, an input positive electrode 9, an insulating plate 10, an input negative electrode 11, and a plastic encapsulation material 12.

[0030] The lower bridge chip 7 of the packaging structure is fixedly connected to the substrate 8 below, and above the lower bridge chip 7, it is respectively connected to the output electrode 3, the lower bridge gate control electrode 5, and the input negative electrode 11 through the lower bridge solder balls 6. The lower part of the upper bridge chip 1 is respectively connected to the electrode output electrode 3, the upper bridge gate control electrode 4, and the input positive electrode 9 through the upper bridge solder balls 2. By this connection method, the existing planar packaging structure is improved into an up-and-down stacked packaging structure, presenting a more compact new structure as a whole, meeting the packaging requirements of high-integration compact products, and having a wider application range.

[0031] In this embodiment, the upper bridge chip 1 and the lower bridge chip 7 are placed in alignment. The gate of the upper bridge chip 1 is aligned with the gate of the lower bridge chip 7, the drain D of the upper bridge chip 1 is aligned with the source S of the lower bridge chip 7, the S pole of the upper bridge chip 1 and the D pole of the lower bridge chip 7 are connected through electrodes, and the lead legs are led out from the left side. By this alignment method, the connection distance between the electrodes in this part is shortened, the connection relationship is simpler and more direct, and the stray inductance and distributed resistance are extremely small.

[0032] In this embodiment, the output electrode 3, the input positive electrode 9, the input negative electrode 11, the upper bridge gate control electrode 4, and the lower bridge gate control electrode 5 all have lead leg structures, and the electrodes are led out to the same plane as the substrate 8. By leading the lead legs of the above electrodes to the same plane as the substrate 8, it is convenient for later PCB mounting, and the overall structure is neater, as Figure 1 or Figure 4 described, the lead leg structure is an S-shaped or Z-shaped curved shape.

[0033] In this embodiment, an insulating plate 10 is arranged at the middle position between the input negative electrode 11 and the input positive electrode 9 for electrical isolation between the input positive and negative, which can reduce part of the stray inductance.

[0034] In this embodiment, the input negative electrode 11 and the input positive electrode 9 are in a stacked structure and are stacked in alignment. Through this structure, the parasitic inductance and distributed resistance of the whole packaging structure can be very small, and at the same time, the mutual inductance effect of the stack can also reduce part of the stray inductance.

[0035] In this embodiment, the output electrode 3 includes two electrodes, OUT and S1, and the input negative electrode 11 includes two electrodes, DC- and S2. The four electrodes, S1, S2, G1, and G2, are led out from the same side. By this arrangement, the lead pins are distributed in three directions, one for input, one for output, and one for signal control. Separating the signal electrodes from the power electrodes is beneficial for separating the strong and weak electricity and is also beneficial for the later PCB layout.

[0036] In this embodiment, the substrate 8 is made of an alloy material, such as substrate materials like copper, aluminum, kovar alloy, etc. This alloy material has the properties of electrical conductivity and heat conduction, which facilitates sintering with the lower bridge chip and improves the overall electrical performance.

[0037] In this embodiment, the lower bridge chip 7 is fixedly connected to the substrate 8 by means of solder sintering. This can enhance the physical properties of the solder, improve the overall strength and durability to obtain a better fixing effect, and can also reduce the production cost and improve the production efficiency.

[0038] In this embodiment, the entire package structure is wrapped with a plastic encapsulation material 12, and only the legs for electrical connection are exposed to ensure the reliability of the package and its later use.

[0039] The encapsulation process of this embodiment includes the following steps:

[0040] The first step: Sinter the lower bridge chip 7 on the substrate 8 through solder.

[0041] The second step: Place lower bridge solder balls 6 on the lower bridge chip 7.

[0042] The third step: Fix the relative positions of the output electrode 3, the lower bridge gate control electrode 5, the input negative electrode 11 and the lower bridge chip 7 through a fixture.

[0043] The fourth step: Place upper bridge solder balls 2 on the upper bridge chip 1.

[0044] The fifth step: Fix the relative positions of the above-mentioned sintered components, the upper bridge chip 1, the electrode output electrode 3, the upper bridge gate control electrode 4, the input positive electrode 9 and the insulating plate 10 through a fixture.

[0045] The sixth step: Sinter the whole, and then test whether the electrical performance of the sintered components meets the requirements.

[0046] The seventh step: Finally, perform plastic encapsulation treatment. The entire package structure is wrapped with the plastic encapsulation material 12, and only all the legs are exposed.

[0047] The above are only the preferred embodiments of the present utility model, and do not thus limit the patent scope of the present utility model. Any equivalent structural transformation made under the concept of the present utility model by using the content of the specification and drawings of the present utility model, or any direct / indirect application in other related technical fields shall be included within the patent protection scope of the present utility model.

Claims

1. A gallium nitride half-bridge surface mount packaging structure, comprising an upper bridge chip (1), a lower bridge chip (7), an output electrode (3), an input positive electrode (9), an input negative electrode (11), an upper bridge gate control electrode (4), a lower bridge gate control electrode (5) and a substrate, wherein the lower side of the lower bridge chip (7) is fixedly connected to the substrate (8), characterized in that: The upper portion of the lower bridge chip (7) is connected to the output electrode (3), the lower bridge gate control electrode (5), and the input negative electrode (11) through the lower bridge solder bead (6), and the lower portion of the upper bridge chip (1) is connected to the electrode output electrode (3), the upper bridge gate control electrode (4), and the input positive electrode (9) through the upper bridge solder bead (2).

2. The gallium nitride half-bridge surface mount packaging structure according to claim 1, characterized in that: The upper bridge chip (1) and the lower bridge chip (7) are placed in an aligned position, the gate of the upper bridge chip (1) is aligned with the gate of the lower bridge chip (7), the drain D of the upper bridge chip (1) is aligned with the source S of the lower bridge chip (7), the S pole of the upper bridge chip (1) is connected with the D pole of the lower bridge chip (7) through an electrode, and a tube leg is led out from the left side.

3. The gallium nitride half-bridge surface mount packaging structure according to claim 1 or 2, characterized in that: The output electrode (3), the input positive electrode (9), the input negative electrode (11), the upper bridge gate control electrode (4) and the lower bridge gate control electrode (5) all have a tube leg structure, and the electrodes are led out to the same plane as the substrate (8).

4. The GaN half-bridge surface mount package structure according to claim 1, wherein: An insulating plate (10) is provided between the input negative electrode (11) and the input positive electrode (9) to electrically isolate the input positive and negative electrodes.

5. The GaN half-bridge surface mount package structure according to claim 1, wherein: The input negative electrode (11) and the input positive electrode (9) are in a stacked structure, and the stacks are aligned to reduce some stray inductance.

6. The GaN half-bridge surface mount package structure according to claim 1, characterized in that: The output electrode (3) includes two electrodes, OUT and S1, the input negative electrode (11) includes two electrodes, DC- and S2, and the four electrodes, S1, S2, G1 and G2, are led out from the same side.

7. The GaN half-bridge surface mount package structure according to claim 1, characterized in that: The substrate (8) is made of alloy material.

8. The gallium nitride half-bridge surface mount packaging structure according to claim 1 or 7, characterized in that: The lower bridge chip (7) is fixedly connected to the substrate (8) at the bottom by solder sintering.

9. The GaN half-bridge surface mount package structure according to claim 1, characterized in that: The entire packaging structure is wrapped with a plastic packaging material (12), with only the tube legs for electrical connection exposed.

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