Packaging body of chopping half-bridge power module

Abstract

The utility model provides a packaging body of a chopping half-bridge power module, and the packaging body comprises a plurality of power semiconductor chips which are disposed on a substrate, and the plurality of power semiconductor chips are in an axial symmetry relation relative to the symmetry axis of the upper surface of the substrate; the drain electrode power binding post is connected to the drain electrodes of the metal oxide semiconductor field effect transistor chips, and the drain electrode power binding post is arranged on the upper surface of the substrate and is in an axial symmetry relation relative to the symmetry axis of the upper surface of the substrate; the source electrode power binding posts are connected to power source electrodes of the metal oxide semiconductor field effect transistor chips, and the source electrode power binding posts are arranged on the upper surface of the substrate and are in an axial symmetry relation relative to the symmetry axis of the upper surface of the substrate; and the diode power binding post is connected to the cathodes of the plurality of diode chips, and the diode power binding post is arranged on the upper surface of the substrate and is in an axial symmetry relation relative to the symmetry axis of the upper surface of the substrate, so that the parasitic inductance of the main power commutation loop can be effectively reduced.

Description

Technical Field

[0001] The disclosed embodiments of the present application relate to the field of integrated chip packaging technology, and more specifically, to a package of a chopper half-bridge power module. Background Art

[0002] Power electronics technology is widely used in many fields such as aerospace, rail transit, electric vehicles, and power systems. The chopper half-bridge circuit is widely used in the industrial field because of its simple structure and strong scalability.

[0003] Compared with traditional silicon-based power semiconductor devices, wide bandgap power semiconductor devices have advantages such as higher breakdown voltage, higher switching speed, and higher operating temperature, which can significantly reduce the device losses of power electronic conversion devices and improve power density and efficiency. However, at high switching speeds, wide bandgap power semiconductor devices are more sensitive to parasitic parameters introduced by packaging. For example, the parasitic inductance of the main power commutation loop will cause overvoltage during the turn-off process of the device.

[0004] Therefore, how to reduce the parasitic inductance of the main power commutation loop has become an urgent problem to be solved. Summary of the Utility Model

[0005] According to an embodiment of the present application, the present application provides a package of a chopper half-bridge power module to reduce the parasitic inductance of the main power commutation loop.

[0006] According to one aspect of the present application, an exemplary package of a chopper half-bridge power module is disclosed, which includes a substrate, a plurality of power semiconductor chips, a drain power terminal, a source power terminal, and a diode power terminal. The plurality of power semiconductor chips are disposed on the substrate, and the plurality of power semiconductor chips are axisymmetric with respect to the axis of symmetry of the upper surface of the substrate; wherein, the plurality of power semiconductor chips include a plurality of metal oxide semiconductor field effect transistor chips and a plurality of diode chips; the drain power terminal is connected to the drains of the plurality of metal oxide semiconductor field effect transistor chips, and the drain power terminal is disposed on the upper surface of the substrate and is axisymmetric with respect to the axis of symmetry of the upper surface of the substrate; the source power terminal is connected to the power sources of the plurality of metal oxide semiconductor field effect transistor chips, and the source power terminal is disposed on the upper surface of the substrate and is axisymmetric with respect to the axis of symmetry of the upper surface of the substrate; the diode power terminal is connected to the cathodes of the plurality of diode chips, and the diode power terminal is disposed on the upper surface of the substrate and is axisymmetric with respect to the axis of symmetry of the upper surface of the substrate.

[0007] In the above solution, by arranging the power connection terminals of the power semiconductor chip axially symmetrically on the substrate, the parasitic inductance of the main power commutation circuit can be effectively reduced. Description of the Drawings

[0008] The present application will be further described below in conjunction with the drawings and embodiments. In the drawings:

[0009] Figure 1 is a top view structural schematic diagram of the components on the substrate of the package body of the chopper half-bridge power module in an embodiment of the present application;

[0010] Figure 2 is a three-dimensional structural schematic diagram of the components on the substrate of the package body of the chopper half-bridge power module in an embodiment of the present application;

[0011] Figure 3 is a structural schematic diagram of the connection terminal in an embodiment of the present application;

[0012] Figure 4 is a top view structural schematic diagram of the package body of the chopper half-bridge power module in an embodiment of the present application;

[0013] Figure 5 is a bottom view structural schematic diagram of the package body of the chopper half-bridge power module in an embodiment of the present application;

[0014] Figure 6 is a side view structural schematic diagram of the package body of the chopper half-bridge power module in an embodiment of the present application;

[0015] Figure 7 is a circuit topology diagram of the chopper half-bridge power module in an embodiment of the present application;

[0016] Figure 8 is a top view schematic diagram of the external structure of the package body of the chopper half-bridge power module in an embodiment of the present application;

[0017] Figure 9 is a three-dimensional structural schematic diagram of the external structure of the package body of the chopper half-bridge power module in an embodiment of the present application.

[0018] Description of the Reference Numerals:

[0019] 1: Upper conductor layer; 2: Intermediate ceramic layer; 3: Lower conductor layer; 5: Gate drive conductor sheet; 7: Auxiliary source conductor sheet; 8: AC conductor sheet; 9: Negative electrode conductor sheet; 10: Positive electrode conductor sheet; 11: Solder mask layer; 12: Opening; 13a to 16a: Gate drive bonding wires; 13b to 16b: Gate resistors; 13c to 16c: Auxiliary source bonding wires; 13d to 16d: Power source bonding wires; 20: Diode chip; 23: Gate drive terminal; 24: Auxiliary source drive terminal; 25: Drain power terminal; 26: Source power terminal; 27: Diode power terminal; 28: Copper base plate; 29: Housing; 30: Epoxy adhesive; 31: Buffer portion; 32: Base; 33: Combination screw washer; 34: Protrusion. Detailed implementation manners

[0020] To enable those skilled in the art to better understand the technical solutions of this application, the technical solutions of this application will be further described in detail below in conjunction with the accompanying drawings and specific implementation manners. Obviously, the described embodiments are only a part of the embodiments of this application, rather than all the embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments in this application without creative efforts shall fall within the scope of protection of this application.

[0021] The terms used in the embodiments of this application are only for the purpose of describing specific embodiments, and are not intended to limit this application. The singular forms "a", "the" and "said" used in the embodiments of this application and the appended claims are also intended to include the plural forms, unless clearly indicated otherwise in the above context. "Plural" generally includes at least two, but does not exclude the case of including at least one.

[0022] It should be understood that the term " / and / " used herein is only a description of the association relationship of associated objects, indicating that three relationships may exist. For example, A and / or B may represent: A exists alone, A and B exist simultaneously, and B exists alone. In addition, the character " / " in this article generally represents an "or" relationship between the associated objects before and after. The terms "first", "second", etc. in the description and claims of this application and the above drawings are used to distinguish similar objects, and do not have to be used to describe a specific order or sequence.

[0023] It should be understood that the terms "comprising", "including" or any other variation used herein are intended to cover non-exclusive inclusion, such that a process, method, article or apparatus comprising a series of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such process, method, article or apparatus. Without further limitation, an element defined by the statement "comprising..." does not exclude the presence of additional identical elements in the process, method, article or apparatus comprising said element.

[0024] The mention of "an embodiment" in this application means that a particular feature, structure, or characteristic described in connection with the embodiment can be included in at least one embodiment of the present application. The phrase does not necessarily refer to the same embodiment every time it appears in the specification, nor is it an independent or alternative embodiment mutually exclusive with other embodiments. Those skilled in the art will explicitly and implicitly understand that the embodiments described herein can be combined with other embodiments.

[0025] One aspect of the present application discloses an exemplary package of a chopper half-bridge power module. Please refer to Figures 1 to 2 , Figure 1 which is a top view structural schematic diagram of the components on the substrate of the package of the chopper half-bridge power module in an embodiment of the present application; Figure 2 which is a three-dimensional structural schematic diagram of the components on the substrate of the package of the chopper half-bridge power module in an embodiment of the present application. The package of the chopper half-bridge power module includes a substrate 100, a plurality of power semiconductor chips, a drain power terminal 25, a source power terminal 26, and a diode power terminal 27. The plurality of power semiconductor chips are disposed on the substrate 100, and the plurality of power semiconductor chips are axially symmetric with respect to the axis of symmetry of the upper surface of the substrate 100; wherein, the plurality of power semiconductor chips include a plurality of metal oxide semiconductor field effect transistor chips 110 and a plurality of diode chips 20; the drain power terminal 25 is connected to the drains of the plurality of metal oxide semiconductor field effect transistor chips 110, and the drain power terminal 25 is disposed on the upper surface of the substrate 100 and is axially symmetric with respect to the axis of symmetry of the upper surface of the substrate 100; the source power terminal 26 is connected to the power sources of the plurality of metal oxide semiconductor field effect transistor chips 110, and the source power terminal 26 is disposed on the upper surface of the substrate 100 and is axially symmetric with respect to the axis of symmetry of the upper surface of the substrate 100; the diode power terminal 27 is connected to the cathodes of the plurality of diode chips 20, and the diode power terminal 27 is disposed on the upper surface of the substrate 100 and is axially symmetric with respect to the axis of symmetry of the upper surface of the substrate 100.

[0026] In the above solution, by arranging the power connection terminals of the power semiconductor chip in an axisymmetric manner on the substrate 100, the parasitic inductance of the main power commutation loop can be effectively reduced.

[0027] In some embodiments, the number of metal-oxide-semiconductor field-effect transistor chips 110 can be 4, and the number of diode chips 20 can be 6; the metal-oxide-semiconductor field-effect transistor chips 110 are arranged near the upper side on the upper surface of the substrate 100, and the diode chips 20 are arranged near the lower side on the upper surface of the substrate 100. By arranging the diode chips 20 and the metal-oxide-semiconductor field-effect transistor chips 110 on the upper and lower sides of the substrate 100 respectively, it is beneficial to concentrate the wiring, thereby shortening the wiring length, saving space, and reducing the volume of the package.

[0028] In other embodiments, the number of metal-oxide-semiconductor field-effect transistor chips 110 and diode chips 20 provided on the substrate 100 can be other numbers, which can be specifically selected according to actual needs.

[0029] The substrate 100 can include a rectangular substrate 100, and the substrate 100 can also be configured in other shapes, such as being configured as a circle, a hexagon, etc. The shape of the substrate 100 can be selected according to actual needs. According to the different shapes of the substrate 100, the axis of symmetry of the upper surface of the substrate 100 can be different. For example, in Figure 1 the illustrated embodiment, the substrate 100 can be square. It can be understood that the square substrate 100 has 1 axis of symmetry in multiple directions, so several power semiconductor chips can be axisymmetric with respect to at least one axis of symmetry of the substrate 100. Similarly, its power connection terminals can also be axisymmetric with respect to at least one axis of symmetry of the substrate 100.

[0030] Please refer to Figures 4 - 6 ; Figure 4 is a top view structural schematic diagram of the package of the chopper half-bridge power module in an embodiment of the present application; Figure 5 is a bottom view structural schematic diagram of the package of the chopper half-bridge power module in an embodiment of the present application; Figure 6It is a schematic side view structure of the package body of the chopper half-bridge power module in an embodiment of the present application; in some embodiments, the package body of the chopper half-bridge power module further includes a positive conductor sheet 10, a negative conductor sheet 9, and an AC conductor sheet 8. The positive conductor sheet 10 is disposed on the upper surface of the substrate 100 and is axisymmetric with respect to the axis of symmetry of the upper surface of the substrate 100; a diode power terminal 27 is formed on the positive conductor sheet 10; the cathodes of a plurality of diode chips 20 are connected to the diode power terminal 27 through the positive conductor sheet 10; the negative conductor sheet 9 is disposed on the upper surface of the substrate 100 and is axisymmetric with respect to the axis of symmetry of the upper surface of the substrate 100; a source power terminal 26 is formed on the negative conductor sheet 9, and the power sources of a plurality of metal oxide semiconductor field effect transistor chips 110 are connected to the source power terminal 26 through the negative conductor sheet 9; the AC conductor sheet 8 is disposed on the upper surface of the substrate 100 and is axisymmetric with respect to the axis of symmetry of the upper surface of the substrate 100; a drain power terminal 25 is formed on the AC conductor sheet 8, and the drains of a plurality of metal oxide semiconductor field effect transistor chips 110 are connected to the drain power terminal 25 through the AC conductor sheet 8.

[0031] The positive conductor sheet 10, the negative conductor sheet 9, and the AC conductor sheet 8 may include copper conductor sheets, such as copper foils, and may also include conductor sheets of other materials.

[0032] The positive conductor sheet 10, the negative conductor sheet 9, and the AC conductor sheet 8 may also be configured in an axisymmetric shape, and the positive conductor sheet 10, the negative conductor sheet 9, and the AC conductor sheet 8 may also be axisymmetric with respect to at least one axis of symmetry of the substrate 100 on the upper surface of the substrate 100.

[0033] The positive conductor sheet 10, the negative conductor sheet 9, and the AC conductor sheet 8 may be welded to the upper surface of the substrate 100, or may be inserted into the insertion interfaces on the upper surface of the substrate 100 through insertion terminals. The specific connection method may be adjusted according to actual needs. The present application does not limit the connection relationship between the positive conductor sheet 10, the negative conductor sheet 9, and the AC conductor sheet 8 and the substrate 100.

[0034] In some embodiments, the package of the chopper half-bridge power module further includes a gate drive conductor sheet 5, a gate drive terminal 23, gate resistors 13b to 16b, an auxiliary source conductor sheet 7, and an auxiliary source drive terminal 24. The gate drive conductor sheet 5 can be disposed on the upper surface of the substrate 100 and is axially symmetric with respect to the axis of symmetry of the upper surface of the substrate 100; the gate drive terminal 23 can be formed on the gate drive conductor sheet 5; the gate resistors 13b to 16b can be connected to the gate drive conductor sheet 5; the gate of the metal oxide semiconductor field effect transistor chip 110 is connected to the gate drive terminal 23 through the gate resistors 13b to 16b and the gate drive conductor sheet 5; the auxiliary source conductor sheet 7 can be disposed on the upper surface of the substrate 100 and is axially symmetric with respect to the axis of symmetry of the upper surface of the substrate 100; the auxiliary source drive terminal 24 can be formed on the auxiliary source conductor sheet 7, and the auxiliary source of the metal oxide semiconductor field effect transistor chip 110 is connected to the auxiliary source drive terminal 24 through the auxiliary source conductor sheet 7.

[0035] The gate drive conductor sheet 5 and the auxiliary source conductor sheet 7 can adopt a similar structure with reference to the positive electrode conductor sheet 10, the negative electrode conductor sheet 9, and the AC conductor sheet 8, which will not be elaborated here.

[0036] Currently, most chopper circuits are integrated with multiple single devices, which will result in many pins (i.e., many terminals) and uneven current sharing. One SBD single device has 2 pins, and one MOSFET single device with Kelvin connection has 4 pins. According to 6 diodes and 4 MOSFETs, there are 28 pins. In the above solution, compared with the current chopper circuit, multiple semiconductor power chips share one pin. Therefore, in the above technical solution, only 12 connection terminals are required for 6 diode chips and 4 metal oxide semiconductor field effect transistor chips 110, greatly reducing the number of connection terminals.

[0037] In some embodiments, please refer to Figure 3 , Figure 3 , which is a schematic structural diagram of the terminal in an embodiment of the present application; the gate drive terminal 23 and the auxiliary source drive terminal 24 can adopt drive pin terminals. The drive pin terminals can have a buffer portion 31, and the buffer portion 31 has at least one S-shaped bending portion. One end of the buffer portion 31 is connected to the base 32 of the terminal. Therefore, under external stress, a certain buffering effect can be achieved through the buffer portion 31, strengthening the structural stability of the terminal.

[0038] Power terminals such as the drain power terminal 25, the source power terminal 26, and the diode power terminal 27 can use power terminals with a diameter larger than that of the driving pin terminals. Since the diameter of the power terminals is larger, the buffer portion 31 can be not provided on the power terminals.

[0039] In addition, various terminals can be subjected to anti-corrosion treatment, for example, by plating a metal film (such as gold plating, nickel plating, etc.) on the surface of the terminals.

[0040] In some embodiments, the drive circuit of the power semiconductor chip is connected in a Kelvin structure. Therefore, the negative feedback effect of the common-source parasitic inductance on the drive circuit can be reduced, and the switching speed is improved.

[0041] In some embodiments, the substrate 100 may include a copper-clad ceramic substrate 100. The substrate 100 may also include substrates 100 of other materials, such as silicon substrates 100, etc. When the substrate 100 uses a copper-clad ceramic substrate 100, the substrate 100 may include an upper conductor layer 1, an intermediate ceramic layer 2, and a lower conductor layer 3 stacked in sequence; a plurality of openings 12 are etched at the edges of the upper conductor layer 1 and the lower conductor layer 3. The upper conductor layer 1 and the lower conductor layer 3 may both be copper conductor layers.

[0042] The upper conductor layer 1 can be formed into a plurality of independent conductor layers by etching, and together with the power semiconductor chip, bonding wires, terminals, etc., form a circuit topology. The intermediate ceramic layer 2 can play an insulating and heat-conducting role. The lower conductor layer 3 can be connected to the radiator through a thermal interface material to play a heat-conducting role. In this embodiment, the conductor layer can be high-conductivity oxygen-free copper, that is, copper foil, and the surface of the copper foil can be subjected to electroplating treatment to prevent oxidation. The intermediate ceramic substrate 100 can be selected from ceramic materials such as alumina, aluminum nitride, alumina doped with zirconia, and silicon nitride. In this embodiment, in order to improve the heat dissipation performance, the ceramic substrate 100 can be selected as aluminum nitride ceramic with the highest thermal conductivity. Openings 12 can be etched at the corners of some copper foils of the upper conductor layer 1, and a circle of openings 12 is also etched at a certain distance from the edge of the lower copper foil. The etched openings 12 help to release the thermal stress at the edge of the copper foil and improve the reliability.

[0043] There is a certain distance between the outer edges of the upper and lower conductor layers and the edge of the intermediate ceramic layer 2. This distance is determined according to the withstand voltage requirements and processability of the module. In this embodiment, the outermost edge of the upper conductor layer 1 can be set to be 0.5 mm away from the edge of the intermediate ceramic layer 2, and the outermost edge of the lower conductor layer 3 can be set to be 0.5 mm away from the edge of the intermediate ceramic layer 2. The upper conductor layer 1 forms a circuit pattern through processing, playing a role in conducting electricity and transferring heat.

[0044] A solder mask layer 11 can be provided on the upper conductor layer 1 to prevent the solder from overflowing after melting.

[0045] Please refer to Figure 7 , Figure 7 which is the circuit topology diagram of the chopper half-bridge power module according to an embodiment of the present application; the chopper half-bridge power module is composed of upper and lower bridge arms. The upper bridge arm includes a diode chip 20, and the lower bridge arm includes a metal oxide semiconductor field effect transistor chip 110. The bonding wire material connecting the surface electrodes of the power semiconductor chips may include conductor materials such as copper, aluminum, and gold. In this embodiment, the bonding wire can be selected as aluminum bonding wire with low cost and the most applications. The drain and power source of the metal oxide semiconductor field effect transistor chip are respectively connected to the drain power terminal 25 and the source power terminal 26, the gate and the auxiliary source are respectively connected to the gate drive terminal 23 and the auxiliary source drive terminal 24, and the cathode of the diode is connected to the diode power terminal 27.

[0046] The drains of 4 metal oxide semiconductor field effect transistor chips 110 can be all welded on the AC conductor sheet 8, and then connected to the external circuit through the drain power terminal 25. The gates are respectively connected to the gate drive conductor sheet 5 through the gate drive bonding wires 13a to 16a and the gate resistors 13b to 16b, and then connected to the external circuit through the gate drive terminal 23. The auxiliary sources are respectively connected to the auxiliary source conductor sheet 7 through the auxiliary source bonding wires 13c to 16c, and then connected to the external circuit through the auxiliary source drive terminal 24. The power sources are connected to the negative conductor sheet 9 through the power source bonding wires 13d to 16d, and then connected to the external circuit through the source power terminal 26. The cathodes of 6 diode chips 20 are all welded on the positive conductor sheet 10, and then connected to the external circuit through the diode power terminal 27.

[0047] In order to improve the current-carrying capacity, the power bonding wire can be composed of multiple thick bonding wires in parallel. In this embodiment, the power bonding wire can be composed of 4 or 2 aluminum bonding wires with a diameter of 15 mils in parallel. In actual applications, as many bonding wires as possible can be selected according to the bondable area on the chip. In this embodiment, considering the small size of the chip gate, the gate drive bonding wire and the auxiliary source bonding wire can each be composed of 1 aluminum bonding wire with a diameter of 5 mils.

[0048] Please refer to Figures 8 - 9 , Figure 8 which is a top view schematic diagram of the external structure of the package of the chopper half-bridge power module according to an embodiment of the present application; Figure 9It is a schematic perspective view of the external structure of the package of the chopper half-bridge power module according to an embodiment of the present application. The package has a housing, the bottom of the housing 29 can be bonded to the copper base plate 28 and is fixed in position by the combination screw washer 33. There is epoxy glue 30 in the housing 29 to protect the internal components of the module from external contamination, and a protective protrusion 34 is left on the top of the housing 29.

[0049] Those skilled in the art will readily appreciate that many modifications and variations can be made to the apparatus and methods while maintaining the teachings of the present application. Accordingly, the foregoing disclosure should be considered to be limited only by the scope of the appended claims.

Claims

1. A package of a chopper half-bridge power module, characterized in that: include: substrate; A plurality of power semiconductor chips are disposed on the substrate, and the plurality of power semiconductor chips are in an axisymmetric relationship with respect to the symmetry axis of the upper surface of the substrate; wherein the plurality of power semiconductor chips include a plurality of metal oxide semiconductor field effect transistor chips and a plurality of diode chips; A drain power terminal connected to the drains of the plurality of metal oxide semiconductor field effect transistor chips, wherein the drain power terminal is disposed on the upper surface of the substrate and is axially symmetrical with respect to the symmetry axis of the upper surface of the substrate; A source power terminal connected to the power source of the plurality of metal oxide semiconductor field effect tube chips, wherein the source power terminal is disposed on the upper surface of the substrate and is axially symmetrical with respect to the symmetry axis of the upper surface of the substrate; The diode power terminal is connected to the cathodes of the plurality of diode chips. The diode power terminal is arranged on the upper surface of the substrate and is axially symmetrical with respect to the symmetry axis of the upper surface of the substrate.

2. The package of the chopper half-bridge power module according to claim 1, characterized in that: The number of the metal oxide semiconductor field effect tube chips is 4, and the number of the diode chips is 6; The metal oxide semiconductor field effect tube chip is arranged on the upper surface of the substrate close to the upper side, and the diode chip is arranged on the upper surface of the substrate close to the lower side.

3. The package of the chopper half-bridge power module according to claim 1 or 2, characterized in that: Also includes: A positive conductor sheet is arranged on the upper surface of the substrate, and the positive conductor sheet is axially symmetrical with respect to the symmetry axis of the upper surface of the substrate; the diode power terminal is formed on the positive conductor sheet; the cathodes of the plurality of diode chips are connected to the diode power terminal through the positive conductor sheet; A negative conductor sheet is disposed on the upper surface of the substrate, and the negative conductor sheet is axially symmetrical with respect to the symmetry axis of the upper surface of the substrate; the source power terminal is formed on the negative conductor sheet, and the power source electrodes of the plurality of metal oxide semiconductor field effect tube chips are connected to the source power terminal through the negative conductor sheet; An AC conductor sheet is arranged on the upper surface of the substrate, and the AC conductor sheet is axially symmetrical with respect to the symmetry axis of the upper surface of the substrate; the drain power terminal is formed on the AC conductor sheet, and the drains of the plurality of metal oxide semiconductor field effect tube chips are connected to the drain power terminal through the AC conductor sheet.

4. The package of the chopper half-bridge power module according to claim 1 or 2, characterized in that: Also includes: A gate drive conductor sheet is disposed on the upper surface of the substrate, and the gate drive conductor sheet is axially symmetrical with respect to the symmetry axis of the upper surface of the substrate; A gate drive terminal, formed on the gate drive conductor sheet; A gate resistor is connected to the gate drive conductor sheet; the gate of the metal oxide semiconductor field effect transistor chip is connected to the gate drive terminal through the gate resistor and the gate drive conductor sheet; An auxiliary source conductor sheet is disposed on the upper surface of the substrate, and the auxiliary source conductor sheet is axially symmetrical with respect to the symmetry axis of the upper surface of the substrate; The auxiliary source driving terminal is formed on the auxiliary source conductor sheet, and the auxiliary source of the metal oxide semiconductor field effect transistor chip is connected to the auxiliary source driving terminal through the auxiliary source conductor sheet.

5. The package of the chopper half-bridge power module according to claim 4, characterized in that: The gate driving terminal and the auxiliary source driving terminal have a buffer portion, the buffer portion has at least one S-shaped bending portion, and one end of the buffer portion is connected to the base of the terminal.

6. The package of the chopper half-bridge power module according to claim 1 or 2, characterized in that: The driving circuit of the power semiconductor chip is connected by a Kelvin structure.

7. The package of the chopper half-bridge power module according to claim 1 or 2, characterized in that: The substrate comprises: an upper conductor layer, a middle ceramic layer and a lower conductor layer stacked in sequence; a plurality of openings are etched on the edges of the upper conductor layer and the lower conductor layer.

8. The package of the chopper half-bridge power module according to claim 7, characterized in that: The plurality of openings of the upper conductor layer are distributed at the corners of the upper conductor layer; and the plurality of openings of the lower conductor layer are evenly distributed along the sides of the lower conductor layer.

9. The package of the chopper half-bridge power module according to claim 7, characterized in that: The upper conductor layer and the lower conductor layer are both copper conductor layers.

10. The package of the chopper half-bridge power module according to claim 7, characterized in that: The upper conductor layer is provided with a solder resist layer.

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