Force value servo controller based on high-frequency pulse and high-speed sampling

Abstract

The utility model discloses a force value servo controller based on high-frequency pulse and high-speed sampling, which comprises a pulse signal generating circuit, an integrated voltage amplification module and a sampling circuit, and is characterized in that the pulse signal generating circuit comprises a direct current power supply, a first DC-DC power supply chip and a logic output optocoupler; the integrated voltage amplification module comprises a DC power supply, a three-terminal regulator, an FET input operational amplifier chip, a precision operational amplifier chip, a second DC-DC power supply chip and a voltage reference chip. According to the utility model, the pulse signal generation circuit, the integrated voltage amplification module and the sampling circuit are arranged, so that the device has the characteristics of high frequency and high sampling rate in force value control, and a PLC can be utilized to control the cylinder to carry out force value test. The utility model can be widely applied to the field of PLC application.

Description

Technical Field

[0001] The utility model relates to the field of PLC applications, in particular to a force value servo controller based on high-frequency pulses and high-speed sampling. Background Technique

[0002] PLC (Programmable Logic Controller) is widely used in industrial automation tests. However, when doing force value automation tests, the application of using PLC to control cylinders for force value tests is more common, while the application of using PLC to control electric cylinders for force value tests is less common.

[0003] The advantages of using an electric cylinder for force value control are as follows: 1. The electric cylinder can use a servo motor as the power source, with controllable speed, and the displacement can be calculated according to the number of pulses; 2. High dynamic response, because the electric cylinder belongs to rigid control; 3. It can perform force value tests in tons, because the servo motor can be connected to a reduction gearbox and then transmit the power to the electric cylinder; 4. The electric cylinder usually has higher energy efficiency than the cylinder, because the action is directly achieved by converting electrical energy into mechanical energy; 5. The motor runs with low noise. However, due to the rigid control of the electric cylinder, a very small feed amount will generate a large force value, which is the biggest reason restricting the use of the electric cylinder for force value control.

[0004] High dynamic response requires more precise control and higher-speed force value feedback. Otherwise, the high dynamic response will become a disadvantage, thereby affecting the performance of the entire system.

[0005] For high dynamic response, the existing PLC technology has the following deficiencies in several aspects: 1) Low pulse output: The pulse signal received by the servo driver is 24V, unlike the 3.3V pulse signal that can easily reach 1MHz. The frequency of the 24V pulse signal output by the PLC is usually only up to 200KHz at most, which limits the sensitivity of the system response and the control accuracy, and it is difficult to meet the application scenarios with high dynamic performance requirements; 2) Low sampling rate: The AD sampling rate of the existing PLC is usually only 1KSPS, and it is impossible to monitor the rapidly changing force value signal in real time. This causes the system to be sluggish in the rapidly changing force value scenario and it is difficult to achieve precise control. In summary, in many force value control occasions, it is still impossible to use PLC to control the electric cylinder to achieve force value control. Content of the Utility Model

[0006] In order to solve the above technical problems, the purpose of the utility model is to provide a force value servo controller based on high-frequency pulses and high-speed sampling.

[0007] The technical solution adopted by the utility model is: a force value servo controller based on high-frequency pulses and high-speed sampling, including a pulse signal generation circuit, an integrated voltage amplification module, and a sampling circuit, wherein:

[0008] The pulse signal generation circuit includes a DC power supply, a first DC-DC power supply chip, and a logic output optocoupler;

[0009] The integrated voltage amplification module includes a DC power supply, a three-terminal voltage regulator, a FET input operational amplifier chip, a precision operational amplifier chip, a second DC-DC power supply chip, and a voltage reference chip.

[0010] In some embodiments, the first DC-DC power supply chip uses XL1509-5.0E1, and the logic output optocoupler uses EL0600.

[0011] In some embodiments, the relevant circuit of the first DC-DC power supply chip includes an XL1509-5.0E1 chip, a first resistor, a first light-emitting diode, a first capacitor, a second capacitor, a first inductor, a third capacitor, and a first diode, where:

[0012] The first pin of the XL1509-5.0E1 chip, the first end of the second capacitor, and the first end of the first capacitor are connected and connected to the 24V DC power supply port;

[0013] The second pin of the XL1509-5.0E1 chip, the first end of the first inductor, and the second end of the first diode are connected;

[0014] The third pin of the XL1509-5.0E1 chip, the second end of the first inductor, the first end of the third capacitor, and the first end of the first resistor are connected and connected to the 5V DC power supply port;

[0015] The second end of the first resistor and the first end of the first light-emitting diode are connected;

[0016] The fourth pin, fifth pin, sixth pin, seventh pin, and eighth pin of the XL1509-5.0E1 chip, as well as the second end of the first capacitor, the second end of the second capacitor, the first end of the first diode, the second end of the third capacitor, and the second end of the first light-emitting diode are connected and grounded.

[0017] In some embodiments, the relevant circuit of the logic output optocoupler includes an EL0600 chip, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, a seventh resistor, an eighth resistor, a fourth capacitor, a fifth capacitor, a second light-emitting diode, and a third light-emitting diode, where:

[0018] The second pin of the EL0600 chip, the first end of the second resistor, and the first end of the sixth resistor are connected;

[0019] The third pin of the EL0600 chip, the second end of the sixth resistor, and the second end of the second light-emitting diode are connected and connected to the 3.3V pulse first input port;

[0020] The second end of the second resistor and the first end of the fourth resistor are connected and connected to the 3.3V pulse second input port;

[0021] The second end of the fourth resistor and the first end of the second light-emitting diode are connected;

[0022] The fifth pin of the EL0600 chip and the first end of the fifth capacitor are connected and grounded;

[0023] The sixth pin of the EL0600 chip, the second end of the fifth capacitor, and the first end of the seventh resistor are connected;

[0024] The second end of the seventh resistor and the first end of the eighth resistor are connected;

[0025] The eighth pin of the EL0600 chip and the first end of the fourth capacitor are connected and connected to the 5V DC power supply port;

[0026] The second end of the eighth resistor, the first end of the fifth resistor, and the second end of the third light-emitting diode are connected and used as the output end of the logic output optocoupler;

[0027] The second end of the fifth resistor and the first end of the third resistor are connected and connected to the 24V DC power supply port;

[0028] The second end of the third resistor and the first end of the third light-emitting diode are connected.

[0029] In some embodiments, the three-terminal voltage regulator uses L7812CD2T, the FET input operational amplifier chip uses TL084CDR, the precision operational amplifier chip uses OP07CDR, the second DC-DC power supply chip uses SSP9459, and the voltage reference chip uses TL431.

[0030] In some embodiments, the relevant circuits of the three-terminal voltage regulator and the second DC-DC power supply chip include an L7812CD2T chip, an SSP9459 chip, a sixth capacitor, a seventh capacitor, an eighth capacitor, a ninth capacitor, a tenth capacitor, an eleventh capacitor, a twelfth capacitor, a fourth light-emitting diode, a second diode, a third diode, a second inductor, a third inductor, a fourth inductor, a fifth inductor, a ninth resistor, a tenth resistor, an eleventh resistor, and a twelfth resistor, where:

[0031] The first pin of the L7812CD2T chip, the first end of the sixth capacitor, and the first end of the fourth inductor are connected together;

[0032] The third pin of the L7812CD2T chip and the first end of the seventh capacitor are connected and then connected to the DC power supply port;

[0033] The fourth pin of the SSP9459 chip and the first end of the eleventh resistor are connected together;

[0034] The fifth pin of the SSP9459 chip, the second end of the fourth inductor, the second end of the eleventh resistor, the first end of the twelfth resistor, the second end of the second diode, and the first end of the twelfth capacitor are connected together;

[0035] The second end of the twelfth resistor and the first end of the fourth light-emitting diode are connected together;

[0036] The first end of the second diode is connected to the 24V DC power supply port;

[0037] The first pin of the SSP9459 chip and the first end of the eighth capacitor are connected together;

[0038] The second pin of the SSP9459 chip, the first end of the third diode, the first end of the fifth inductor, the second end of the ninth capacitor, and the first end of the ninth resistor are connected together;

[0039] The third pin of the SSP9459 chip, the second end of the ninth resistor, and the first end of the tenth resistor are connected together;

[0040] The first end of the ninth capacitor, the second end of the tenth resistor, the first end of the second inductor, the first end of the third inductor, the second end of the twelfth capacitor, and the first end of the eleventh capacitor are connected together;

[0041] The sixth pin of the SSP9459 chip, the second end of the eighth capacitor, the second end of the third diode, and the second end of the second inductor are connected together;

[0042] The second end of the eleventh capacitor and the first end of the tenth capacitor are connected together;

[0043] The second end of the seventh capacitor, the fourth pin of the L7812CD2T chip, the second end of the sixth capacitor, the second end of the fourth light-emitting diode, the second end of the third inductor, and the second end of the tenth capacitor are all grounded.

[0044] In some embodiments, the related circuit of the voltage reference chip includes a TL431 chip, a first triode, a thirteenth capacitor, a thirteenth resistor, a fourteenth resistor, a fifteenth resistor, and a sixteenth resistor, where:

[0045] The second pin of the TL431 chip, the first end of the thirteenth resistor, and the gate of the first triode are connected;

[0046] The first pin of the TL431 chip, the first end of the fourteenth resistor, and the first end of the fifteenth resistor are connected;

[0047] The third pin of the TL431 chip is connected to the second end of the fourteenth resistor and grounded;

[0048] The source of the first triode, the first end of the thirteenth capacitor, and the first end of the sixteenth resistor are connected;

[0049] The second end of the sixteenth resistor is connected to the second end of the fifteenth resistor;

[0050] The second end of the thirteenth capacitor is grounded.

[0051] The beneficial effects of the present utility model are:

[0052] The pulse signal generation circuit outputs a 24V, 500KHz pulse signal; the high sampling rate is achieved through the chip setting of the sampling circuit and the matching integrated voltage amplification module. Through the pulse signal generation circuit, integrated voltage amplification module, and sampling circuit provided by the present utility model, it has high-frequency and high-sampling-rate characteristics in force value control, and can thus perform excellently in application scenarios requiring high precision and fast response. For example, in the fields of precision manufacturing, material testing, automated production lines, etc., it can better achieve precise control of the force value, improving product quality and production efficiency. Description of the Drawings

[0053] Figure 1 is the structural block diagram of the force value servo controller circuit based on high-frequency pulses and high-speed sampling of the present utility model;

[0054] Figure 2 is the circuit structure diagram of the related circuit of the first DC-DC power chip in the present utility model;

[0055] Figure 3 is the circuit structure diagram of the related circuit of the logic output optocoupler in the present utility model;

[0056] Figure 4 is the circuit structure diagram of the related circuit of the three-terminal voltage regulator and the second DC-DC power chip in the present utility model;

[0057] Figure 5 is the working principle diagram of TL431 in the present utility model;

[0058] Figure 6 is the circuit structure diagram of the related circuit of the voltage reference chip in the present utility model;

[0059] Figure 7 is the circuit structure diagram of the RC filter circuit in the present utility model;

[0060] Figure 8 is the circuit structure diagram of the related circuit of the precision operational amplifier chip in the present utility model;

[0061] Reference numerals: R1, the first resistor; LED1, the first light-emitting diode; C1, the first capacitor; C2, the second capacitor; L1, the first inductor; C3, the third capacitor; D1, the first diode; R2, the second resistor; R3, the third resistor; R4, the fourth resistor; R5, the fifth resistor; R6, the sixth resistor; R7, the seventh resistor; R8, the eighth resistor; C4, the fourth capacitor; C5, the fifth capacitor; LED2, the second light-emitting diode; LED3, the third light-emitting diode; C6, the sixth capacitor; C7, the seventh capacitor; C8, the eighth capacitor; C9, the ninth capacitor; C10, the tenth capacitor; C11, the eleventh capacitor; C12, the twelfth capacitor; LED4, the fourth light-emitting diode; D2, the second diode; D3, the third diode; L2, the second inductor; L3, the third inductor; L4, the fourth inductor; L5, the fifth inductor; R9, the ninth resistor; R10, the tenth resistor; R11, the eleventh resistor; R12, the twelfth resistor; Q1, the first triode; C13, the thirteenth capacitor; R13, the thirteenth resistor; R14, the fourteenth resistor; R15, the fifteenth resistor; R16, the sixteenth resistor. Detailed implementation manners

[0062] As mentioned in the background art, currently, most use PLC to control the cylinder for force value testing, which has the following problems: 1. The power output is not flexible. When performing large force value tests, a large cylinder is required, and when performing small force value tests, a small cylinder is required, and the safety requirements for using a large cylinder are very high; 2. The charging and discharging of the cylinder takes a long time, resulting in slow dynamic response, long commutation time, and low test speed. 3. The noise is large. The cylinder generates relatively large noise when compressing and discharging gas. 4. When the cylinder performs force value testing, the displacement parameter cannot be directly obtained. When performing force value testing related to displacement, only an external displacement sensor can be connected. 5. The speed control accuracy of the cylinder is relatively low because the compressibility of the gas and leakage in the system will cause the speed to be unstable. Therefore, it is very necessary to study the use of PLC to control the electric cylinder for force value testing.

[0063] In the PLC control of the inductor for force value control, for high dynamic response, the existing PLC technology has deficiencies in the following aspects:

[0064] Pulse Output: The pulse signal received by the servo driver is 24V, unlike the 3.3V pulse signal that can easily achieve 1MHz. The frequency of the 24V pulse signal output by the PLC is usually only up to 200KHz at most, which limits the sensitivity of the system response and the control accuracy, and it is difficult to meet the application scenarios with high dynamic performance requirements. For example, the rated speed of the servo motor is usually 3000 revolutions per minute, and converting the motor speed to revolutions per second is equal to 50 rps; at a pulse signal of 200KHz per second, the number of pulses required per revolution is 4000 pulses / rev; at a pulse signal of 500KHz per second, the number of pulses required per revolution is: 10000 pulses / rev; the more pulses required for the motor to rotate one circle, the higher the achieved control accuracy.

[0065] Signal Amplification: The force value sensor usually outputs a weak voltage signal, which needs to be amplified by an external voltage amplifier before it can be collected by the PLC. This increases the complexity, cost, and volume of the system, and may introduce additional signal interference.

[0066] Sampling Rate: The AD sampling rate of existing PLCs is usually only 1KSPS, and it is impossible to monitor the rapidly changing force value signal in real time. This causes the system to react slowly in the scenario of rapidly changing force values and makes it difficult to achieve precise control.

[0067] In summary, in many force value control occasions, only the PLC can be used to control the cylinder to achieve force value control.

[0068] Next, the technical solutions in the embodiments of the present application will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present application.

[0069] It should be noted that for the convenience of description, only the parts related to the relevant utility model are shown in the drawings. Without conflict, the embodiments in the present application and the features in the embodiments can be combined with each other.

[0070] It should be understood that the "system", "device", "unit" and / or "module" used in the present application is a method for distinguishing different components, elements, parts, portions or assemblies at different levels. However, if other words can achieve the same purpose, that word can be replaced by other expressions.

[0071] As shown in this application and the claims, unless the context clearly indicates otherwise, words such as "a", "an", "one", and / or "the" are not specifically singular and may also include the plural. Generally speaking, the terms "comprising" and "including" only indicate the inclusion of the explicitly identified steps and elements, and these steps and elements do not constitute an exclusive list. A method or device may also include other steps or elements. An element defined by the statement "comprising one..." does not exclude the existence of other identical elements in the process, method, commodity, or device that includes the element.

[0072] In the description of the embodiments of this application, "a plurality" means two or more than two. The following terms "first" and "second" are only used for descriptive purposes and cannot be understood as indicating or implying relative importance or implicitly specifying the quantity of the indicated technical features. Thus, the features defined with "first" and "second" may explicitly or implicitly include one or more of such features.

[0073] The present utility model provides a force value servo controller based on high-frequency pulses and high-speed sampling, including a pulse signal generation circuit, an integrated voltage amplification module, and a sampling circuit, wherein:

[0074] The pulse signal generation circuit includes a DC power supply, a first DC-DC power supply chip, and a logic output optocoupler;

[0075] The integrated voltage amplification module includes a DC power supply, a three-terminal voltage regulator, an FET input operational amplifier chip, a precision operational amplifier chip, a second DC-DC power supply chip, and a voltage reference chip.

[0076] Specifically, the overall control process is as follows: The pulse signal generation circuit generates a high-frequency pulse signal using a pull-up resistor; the high-frequency pulse signal is used to drive the servo system, and the force value sensor outputs a weak signal; the integrated voltage amplification module amplifies the weak signal to obtain an amplified signal; the sampling circuit samples the amplified signal and feeds it back to the pulse signal generation circuit. This is taken as a cyclic process.

[0077] Its overall framework refers to Figure 1 .

[0078] In some feasible embodiments, the first DC-DC power supply chip uses XL1509-5.0E1, and the logic output optocoupler uses EL0600.

[0079] This embodiment is used to output a 24V, 500KHz pulse signal;

[0080] The relevant circuit of the first DC-DC power chip includes the XL1509-5.0E1 chip, the first resistor, the first light-emitting diode, the first capacitor, the second capacitor, the first inductor, the third capacitor, and the first diode. Among them: The first pin of the XL1509-5.0E1 chip, the first end of the second capacitor, and the first end of the first capacitor are connected and connected to the 24V DC power supply port; The second pin of the XL1509-5.0E1 chip, the first end of the first inductor, and the second end of the first diode are connected; The third pin of the XL1509-5.0E1 chip, the second end of the first inductor, the first end of the third capacitor, and the first end of the first resistor are connected and connected to the 5V DC power supply port; The second end of the first resistor and the first end of the first light-emitting diode are connected; The fourth pin, fifth pin, sixth pin, seventh pin, and eighth pin of the XL1509-5.0E1 chip, as well as the second end of the first capacitor, the second end of the second capacitor, the first end of the first diode, the second end of the third capacitor, and the second end of the first light-emitting diode are connected and grounded.

[0081] The relevant circuit of the logic output optocoupler includes the EL0600 chip, the second resistor, the third resistor, the fourth resistor, the fifth resistor, the sixth resistor, the seventh resistor, the eighth resistor, the fourth capacitor, the fifth capacitor, the second light-emitting diode, and the third light-emitting diode. Among them: The second pin of the EL0600 chip, the first end of the second resistor, and the first end of the sixth resistor are connected; The third pin of the EL0600 chip, the second end of the sixth resistor, and the second end of the second light-emitting diode are connected and connected to the X0- port; The second end of the second resistor and the first end of the fourth resistor are connected and connected to the X0+ port; The second end of the fourth resistor and the first end of the second light-emitting diode are connected; The fifth pin of the EL0600 chip and the first end of the fifth capacitor are connected and grounded; The sixth pin of the EL0600 chip, the second end of the fifth capacitor, and the first end of the seventh resistor are connected; The second end of the seventh resistor and the first end of the eighth resistor are connected; The eighth pin of the EL0600 chip and the first end of the fourth capacitor are connected and connected to the 5V DC power supply port; The second end of the eighth resistor, the first end of the fifth resistor, and the second end of the third light-emitting diode are connected and used as the output end of the logic output optocoupler; The second end of the fifth resistor and the first end of the third resistor are connected and connected to the 24V DC power supply port; The second end of the third resistor and the first end of the third light-emitting diode are connected.

[0082] The circuit schematic diagram of this embodiment is as Figure 2 and Figure 3As shown, where X0- represents the first input port of the 3.3V pulse, and X0+ represents the second input port of the 3.3V pulse.

[0083] 5V voltage regulation solution: XL1509 is an efficient DC-DC buck converter widely used in various power supply applications. In this solution, the 5V voltage output by XL1509 is used to supply power to the optocoupler EL0600.

[0084] Principle of generating 24V high-frequency pulses: The input signal voltage range is 3V - 5V, and pulse signals within this voltage range can easily reach above 1MHz. When the pulse signal is applied to the input terminal, the current flowing into the input LED of the optocoupler EL0600 is restricted by a 470Ω resistor. The internal LED of EL0600 activates the output phototransistor, allowing the signal to pass through. At the same time, the input LED indicator lights up, indicating the presence of the signal. At the output terminal, since the logic output voltage of EL0600 is the same as the supply voltage, the allowable passing current is 50mA. In this technical solution, a 5V DC power supply is used to supply power to EL0600, so the logic output voltage of EL0600 cannot be directly used. Instead, a method of pulling up with a 24V 2KΩ resistor is adopted. When EL0600 outputs logic "0", the output voltage is 0V, and the output LED indicator lights up to confirm the presence of the output signal; when EL0600 outputs logic "1", the output voltage is 5V, but due to the connection of a 24V 2KΩ pull-up resistor, the voltage will be pulled up to 24V. The 2KΩ pull-up resistor is crucial for generating 24V, 500KHz pulse signals. The smaller this resistor, the easier it is to generate high-frequency pulse signals, but the power consumption and heat generation will also increase. When the pull-up resistor is 2KΩ, the power consumption is:

[0085]

[0086] A 2KΩ, 1 / 2W (i.e., 0.5W) resistor can be selected.

[0087] In some feasible embodiments, the three-terminal voltage regulator uses L7812CD2T, the FET input operational amplifier chip uses TL084CDR, the precision operational amplifier chip uses OP07CDR, the second DC-DC power supply chip uses SSP9459, and the voltage reference chip uses TL431.

[0088] In this embodiment, by integrating the voltage amplification module, the complexity, cost, and volume of the system are reduced.

[0089] The relevant circuits of the three-terminal voltage regulator and the second DC-DC power chip include the L7812CD2T chip, the SSP9459 chip, the sixth capacitor, the seventh capacitor, the eighth capacitor, the ninth capacitor, the tenth capacitor, the eleventh capacitor, the twelfth capacitor, the fourth light-emitting diode, the second diode, the third diode, the second inductor, the third inductor, the fourth inductor, the fifth inductor, the ninth resistor, the tenth resistor, the eleventh resistor, and the twelfth resistor, where: The first pin of the L7812CD2T chip, the first end of the sixth capacitor, and the first end of the fourth inductor are connected; The third pin of the L7812CD2T chip is connected to the first end of the seventh capacitor and is connected to the DC power supply port; The fourth pin of the SSP9459 chip is connected to the first end of the eleventh resistor; The fifth pin of the SSP9459 chip, the second end of the fourth inductor, the second end of the eleventh resistor, the first end of the twelfth resistor, the second end of the second diode, and the first end of the twelfth capacitor are connected; The second end of the twelfth resistor is connected to the first end of the fourth light-emitting diode; The first end of the second diode is connected to the 24V DC power supply port; The first pin of the SSP9459 chip is connected to the first end of the eighth capacitor; The second pin of the SSP9459 chip, the first end of the third diode, the first end of the fifth inductor, the second end of the ninth capacitor, and the first end of the ninth resistor are connected; The third pin of the SSP9459 chip, the second end of the ninth resistor, and the first end of the tenth resistor are connected; The first end of the ninth capacitor, the second end of the tenth resistor, the first end of the second inductor, the first end of the third inductor, the second end of the twelfth capacitor, and the first end of the eleventh capacitor are connected; The sixth pin of the SSP9459 chip, the second end of the eighth capacitor, the second end of the third diode, and the second end of the second inductor are connected; The second end of the eleventh capacitor is connected to the first end of the tenth capacitor; The second end of the seventh capacitor, the fourth pin of the L7812CD2T chip, the second end of the sixth capacitor, the second end of the fourth light-emitting diode, the second end of the third inductor, and the second end of the tenth capacitor are all grounded.

[0090] The first step of the principle of this integrated voltage amplification module is: Input a 24V power supply. The 24V power supply passes through the three-terminal voltage regulator L7812CD2T to obtain a 12V voltage; At the same time, the 24V power supply passes through the DC-DC power chip SSP9459 to obtain a clean analog ground (GNDA) reference voltage. The circuit schematic diagram is as Figure 4 shown.

[0091] The first step of the principle of this integrated voltage amplification module is: Use the regulated 12V voltage to obtain a 10V reference voltage through the voltage reference chip TL431. The working principle of TL431 is asFigure 5 as shown

[0092] According to the TL431 device manual, V ref is 2.5V, and I ref is 2 μA. When the upper resistor is 30 KΩ and the lower resistor is 10 KΩ, we can get:

[0093]

[0094] Since the 30 KΩ resistor is not used elsewhere in this technical solution, the used resistors 10 KΩ and 20 KΩ in series are used for substitution.

[0095] As Figure 6 shown, the relevant circuit of the voltage reference chip includes a TL431 chip, a first triode, a thirteenth capacitor, a thirteenth resistor, a fourteenth resistor, a fifteenth resistor, and a sixteenth resistor, where: the second pin of the TL431 chip, the first end of the thirteenth resistor, and the gate of the first triode are connected; the first pin of the TL431 chip, the first end of the fourteenth resistor, and the first end of the fifteenth resistor are connected; the third pin of the TL431 chip is connected to the second end of the fourteenth resistor and grounded; the source of the first triode, the first end of the thirteenth capacitor, and the first end of the sixteenth resistor are connected; the second end of the sixteenth resistor and the second end of the fifteenth resistor are connected; the second end of the thirteenth capacitor is grounded.

[0096] Step 3: Use a 10V voltage as the excitation voltage of the sensor, and then filter the voltage signal output by the sensor using an RC filter circuit. The circuit schematic diagram is as Figure 7 shown, where S+ represents the positive pole of the weak signal; S- represents the negative pole of the weak signal.

[0097] Step 4: Signal conditioning: The FET input operational amplifier TL084CDR can be used for primary signal conditioning, especially for obtaining signals from high-impedance sensors and amplifying them. Due to its high input impedance and low bias current, the load and bias error of the signal source can be minimized.

[0098] Step 5: Precision amplification: After primary amplification and conditioning, the signal can be transmitted to the precision operational amplifier OP07CDR for precision amplification and processing. The circuit schematic diagrams of signal conditioning and precision amplification are as Figure 8 shown, where E+ represents the positive pole of the sensor excitation voltage; E- represents the negative pole of the sensor excitation voltage.

[0099] In this embodiment, the discrete component solution using SSP9459, TL084CDR, and OP07CDR can achieve higher signal stability in practical applications than using only the AD620 voltage amplification chip by optimizing power management and multi-stage amplifier circuit design.

[0100] In some feasible embodiments, the sampling circuit uses the Yateli AT32F403ACGT7.

[0101] In this embodiment, the ADC (Analog-to-Digital Converter): converts analog signals (such as voltage) into digital signals for processing in a digital system; the DMA (Direct Memory Access): transfers data between peripheral devices and memory without CPU intervention, improving the efficiency of data transfer.

[0102] Among them, the configuration process of AT32F403ACGT7 is as follows:

[0103] ADC configuration: Set the ADC channel and sampling time; configure the ADC to continuous conversion mode to continuously sample the input voltage.

[0104] DMA configuration: Configure the DMA channel to connect it to the ADC; set the transfer direction of the DMA (from the ADC data register to memory); set the storage depth of the DMA to 10. The purpose of setting the storage depth is to facilitate filtering of the sampling results; enable the DMA circular mode so that the DMA automatically restarts after the transfer is completed.

[0105] The working principle of this embodiment is as follows:

[0106] ADC sampling: The ADC samples the input voltage according to the set sampling time and conversion sequence. Once the ADC completes a conversion, the conversion result will be stored in the ADC data register.

[0107] DMA transfer: The DMA monitors the ADC data register. When there is a new conversion result, the DMA automatically transfers the data from the ADC data register to the pre-set memory buffer. Due to the circular storage mode being set, after the DMA transfers 10 times (the storage depth is 10), it will automatically restart the transfer from the starting address of the buffer without stopping. In this way, no matter when the sampling data is read, 10 data can be obtained for operations such as filtering.

[0108] No interrupt handling: Without enabling DMA interrupts, the CPU will not be disturbed by frequent interrupt requests and can focus on other tasks. The data is stored in the circular buffer, and the user program can read the latest sampling data as needed at any time.

[0109] The above is a specific description of the preferred embodiment of the present utility model. However, the present utility model is not limited to the described embodiment. Those skilled in the art can make various equivalent deformations or substitutions without departing from the spirit of the present utility model, and these equivalent deformations or substitutions are all included in the scope defined by the claims of this application.

Claims

1. A force servo controller based on high-frequency pulses and high-speed sampling, characterized in that: It includes a pulse signal generating circuit, an integrated voltage amplifying module and a sampling circuit, wherein: The pulse signal generating circuit comprises a direct current power supply, a first DC-DC power supply chip and a logic output optical coupler; The integrated voltage amplification module comprises a direct current power supply, a three-terminal voltage regulator, a FET input operational amplifier chip, a precision operational amplifier chip, a second DC-DC power supply chip and a voltage reference chip.

2. A force servo controller based on high-frequency pulses and high-speed sampling according to claim 1, characterized in that: The first DC-DC power supply chip adopts XL1509-5.0E1, and the logic output optical coupler adopts EL0600.

3. A force servo controller based on high-frequency pulses and high-speed sampling according to claim 2, characterized in that: The related circuits of the first DC-DC power supply chip include an XL1509-5.0E1 chip, a first resistor, a first light-emitting diode, a first capacitor, a second capacitor, a first inductor, a third capacitor, and a first diode, wherein: The first pin of the XL1509-5.0E1 chip, the first end of the second capacitor and the first end of the first capacitor are connected and connected to a 24V DC power supply port; The second pin of the XL1509-5.0E1 chip, the first end of the first inductor and the second end of the first diode are connected; The third pin of the XL1509-5.0E1 chip, the second end of the first inductor, the first end of the third capacitor and the first end of the first resistor are connected and connected to a 5V DC power supply port; The second end of the first resistor is connected to the first end of the first light emitting diode; The fourth pin, the fifth pin, the sixth pin, the seventh pin and the eighth pin of the XL1509-5.0E1 chip, the second end of the first capacitor, the second end of the second capacitor, the first end of the first diode, the second end of the third capacitor, and the second end of the first light-emitting diode are connected and grounded.

4. A force servo controller based on high-frequency pulses and high-speed sampling according to claim 2, characterized in that: The related circuit of the logic output optocoupler includes an EL0600 chip, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, a seventh resistor, an eighth resistor, a fourth capacitor, a fifth capacitor, a second light-emitting diode and a third light-emitting diode, wherein: The second pin of the EL0600 chip, the first end of the second resistor and the first end of the sixth resistor are connected; The third pin of the EL0600 chip, the second end of the sixth resistor and the second end of the second light emitting diode are connected to each other and connected to the 3.3V pulse first input port; The second end of the second resistor is connected to the first end of the fourth resistor and is connected to the 3.3V pulse second input port; The second end of the fourth resistor is connected to the first end of the second light emitting diode; The fifth pin of the EL0600 chip is connected to the first end of the fifth capacitor and is grounded; The sixth pin of the EL0600 chip, the second end of the fifth capacitor and the first end of the seventh resistor are connected; The second end of the seventh resistor is connected to the first end of the eighth resistor; The eighth pin of the EL0600 chip is connected to the first end of the fourth capacitor and is connected to a 5V DC power supply port; The second end of the eighth resistor, the first end of the fifth resistor and the second end of the third light emitting diode are connected and serve as the output end of the logic output optocoupler; The second end of the fifth resistor is connected to the first end of the third resistor and is connected to a 24V DC power supply port; The second end of the third resistor is connected to the first end of the third light emitting diode.

5. A force servo controller based on high-frequency pulses and high-speed sampling according to claim 1, characterized in that: The three-terminal voltage regulator adopts L7812CD2T, the FET input operational amplifier chip adopts TL084CDR, the precision operational amplifier chip adopts OP07CDR, the second DC-DC power supply chip adopts SSP9459, and the voltage reference chip adopts TL431.

6. A force servo controller based on high-frequency pulses and high-speed sampling according to claim 5, characterized in that: The related circuits of the three-terminal voltage regulator and the second DC-DC power supply chip include an L7812CD2T chip, an SSP9459 chip, a sixth capacitor, a seventh capacitor, an eighth capacitor, a ninth capacitor, a tenth capacitor, an eleventh capacitor, a twelfth capacitor, a fourth light-emitting diode, a second diode, a third diode, a second inductor, a third inductor, a fourth inductor, a fifth inductor, a ninth resistor, a tenth resistor, an eleventh resistor and a twelfth resistor, wherein: The first pin of the L7812CD2T chip, the first end of the sixth capacitor and the first end of the fourth inductor are connected; The third pin of the L7812CD2T chip is connected to the first end of the seventh capacitor and is connected to a DC power supply port; The fourth pin of the SSP9459 chip is connected to the first end of the eleventh resistor; The fifth pin of the SSP9459 chip, the second end of the fourth inductor, the second end of the eleventh resistor, the first end of the twelfth resistor, the second end of the second diode and the first end of the twelfth capacitor are connected; The second end of the twelfth resistor is connected to the first end of the fourth light emitting diode; The first end of the second diode is connected to a 24V DC power supply port; The first pin of the SSP9459 chip is connected to the first end of the eighth capacitor; The second pin of the SSP9459 chip, the first end of the third diode, the first end of the fifth inductor, the second end of the ninth capacitor and the first end of the ninth resistor are connected; The third pin of the SSP9459 chip, the second end of the ninth resistor and the first end of the tenth resistor are connected; The first end of the ninth capacitor, the second end of the tenth resistor, the first end of the second inductor, the first end of the third inductor, the second end of the twelfth capacitor and the first end of the eleventh capacitor are connected; The sixth pin of the SSP9459 chip, the second end of the eighth capacitor, the second end of the third diode and the second end of the second inductor are connected; The second end of the eleventh capacitor is connected to the first end of the tenth capacitor; The second end of the seventh capacitor, the fourth pin of the L7812CD2T chip, the second end of the sixth capacitor, the second end of the fourth light-emitting diode, the second end of the third inductor and the second end of the tenth capacitor are all grounded.

7. A force servo controller based on high-frequency pulses and high-speed sampling according to claim 5, characterized in that: The related circuit of the voltage reference chip includes a TL431 chip, a first transistor, a thirteenth capacitor, a thirteenth resistor, a fourteenth resistor, a fifteenth resistor and a sixteenth resistor, wherein: The second pin of the TL431 chip, the first end of the thirteenth resistor and the gate of the first transistor are connected; The first pin of the TL431 chip, the first end of the fourteenth resistor and the first end of the fifteenth resistor are connected; The third pin of the TL431 chip is connected to the second end of the fourteenth resistor and is grounded; The source of the first transistor, the first end of the thirteenth capacitor and the first end of the sixteenth resistor are connected; The second end of the sixteenth resistor is connected to the second end of the fifteenth resistor; A second terminal of the thirteenth capacitor is grounded.

8. A force servo controller based on high-frequency pulses and high-speed sampling according to claim 1, characterized in that: The sampling circuit adopts Arteli AT32F403ACGT7.

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