Isolated multichannel DAC circuit

Abstract

The utility model discloses an isolation type multichannel DAC circuit, a signal output end of a master control CPU is connected with signal input ends on the left sides of 1 #-n # isolators, signal output ends on the left sides of the isolators are connected with the signal input end of the master control CPU through a wired-AND mode, signal lines on the right sides of the isolators are connected with respective slave CPUs, and the slave CPUs are connected with the signal output end of the master control CPU. Signal lines of the slave CPUs are connected with respective DACs (in one group), one group of CPUs and DACs are powered by independent power supplies, each group of power supplies are mutually independent and separated, and electrical mutual isolation of the n groups of DACs is realized through n isolation circuits. According to the utility model, the n groups of slave CPUs are electrically isolated from the DAC group and the master control CPU through the n isolators, and the n groups of DACs are electrically independent from each other, so that digital-to-analog conversion with multi-group multi-path DAC output and electrical insulation is realized on the premise of simple circuit, easiness in implementation and almost no cost increase.

Description

Technical Field

[0001] The utility model relates to the technical field of digital circuits, in particular to an isolated multi-channel DAC circuit. Background Art

[0002] In intelligent measurement and control applications, the voltage signal output by an intelligent controller through an embedded DAC is usually further converted into control voltages or currents such as 0-10V and 4-20mA to control frequency converters in electrical cabinets, etc., to achieve high-power output control of the strong electrical stage. Since the DAC output is considered a continuous control signal, the DAC function plays an important role in continuous control systems. In a measurement and control system, if a single-channel DAC output is used for control, the controller / board can usually be "grounded" with the ground wire of the strong electrical control part in the electrical cabinet, without causing mutual interference.

[0003] However, in cases where independent control and electrical isolation are required, such as in the centralized central air-conditioning (DDC) system in the building field, for applications such as the fan speed control and water pump flow control mainly using frequency converters, if the (reference) ground wires of the frequency converters in these electrical cabinets are directly connected, due to the "unequal potential" reason, mutual crosstalk will occur, and even the serious problem of burning out the frequency converter in a certain electrical cabinet may occur. In such a scenario, the control voltage or current signals output by a controller with multiple embedded DACs need to be "independent" - electrically isolated. In addition, the scheme of the main CPU transmitting data to each slave CPU in the form of a data bus and the data of each slave CPU being "isolated" and then transmitted to the DAC will greatly increase the complexity of the circuit. Summary of the Invention

[0004] Aiming at the problems existing in the prior art, the utility model provides an isolated multi-channel DAC circuit that realizes isolated transmission of digital signals and realizes multi-channel electrical isolation output of different-address slave CPUs and different-address DACs.

[0005] The purpose of the utility model is achieved through the following technical solutions.

[0006] An isolated multi-channel DAC circuit includes a main control CPU. The signal output end of the main control CPU is connected to the signal input end of an isolator. The signal output end of the isolator is connected to the signal input end of the main control CPU in a "wired AND" manner. The isolator signal lines are connected to their respective slave CPUs. The signal lines of each slave CPU and their respective DACs are connected as a group. The signal lines of a group of slave CPUs and their respective DACs are powered by a separate power supply, and the power supplies for each group are independent of each other. Through each isolation circuit, electrical isolation between each group of DACs is achieved.

[0007] The master CPU and each slave CPU in the circuit are CPUs / microcontrollers with a bit width of 8 to 64 bits and having serial interface functions, and the respective DACs are DACs with address memory and data latch functions, and having single-channel and multi-channel outputs of 8 to 16 bits.

[0008] The isolator in the circuit is an optoelectronic coupling device, a capacitive digital isolation chip, a charge-gate isolation chip or a pulse transformer.

[0009] Compared with the prior art, the advantages of the present invention are as follows: By adopting a scheme of (optoelectronic) isolators between the master CPU and each slave CPU, the present invention realizes the isolated transmission of digital signals. The isolator transmits the received signals to their respective slave CPUs, and each slave CPU parses the data packet. If it is a data packet that conforms to its own address, after further parsing, it is transmitted to the DAC output of its own address, realizing the multi-channel electrical isolation output of slave CPUs with different addresses and DACs with different addresses. Through extremely simple electronic circuit design or transformation, combined with a dual-address scheme, the mutual isolation of the multi-channel DAC group is realized, and it has many significant advantages such as simple circuit, clear logic, and simple programming. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] Figure 1 It is a circuit embodiment diagram of an isolated multi-channel DAC circuit of the present invention application.

[0011] Figure 2 An embodiment diagram of a master signal transmission isolation circuit of an isolated multi-channel DAC circuit.

[0012] Figure 3 An embodiment diagram of a master signal reception isolation circuit of an isolated multi-channel DAC circuit. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0013] The present invention will be described in detail below with reference to the accompanying drawings of the specification and specific embodiments.

[0014] An isolated multi-channel DAC circuit

[0015] comprises a master CPU, the signal output end of the master CPU is connected to the signal input end of the isolator, the signal output end of the isolator is connected to the signal input end of the master CPU in a "wired AND" manner, the isolator signal line is connected to their respective slave CPUs, the signal lines of their respective slave CPUs and their respective DACs are connected as a group, the signal lines of a group of slave CPUs and their respective DACs are powered by a separate power supply, and the power supplies of each group are independent of each other. Through each isolation circuit, the electrical mutual isolation of each group of DACs is realized.

[0016] The master CPU and each slave CPU in the circuit are CPUs / microcontrollers with a bit width of 8 to 64 bits and having serial interface functions, and the respective DACs are DACs with address memory and data latch functions, with 8-bit to 16-bit single-channel and multi-channel outputs.

[0017] The isolators in the circuit are optoelectronic coupling devices, capacitive digital isolation chips, charge-gate isolation chips, or pulse transformers.

[0018] As Figure 1 shown, the signal output terminal of the master CPU is connected to the signal input terminal on the left side of the 1# - n# isolators (defined as the T line), the output terminal of the signal on the left side of the isolator is connected to the signal input terminal of the master CPU through a "wire-AND" method (defined as the R line), the signal lines on the right side of the isolator are connected to the respective slave CPUs, and the signal lines of each slave CPU are connected to the respective DACs (as a group). A group of CPU and DAC are powered by a separate power supply, and the power supplies for each group are independent of each other. Through n isolation circuits, electrical isolation of n groups of DACs is achieved.

[0019] The slave CPU numbered S1# drives the DAC output group to output voltages V11 - V1n, and the group "ground wire" is GND1. The slave CPU numbered Sn# drives the DAC output group to output voltages Vn1 - Vnn, and the group "ground wire" is GNDn. Adopting (for example) a 4-byte encoding method, the first byte is the address encoding value of the slave CPU, the second byte is the address encoding value of the DAC channel, and the last two bytes are the digital quantity value of the DAC. The data packet format transmitted by the master CPU to V11 is 01 01XX XX, and the data packet format transmitted by the master CPU to Vnn is n n XXXX.

[0020] Suppose the DAC component is a 12-bit DAC, the power supply voltage value of the DAC component is 5V, and V12 outputs a voltage of 2.5V. The main CPU sends 01 02 08 00 (hex value) through the T line and R line similar to a serial bus at a pre-agreed baud rate. After passing through the isolator, each slave CPU parses this string of information packets. Only the slave CPU with the address of S1# parses that the first byte in the information packet conforms to its own preset address. After the S1# CPU caches this group of information packets and parses the second byte as 02, it sends 0800 (hex value) to the DAC that outputs V12 to be converted into a voltage of 2.5V for output. After the rest of the slave CPUs receive and parse the information packets, they do not match their own preset addresses and discard this group of information packets, keeping the original DAC output voltage value unchanged.

[0021] To achieve signal transmission from the master CPU to each slave CPU, isolator channels corresponding to each slave CPU are set, as Figure 2As shown, taking Channel 1 as an example, resistor R1 is the current-limiting resistor for the input (anode) current of optocoupler TT1. The cathode of TT1 is connected to the sending end of the main control CPU (usually the TXD of the serial port) (T line). A resistor R11 is provided at the collector of the output end of TT1 and connected to the power supply VCC1 of Channel 1, which plays a pull-up role. At the same time, it is connected to the input end of the slave CPU (usually the RXD end of the serial port) and defined as the RXD1 line. The emitter of TT1 is connected to the "ground wire (GND1)" of Channel 1.

[0022] When the T line is at a high level, no current flows through the light-emitting diode at the input end of TT1, the internal light-emitting diode does not emit light, the triode at the output end of TT1 is in a cut-off state without "light illumination", and its collector is pulled up to a high level by R11, and the RXD1 line is at a high level; when the T line is at a low level, current flows through the light-emitting diode at the input end of TR1 and emits light, the internal triode of TT1 is turned on due to light illumination, and the RXD1 line is at a low level, realizing the in-phase signal transmission from the main control CPU to each slave CPU.

[0023] The emitters of optocouplers TT1 and TTn are respectively connected to the "ground wires" of their respective power supply groups. For example, the common reference ground wire terminal of the S1# slave CPU and the driven DAC11 - DAC1n and TR1 is GND1. For example, the common reference ground wire terminal of the Sn# slave CPU and the driven DACn1 - DACnn and TRn is GNDn.

[0024] If two-way communication is required between the main CPU of the intelligent controller and each slave CPU, design a signal receiving circuit as shown in Figure 3 The input end (anode) of the isolation optocoupler TR1 is connected to the power supply terminal VCC1 of this return through a current-limiting resistor R11. When the TXD1 end of the slave CPU is at a high level, the output end of TR1 is in a cut-off state and pulled up to a high level by resistor RO, and vice versa for a low level, also realizing the in-phase signal transmission from the slave CPU to the main CPU.

[0025] The current-limiting resistors at the input ends of the optocoupler isolators TR1 - TRn for each slave CPU to send are connected to their respective power supply terminals VCC1 - VCCn, and VCC1 - VCCn are independent of each other.

[0026] The output ends of the optocoupler isolators TR1 - TRn for each slave CPU to send are connected together in a "wired AND" manner, pulled up through a resistor RO and connected to the power supply on the main control CPU side, and connected to the RXD end of the main control CPU (R line).

[0027] Since each slave CPU has agreed on its own address value, when the information is returned, only the slave CPU with the matching address returns the information (the TXD end controls the corresponding TR cathode), so the main control CPU can correctly receive the information sent by the slave CPU.

[0028] In applications where information feedback is not required, all slave transmitting devices shown in Figure 3 can be removed, further simplifying the circuit structure.

[0029] For the bidirectional data stream transmitted through the isolator, each slave CPU only needs to have a serial communication interface. Currently, CPUs (single-chip microcomputers) from 8-bit to 64-bit and with 6 pins to 176 pins all have serial communication interface functions, or the serial communication interface function is one of the essential functions of current single-chip microcomputers.

[0030] The data interface forms of DAC components include 8-bit bus type, SPI interface type, I 2 C interface type, etc. The 8-bit bus type has been basically phased out due to its complex interface circuit. Relatively speaking, SPI interface type and I 2 C interface type DACs are widely used because of their simple connection circuits. These types of DAC components all have "address latch" and "data latch" functions, thus greatly facilitating a single CPU to drive multiple DAC components through "address matching" - forming a multi-channel voltage or current value output of "one driving multiple (one group)".

[0031] The slave CPU and DAC components in the circuit structure of this application are only for illustrative function descriptions. The circuit structure includes a multi-functional MCU that combines the CPU and DAC, and also includes a DAC component with a direct serial interface. At this time, the CPU in the corresponding group can be omitted, and the master CPU directly sends signals to the DAC component through the isolator.

[0032] In addition to optocouplers, the isolator can also be a "capacitive digital isolation chip", and the charge pump isolator chip includes signal isolation transmission technical solutions such as pulse transformers.

[0033] For the signal transmission of the parallel master-slave CPU structure, when the master CPU exchanges data with each slave CPU first, and then the slave CPU performs isolation signal mode with the DAC group in this group, it will lead to obvious circuit defects such as a large number of isolation devices and a very complex circuit.

[0034] The above embodiments are merely examples given to clearly illustrate the present utility model application, and are not limitations on the implementation manners of the present utility model application. For those skilled in the art, other different forms of changes or modifications can be made based on the above description. It is not necessary and impossible to enumerate all implementation manners here. And these obvious changes or modifications derived from the spirit of the present utility model application are still within the protection scope of the present utility model application.

Claims

1. An isolated multi-channel DAC circuit, characterized in that: The invention comprises a master control CPU, wherein the signal output end of the master control CPU is connected to the input end of the isolator signal, the output end of the isolator signal is connected to the signal input end of the master control CPU through a "wired AND" mode, the isolator signal line is connected to respective slave CPUs, the signal lines of respective slave CPUs are connected to respective DACs as a group, a group of the signal lines of the slave CPUs and respective DACs are powered by a separate power supply, the power supplies of each group are separated from each other, and the electrical isolation of each group of DACs is achieved through respective isolation circuits.

2. The isolated multi-channel DAC circuit according to claim 1, wherein: The master CPU and each slave CPU in the circuit are CPUs / single-chip microcomputers with a serial interface function and a bit width of 8 to 64 bits, and the respective DACs are DACs with address memory and data latch functions and 8-bit to 16-bit single-channel and multi-channel outputs.

3. The isolated multi-channel DAC circuit according to claim 1, wherein: The isolator in the circuit is a photoelectric coupling device, a capacitive digital isolation chip, a charge gate isolation chip or a pulse transformer.

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