Novel heart rate detector control circuit

Abstract

The utility model relates to the technical field of biological sign monitoring, and particularly discloses a novel heart rate detector control circuit which comprises a charge sensitive pre-amplification circuit, a first-stage amplification circuit, a 50HZ trap circuit, a second-stage amplification circuit, a BCG signal extraction master control circuit and an indication circuit. The charge sensitive pre-amplification circuit is electrically connected with the PVDF piezoelectric film sensor and the first-stage amplification circuit, the 50HZ trap circuit is electrically connected with the first-stage amplification circuit and the second-stage amplification circuit, and the BCG signal extraction master control circuit is electrically connected with the second-stage amplification circuit and the indication circuit. According to the heart rate and respiration rate detection device, the charge-sensitive pre-amplification circuit, the first-stage amplification circuit, the 50HZ trap circuit and the second-stage amplification circuit are arranged to carry out amplification and power frequency elimination processing on collected analog signals, then the BCG signals are extracted through the BCG signal extraction master control circuit, and therefore corresponding heart rate and respiration rate data are obtained, the detection real-time performance is high, and the accuracy is high.

Description

Technical Field

[0001] The utility model relates to the technical field of biological sign monitoring, in particular to a novel heart rate detector control circuit. Background Art

[0002] Currently, the biosignal sensing technologies on the market are mainly divided into two categories: skin contact and non-skin contact. Skin contact mainly includes PPG, ECG, EEG, and non-skin contact includes BCG and millimeter wave radar. BCG is a non-immersive heart monitoring technology, mainly used inside pillows and mattresses. It has the advantages of non-sensing monitoring, no need to wear or bind, no direct contact with the skin, no change in sleeping habits, and no restraint. However, the existing heart rate monitors cannot accurately extract BCG signal features in complex environments, resulting in low real-time and low accuracy of heart rate detection. Utility Model Content

[0003] The technical problem to be solved by the utility model is that, in view of the above-mentioned defects of the prior art, a novel heart rate detector control circuit is provided, which amplifies and eliminates the power frequency of the collected analog signal by setting a charge-sensitive preamplifier circuit, a first-stage amplifier circuit, a 50HZ trap circuit, and a second-stage amplifier circuit, and then extracts the BCG signal by the BCG signal extraction main control circuit, thereby obtaining the corresponding heart rate and respiratory rate data, and the detection is highly real-time and accurate.

[0004] In order to solve the above technical problems, the technical solution of the utility model is:

[0005] A novel heart rate detector control circuit includes a charge-sensitive preamplifier circuit, a first-stage amplifier circuit, a 50HZ trap circuit, a second-stage amplifier circuit, a BCG signal extraction main control circuit and an indication circuit. The charge-sensitive preamplifier circuit is electrically connected to a PVDF piezoelectric film sensor and the first-stage amplifier circuit, respectively; the 50HZ trap circuit is electrically connected to the first-stage amplifier circuit and the second-stage amplifier circuit, respectively; and the BCG signal extraction main control circuit is electrically connected to the second-stage amplifier circuit and the indication circuit, respectively.

[0006] Preferably, the charge-sensitive preamplifier circuit comprises a PVDF piezoelectric film sensor interface A1, an operational amplifier IC chip U2 and a capacitor C13, and the PVDF piezoelectric film sensor interface A1 and the capacitor C13 are both connected to the operational amplifier IC chip U2.

[0007] Preferably, the first-stage amplifier circuit includes resistor R13, resistor R17, resistor R18, resistor R26, resistor R24, capacitor C15 and capacitor C17, the resistor R18 is respectively connected to the first pin and the fifth pin of the operational amplifier IC chip U2, the resistor R13 and the resistor R26 are respectively connected to the sixth pin and the seventh pin of the operational amplifier IC chip U2, and the resistor R24, capacitor C15 and capacitor C17 are all connected to the resistor R13.

[0008] Preferably, the 50HZ trap circuit includes a resistor R27, a resistor R28, a resistor R29, a resistor R30, a resistor R31, a resistor R32, a resistor R33, a capacitor C20, a capacitor C21, a capacitor C22 and a capacitor C23, the resistor R27 and the resistor R11 are connected to the resistor R26, the capacitor C20 is connected to the resistor R27, the resistor R28 and the capacitor C21 respectively, the resistor R29 and the capacitor C22 are connected to the tenth pin of the operational amplifier IC chip U2, the resistor R27 and the resistor R11 are connected to the resistor R26, the capacitor C20 is connected to the resistor R27, the resistor R28 and the capacitor C21 respectively, the resistor R29 and the capacitor C22 are connected to the tenth pin of the operational amplifier IC chip U2, the resistor R27 and the resistor R11 are connected to the tenth pin of the operational amplifier IC chip U2, the resistor R27 and the resistor R11 are connected to the tenth pin of the operational amplifier IC chip U2, the resistor R27 and the capacitor C2 ... Capacitor C21 and resistor R28 are connected to the capacitor C22 and resistor R29 respectively, the resistor R30 and capacitor C23 are both connected to the thirteenth pin and the fourteenth pin of the operational amplifier IC chip U2, the resistor R11 is connected to the resistor R26 and the resistor R31 respectively, the resistor R32 is connected to the eighth pin and the twelfth pin of the operational amplifier IC chip U2 respectively, and the eighth pin and the twelfth pin of the operational amplifier IC chip U2 are connected to the resistor R31 and the resistor R33 respectively.

[0009] Preferably, the second-stage amplification circuit includes an operational amplifier U4, a capacitor C24, a capacitor C25, a capacitor C26, a capacitor C29, a capacitor C14, a resistor R12, a resistor R15, a resistor R34, a resistor R37 and a resistor R39, the operational amplifier U4 is respectively connected to the capacitor C24, the capacitor C25, the capacitor C26, the capacitor C29, the capacitor C14, the resistor R12, the resistor R15, the resistor R34, the resistor R37 and the resistor R39, and the capacitor C24 is connected to the resistor R31.

[0010] Preferably, the BCG signal extraction main control circuit includes a main control chip U1, an antenna BT1, a crystal oscillator X1 and an inductor L1. The antenna BT1 crystal capacitor C10 is connected to the main control chip U1. The nineteenth pin of the main control chip U1 is connected to the resistor R39. The crystal oscillator X1 and the inductor L1 are both connected to the main control chip U1.

[0011] Preferably, the indicating circuit comprises an indicator light RGB1, a resistor R3, a resistor R6 and a resistor R9, and the resistor R3, the resistor R6 and the resistor R9 are connected to the indicator light RGB1 and the main control chip U1 respectively.

[0012] Preferably, the novel heart rate detector control circuit also includes a system power supply circuit, which includes an interface J2, an interface J3, a charging management IC chip U3, a transistor Q1, a transistor Q2 and a transistor Q3, and the charging management IC chip U3 is respectively connected to the main control chip U1, the operational amplifier IC chip U2, the interface J2, the interface J3, the transistor Q1, the transistor Q2 and the transistor Q3.

[0013] By adopting the above technical scheme, the utility model provides a novel heart rate detector control circuit, which has the following beneficial effects: the charge-sensitive preamplifier circuit in the novel heart rate detector control circuit is electrically connected to the PVDF piezoelectric film sensor and the first-stage amplifier circuit respectively, the 50HZ trap circuit is electrically connected to the first-stage amplifier circuit and the second-stage amplifier circuit respectively, the BCG signal extraction main control circuit is electrically connected to the second-stage amplifier circuit and the indication circuit respectively, the charge-sensitive preamplifier circuit and the first-stage amplifier circuit constitute an analog signal acquisition circuit to collect the charge data of the PVDF piezoelectric film sensor and amplify the output voltage signal, the 50HZ trap circuit is used to eliminate the 50HZ industrial frequency signal contained in the BCG signal, the second-stage amplifier circuit further amplifies the signal coming out of the 50HZ trap circuit, the signal after the second-stage amplification enters the BCG signal extraction main control circuit for signal processing, and the heart rate and respiratory rate data are calculated after FIR filtering, so as to realize the accurate extraction of BCG signal features in a complex environment, improve the real-time and accuracy of heart rate detection, and have high real-time and high accuracy. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] Figure 1 It is a structural block diagram of the utility model;

[0015] Figure 2 It is the circuit principle diagram of the utility model;

[0016] In the figure, 1-charge sensitive preamplifier circuit, 2-first stage amplifier circuit, 3-50HZ trap circuit, 4-second stage amplifier circuit, 5-BCG signal extraction main control circuit, 6-indicator circuit, 7-system power supply circuit. DETAILED DESCRIPTION

[0017] The specific implementation methods of the present invention are further described below in conjunction with the accompanying drawings. It should be noted that the description of these implementation methods is used to help understand the present invention, but does not constitute a limitation of the present invention. In addition, the technical features involved in each implementation method of the present invention described below can be combined with each other as long as they do not conflict with each other.

[0018] In the description of the present invention, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise", "axial", "radial", "circumferential" and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the referred device or element must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as a limitation on the present invention.

[0019] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include at least one of the features. In the description of the present utility model, the meaning of "plurality" is at least two, such as two, three, etc., unless otherwise clearly and specifically defined.

[0020] like Figure 1-2As shown, the novel heart rate detector control circuit includes a charge-sensitive preamplifier circuit 1, a first-stage amplifier circuit 2, a 50HZ trap circuit 3, a second-stage amplifier circuit 4, a BCG signal extraction main control circuit 5 and an indication circuit 6. The charge-sensitive preamplifier circuit 1 is electrically connected to the PVDF piezoelectric film sensor and the first-stage amplifier circuit 2, respectively, the 50HZ trap circuit 3 is electrically connected to the first-stage amplifier circuit 2 and the second-stage amplifier circuit 4, respectively, and the BCG signal extraction main control circuit 5 is electrically connected to the second-stage amplifier circuit 4 and the indication circuit 6, respectively. It can be understood that in actual application, the charge sensitive preamplifier circuit 1, the first stage amplifier circuit 2, the 50HZ trap circuit 3, the second stage amplifier circuit 4, the BCG signal extraction main control circuit 5 and the indication circuit 6 are all integrated on a PCB circuit board and installed in the heart rate detector. When in use, the person sitting on the collection pad is installed with a PVDF piezoelectric film sensor, and the PVDF piezoelectric film sensor is connected to the above PCB circuit board. The signal from the PVDF piezoelectric film sensor is preamplified and amplified by the charge sensitive preamplifier circuit 1 and the first stage amplifier circuit 2, and then eliminated by the 50HZ trap circuit 3. After the second stage amplification by the second stage amplifier circuit 4, the signal is collected by the BCG signal extraction main control circuit 5. The soft pad is mainly composed of PVDF piezoelectric film strip (60 cm×1 cm) and knitted or sponge pad (40 cm×40 cm×3 cm), which is suitable for sitting and lying collection methods. PVDF piezoelectric film has the advantages of light weight, good impact resistance, and can be cut arbitrarily. It is suitable for BCG signal acquisition and can be equivalent to a capacitor. The pressure applied to its surface can cause the film to deform, thereby causing changes in the output charge. Therefore, PVDF is suitable for monitoring the pressure change. Placing the PVDF piezoelectric film strip at the bottom of the seat cushion can not only improve the user's comfort, but also prevent PVDF from serious deformation, thereby ensuring signal quality. The output signal of the PVDF piezoelectric film first passes through the charge-sensitive preamplifier and pre-preamplifier composed of TLC274A. To prevent power frequency interference, the signal passes through a 50 Hz notch filter. Finally, the signal passes through a common-mode amplifier with a gain of 15 times and a DC bias is added. The final signal variation range is 0~2 V, which is provided for AD acquisition by the main control IC.

[0021] Specifically, the charge-sensitive preamplifier circuit 1 includes a PVDF piezoelectric film sensor interface A1, an operational amplifier IC chip U2 and a capacitor C13, and the PVDF piezoelectric film sensor interface A1 and the capacitor C13 are both connected to the operational amplifier IC chip U2; the first-stage amplifier circuit 2 includes a resistor R13, a resistor R17, a resistor R18, a resistor R26, a resistor R24, a capacitor C15 and a capacitor C17, and the resistor R18 is respectively connected to the first pin and the fifth pin of the operational amplifier IC chip U2, the resistor R13 and the resistor R26 are respectively connected to the sixth pin and the seventh pin of the operational amplifier IC chip U2, and the resistor R24, the capacitor C15 and the capacitor C17 are all connected to the resistor R13. It can be understood that the operational amplifier IC chip U2 can be a TLC274ACDR chip, etc., which integrates multiple operational amplifiers, among which U2-1 forms a charge-sensitive preamplifier circuit through an external capacitor C13. Ideally, the PIN1 output voltage U0 of U2 is -Q / Cf (Q is the charge of the PVDF piezoelectric film sensor, and Cf is the feedback capacitor C13); U2-2 is used as a unidirectional amplifier with an amplification factor of 15 times, and the voltage signal output by U2-1 is further amplified.

[0022] Specifically, the 50HZ trap circuit 3 includes a resistor R27, a resistor R28, a resistor R29, a resistor R30, a resistor R31, a resistor R32, a resistor R33, a capacitor C20, a capacitor C21, a capacitor C22 and a capacitor C23. The resistor R27 and the resistor R11 are connected to the resistor R26, the capacitor C20 is connected to the resistor R27, the resistor R28 and the capacitor C21 respectively, the resistor R29 and the capacitor C22 are connected to the tenth pin of the operational amplifier IC chip U2, and the Capacitor C21 and resistor R28 are connected to capacitor C22 and resistor R29 respectively, the resistor R30 and capacitor C23 are both connected to the thirteenth pin and the fourteenth pin of the operational amplifier IC chip U2, the resistor R11 is connected to resistor R26 and resistor R31 respectively, the resistor R32 is connected to the eighth pin and the twelfth pin of the operational amplifier IC chip U2 respectively, and the eighth pin and the twelfth pin of the operational amplifier IC chip U2 are connected to the resistor R31 and the resistor R33 respectively. It can be understood that after the signal is amplified by the above-mentioned U2-2, it passes through the trap circuit composed of U2-3 and U2-4 (i.e., 50HZ trap circuit 3). The function of this trap circuit is to eliminate the 50HZ power frequency interference and improve the signal quality. Among them, the resistor R28=R29=2*R30, the capacitor C21=C22=C23 / 2, and this design requires the elimination of the 50HZ power frequency signal superimposed on the BCG signal, so the center frequency f0=50Hz, so that the resistor R2 8=resistance R29=22K, resistance R30=11K, capacitance C21=C22=0.15uF, capacitance C23=0.33uF, f0=1 / (2ΠRC)=1 / (2*3.14*22000*0.15 / 1000000)=48.3HZ, the value of the above Q can be adjusted by adjusting the resistance R32 and the resistance R33. The experiment shows that when R33=22M and R32=510K, the 50HZ power frequency interference can be eliminated well.

[0023] Specifically, the second-stage amplifier circuit 4 includes an operational amplifier U4, a capacitor C24, a capacitor C25, a capacitor C26, a capacitor C29, a capacitor C14, a resistor R12, a resistor R15, a resistor R34, a resistor R37 and a resistor R39, and the operational amplifier U4 is connected to the capacitor C24, the capacitor C25, the capacitor C26, the capacitor C29, the capacitor C14, the resistor R12, the resistor R15, the resistor R34, the resistor R37 and the resistor R39, respectively, and the capacitor C24 is connected to the resistor R31. It can be understood that the signal coming out of the above-mentioned trap circuit is still relatively small, and the signal needs to be further amplified, and the sampling reverse amplification is 15 times.

[0024] Specifically, the BCG signal extraction main control circuit 5 includes a main control chip U1, an antenna BT1, a crystal oscillator X1 and an inductor L1. The antenna BT1 crystal capacitor C10 is connected to the main control chip U1. The nineteenth pin of the main control chip U1 is connected to the resistor R39. The crystal oscillator X1 and the inductor L1 are both connected to the main control chip U1. The indication circuit includes an indicator light RGB1, a resistor R3, a resistor R6 and a resistor R9. The resistors R3, R6 and R9 are respectively connected to the indicator light RGB1 and the main control chip U1. It can be understood that the main control chip U1 adopts the BT8962b5 chip. After the secondary amplification, the signal enters the PIN19 pin of the main control chip U1 to collect the signal and process it. The ADC sampling rate is selected as 200HZ. After the main control collects the signal, the heart rate and breathing rate can be obtained after FIR filtering, which can be transmitted to the mobile phone APP for display via Bluetooth BLE. The indicator light RGB1 can indicate the connection status of Bluetooth and the charging status indication.

[0025] Specifically, the novel heart rate detector control circuit also includes a system power supply circuit 6, which includes an interface J2, an interface J3, a charging management IC chip U3, a transistor Q1, a transistor Q2 and a transistor Q3. The charging management IC chip U3 is respectively connected to the main control chip U1, the operational amplifier IC chip U2, the interface J2, the interface J3, the transistor Q1, the transistor Q2 and the transistor Q3. It can be understood that when the interface J2 (TYPE-C) is inserted to power the system, U3 switches Q2 to the on state to output 4.8V to power the system. When the interface J3 (TYPE-C) is connected to a mobile phone, the charging management IC chip U3 turns on Q1 to output OUT5V to charge the mobile phone. The charging management IC chip U3 can be a CH225S chip, which can provide a charging current of 1.5A for the mobile phone.

[0026] It can be understood that the utility model has a reasonable design and a unique structure. A charge-sensitive preamplifier circuit 1 and a first-stage amplifier circuit 2 are arranged to form an analog signal acquisition circuit to collect the charge data of the PVDF piezoelectric film sensor and amplify the output voltage signal. The 50HZ trap circuit 3 is used to eliminate the 50HZ industrial frequency signal contained in the BCG signal. The second-stage amplifier circuit 4 further amplifies the signal coming out of the 50HZ trap circuit. The signal after the second-stage amplification enters the BCG signal extraction main control circuit 5 for signal processing. After FIR filtering, the heart rate and respiratory rate data are calculated, thereby realizing accurate extraction of BCG signal features in complex environments, improving the real-time and accuracy of heart rate detection, and achieving high real-time and high accuracy.

[0027] The embodiments of the present invention are described in detail above with reference to the accompanying drawings, but the present invention is not limited to the described embodiments. For those skilled in the art, various changes, modifications, substitutions and variations of these embodiments are made without departing from the principles and spirit of the present invention, and still fall within the scope of protection of the present invention.

Claims

1. A novel heart rate detector control circuit, characterized in that: It includes a charge-sensitive preamplifier circuit, a first-stage amplifier circuit, a 50HZ trap circuit, a second-stage amplifier circuit, a BCG signal extraction main control circuit and an indication circuit. The charge-sensitive preamplifier circuit is electrically connected to the PVDF piezoelectric film sensor and the first-stage amplifier circuit, respectively; the 50HZ trap circuit is electrically connected to the first-stage amplifier circuit and the second-stage amplifier circuit, respectively; and the BCG signal extraction main control circuit is electrically connected to the second-stage amplifier circuit and the indication circuit, respectively.

2. The novel heart rate detector control circuit according to claim 1 is characterized in that: The charge-sensitive preamplifier circuit includes a PVDF piezoelectric film sensor interface A1, an operational amplifier IC chip U2 and a capacitor C13. The PVDF piezoelectric film sensor interface A1 and the capacitor C13 are both connected to the operational amplifier IC chip U2.

3. The novel heart rate detector control circuit according to claim 2 is characterized in that: The first-stage amplifier circuit includes resistor R13, resistor R17, resistor R18, resistor R26, resistor R24, capacitor C15 and capacitor C17. The resistor R18 is respectively connected to the first pin and the fifth pin of the operational amplifier IC chip U2, the resistor R13 and the resistor R26 are respectively connected to the sixth pin and the seventh pin of the operational amplifier IC chip U2, and the resistor R24, the capacitor C15 and the capacitor C17 are all connected to the resistor R13.

4. The novel heart rate detector control circuit according to claim 3 is characterized in that: The 50HZ trap circuit includes resistor R27, resistor R28, resistor R29, resistor R30, resistor R31, resistor R32, resistor R33, capacitor C20, capacitor C21, capacitor C22 and capacitor C23. The resistor R27 and resistor R11 are connected to the resistor R26. The capacitor C20 is connected to the resistor R27, resistor R28 and capacitor C21 respectively. The resistor R29 and capacitor C22 are connected to the tenth pin of the operational amplifier IC chip U2. The capacitor C The resistor R21 and the resistor R28 are connected to the capacitor C22 and the resistor R29 respectively, the resistor R30 and the capacitor C23 are both connected to the thirteenth pin and the fourteenth pin of the operational amplifier IC chip U2, the resistor R11 is respectively connected to the resistor R26 and the resistor R31, the resistor R32 is respectively connected to the eighth pin and the twelfth pin of the operational amplifier IC chip U2, and the eighth pin and the twelfth pin of the operational amplifier IC chip U2 are respectively connected to the resistor R31 and the resistor R33.

5. The novel heart rate detector control circuit according to claim 4 is characterized in that: The second-stage amplifier circuit includes an operational amplifier U4, a capacitor C24, a capacitor C25, a capacitor C26, a capacitor C29, a capacitor C14, a resistor R12, a resistor R15, a resistor R34, a resistor R37 and a resistor R39. The operational amplifier U4 is respectively connected to the capacitor C24, the capacitor C25, the capacitor C26, the capacitor C29, the capacitor C14, the resistor R12, the resistor R15, the resistor R34, the resistor R37 and the resistor R39, and the capacitor C24 is connected to the resistor R31.

6. The novel heart rate detector control circuit according to claim 5 is characterized in that: The BCG signal extraction main control circuit includes a main control chip U1, an antenna BT1, a crystal oscillator X1 and an inductor L1. The antenna BT1 crystal capacitor C10 is connected to the main control chip U1. The nineteenth pin of the main control chip U1 is connected to the resistor R39. The crystal oscillator X1 and the inductor L1 are both connected to the main control chip U1.

7. The novel heart rate detector control circuit according to claim 6 is characterized in that: The indicating circuit includes an indicator light RGB1, a resistor R3, a resistor R6 and a resistor R9. The resistor R3, the resistor R6 and the resistor R9 are connected to the indicator light RGB1 and the main control chip U1 respectively.

8. The novel heart rate detector control circuit according to claim 6 is characterized in that: It also includes a system power supply circuit, which includes an interface J2, an interface J3, a charging management IC chip U3, a transistor Q1, a transistor Q2 and a transistor Q3. The charging management IC chip U3 is respectively connected to the main control chip U1, the operational amplifier IC chip U2, the interface J2, the interface J3, the transistor Q1, the transistor Q2 and the transistor Q3.

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