Voltage equalizing device, driving chip and power supply equipment
By designing the voltage equalization module and the voltage equalization unit to adjust the DC bus capacitor, the complexity and cost of the voltage equalization scheme in the prior art are solved, and efficient and low-cost voltage equalization between cascaded power modules is achieved, and the reliability of the system is improved.
Patent Information
- Application Number
- CN202420701351.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-04-07
- Publication Date
- 2025-06-06
- Estimated Expiration
- 2034-04-07
AI Technical Summary
In the prior art, the voltage equalization scheme of the cascaded multi-level system is relatively complex in the use of active power control algorithms, occupies a lot of resources, has high implementation costs, and has limited voltage equalization capacity during light load or no load, and has poor reliability.
A voltage equalization device is designed to adjust the voltage of each DC bus capacitance through the voltage equalization module, and use multiple voltage equalization units and iron cores to exchange energy to ensure the equalization of voltage on the DC bus capacitance of each power module.
It realizes low-cost and high-efficiency active voltage equalization between cascading power modules, avoids power circulation dependence and use of heating elements, and improves the reliability and voltage equalization effect of the system.
Smart Images
Figure CN222953920U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to the technical field of power supply, and in particular to a voltage equalizing device, a driving chip and a power supply device. Background Art
[0002] As the green energy wave sweeps the world, the power level of power electronic equipment is getting bigger and bigger, and the voltage level is getting higher and higher. A traditional way to deal with it is to use cascaded multi-level to realize high-power and high-voltage power electronic equipment. However, active voltage balancing is required between cascaded multi-level modules. The active power control algorithm used in the active voltage balancing solution in related technologies is relatively complex, occupies a lot of resources, and has high implementation costs. Utility Model Content
[0003] According to one aspect of the utility model, a voltage balancing device is provided, the voltage balancing device is used to balance the voltage of a plurality of cascaded power modules, the output end of each power module has a DC bus capacitor, and each power module is configured to input and output voltages through the DC bus capacitor, and the voltage balancing device includes:
[0004] The voltage balancing module is connected to each DC bus capacitor and is used to perform voltage balancing adjustment on the voltage of each DC bus capacitor so that the voltage of each DC bus capacitor is the target voltage.
[0005] In a possible implementation, the voltage balancing module includes a plurality of voltage balancing units and an iron core, each of the voltage balancing units includes a first voltage regulating component and a second voltage regulating component.
[0006] The first voltage regulating component is used to adjust the voltage of the DC bus capacitor of each power module and establish a first intermediate voltage inside the first voltage regulating component;
[0007] The second voltage regulating component of each voltage balancing unit is arranged on one side of the iron core and connected to the first voltage regulating component, and is used to exchange energy through the iron core and adjust the first intermediate voltage to ensure the voltage balance of the DC bus capacitors of each connected power module.
[0008] In a possible implementation, the first voltage regulating component includes a first inductor, a first transistor, a second transistor and an intermediate voltage regulating capacitor, wherein:
[0009] The first end of the first inductor is used to receive the voltage on the connected DC bus capacitor, and the second end of the first inductor is connected to the source of the first transistor and the drain of the second transistor.
[0010] The drain of the first transistor is connected to the first end of the intermediate voltage regulating capacitor and the second voltage regulating component.
[0011] The source of the second transistor is connected to the second end of the intermediate voltage regulating capacitor and the second voltage regulating component; or
[0012] The drain of the first transistor is used to receive the voltage on the connected DC bus capacitor, the source of the first transistor and the drain of the second transistor are connected to the first end of the first inductor, and the second end of the first inductor is connected to the first end of the intermediate voltage regulating capacitor and the second voltage regulating component.
[0013] The source of the second transistor is connected to the second end of the intermediate voltage regulating capacitor and the second voltage regulating component.
[0014] The gates of the first transistor and the second transistor are used to receive a control signal, and the sum of the duty cycle of the control signal of the first transistor and the duty cycle of the control signal of the second transistor is 1 or slightly less than 1.
[0015] In a possible implementation, the second voltage regulating component includes a first voltage balancing transistor, a second voltage balancing transistor, a third voltage balancing transistor, a fourth voltage balancing transistor, a second inductor, a first DC blocking capacitor, and a primary winding, wherein:
[0016] The drain of the first voltage balancing transistor and the drain of the second voltage balancing transistor are connected as the first end of the second voltage regulating component, and the first end of the second voltage regulating component is connected to the first end of the intermediate voltage regulating capacitor.
[0017] The source of the first voltage balancing transistor is connected to the drain of the third voltage balancing transistor and the first end of the second inductor.
[0018] The source of the second voltage balancing transistor is connected to the drain of the fourth voltage balancing transistor and the first end of the first DC blocking capacitor.
[0019] The source of the third voltage balancing transistor and the source of the fourth voltage balancing transistor are connected to serve as the second end of the second voltage regulating component, and the second end of the second voltage regulating component is connected to the second end of the intermediate voltage regulating capacitor.
[0020] The second end of the second inductor is connected to the first end of the primary winding, and the second end of the primary winding is connected to the second end of the first DC blocking capacitor.
[0021] The primary winding is wound around the iron core,
[0022] Among them, the first balancing transistor and the third balancing transistor form a first bridge arm, the second balancing transistor and the fourth balancing transistor form a second bridge arm, and the control frequencies or control phases of control signals of the first bridge arm and the second bridge arm are different.
[0023] In a possible implementation, the second voltage regulating component includes a first voltage balancing transistor, a third voltage balancing transistor, a second inductor, a primary winding, a first DC blocking capacitor, and a second DC blocking capacitor, wherein:
[0024] The drain of the first voltage balancing transistor and the first end of the first DC blocking capacitor are connected to serve as the first end of the second voltage regulating component, and the first end of the second voltage regulating component is connected to the first end of the intermediate voltage regulating capacitor.
[0025] The source of the first voltage balancing transistor is connected to the drain of the third voltage balancing transistor and the first end of the second inductor.
[0026] The second end of the first DC blocking capacitor is connected to the first end of the second DC blocking capacitor and the second end of the primary winding.
[0027] The source of the third voltage balancing transistor and the second end of the second DC blocking capacitor are connected to serve as the second end of the second voltage regulating component, and the second end of the second voltage regulating component is connected to the second end of the intermediate voltage regulating capacitor.
[0028] The second end of the second inductor is connected to the first end of the primary winding
[0029] The primary winding is wound around the iron core,
[0030] The control signals of the first voltage balancing transistor and the third voltage balancing transistor have different control frequencies or different control phases.
[0031] In a possible implementation, the pressure equalizing module includes:
[0032] A voltage comparison circuit is used to compare the voltages of the DC bus capacitors;
[0033] The bidirectional charging and discharging circuit is connected to the voltage comparison circuit and is used to charge the DC bus capacitor corresponding to the smaller voltage by using the voltage of the DC bus capacitor corresponding to the larger voltage.
[0034] In a possible implementation, the power module includes a full-bridge power module or a half-bridge power module.
[0035] According to one aspect of the utility model, a driving chip is provided, and the driving chip includes the voltage balancing device.
[0036] According to one aspect of the utility model, a power supply device is provided, comprising the driving chip.
[0037] According to one aspect of the utility model, an electronic device is provided, and the electronic device includes the power supply device.
[0038] The voltage equalizing device of the embodiment of the utility model is used to equalize the voltage of multiple cascaded power modules. The output end of each power module has a DC bus capacitor. Each power module is configured to input and output voltages through the DC bus capacitor. The voltage of each DC bus capacitor is adjusted for voltage equalization through the voltage equalizing module so that the voltage of each DC bus capacitor is the target voltage, thereby realizing active voltage equalization between cascaded power modules at low cost and high efficiency.
[0039] It should be understood that the above general description and the following detailed description are only exemplary and explanatory, and do not limit the present invention. Other features and aspects of the present invention will become clear from the following detailed description of exemplary embodiments with reference to the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS
[0040] The drawings herein are incorporated into the specification and constitute a part of the specification. These drawings illustrate embodiments consistent with the present utility model and are used together with the specification to illustrate the technical solution of the present utility model.
[0041] Figure 1 A schematic diagram of a pressure equalizing device according to an embodiment of the utility model is shown.
[0042] Figure 2 A schematic diagram of a pressure equalizing module according to an embodiment of the utility model is shown.
[0043] Figure 3 A schematic diagram of a pressure equalizing module according to an embodiment of the utility model is shown.
[0044] Figure 4 A schematic diagram of a pressure equalizing module according to an embodiment of the utility model is shown.
[0045] Figure 5 A schematic diagram of a pressure equalizing module according to an embodiment of the utility model is shown. DETAILED DESCRIPTION
[0046] Various exemplary embodiments, features and aspects of the present invention will be described in detail below with reference to the accompanying drawings. The same reference numerals in the accompanying drawings represent elements with the same or similar functions. Although various aspects of the embodiments are shown in the accompanying drawings, the drawings are not necessarily drawn to scale unless otherwise specified.
[0047] In the description of the present invention, it should be understood that the terms "length", "width", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", etc., indicating the orientation or position relationship, are based on the orientation or position relationship shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present invention.
[0048] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the present utility model, the meaning of "plurality" is two or more, unless otherwise clearly and specifically defined.
[0049] In the present invention, unless otherwise clearly specified and limited, the terms "install", "connect", "connect", "fix" and the like should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.
[0050] The word “exemplary” is used exclusively herein to mean “serving as an example, example, or illustration.” Any embodiment described herein as “exemplary” is not necessarily to be construed as preferred or advantageous over other embodiments.
[0051] The term "and / or" herein is only a description of the association relationship of the associated objects, indicating that there may be three relationships. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. In addition, the term "at least one" herein represents any combination of at least two of any one or more of a plurality of. For example, including at least one of A, B, and C can represent including any one or more elements selected from the set consisting of A, B, and C.
[0052] In addition, in order to better illustrate the utility model, numerous specific details are given in the following specific embodiments. It should be understood by those skilled in the art that the utility model can also be implemented without certain specific details. In some examples, methods, means, components and circuits well known to those skilled in the art are not described in detail in order to highlight the main purpose of the utility model.
[0053] The voltage balancing of the existing cascaded multi-level system mostly utilizes its own power circulation, selectively chooses to charge some modules and discharge some modules to achieve voltage balancing between modules. This method has several disadvantages: first, this equalization method relies heavily on power circulation, and this method has limited or even no voltage balancing ability under light load and no load; second, the voltage balancing algorithm in the existing scheme is relatively complex, and superimposed on the power control, resulting in an extremely complex algorithm for the entire system; third, the traditional voltage balancing method is a qualitative analysis, and the switch of each module is determined according to the system state, which has poor reliability and brings hidden dangers to system design. In addition, there are also methods of using passive voltage balancing in the prior art, such as using heating elements to dissipate excess energy to achieve voltage balancing, but this method will first increase the difficulty of heat dissipation. In order to ensure a good voltage balancing effect, it may require a voltage balancing loss of several hundred watts, and heat dissipation is difficult to achieve at low cost, and it will reduce the efficiency of the entire machine.
[0054] like Figure 1 As shown, the voltage balancing device is used to balance the voltage of multiple cascaded power modules 10, the output end of each power module 10 has a DC bus capacitor C11, and each power module 10 is configured to input and output voltages through the DC bus capacitor C11. The voltage balancing device includes:
[0055] The voltage balancing module 20 is connected to each DC bus capacitor C11 and is used to perform voltage balancing adjustment on the voltage of each DC bus capacitor C11 so that the voltage of each DC bus capacitor C11 is the target voltage.
[0056] The multiple cascaded power modules 10 of the embodiment of the utility model are all configured to input and output voltages through the DC bus capacitor C11. The embodiment of the utility model performs voltage equalization adjustment on the voltages of each DC bus capacitor C11 through the voltage equalization module 20 so that the voltages of each DC bus capacitor C11 are the target voltage, thereby realizing active voltage equalization between the cascaded power modules 10 at low cost and high efficiency.
[0057] The embodiment of the utility model does not rely on power circulation and does not need to use heating elements to achieve voltage balancing, has high reliability, and overcomes the problems existing in the voltage balancing solutions of the prior art.
[0058] The embodiment of the utility model does not limit the specific implementation method of the power module 10 and the voltage balancing module 20. Those skilled in the art can set them according to actual conditions and needs. The power module 10 and the voltage balancing module 20 can be implemented by hardware circuits. For example, the power module 10 can adopt a full-bridge power module 10 or a half-bridge power module 10, and the voltage balancing module 20 can be implemented by a multi-port resonant bidirectional DC / DC converter or a multi-port dual-active bridge converter.
[0059] The embodiment of the utility model does not limit the specific implementation method of the voltage equalization module 20 to adjust the voltage of each DC bus capacitor C11 so that the voltage of each DC bus capacitor C11 is the target voltage. Those skilled in the art can adopt appropriate technical means to achieve it according to actual conditions and needs.
[0060] The preferred implementation modes are exemplarily introduced below.
[0061] The cascade described in the embodiment of the utility model can be parallel connection, series connection or a combination of series and parallel connection, which is not limited in the embodiment of the utility model. For example, Figure 1 As shown, the multiple cascaded power modules 10 may be in the form of multiple power modules 10 connected in parallel.
[0062] In a possible implementation, Figure 2 , Figure 3 , Figure 4 , Figure 5 As shown, the voltage balancing module 20 may include a plurality of voltage balancing units 200 and an iron core M. Each voltage balancing unit 200 may include a first voltage regulating component 210 and a second voltage regulating component 220.
[0063] The first voltage regulating component 210 is used to adjust the voltage of the DC bus capacitor C11 of each power module 10, and establish a first intermediate voltage inside the first voltage regulating component 210;
[0064] The second voltage regulating component 220 of each voltage balancing unit is arranged on one side of the iron core M and connected to the first voltage regulating component 210, and is used to exchange energy through the iron core M and adjust the voltage of the first intermediate voltage to ensure the voltage balance of the DC bus capacitor C11 of each connected power module.
[0065] In a possible implementation, the pressure equalizing device may include a control module, and the control module may be used to:
[0066] Determine the average voltage of the DC bus capacitor C11 of each power module 10;
[0067] Determine the duty cycle of each first voltage regulating component 210 using the average voltage, and determine the corresponding control signal;
[0068] The voltages of the power modules connected thereto are controlled by various control signals to be close to the average voltage.
[0069] Exemplarily, being near the average voltage indicates that the DC bus voltage of the power module has a smaller fluctuation, that is, voltage balance is achieved. For example, the first intermediate voltage can be adjusted by various control signals to achieve voltage balance. Of course, the embodiment of the utility model does not limit the specific size of the voltage fluctuation, and technical personnel in this field can set it according to actual conditions and needs.
[0070] The embodiment of the utility model does not limit the specific implementation of the control module. Exemplarily, the control module may include a processing component. Exemplarily, the processing component includes but is not limited to a separate processor, or a discrete component, or a combination of a processor and a discrete component. The processor may include a controller having an execution instruction function in an electronic device. The processor may be implemented in any appropriate manner, for example, by one or more application-specific integrated circuits (ASICs), digital signal processors (DSPs), digital signal processing devices (DSPDs), programmable logic devices (PLDs), field programmable gate arrays (FPGAs), controllers, microcontrollers, microprocessors or other electronic components. Inside the processor, the executable instructions may be executed by hardware circuits such as logic gates, switches, application-specific integrated circuits (ASICs), programmable logic controllers, and embedded microcontrollers.
[0071] The voltage of the DC bus capacitor C11 of each power module 10 can be regarded as the DC bus voltage of each power module 10. The embodiment of the utility model obtains the average voltage of the DC bus voltage of each power module 10 through averaging operation, and uses this average voltage as the set voltage of each first voltage regulating component 210. The control module obtains the duty cycle of the control signal of each first voltage regulating component 210 according to the set voltage through a certain control algorithm, and uses the duty cycle to adjust the voltage. The embodiment of the utility model does not limit the specific type of the control algorithm. For example, the control algorithm can be a mature proportional integral control algorithm, that is, a PI algorithm.
[0072] In a possible implementation, Figure 2 and Figure 3 As shown, each first voltage regulating component 210 may include a first inductor L1, a first transistor Q11, a second transistor Q12 and an intermediate voltage regulating capacitor C21, wherein:
[0073] The first end of the first inductor L1 is used to receive the voltage on the connected DC bus capacitor C11, and the second end of the first inductor L1 is connected to the source of the first transistor Q11 and the drain of the second transistor Q12.
[0074] The drain of the first transistor Q11 is connected to the first end of the intermediate voltage regulating capacitor C21 and the second voltage regulating component 220.
[0075] The source of the second transistor Q12 is connected to the second end of the intermediate voltage regulating capacitor C21 and the second voltage regulating component 220.
[0076] The gates of the first transistor Q11 and the second transistor Q12 are used to receive a control signal, and the sum of the duty ratio of the control signal of the first transistor Q11 and the duty ratio of the control signal of the second transistor Q12 is 1 or slightly less than 1. Slightly less than means that the difference between the sum of the duty ratios and 1 is small, and the difference can be the dead time of the transistor.
[0077] For example, assuming that the duty cycle of the control signal of the first transistor Q11 is D1, the duty cycle of the control signal of the second transistor Q12 is 1-D1.
[0078] In other implementations, the first voltage regulating component 210 may also be implemented in other ways.
[0079] Exemplarily, the first intermediate voltage is, for example, a voltage at a first end of the intermediate voltage regulating capacitor C21.
[0080] The first voltage regulating component 210 may also be implemented in other ways, for example, Figure 4 and Figure 5 As shown, each first voltage regulating component 210 may include a first inductor L1, a first transistor Q11, a second transistor Q12 and an intermediate voltage regulating capacitor C21, wherein the drain of the first transistor Q11 is used to receive the voltage on the connected DC bus capacitor C11, the source of the first transistor Q11 and the drain of the second transistor Q12 are connected to the first end of the first inductor L1, the second end of the first inductor L1 is connected to the first end of the intermediate voltage regulating capacitor C21 and the second voltage regulating component 220,
[0081] The source of the second transistor Q12 is connected to the second end of the intermediate voltage regulating capacitor C21 and the second voltage regulating element 220 .
[0082] Correspondingly, the gates of the first transistor Q11 and the second transistor Q12 are used to receive a control signal, and the sum of the duty ratio of the control signal of the first transistor Q11 and the duty ratio of the control signal of the second transistor Q12 is 1 or slightly less than 1. For example, assuming that the duty ratio of the control signal of the first transistor Q11 is D1, the duty ratio of the control signal of the second transistor Q12 is 1-D1. Slightly less than means that the difference between the sum of the duty ratios and 1 is small, and the difference can be the dead time of the transistor.
[0083] It should be noted that the embodiment of the present invention is exemplified by implementing the first voltage regulating component 210 in a half-bridge form. However, the embodiment of the present invention is not limited thereto. Those skilled in the art may also implement the first voltage regulating component 210 in a full-bridge form.
[0084] In a possible implementation manner, the control module may also be used to:
[0085] Determine the difference voltage between the voltage of each DC bus capacitor C11 and the target voltage;
[0086] A control signal is obtained according to the difference voltage, and the control signal is used to control the second voltage regulating component 220 to perform voltage equalization adjustment on each first intermediate voltage, so that the voltage of each DC bus capacitor C11 is the target voltage.
[0087] It should be understood that the “all target voltages” described in the embodiments of the present invention may have certain fluctuations, for example, may fluctuate above and below the target voltage, and the fluctuation range is not limited in the embodiments of the present invention.
[0088] The embodiment of the utility model does not limit the specific implementation method of obtaining a control signal according to the difference voltage, and using the control signal to control the second voltage regulating component 220 to adjust the voltage of each first intermediate voltage to make the voltage of each DC bus capacitor C11 the target voltage. Those skilled in the art can use appropriate technical means to achieve it according to actual conditions and needs. For example, the difference voltage can be used to obtain a control voltage through proportional integral operation, and the control voltage can be used to obtain a control frequency through a voltage-controlled oscillator to obtain a control signal, and then the control signal is used to control the second voltage regulating component 220 to adjust the voltage of each first intermediate voltage to make the voltage of each DC bus capacitor C11 the target voltage. Of course, the phase difference of each bridge arm in the second voltage regulating component 220 can also be obtained through proportional integral operation, and the corresponding control signal is determined according to the phase difference, and the control signal is used to control the second voltage regulating component 220 to adjust the voltage of each first intermediate voltage to make the voltage of each DC bus capacitor C11 the target voltage. The embodiment of the utility model does not limit this.
[0089] In a possible implementation, Figure 2 , Figure 4 As shown, each second voltage regulating component 220 may include a first voltage balancing transistor Q21, a second voltage balancing transistor Q22, a third voltage balancing transistor Q23, a fourth voltage balancing transistor Q24, a second inductor L2, a first DC blocking capacitor C21, and a primary winding P1, wherein:
[0090] The drain of the first voltage balancing transistor Q21 and the drain of the second voltage balancing transistor Q22 are connected as the first end of the second voltage regulating component 220, and the first end of the second voltage regulating component 220 is connected to the first end of the intermediate voltage regulating capacitor C21.
[0091] The source of the first voltage balancing transistor Q21 is connected to the drain of the third voltage balancing transistor Q23 and the first end of the second inductor L2.
[0092] The source of the second voltage balancing transistor Q22 is connected to the drain of the fourth voltage balancing transistor Q24 and the first end of the first DC blocking capacitor C21.
[0093] The source of the third voltage balancing transistor Q23 and the source of the fourth voltage balancing transistor Q24 are connected to serve as the second end of the second voltage regulating component 220, and the second end of the second voltage regulating component 220 is connected to the second end of the intermediate voltage regulating capacitor C21.
[0094] The second end of the second inductor L2 is connected to the first end of the primary winding P1, and the second end of the primary winding P1 is connected to the second end of the first DC blocking capacitor C21.
[0095] The primary winding P1 is wound around the iron core M, and the primary winding P1 of each voltage balancing unit 210 is wound around the iron core M.
[0096] Among them, the first balancing transistor Q21 and the third balancing transistor Q23 form a first bridge arm, the second balancing transistor Q22 and the fourth balancing transistor Q24 form a second bridge arm, and the control frequencies or control phases of the control signals of the first bridge arm and the second bridge arm are different.
[0097] The embodiment of the utility model does not limit the specific size of the duty cycle of the control signal of each transistor in the first bridge arm and the second bridge arm. Exemplarily, the sum of the duty cycles of the control signals of the two transistors in the first bridge arm is 1 or slightly less than 1, and the sum of the duty cycles of the control signals of the two transistors in the second bridge arm is 1 or slightly less than 1.
[0098] Figure 2 , Figure 4 Two voltage balancing units 200 are shown, but the embodiments of the present invention are not limited thereto, and those skilled in the art may set the number of corresponding voltage balancing units 200 according to the number of power modules 10 .
[0099] In the embodiment of the utility model, each voltage balancing unit 200 is set to share an iron core M, so as to realize energy exchange of the primary winding P1 of the second voltage regulating component 220 in each voltage balancing unit 200, and the difference voltage between the voltage of each DC bus capacitor C11 and the target voltage is determined; a control signal is obtained according to the difference voltage, and the first voltage balancing transistor Q21 and the third voltage balancing transistor Q23 form a first bridge arm, and the second voltage balancing transistor Q22 and the fourth voltage balancing transistor Q24 form a second bridge arm, and the control frequency or control phase of the control signal of the first bridge arm and the control signal of the second bridge arm are different, so that the control signal can be used to control the second voltage regulating component 220 to perform voltage balancing adjustment on each first intermediate voltage efficiently and quickly, so that the voltage of each DC bus capacitor C11 is the target voltage.
[0100] In a possible implementation, Figure 3 and Figure 5 As shown, the second voltage regulating component 220 may include a first voltage balancing transistor Q21, a third voltage balancing transistor Q23, a second inductor L2, a primary winding P1, a first DC blocking capacitor C21, and a second DC blocking capacitor C22, wherein:
[0101] The drain of the first voltage-balancing transistor Q21 and the first end of the first DC-blocking capacitor C21 are connected to serve as the first end of the second voltage-regulating component 220. The first end of the second voltage-regulating component 220 is connected to the first end of the intermediate voltage-regulating capacitor C21.
[0102] The source of the first voltage balancing transistor Q21 is connected to the drain of the third voltage balancing transistor Q23 and the first end of the second inductor L2.
[0103] The second end of the first DC blocking capacitor C21 is connected to the first end of the second DC blocking capacitor C22 and the second end of the primary winding P1.
[0104] The source of the third voltage-balancing transistor Q23 and the second end of the second DC-blocking capacitor C22 are connected to serve as the second end of the second voltage-regulating component 220. The second end of the second voltage-regulating component 220 is connected to the second end of the intermediate voltage-regulating capacitor C21.
[0105] The second end of the second inductor L2 is connected to the first end of the primary winding P1
[0106] The primary winding P1 is wound around the iron core M.
[0107] The control frequencies or control phases of the control signals of the first voltage balancing transistor Q21 and the third voltage balancing transistor are different.
[0108] The embodiment of the utility model does not limit the specific size of the duty cycle of the control signals of the first balancing transistor Q21 and the third balancing transistor Q23. Exemplarily, the sum of the duty cycles of the control signals of the first balancing transistor Q21 and the third balancing transistor Q23 is 1 or slightly less than 1.
[0109] The power module 10 and the voltage balancing module 20 are introduced as examples above, but the embodiments of the present invention are not limited thereto. In other implementations, the power module 10 and the voltage balancing module 20 may also have other implementation methods.
[0110] For example, in a possible implementation, the pressure equalization module 20 may include:
[0111] A voltage comparison circuit is used to compare the voltages of the DC bus capacitors C11;
[0112] The bidirectional charging and discharging circuit is connected to the voltage comparison circuit and is used to charge the DC bus capacitor C11 corresponding to the smaller voltage by using the voltage of the DC bus capacitor C11 corresponding to the larger voltage.
[0113] The embodiments of the present utility model do not limit the specific implementation methods of the voltage comparison circuit and the bidirectional charge and discharge circuit. Those skilled in the art can set them according to actual conditions and needs. For example, the voltage comparison circuit may include a voltage comparator, and the bidirectional charge and discharge circuit may be implemented by a bidirectional resonant bidirectional DC / DC converter CLLC, a bidirectional dual active bridge converter DAB, etc.
[0114] Exemplarily, assuming that U1 is the voltage on the DC bus capacitor C11 of the first power module 10, and U2 is the voltage on the DC bus capacitor C11 of the second power module 10, if the voltage comparison circuit determines that U1>U2, then the bidirectional charge and discharge circuit is started and uses U1 as input to charge U2 until the voltage difference is less than a certain threshold value (the specific value of the threshold value is not limited in the embodiment of the utility model, and those skilled in the art can set it according to actual conditions and needs). If the voltage comparison circuit determines that U2>U1, then the bidirectional charge and discharge circuit is started and uses U2 as input to charge U1 until the voltage difference is less than a certain threshold value.
[0115] Of course, the embodiment of the utility model can also adopt a constant voltage control scheme to automatically realize charging and discharging without repeatedly switching the charging and discharging algorithm. If it is an N-unit cascade multi-level module, then the voltage balancing module 20 is an N-port, and there is bidirectional power flow between each port, which can be charged and discharged. Using this module, the module voltage balancing can be realized very reliably, and the increased cost is very limited.
[0116] According to one aspect of the utility model, a driving chip is provided, and the driving chip includes the voltage balancing device.
[0117] According to one aspect of the utility model, a power supply device is provided, comprising the driving chip.
[0118] According to one aspect of the utility model, an electronic device is provided, and the electronic device includes the power supply device.
[0119] The embodiments of the present invention have been described above, and the above description is exemplary, not exhaustive, and is not limited to the disclosed embodiments. Many modifications and changes will be apparent to those of ordinary skill in the art without departing from the scope and spirit of the described embodiments. The selection of terms used herein is intended to best explain the principles of the embodiments, practical applications, or improvements to the technology in the market, or to enable other persons of ordinary skill in the art to understand the embodiments disclosed herein.
Claims
1. A pressure equalizing device, characterized in that: The voltage balancing device is used to balance the voltage of multiple cascaded power modules, the output end of each power module has a DC bus capacitor, and each power module is configured to input and output voltages through the DC bus capacitor. The voltage balancing device includes: The voltage balancing module is connected to each DC bus capacitor and is used to perform voltage balancing adjustment on the voltage of each DC bus capacitor so that the voltage of each DC bus capacitor is the target voltage.
2. The pressure equalizing device according to claim 1, characterized in that: The voltage balancing module includes a plurality of voltage balancing units and an iron core, each of which includes a first voltage regulating component and a second voltage regulating component. The first voltage regulating component is used to adjust the voltage of the DC bus capacitor of each power module, and establish a first intermediate voltage inside the first voltage regulating component to obtain the first intermediate voltage; The second voltage regulating component of each voltage balancing unit is arranged on one side of the iron core and connected to the first voltage regulating component, and is used to exchange energy through the iron core and adjust the first intermediate voltage to ensure the voltage balance of the DC bus capacitors of each connected power module.
3. The pressure equalizing device according to claim 2, characterized in that: The first voltage regulating component includes a first inductor, a first transistor, a second transistor and an intermediate voltage regulating capacitor, wherein: The first end of the first inductor is used to receive the voltage on the connected DC bus capacitor, and the second end of the first inductor is connected to the source of the first transistor and the drain of the second transistor. The drain of the first transistor is connected to the first end of the intermediate voltage regulating capacitor and the second voltage regulating component. The source of the second transistor is connected to the second end of the intermediate voltage regulating capacitor and the second voltage regulating component. The gates of the first transistor and the second transistor are used to receive a control signal, and the sum of the duty cycle of the control signal of the first transistor and the duty cycle of the control signal of the second transistor is 1 or slightly less than 1.
4. The pressure equalizing device according to claim 2, characterized in that: The first voltage regulating component includes a first inductor, a first transistor, a second transistor and an intermediate voltage regulating capacitor, wherein: The drain of the first transistor is used to receive the voltage on the connected DC bus capacitor, the source of the first transistor and the drain of the second transistor are connected to the first end of the first inductor, and the second end of the first inductor is connected to the first end of the intermediate voltage regulating capacitor and the second voltage regulating component. The source of the second transistor is connected to the second end of the intermediate voltage regulating capacitor and the second voltage regulating component. The gates of the first transistor and the second transistor are used to receive a control signal, and the sum of the duty cycle of the control signal of the first transistor and the duty cycle of the control signal of the second transistor is 1 or slightly less than 1.
5. The pressure equalizing device according to any one of claims 3 to 4, characterized in that: The second voltage regulating component includes a first voltage balancing transistor, a second voltage balancing transistor, a third voltage balancing transistor, a fourth voltage balancing transistor, a second inductor, a first DC blocking capacitor, and a primary winding, wherein: The drain of the first voltage balancing transistor and the drain of the second voltage balancing transistor are connected as the first end of the second voltage regulating component, and the first end of the second voltage regulating component is connected to the first end of the intermediate voltage regulating capacitor. The source of the first voltage balancing transistor is connected to the drain of the third voltage balancing transistor and the first end of the second inductor. The source of the second voltage balancing transistor is connected to the drain of the fourth voltage balancing transistor and the first end of the first DC blocking capacitor. The source of the third voltage balancing transistor and the source of the fourth voltage balancing transistor are connected to serve as the second end of the second voltage regulating component, and the second end of the second voltage regulating component is connected to the second end of the intermediate voltage regulating capacitor. The second end of the second inductor is connected to the first end of the primary winding, and the second end of the primary winding is connected to the second end of the first DC blocking capacitor. The primary winding is wound around the iron core, Among them, the first balancing transistor and the third balancing transistor form a first bridge arm, the second balancing transistor and the fourth balancing transistor form a second bridge arm, and the control frequencies or control phases of control signals of the first bridge arm and the second bridge arm are different.
6. The pressure equalizing device according to any one of claims 3 to 4, characterized in that: The second voltage regulating component includes a first voltage balancing transistor, a third voltage balancing transistor, a second inductor, a primary winding, a first DC blocking capacitor, and a second DC blocking capacitor, wherein: The drain of the first voltage balancing transistor and the first end of the first DC blocking capacitor are connected to serve as the first end of the second voltage regulating component, and the first end of the second voltage regulating component is connected to the first end of the intermediate voltage regulating capacitor. The source of the first voltage balancing transistor is connected to the drain of the third voltage balancing transistor and the first end of the second inductor. The second end of the first DC blocking capacitor is connected to the first end of the second DC blocking capacitor and the second end of the primary winding. The source of the third voltage balancing transistor and the second end of the second DC blocking capacitor are connected to serve as the second end of the second voltage regulating component, and the second end of the second voltage regulating component is connected to the second end of the intermediate voltage regulating capacitor. The second end of the second inductor is connected to the first end of the primary winding The primary winding is wound around the iron core, The control signals of the first voltage balancing transistor and the third voltage balancing transistor have different control frequencies or different control phases.
7. The pressure equalizing device according to claim 1, characterized in that: The pressure equalizing module comprises: A voltage comparison circuit is used to compare the voltages of the DC bus capacitors; The bidirectional charging and discharging circuit is connected to the voltage comparison circuit and is used to charge the DC bus capacitor corresponding to the smaller voltage by using the voltage of the DC bus capacitor corresponding to the larger voltage.
8. The pressure equalizing device according to claim 1, characterized in that: The power module includes a full-bridge power module or a half-bridge power module.
9. A driver chip, characterized in that: The driving chip includes the voltage balancing device according to any one of claims 1-8.
10. A power supply device, characterized in that: Comprising the driving chip as claimed in claim 9.