Silicon wafer detection mechanism and silicon wafer transportation and storage equipment

Abstract

The utility model provides a silicon wafer detection mechanism and silicon wafer transportation and storage equipment, and the silicon wafer detection mechanism comprises a belt conveyor which is provided with a lamination detection station; the lamination detector comprises a power supply, a first electrode and a second electrode, the first electrode and the second electrode are electrically connected with the power supply, the first electrode is arranged on the upper side of the lamination detection station, and the second electrode is arranged on the lower side of the lamination detection station to form a capacitor; and the capacitance measuring part is electrically connected to the capacitor to measure the capacitance change of the capacitor. In some embodiments, a connecting line between the first electrode and the second electrode forms an angle with a direction perpendicular to the bearing surface of the belt conveyor. According to the technical scheme, the capacitor is arranged at the belt conveyor, whether the silicon wafers are stacked or not can be judged based on the principle of the capacitor, the stacked silicon wafers can be sorted out conveniently, high accuracy is achieved, and the quality of the silicon wafers is guaranteed.

Description

Technical Field

[0001] The present disclosure relates to the technical field of silicon wafer production, and in particular, to a silicon wafer detection mechanism and a silicon wafer transportation and storage device. Background Art

[0002] Solar silicon wafers are an important part of solar cells. As the core material of the photovoltaic industry, their quality and integrity directly affect the conversion efficiency of solar cells.

[0003] During the transportation and storage of silicon wafers, various detections need to be performed on the silicon wafers, such as lamination detection, that is, determining whether there is overlap of silicon wafers.

[0004] CN205282449U discloses a lamination detection device. Among them, the inductor is a photoelectric inductor, which can detect the flow speed and time of silicon wafers in the flow channel, as well as the length of the silicon wafers, and then transmit the information to the controller. The controller calculates when the length of the silicon wafers is proportional to the time & speed, so as to know whether the silicon wafers have the lamination phenomenon.

[0005] However, this detection device determines whether there is lamination based on the flow speed, time, and silicon wafer length, and the accuracy is insufficient. Summary of the Utility Model

[0006] One technical problem to be solved by the present disclosure is: to improve the accuracy of lamination detection of silicon wafers.

[0007] To solve the above technical problem, an embodiment of the present disclosure provides a silicon wafer detection mechanism, which includes:

[0008] A belt conveyor, and a lamination detection station is arranged on the belt conveyor;

[0009] A lamination detector, which includes a power supply, a first electrode and a second electrode electrically connected to the power supply. The first electrode is arranged on the upper side of the lamination detection station and the second electrode is arranged on the lower side of the lamination detection station to form a capacitor; and

[0010] A capacitance measuring member, which is electrically connected to the capacitor to measure the capacitance change of the capacitor.

[0011] In some embodiments, the connection line between the first electrode and the second electrode forms an angle with the direction perpendicular to the bearing surface of the belt conveyor.

[0012] In some embodiments, the belt conveyor includes two belts extending in a first direction, and the two belts are arranged side by side in a second direction perpendicular to the first direction.

[0013] In some embodiments, the second electrode is arranged between the two belts in the second direction.

[0014] In some embodiments, the belt conveyor is provided with a surface quality inspection station upstream of the lamination detection station, and the wafer detection mechanism includes a surface quality detector and a lighting lamp disposed adjacent to the surface quality inspection station.

[0015] In some embodiments, the belt is provided with a recess at the surface quality inspection station, and the lighting lamp is a bar extending in the second direction and is received in the recess.

[0016] In some embodiments, the belt conveyor is provided with a waiting station upstream of the surface quality inspection station, and a proximity switch is provided at the waiting station.

[0017] In some embodiments, the belt conveyor includes a support plate, a pulley disposed on the support plate, and a driving member drivingly connected to the pulley.

[0018] In some embodiments, it further includes guide plates disposed on both sides of the downstream end of the belt conveyor, and the width of the guide plates gradually increases along the conveying direction of the belt conveyor to form a guiding channel with a gradually decreasing width between the two guide plates.

[0019] On the other hand, the present disclosure provides a wafer transportation and storage device, which includes the wafer detection mechanism of the above solution.

[0020] Through the above technical solution, a capacitor is provided at the belt conveyor, and based on the principle of the capacitor, it can be determined whether there is wafer lamination, so as to pick out the laminated wafers, with high accuracy and ensuring the quality of the wafers. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] In order to more clearly illustrate the technical solutions in the embodiments of the present disclosure or the prior art, the following will briefly introduce the drawings required for use in the description of the embodiments or the prior art. Obviously, the drawings in the following description are only some embodiments of the present disclosure. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on these drawings.

[0022] Figure 1 is a schematic structural diagram of the wafer detection mechanism disclosed in the embodiments of the present disclosure;

[0023] Figure 2 is a schematic structural diagram of another perspective of the wafer detection mechanism disclosed in the embodiments of the present disclosure.

[0024] Description of the reference numerals:

[0025] 1. Belt conveyor; 2. Belt; 3. First electrode; 4. Second electrode; 5. Surface quality detector; 6. Lighting lamp; 7. Proximity switch; 8. Support plate; 9. Pulley; 10. Driving member; 11. Guide plate; 12. Support bar; 14. Base; A. First silicon wafer; B. Second silicon wafer; C. Third silicon wafer. Detailed implementation manners

[0026] The following further describes the implementation manners of the present disclosure in detail with reference to the drawings and embodiments. The detailed descriptions and drawings of the following embodiments are used to exemplarily illustrate the principles of the present disclosure, but cannot be used to limit the scope of the present disclosure. The present disclosure can be implemented in many different forms, not limited to the specific embodiments disclosed herein, but including all technical solutions falling within the scope of the claims.

[0027] The present disclosure provides these embodiments to make the present disclosure thorough and complete, and to fully convey the scope of the present disclosure to those skilled in the art. It should be noted that: unless otherwise specifically stated, the relative arrangements of components and steps, the components of materials, numerical expressions and values described in these embodiments should be construed as merely exemplary, rather than as limitations.

[0028] It should be noted that in the description of the present disclosure, unless otherwise specified, the meaning of "a plurality" is greater than or equal to two; the orientation or positional relationships indicated by terms such as "upper", "lower", "left", "right", "inner", "outer", etc. are only for the convenience of describing the present disclosure and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and thus cannot be construed as a limitation of the present disclosure. When the absolute position of the described object changes, the relative position relationship may also change accordingly.

[0029] In addition, the "first", "second" and similar terms used in the present disclosure do not denote any order, quantity or importance, but are only used to distinguish different parts. "Vertical" is not strictly vertical, but within the allowable error range. "Parallel" is not strictly parallel, but within the allowable error range. The terms such as "including" or "comprising" mean that the elements before this term cover the elements listed after this term, and do not exclude the possibility of also covering other elements.

[0030] It should also be noted that in the description of the present disclosure, unless otherwise clearly specified and defined, the terms "installation", "connection", and "coupling" should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a direct connection or an indirect connection through an intermediate medium. For those of ordinary skill in the art, the specific meanings of the above terms in the present disclosure can be understood according to specific circumstances. When it is described that a specific device is located between a first device and a second device, there may or may not be an intermediate device between the specific device and the first device or the second device.

[0031] All terms used in the present disclosure have the same meanings as those understood by those of ordinary skill in the art to which the present disclosure pertains, unless otherwise specifically defined. It should also be understood that terms defined in a general dictionary, for example, should be interpreted as having meanings consistent with their meanings in the context of the relevant art, and should not be interpreted in an idealized or overly formal sense, unless specifically defined as such here.

[0032] Technologies, methods, and devices known to those of ordinary skill in the relevant art may not be discussed in detail, but where appropriate, the technologies, methods, and devices should be regarded as part of the specification.

[0033] Referring Figure 1 - Figure 2 as shown, the present disclosure provides a silicon wafer detection mechanism, which includes:

[0034] A belt conveyor 1, and a lamination detection station is provided on the belt conveyor 1;

[0035] A lamination detector, the lamination detector includes a power supply, a first electrode 3 and a second electrode 4 electrically connected to the power supply. The first electrode 3 is arranged on the upper side of the lamination detection station and the second electrode 4 is arranged on the lower side of the lamination detection station to form a capacitor; and

[0036] A capacitance measuring component, the capacitance measuring component is electrically connected to the capacitor to measure the capacitance change of the capacitor.

[0037] The belt conveyor 1 is a structure for carrying and conveying silicon wafers, and it can drive the silicon wafers to move in a specific direction. A plurality of stations arranged along the conveying direction are provided on the belt conveyor 1. For example, the lamination detection station, that is Figure 2 the position where the third silicon wafer C is located.

[0038] The lamination detector is used to detect whether the silicon wafers on the belt conveyor 1 are stacked together, for example, whether two or more silicon wafers are stacked together.

[0039] The dielectric constant of silicon (also known as the relative dielectric constant or permittivity) varies under different conditions, but usually refers to its value at room temperature. For single-crystalline silicon, at room temperature (about 300 K), the typical value of the relative dielectric constant of silicon is approximately 11.7. Therefore, inserting a silicon wafer between the electrodes of a capacitor can change the capacitance of the capacitor.

[0040] Among them, the lamination detector includes a first electrode 3 and a second electrode 4 electrically connected to a power source. The first electrode 3 and the second electrode 4 face each other to form a capacitance, and they are respectively arranged on the upper side and the lower side of the lamination detection station. When the silicon wafer reaches the lamination detection station, the silicon wafer is located between the first electrode 3 and the second electrode 4, resulting in a change in the capacitance of the capacitor formed by the first electrode 3 and the second electrode 4. In particular, when the number of silicon wafers is different, the overall thickness of the silicon wafers is also different, and the influence on the capacitance of the capacitor is also different. Therefore, different numbers of silicon wafers result in different capacitances of the capacitor.

[0041] The capacitance measuring component can be a capacitance meter, a multimeter, a capacitance measuring circuit, etc. Its measurement accuracy needs to meet the requirement of measuring the capacitance change between the first electrode 3 and the second electrode 4. In particular, it should be ensured that different capacitances when different numbers of silicon wafers are arranged between the first electrode 3 and the second electrode 4 can be measured.

[0042] Based on the capacitance change measured by the capacitance measuring component, it can be determined whether there is a silicon wafer at the lamination detection station and the number of silicon wafers, so as to determine whether there is lamination of silicon wafers (more than 2 silicon wafers overlapping). When lamination occurs, the laminated silicon wafers can be picked out at the equipment downstream of the silicon wafer detection mechanism.

[0043] In this solution, a capacitor is arranged at the belt conveyor. Based on the principle of the capacitor, it can be determined whether there is lamination of silicon wafers, so as to pick out the laminated silicon wafers, which has high accuracy and ensures the quality of the silicon wafers.

[0044] Among them, in some embodiments, the connection line between the first electrode 3 and the second electrode 4 forms an angle with the direction perpendicular to the bearing surface of the belt conveyor 1. The bearing surface of the belt conveyor 1 can be attached to the carried silicon wafer and is parallel to the silicon wafer. Therefore, the direction perpendicular to the bearing surface of the belt conveyor 1 is the thickness direction of the silicon wafer. The length of the connection line between the first electrode 3 and the second electrode 4 is the distance between the two, and this distance is related to the capacitance of the formed capacitor. The connection line between the first electrode 3 and the second electrode 4 forms an included angle with the thickness direction of the measured silicon wafer (i.e., the third direction mentioned above), which makes the thickness of the silicon wafer located between the first electrode 3 and the second electrode 4 as a dielectric greater than its actual thickness. That is, the thickness of the silicon wafer as a dielectric is the dimension along the direction of the connection line between the first electrode 3 and the second electrode 4. Since the thickness of the silicon wafer as a dielectric is greater than its actual thickness, this increases the influence of the silicon wafer on the capacitance of the capacitor, making the influence of the number of silicon wafers on the capacitance value greater. Especially for stacked silicon wafers and unstacked silicon wafers, there is a greater difference in the measured capacitance values, which helps to more easily and accurately determine whether there are stacked silicon wafers at the stacked wafer detection station.

[0045] Among them, in some embodiments, the belt conveyor 1 includes two belts 2 extending along the first direction, and the two belts 2 are arranged side by side along the second direction perpendicular to the first direction. Refer to Figure 1 and Figure 2 As shown, the conveying direction is the first direction, the width direction of the belt conveyor is the second direction perpendicular to the conveying direction, and the thickness direction of the silicon wafer supported by the belt 2 is the third direction, which is perpendicular to the first direction and the second direction. In the direction transverse to the conveying direction, two spaced belts 2 are provided, and the two belts 2 can respectively support two edges of the silicon wafer to allow each detection device to detect the middle part of the silicon wafer and avoid the belts 2 affecting the detection of the silicon wafer.

[0046] Among them, in some embodiments, the second electrode 4 is arranged between the two belts 2 along the second direction. Refer to Figure 1 As shown, the second electrode 4 is arranged on the lower side of the silicon wafer to be detected, and it is arranged between the two belts 2. When the third silicon wafer C to be detected moves to the stacked wafer detection station, the two side edges of the silicon wafer are supported by the belts 2, and the second electrode 4 can be located in the space between the two belts 2, making the distance between the second electrode 4 and the silicon wafer closer. Correspondingly, the influence of the number of silicon wafers on the capacitance value of the capacitor is greater, improving the sensitivity and accuracy of the detection.

[0047] Of course, in other embodiments, at the stacked wafer detection station, only one belt can also be provided, and the second electrode 4 can be located on the lower side of the part of the belt that supports the silicon wafer.

[0048] In addition, in some embodiments, the belt conveyor 1 is provided with a surface quality inspection station upstream of the lamination inspection station. The wafer inspection mechanism includes a surface quality detector 5 and a lighting lamp 6 disposed adjacent to the surface quality inspection station. The surface quality of the wafer can be characterized by surface roughness. The surface quality detector 5 can detect the surface roughness of the wafer (such as Figure 2 the second wafer B shown), so as to detect the surface quality of the wafer. The lighting lamp 6 can emit light to the second wafer B, and the surface quality detector 5 can receive the light reflected by the second wafer B, so as to judge the surface roughness of the wafer according to the uniformity of the light. The surface quality detection of the wafer by the surface quality detector 5 is a preliminary detection, and does not require a very high detection accuracy, but only needs to detect the wafers with obvious surface defects. The surface quality detector 5 and the lighting lamp 6 can be disposed between two belts 2.

[0049] In addition, in some embodiments, the belt 2 is provided with a recess at the surface quality inspection station. The lighting lamp 6 is bar-shaped extending in the second direction and is received in the recess. Refer to Figure 1 and Figure 2 shown, the belt 2 is provided with a recess at the middle position in the conveying direction, i.e., the first direction. The lighting lamp 6 is long bar-shaped extending in the second direction and is received in the recess, and can emit light to the passing wafers. The size of the lighting lamp 6 in the second direction is substantially the same as the size of the wafer in the second direction, ensuring that all positions of the wafer in the second direction can be covered by the light. The highest point of the lighting lamp 6 is lower than the height of other parts of the belt 2 outside the recess, ensuring that the wafers carried by the belt 2 can cross the recess without contacting the lighting lamp 6.

[0050] In addition, in some embodiments, the belt conveyor 1 is provided with a waiting station upstream of the surface quality inspection station. A proximity switch 7 is disposed at the waiting station. Refer to Figure 2 shown, the position where the first wafer A is located is the waiting station. The proximity switch 7 can be used to detect whether there is a wafer at the waiting station. Among them, the proximity switch 7 can be disposed between two belts 2, i.e., below the wafer to be detected. The proximity switch 7 can be a photoelectric proximity switch or an ultrasonic proximity switch, which does not contact the wafer to be detected, avoiding scratching the wafer.

[0051] In addition, in some embodiments, the belt conveyor 1 includes a support plate 8, a pulley 9 disposed on the support plate 8, and a driving member 10 drivingly connected to the pulley 9. The support plate 8 is perpendicular to the second direction. The belt conveyor 1 includes two parallel support plates 8, and a pulley 9 is respectively disposed on each support plate 8. The pulley 9 on each support plate 8 can support a belt 2, and the pulleys 9 on the two support plates 8 can be symmetrically arranged with respect to each other. One pulley 9 on each of the two support plates 8 is connected by a transmission shaft, and these two pulleys 9 are drivingly connected to the driving member 10 to allow the driving member 10 to synchronously drive the two pulleys 9 to rotate, thereby driving the two belts 2 to rotate synchronously. The driving member 10 can be a torque output member such as a motor, an engine, a hydraulic motor, etc. The bottoms of the two support plates 8 can be supported by a base 13, and the support plates 8 can be connected to the base 13 to ensure the relative fixation of the two support plates 8.

[0052] Reference Figure 1 and Figure 2 As shown, the belt 2 is supported by the pulley 9 to form a portion for supporting the silicon wafer and a recessed portion. In addition, a support bar 12 is provided on the lower side of the portion of the belt 2 in direct contact with the silicon wafer. The support bar 12 is located between the two pulleys 9 and can support the belt 2 to prevent it from sinking. The support bar 12 can be mounted on the support plate 8.

[0053] In addition, in some embodiments, the silicon wafer detection mechanism further includes guide plates 11 disposed on both sides of the downstream end of the belt conveyor 1. The width of the guide plates 11 gradually increases along the conveying direction of the belt conveyor 1 to form a guiding channel with a gradually decreasing width between the two guide plates 11. The two guide plates 11 are located on both sides of the two belts 2 in the second direction, so that the silicon wafer about to leave the belt 2 can be guided by the guide plates 11. For example, when the silicon wafer deflects to one side, it will contact the corresponding guide plate 11 on this side, and under the guiding action of the edge of the guide plate 11, the silicon wafer will return to the middle position in the second direction. That is to say, the guiding channel with a gradually decreasing width formed between the two guide plates 11 can cause the silicon wafer to be deflected in the second direction, and it can guide the deflected silicon wafer back to the middle position, so that the silicon wafer enters the next device along the correct predetermined direction.

[0054] In addition, the present solution also discloses a silicon wafer transportation and storage device, which includes the silicon wafer detection mechanism of the above solution. In addition to the silicon wafer detection mechanism, the silicon wafer transportation and storage device may further include a sorting mechanism located downstream of the silicon wafer detection mechanism, which can sort out the silicon wafers with problems; and may further include a silicon wafer storage mechanism for temporarily storing silicon wafers, a silicon wafer conveying mechanism for moving the silicon wafers to the silicon wafer detection mechanism, etc.

[0055] So far, the embodiments of the present disclosure have been described in detail. To avoid obscuring the concept of the present disclosure, some details well known in the art are not described. Those skilled in the art can fully understand how to implement the technical solutions disclosed herein based on the above description.

[0056] Although some specific embodiments of the present disclosure have been described in detail by way of examples, those skilled in the art should understand that the above examples are for illustrative purposes only and not for limiting the scope of the present disclosure. Those skilled in the art should understand that the above embodiments can be modified or equivalent substitutions can be made for some technical features without departing from the scope and spirit of the present disclosure. In particular, as long as there is no structural conflict, the various technical features mentioned in each embodiment can be combined in any way.

Claims

1. A silicon wafer detection mechanism, characterized in that: include: A belt conveyor (1), wherein the belt conveyor (1) is provided with a lamination detection station; A stacking detector, the stacking detector comprising a power supply, a first electrode (3) and a second electrode (4) electrically connected to the power supply, the first electrode (3) being arranged on the upper side of the stacking detection station and the second electrode (4) being arranged on the lower side of the stacking detection station to form a capacitor; as well as A capacitance measuring device is electrically connected to the capacitor to measure a capacitance change of the capacitor.

2. The silicon wafer detection mechanism according to claim 1, characterized in that: A line connecting the first electrode (3) and the second electrode (4) forms an angle with a direction perpendicular to a bearing surface of the belt conveyor (1).

3. The silicon wafer detection mechanism according to claim 1, characterized in that: The belt conveyor (1) comprises two belts (2) extending along a first direction, and the two belts (2) are arranged side by side along a second direction perpendicular to the first direction.

4. The silicon wafer detection mechanism according to claim 3, characterized in that: The second electrode (4) is arranged between the two belts (2) along the second direction.

5. The silicon wafer detection mechanism according to claim 3, characterized in that: The belt conveyor (1) is provided with a surface quality inspection station located upstream of the stacking inspection station, and the silicon wafer inspection mechanism comprises a surface quality detector (5) and an illumination lamp (6) arranged adjacent to the surface quality inspection station.

6. The silicon wafer detection mechanism according to claim 5, characterized in that: The belt (2) is provided with a recessed portion located at the surface quality detection station, and the lighting lamp (6) is in the shape of a strip extending along the second direction and is accommodated in the recessed portion.

7. The silicon wafer detection mechanism according to claim 5, characterized in that: The belt conveyor (1) is provided with a waiting station located upstream of the surface quality detection station, and a proximity switch (7) is provided at the waiting station.

8. The silicon wafer detection mechanism according to claim 3, characterized in that: The belt conveyor (1) comprises a supporting plate (8), a belt pulley (9) arranged on the supporting plate (8), and a driving member (10) drivingly connected to the belt pulley (9).

9. The silicon wafer detection mechanism according to claim 1, characterized in that: It also includes guide plates (11) arranged on both sides of the downstream end of the belt conveyor (1), the width of the guide plates (11) gradually increasing along the conveying direction of the belt conveyor (1) to form a guide channel with a gradually decreasing width between the two guide plates (11).

10. A silicon wafer transport storage device, characterized in that: The invention comprises a silicon wafer detection mechanism as described in any one of claims 1 to 9.

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