Multi-port mainboard and router

Abstract

The utility model provides a multi-port mainboard and a router, and belongs to the technical field of routers. Comprising a mainboard; the power supply input unit is arranged on the main board, the power supply input unit is electrically connected with the main board, the power supply input unit comprises a power supply jack, and the power supply jack is a 12V input port; and the step-down converter is electrically connected with the power jack, and the step-down converter is used for receiving a power supply from the 12V input port and generating a plurality of power supplies with different voltage levels, and the power supplies at least comprise a 1.0 V power supply, a 1.5 V power supply and a 3.3 V power supply. Through the cooperation of the step-down converter and other units, the purpose of providing an adaptive power supply for various components with different voltage requirements is achieved, and meanwhile through the cooperation of the inner layer unit, the storage unit and the erasable read-only memory, the data reading and writing speed is remarkably improved, and the data reading and writing efficiency is improved. And the data storage capacity, flexibility and reliability are improved.

Description

Technical Field

[0001] The utility model relates to the technical field of routers, and particularly relates to a multi-port main board and a router. Background Art

[0002] With the rapid development of information technology, routers are increasingly widely used in the communication field; as the core device for network connection, the continuous improvement of its performance and functions is crucial for meeting the growing communication needs; in the past development, the design of routers has evolved continuously, from simple port connections to complex function integrations, providing users with more stable and efficient network services.

[0003] However, in the prior art, common multi-port main boards and routers usually adopt a single power input, and after simple conversion, power is supplied to each component; this method cannot meet the diverse voltage requirements of different components; for example, some high-performance processors may require precise power supply of 1.0V, while storage chips may require voltages of 1.5V or 3.3V; but the existing power supply schemes often cannot provide such precise and diverse voltage outputs, which not only affects the performance of components but may also lead to system instability or even failure. Summary of the Utility Model

[0004] The technical problem to be solved by the utility model is to provide a multi-port main board and a router to solve the technical problems in the prior art, such as single power supply, inability to adapt to the voltage requirements of multiple components, slow data storage and loading speeds, insufficient capacity, and lack of flexibility.

[0005] Technical Solution: To achieve the above objectives, the present utility model is realized through the following technical solutions: A multi-port main board, comprising: a main board; a power input unit, which is disposed on the main board and electrically connected to the main board, and the power input unit includes: a power jack, and the power jack is a 12V input port; a buck converter, which is electrically connected to the power jack, and the buck converter is used to receive power from the 12V input port and generate multiple power supplies with different voltage levels, at least including 1.0V, 1.5V, and 3.3V power supplies. Among them, the buck converter should adopt advanced power management technology, have a conversion efficiency of at least 85% to reduce energy waste; the accuracy of its output voltage should be controlled within ±5% to ensure accurate and stable power supply for each component. At the same time, the buck converter should have functions such as overcurrent protection, overvoltage protection, and overheat protection to enhance the reliability and safety of the system.

[0006] In a further embodiment, a main control unit is disposed on the main board. The main control unit is electrically connected to a power input unit and is responsible for performing various computing tasks and controlling the operation of the entire system. An inner layer unit is disposed on the main board. The inner layer unit is a third-generation double data rate synchronous dynamic random access memory and is electrically connected to the main control unit. The inner layer unit is used to store runtime data. A storage unit is disposed on the main board and is electrically connected to the main control unit. The storage unit uses flash memory technology based on the SPI interface and is used for the fast loading and storage of firmware and configuration data. The main control unit can adopt a high-performance multi-core processor architecture with a main frequency of not less than 2.0 GHz and sufficient cache capacity to improve data processing efficiency. The storage capacity of the inner layer unit should be configured according to system requirements, usually not less than 4 GB, and the data transfer rate should reach a relatively high level of the DDR3 standard. The flash memory capacity of the storage unit should meet the storage requirements of system firmware and common configuration data and support at least 100,000 erase-write cycles to ensure the reliability of long-term use.

[0007] In a further embodiment, an erasable programmable read-only memory (EPROM) is disposed on the main board. The EPROM is provided with an SPI interface and is connected to the main control unit as a slave device so that the master device can read and write data through the SPI protocol. The storage capacity of the EPROM should be between 1 MB and 16 MB, and the data transfer rate of the SPI interface should not be less than 10 Mbps. At the same time, to ensure the security and reliability of data, the EPROM should have data encryption and error correction functions.

[0008] In a further embodiment, a reset unit is disposed on the main board and is electrically connected to the main control unit through a bus. The reset unit is used to trigger the reset operation of related devices or systems when receiving a low-level "Reset#" signal and restore its state to the initial setting or a known safe state. The response time of the reset unit should not exceed 100 microseconds, and the effective level duration of the reset signal should be between 10 milliseconds and 100 milliseconds to ensure reliable system reset. At the same time, the reset unit should have two functions: power-on automatic reset and manual reset to meet the requirements of different application scenarios.

[0009] In a further embodiment, there is at least one serialization / deserialization unit, which is disposed within the main board. The serialization / deserialization unit is electrically connected to the main control unit and is used to process optical fiber signals. There is at least one optical fiber signal control unit, which is connected to the serialization / deserialization unit and is used to control optical fiber signals. The conversion rate of the serialization / deserialization unit should be not less than 10 Gbps, and the bit error rate should be lower than 10^(-12). The optical fiber signal control unit should have functions such as automatic power control, wavelength stability, and forward error correction, and the attenuation and distortion of the signal should be controlled within a small range.

[0010] In a further embodiment, an external output interface unit is disposed on the main board and is used to realize the connection and data exchange between the main board and external devices and networks. There are multiple physical layer units, which are used to connect the external output interface unit to the optical fiber signal control unit and the main control unit. The external output interface unit should support common interface standards such as RJ45, USB Type-A / C, etc., and the plugging and unplugging life of the interface should be not less than 10,000 times. The physical layer units should comply with relevant communication protocol standards such as IEEE802.3, USB3.0, etc., and the attenuation of signal transmission should be controlled within the specified range.

[0011] In a further embodiment, an electrical port signal control unit is disposed within the external output interface unit and is used to control the transceiver of electrical port signals. A wide area network interface is disposed within the external output interface unit and is connected to the electrical port signal control unit through the physical layer unit. The wide area network interface is used to connect to an external network. A USB interface unit is disposed within the external output interface unit and is used to provide connections for external devices. The electrical port signal control unit should support adaptive rate adjustment and full-duplex / half-duplex mode switching, and have functions of lightning protection and electrostatic protection. The wide area network interface should support multiple network protocols such as IPv4 / IPv6 and have functions of network address translation and firewall. The USB interface unit should support USB high-speed and ultra-high-speed modes and be able to provide stable power supply for connected devices.

[0012] In a further embodiment, there are at least four optical fiber ports, which are disposed within the external output interface unit and are used to provide optical fiber communication capabilities. The optical fiber ports should support common optical fiber types such as single-mode optical fiber and multi-mode optical fiber, and the transmission rate should be not less than 10 Gbps. Each optical fiber port should have an independent status indicator to display the connection status and data transmission activity.

[0013] In a further embodiment, an LED lamp display unit is disposed on the main board, and the LED lamp display unit is electrically connected to the main control unit through a communication protocol. The LED lamp display unit is used to display the system status; an LED indicator lamp is disposed on the main board, and the LED indicator lamp is electrically connected to the LED lamp display unit. The LED indicator lamp is used to indicate the system status. Among them, the LED lamp display unit should have high brightness and clear display effect, and be able to display various system status information, such as numbers, letters, and graphics, etc.; the color and blinking mode of the LED indicator lamp should have clear definitions and meanings, and the response time should not exceed 100 milliseconds.

[0014] A router, a router main body, the main board is stably installed in the router main body. The installation of the main board inside the router main body should adopt an anti-vibration and anti-interference fixing method to ensure normal operation even in harsh environments; the router main body should have intelligent traffic management and QoS (Quality of Service) functions to ensure different types of data transmission requirements; at the same time, the router main body should support remote management and upgrade to facilitate users to perform maintenance and updates.

[0015] Beneficial effects: 1. By setting a power input unit on the main board, which includes a power jack of a 12V input port and a buck converter electrically connected thereto, the buck converter can receive power from the 12V input port and accurately generate multiple different voltage levels of power, at least including 1.0V, 1.5V, and 3.3V, etc.; it achieves the purpose of providing an adapted power supply for various components with different voltage requirements, realizes the effect of avoiding performance degradation, faults, or even damage of components caused by voltage mismatch; ensures that each component can work stably at its required ideal voltage, thereby giving full play to its performance; improves the stability and reliability of the entire system, extends the service life of components, and reduces system failures and maintenance costs caused by power supply problems.

[0016] 2. By setting an inner layer unit, a storage unit using the SPI interface, and an erasable read-only memory on the main board in cooperation, the inner layer unit, as a third-generation double data rate synchronous dynamic random access memory, can quickly store runtime data; the storage unit utilizes the flash technology of the SPI interface to achieve fast loading and storage of firmware and configuration data; the erasable read-only memory provides a flexible way of data storage and modification; it achieves the purpose of meeting the diverse requirements of the system for data storage and fast loading in different scenarios, realizes the effect of significantly improving the data read and write speed, increasing the data storage capacity, flexibility, and reliability. Description of the Drawings

[0017] To more clearly illustrate the technical solutions in the embodiments of the present utility model or the prior art, the following will briefly introduce the drawings required for the description of the embodiments or the prior art. Obviously, the drawings in the following description are only some embodiments of the present utility model. For those of ordinary skill in the art, without creative efforts, other drawings can be obtained based on these drawings.

[0018] Figure 1 This is the circuit diagram of the present utility model.

[0019] Figure 2 This is the structural schematic diagram of the present utility model.

[0020] Figure 3 is Figure 1 the main sectional structural schematic diagram of

[0021] The reference numerals in the figure are: 1, main board; 2, power input unit; 201, power jack; 202, buck converter; 3, main control unit; 4, inner layer unit; 5, storage unit; 6, erasable read-only memory; 7, reset unit; 8, serialization / deserialization unit; 9, optical fiber signal control unit; 10, external output interface unit; 1001, electrical port signal control unit; 1002, wide area network interface; 1003, USB interface unit; 1004, optical fiber port; 11, physical layer unit; 12, LED display unit; 13, LED indicator; 14, router body. Detailed implementation manners

[0022] To make the objectives, technical solutions, and advantages of the embodiments of the present utility model clearer, the technical solutions in the embodiments of the present utility model will be clearly and completely described. Obviously, the described embodiments are some, but not all, of the embodiments of the present utility model. Based on the embodiments of the present utility model, all other embodiments obtained by those of ordinary skill in the art without creative efforts belong to the scope of protection of the present utility model.

[0023] By providing a multi-port main board and a router in the embodiments of the present application, the technical problems of single power supply, inability to adapt to the voltage requirements of multiple components, slow data storage and loading speed, insufficient capacity, and lack of flexibility are solved. In actual use, it can adapt to the voltage requirements of multiple components, improve the data reading and writing speed, and increase the flexibility and reliability of data storage.

[0024] To better understand the above technical solutions, the following will describe the above technical solutions in detail in conjunction with the accompanying drawings of the specification and specific implementation manners.

[0025] Embodiment 1

[0026] Refer to Figure 1, a multi-port main board, comprising: main board 1; a power input unit 2, which is disposed on the main board 1 and electrically connected to the main board 1. The power input unit 2 includes: a power jack 201, and the power jack 201 is a 12V input port; a buck converter 202, which is electrically connected to the power jack 201. The buck converter 202 is used to receive power from the 12V input port and generate multiple power supplies with different voltage levels, at least including 1.0V, 1.5V and 3.3V power supplies.

[0027] By receiving power from the 12V input port through the buck converter 202 and generating multiple power supplies with different voltage levels such as at least 1.0V, 1.5V and 3.3V, the purpose of providing adapted voltages for different components on the main board 1 is achieved, and the effect of ensuring the stable operation of each component is realized.

[0028] A main control unit 3, which is disposed on the main board 1. The main control unit 3 is electrically connected to the power input unit 2. The main control unit 3 is used to be responsible for executing various computing tasks and controlling the operation of the entire system; an inner layer unit 4, which is disposed on the main board 1. The inner layer unit 4 is a third-generation double data rate synchronous dynamic random access memory. The inner layer unit 4 is electrically connected to the main control unit 3. The inner layer unit 4 is used to store runtime data; a storage unit 5, which is disposed on the main board 1, and the storage unit 5 is electrically connected to the main control unit 3. The storage unit 5 adopts a flash memory technology based on the SPI interface. The storage unit 5 is used for the fast loading and storage of firmware and configuration data.

[0029] Through the cooperation of these units, the purpose of efficiently processing data, storing key information and ensuring the normal operation of the system is achieved, and the effect of improving the performance and stability of the system is realized.

[0030] A rewritable read-only memory 6, which is disposed on the main board 1. The rewritable read-only memory 6 is provided with an SPI interface. The rewritable read-only memory 6 is connected to the main control unit 3 as a slave device, so that the master device can read and write data through the SPI protocol.

[0031] Through this connection method, the purpose of flexibly storing and modifying the key data of the system is achieved, and the effect of enhancing the configurability and adaptability of the system is realized.

[0032] A reset unit 7, which is disposed on the main board 1, and the reset unit 7 is electrically connected to the main control unit 3 through a bus. The reset unit 7 is used to trigger the reset operation of related devices or systems when receiving a low-level "Reset#" signal, and restore its state to the initial setting or a known safe state.

[0033] Through the cooperation of the reset unit 7 and the main control unit 3, the purpose of quickly restoring normal operation in case of system anomalies is achieved, and the effect of improving the reliability and stability of the system is realized.

[0034] There is at least one serialization / deserialization unit 8, and the serialization / deserialization unit 8 is disposed within the main board 1, and the serialization / deserialization unit 8 is electrically connected to the main control unit 3. The serialization / deserialization unit 8 is used to process optical fiber signals; there is at least one optical fiber signal control unit 9, and the optical fiber signal control unit 9 is connected to the serialization / deserialization unit 8. The optical fiber signal control unit 9 is used to control optical fiber signals.

[0035] Through the cooperation of these two units, the purpose of efficiently processing and precisely controlling optical fiber signals is achieved, and the effect of improving the quality and efficiency of optical fiber communication is realized.

[0036] The external output interface unit 10 is disposed on the main board 1, and the external output interface unit 10 is used to realize the connection and data exchange between the main board and external devices and networks; there are multiple physical layer units 11, and the physical layer units 11 are used to connect the external output interface unit 10 to the optical fiber signal control unit 9 and the main control unit 3.

[0037] Through this connection architecture, the purpose of realizing data transmission and communication between different units is achieved, and the effect of expanding the functions and interface diversity of the main board 1 is realized.

[0038] The electrical port signal control unit 1001 is disposed within the external output interface unit 10, and the electrical port signal control unit 1001 is used to control the transceiver of electrical port signals; the wide area network interface 1002 is disposed within the external output interface unit 10, and the wide area network interface 1002 is connected to the electrical port signal control unit 1001 through the physical layer unit 11. The wide area network interface 1002 is used to connect to an external network; the USB interface unit 1003 is disposed within the external output interface unit 10, and the USB interface unit 1003 is used to provide connections for external devices.

[0039] Through the collaborative work of these interface units, the purpose of meeting the requirements of various network connections and external device accesses is achieved, and the effect of enhancing the versatility and expandability of the main board 1 is realized.

[0040] There are at least four optical fiber ports 1004. The optical fiber ports 1004 are disposed within the external output interface unit 10, and the optical fiber ports 1004 are used to provide optical fiber communication capabilities.

[0041] Through the setting of multiple optical fiber ports 1004, the purpose of increasing the optical fiber communication bandwidth and improving communication flexibility is achieved, and the effect of adapting to high-speed and large-capacity data transmission is realized.

[0042] The LED light display unit 12 is disposed on the main board 1, and the LED light display unit 12 is electrically connected to the main control unit 3 through a communication protocol. The LED light display unit 12 is used to display the system status; the LED indicator light 13 is disposed on the main board 1, and the LED indicator light 13 is electrically connected to the LED light display unit 12. The LED indicator light 13 is used to indicate the system status.

[0043] Through the cooperation of the LED light display unit 12 and the LED indicator light 13, the purpose of intuitively displaying the system operation status is achieved, and the effect of facilitating user monitoring and timely problem discovery is realized.

[0044] Embodiment 2

[0045] Refer to Figures 2-3 , the router body 14, and the main board 1 is stably installed in the router body 14.

[0046] By stably installing the main board 1 inside the router body 14, the various components and units on the main board 1 cooperate with each other, achieving the purpose of optimizing the overall performance of the router body 14, and realizing the effect that the router body 14 can operate stably and efficiently, providing users with reliable network connections and high-quality data transmission services.

[0047] During use, when the user connects the router adopting the above multi-port main board 1 design to the power supply, the 12V power jack 201 of the power input unit 2 receives the external power supply, and the buck converter 202 converts it into different voltages such as 1.0V, 1.5V, and 3.3V to supply power to each component such as the main control unit 3, the inner layer unit 4, and the storage unit 5. After the user turns on the router, the main control unit 3 starts to be responsible for executing various computing tasks and controlling the operation of the entire system. The inner layer unit 4 stores the runtime data for the main control unit 3 to quickly call, and the firmware and configuration data in the storage unit 5 are quickly loaded to make the router enter the normal working state. When the user connects to the router through the network, the electrical port signal control unit 1001 receives and processes the electrical port signal and conducts data interaction with the main control unit 3 through the physical layer unit 11. If connected to the external network through the wide area network interface 1002, the wide area network interface 1002 receives the external network signal and communicates with the main control unit 3 through the physical layer unit 11 and the electrical port signal control unit 1001. If the user uses optical fiber connection, the serialization / deserialization unit 8 processes the optical fiber signal, and the optical fiber signal control unit 9 optimally controls the signal to ensure stable data transmission. During the operation of the router, the erasable read-only memory 6 stores or modifies key data according to the instructions of the main control unit 3. The reset unit 7 is always ready to receive the "Reset#" low-level signal in case of system abnormality and restore the system to the initial settings or the safe state. The user can also understand the system status, such as whether the power supply is normal and whether the network connection is smooth, by observing the LED display unit 12 and the LED indicator 13 on the router. When the user connects an external device through the USB interface unit 1003, such as a mobile hard disk, a printer, etc., the USB interface unit 1003 realizes the data transmission between the device and the main control unit 3. In short, during the user's use of the router body 14, each unit and component on the multi-port main board 1 cooperate with each other to provide the user with stable and efficient network connection and data transmission services.

[0048] All the data mentioned in the above specification are example data, which have reference value but are not absolute standards and are not fixed. The actual data need to be selected according to the actual production requirements and working environment. A multi-port main board and a router of the present application include: an eight-port all-optical router and a four-port all-optical router. Only one form of this design is shown in the drawings, and this form is described as an example in the present application and does not represent the final form of this design. Its specific form needs to be designed according to actual requirements.

[0049] In summary, compared with the prior art, the following beneficial effects are achieved: First, through the buck converter, precise conversion from a single 12V input to multiple different voltage levels is realized, effectively solving the problems of single power supply and inability to adapt to the voltage requirements of multiple components in the prior art, ensuring the stable operation of each component, and improving the reliability of the system; Second, the rich and diverse storage configurations, including inner layer units, storage units, and erasable read-only memories, etc., meet the storage requirements of different types of data, improve the read / write speed and storage capacity of data, and enhance the performance of the system; Third, the setting of the reset unit can quickly restore the normal state when the system is abnormal, reduce the duration of faults, and improve the stability and maintainability of the system; In addition, the collaborative work of the serialization / deserialization unit and the optical fiber signal control unit significantly improves the processing ability of optical fiber communication and meets the requirements of high-speed data transmission; And the design of multiple external interface units, such as electrical ports, wide area network interfaces, USB interfaces, and multiple optical fiber ports, etc., greatly expands the connection ability of the device, enabling it to adapt to more diverse application scenarios.

[0050] The present utility model covers any substitutions, modifications, equivalent methods, and solutions made within the essence and scope of the present utility model. In order to enable the public to have a thorough understanding of the present utility model, specific details are described in detail in the above preferred embodiments of the present utility model, and those skilled in the art can fully understand the present utility model without the description of these details. In addition, in order to avoid unnecessary confusion to the essence of the present utility model, well-known methods, processes, procedures, components, and circuits, etc. are not described in detail.

[0051] The above description is only a preferred embodiment of the present utility model. It should be noted that for those of ordinary skill in the art, without departing from the principle of the present utility model, several improvements and refinements can be made, and these improvements and refinements should also be regarded as the protection scope of the present utility model.

Claims

1. A multi-port motherboard, characterized in that: include: Mainboard (1); A power input unit (2) is arranged on the mainboard (1), and the power input unit (2) is electrically connected to the mainboard (1), and the power input unit (2) comprises: A power socket (201), wherein the power socket (201) is a 12V input port; A step-down converter (202) is electrically connected to the power socket (201), and the step-down converter (202) is used to receive power from the 12V input port and generate power supplies of multiple different voltage levels, including at least 1.0V, 1.5V and 3.3V power supplies.

2. A multi-port motherboard according to claim 1, characterized in that: Also includes: A main control unit (3) is arranged on the main board (1), the main control unit (3) is electrically connected to the power input unit (2), and the main control unit (3) is responsible for executing various computing tasks and controlling the operation of the entire system; An inner unit (4) is arranged on the main board (1), the inner unit (4) is a third generation double data rate synchronous dynamic random access memory, the inner unit (4) is electrically connected to the main control unit (3), and the inner unit (4) is used to store runtime data; A storage unit (5) is arranged on the main board (1), and the storage unit (5) is electrically connected to the main control unit (3). The storage unit (5) adopts flash memory technology based on the SPI interface, and the storage unit (5) is used for fast loading and storage of firmware and configuration data.

3. A multi-port motherboard according to claim 2, characterized in that: Also includes: An erasable read-only memory (6) is arranged on a mainboard (1), and an SPI interface is arranged in the erasable read-only memory (6). The erasable read-only memory (6) is connected to a main control unit (3) as a slave device, so that the master device can read and write data through the SPI protocol.

4. A multi-port motherboard according to claim 2, characterized in that: Also includes: A reset unit (7) is arranged on the main board (1), and the reset unit (7) is electrically connected to the main control unit (3) via a bus. The reset unit (7) is used to trigger a reset operation of a related device or system when receiving a low-level "Reset#" signal, thereby restoring its state to an initial setting or a known safe state.

5. The multi-port motherboard according to claim 2, characterized in that: Also includes: At least one serialization / deserialization unit (8) is provided, and the serialization / deserialization unit (8) is arranged in the main board (1), and the serialization / deserialization unit (8) is electrically connected to the main control unit (3), and the serialization / deserialization unit (8) is used to process optical fiber signals; The optical fiber signal control unit (9) is provided with at least one optical fiber signal control unit (9), and the optical fiber signal control unit (9) is connected to the serialization / deserialization unit (8), and the optical fiber signal control unit (9) is used to control the optical fiber signal.

6. A multi-port motherboard according to claim 5, characterized in that: Also includes: An external output interface unit (10) is arranged on the main board (1), and the external output interface unit (10) is used to realize connection and data exchange between the main board and external devices and networks; A plurality of physical layer units (11) are provided, and the physical layer units (11) are used to connect the external output interface unit (10) with the optical fiber signal control unit (9) and the main control unit (3).

7. A multi-port motherboard according to claim 6, characterized in that: Also includes: An electrical port signal control unit (1001) is arranged in the external output interface unit (10), and the electrical port signal control unit (1001) is used to control the sending and receiving of electrical port signals; A wide area network interface (1002) is arranged in the external output interface unit (10), and the wide area network interface (1002) is connected to the electrical port signal control unit (1001) via the physical layer unit (11), and the wide area network interface (1002) is used to connect to an external network; The USB interface unit (1003) is arranged in the external output interface unit (10), and the USB interface unit (1003) is used to provide external device connection.

8. The multi-port motherboard according to claim 6, characterized in that: Also includes: At least four optical fiber ports (1004) are provided. The optical fiber ports (1004) are arranged in the external output interface unit (10), and the optical fiber ports (1004) are used to provide optical fiber communication capabilities.

9. The multi-port motherboard according to claim 2, characterized in that: Also includes: An LED light display unit (12) is arranged on the main board (1), and the LED light display unit (12) is electrically connected to the main control unit (3) via a communication protocol, and the LED light display unit (12) is used to display the system status; The LED indicator light (13) is arranged on the main board (1), and the LED indicator light (13) is electrically connected to the LED light display unit (12). The LED indicator light (13) is used to indicate the system status.

10. A router, characterized in that: A multi-port mainboard according to any one of claims 1 to 9, further comprising: a router main body (14), wherein the mainboard (1) is stably installed in the router main body (14).

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