Double-direct-current power supply switching circuit
By designing a dual DC power supply switching circuit, using components such as PMOS tubes, NMOS tubes and load switches, the manufacturing cost and complex circuit problems of DC power supply switching control in the prior art are solved, and the dual DC power supply switching control with low-cost and simple circuits are realized.
Patent Information
- Application Number
- CN202421877453.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-08-05
- Publication Date
- 2025-06-17
- Estimated Expiration
- 2034-08-05
AI Technical Summary
The existing DC power supply switching control technology has problems such as high manufacturing costs and complex circuits, especially in switching control between external power supply and battery power supply.
A dual DC power supply switching circuit is designed, including external power supply, battery, control unit, load switch and load. Switching control is realized through components such as PMOS tube, NMOS tube, load switch, resistor and diode, simplifying the circuit structure and reducing costs.
It realizes that when the external power supply is inserted, it can both power the load and charge the battery, and when the external power supply is unplugged, the battery can continue to power the load, and the circuit implementation is low and the structure is simple.
Smart Images
Figure CN222996281U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to the technical field of equipment power supply and power switching, and particularly relates to a dual DC power supply switching circuit. Background Art
[0002] In DC-powered electronic products, some products are designed with two power supply methods: external power supply and battery power supply. When there is an external power supply around, the DC charging plug is used for power supply. When there is no external power supply around, the battery is used to supply power to the device.
[0003] At present, DC power supply switching control technologies mostly adopt power management chips or complex power charging control circuits, but both control methods have disadvantages. Among them, the manufacturing cost of the power management chip control circuit is high, and the circuit of the complex power charging control circuit is complex. Summary of the Utility Model
[0004] In view of the above problems in the prior art, the utility model provides a dual DC power supply switching circuit, which is realized through the following technical solutions:
[0005] A dual DC power supply switching circuit includes an external power supply, a battery, a control unit, a load switch, and a load. One end of the external power supply is connected to one end of the control unit, one end of the battery is connected to the other end of the control unit, the end of the control unit not connected to the external power supply and the battery is connected to the load, a load switch is arranged between the control unit and the load, the control unit includes a load switch S1, a PMOS transistor Q1, a PMOS transistor Q2, an NMOS transistor Q3, a dummy load R1, a resistor R2, a resistor R3, and a resistor R4. The PMOS transistor Q1, the PMOS transistor Q2, and the NMOS transistor Q3 all include an S pole, a G pole, and a D pole;
[0006] The battery has three output terminals. The first output terminal of the battery is successively connected in series with a PMOS transistor Q2, a resistor R3, and a resistor R4. The second output terminal of the battery is successively connected in series with a resistor R2 and an NMOS transistor Q3. The end of the NMOS transistor Q3 at the second output terminal of the battery is grounded. The third output terminal of the battery is connected in series with a PMOS transistor Q1, a load switch S1, and a dummy load R1. The end of the dummy load R1 at the third output terminal of the battery is grounded.
[0007] The end of the resistor R4 far from the resistor R3 is connected to the ground terminal of the second output terminal line and between the NMOS transistor Q3.
[0008] A diode D1 is arranged on the line between the G pole of the PMOS transistor Q1 and the load switch S1.
[0009] A load capacitor C1 is provided on the line extending between the load switch S1 and the dummy load R1, and the load capacitor C1 is connected in parallel with the dummy load R1.
[0010] The G - pole line of the PMOS transistor Q2 is connected between the resistor R2 and the D - pole of the NMOS transistor Q3, and the G - pole line of the NMOS transistor Q3 is connected between the resistor R3 and the resistor R4.
[0011] A first node is provided between the resistor R3 and the resistor R4, and one end of the first node not connected to the resistor R3 and the resistor R4 is connected to an external power supply.
[0012] A second node is provided between the diode D1 and the PMOS transistor Q1, and one end of the second node not connected to the diode D1 and the PMOS transistor Q1 is connected to an external power supply.
[0013] In summary, the beneficial technical effects of the present utility model are as follows:
[0014] The present utility model adopts a dual - DC power supply switching circuit. When the power supply plug of the external power supply is inserted and powered on, the external power supply can not only supply power to the load but also charge the battery simultaneously. When the power supply plug of the external power supply is pulled out and powered off, the battery can supply power to the load. The implementation cost of this switching circuit is low and the circuit is simple. BRIEF DESCRIPTION OF THE DRAWINGS
[0015] Figure 1 is a flowchart for demonstrating the present utility model.
[0016] Figure 2 is a circuit diagram for demonstrating the present utility model. DETAILED DESCRIPTION OF THE EMBODIMENTS
[0017] The following further describes the present utility model in detail with reference to the accompanying drawings.
[0018] Embodiment
[0019] As Figure 1-2 shown, a dual - DC power supply switching circuit disclosed by the present utility model includes an external power supply (denoted as V_IN in the figure), a battery (denoted as V_BAT in the figure), a control unit, and a load switch. The external power supply is a DC power supply unit, and the load switch is used to control the power - on and power - off of the load. One end of the external power supply is connected to one end of the control unit, one end of the battery is connected to the other end of the control unit, and the end of the control unit not connected to the external power supply and the battery is connected to the load. A load switch is provided between the control unit and the load. The control unit includes a load switch S1, a PMOS transistor Q1, a PMOS transistor Q2, an NMOS transistor Q3, a dummy load R1, a resistor R2, a resistor R3, and a resistor R4. The PMOS transistors Q1, Q2, and the NMOS transistor Q3 all include an S - pole, a G - pole, and a D - pole;
[0020] The battery has three output terminals. A PMOS transistor Q2, a resistor R3, and a resistor R4 are connected in series in sequence to the first output terminal of the battery. A resistor R2 and an NMOS transistor Q3 are connected in series in sequence to the second output terminal of the battery. The terminal of the NMOS transistor Q3 at the second output terminal of the battery is grounded. A PMOS transistor Q1, a load switch S1, and a dummy load R1 are connected in series to the third output terminal of the battery. The terminal of the dummy load R1 at the third output terminal of the battery is grounded.
[0021] One end of the resistor R4 away from the resistor R3 is connected between the grounded terminal of the second output terminal line and the NMOS transistor Q3.
[0022] A diode D1 for restricting the current direction is provided on the line between the G pole of the PMOS transistor Q1 and the load switch S1.
[0023] A load capacitor C1 for buffering and voltage regulation is provided on the line extending between the load switch S1 and the dummy load R1. The load capacitor C1 is connected in parallel with the dummy load R1. When the load switch S1 is closed, the load works. After the load switch S1 is opened, after the energy of the load capacitor C1 is released, the load stops working.
[0024] The line of the G pole of the PMOS transistor Q2 is connected between the resistor R2 and the D pole of the NMOS transistor Q3. The line of the G pole of the NMOS transistor Q3 is connected between the resistor R3 and the resistor R4.
[0025] A first node is provided between the resistor R3 and the resistor R4. One end of the first node not connected to the resistor R3 and the resistor R4 is connected to an external power supply.
[0026] A second node is provided between the diode D1 and the PMOS transistor Q1. One end of the second node not connected to the diode D1 and the PMOS transistor Q1 is connected to an external power supply.
[0027] Specific implementation manner of this example: When the voltage drop of the load capacitor C1 is 0, that is, when the load capacitor C1 has no energy, the external power supply V_IN = 12V, and the nominal value of the battery voltage is 12V; when the power supply plug of the external power supply is inserted and powered on, the power supply voltage V_IN = 12V, the voltage of the load capacitor C1 is 0, the load switch S1 is closed, and the load starts to work. Due to the one-way conduction of the diode D1, the external power supply supplies power to the load at this time; when the battery voltage is insufficient and only 10V, the voltage of the G pole of the PMOS transistor Q1 is greater than that of the S pole, the PMOS transistor Q1 is cut off, the voltage of the G pole of the NMOS transistor Q3 is greater than that of the S pole, the PMOS transistor Q1 is turned on, the G pole of the PMOS transistor Q2 is pulled low, the voltage of the G pole of the PMOS transistor Q2 is less than that of the S pole, and the PMOS transistor Q2 is turned on. At this time, the external power supply will charge the battery through the D pole and S pole of the PMOS transistor Q2; when the battery is full, that is, when the battery voltage reaches 12V (ignoring the voltage drop of the diode D1), there is no voltage difference between the battery voltage and the external power supply, and the battery stops charging; when the battery voltage is sufficient, there is no charging process for the power supply plug of the external power supply, and it directly supplies power to the load; when the power supply plug of the external power supply is unplugged, the voltage of the G pole of the PMOS transistor Q1 is pulled low by the resistor R4, the voltage of the G pole of the PMOS transistor Q1 is less than the voltage of the S pole of the PMOS transistor Q1, the PMOS transistor Q1 is cut off, and the dummy load R1 will consume the energy of the load capacitor C1, and the voltage of the load capacitor C1 will decrease. At this time, the battery continues to supply power; when the voltage of the NMOS transistor Q3 is 0, the NMOS transistor Q3 is cut off, the G pole and S of the PMOS transistor Q2 are clamped by the resistor R2, and the PMOS transistor Q2 is cut off. At this time, the body diode of the PMOS transistor Q2 is also cut off. Therefore, the battery can only supply power to the load through the PMOS transistor Q1.
[0028] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it; although the present invention has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that they can still modify the technical solutions recorded in the foregoing embodiments, or perform equivalent replacements on some of the technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.
Claims
1. A dual DC power supply switching circuit, comprising an external power supply, a battery, a control unit, a load switch and a load, characterized in that: One end of the external power supply is connected to one end of the control unit, one end of the battery is connected to the other end of the control unit, one end of the control unit that is not connected to the external power supply and the battery is connected to the load, a load switch is provided between the control unit and the load, the control unit includes a load switch S1, a PMOS tube Q1, a PMOS tube Q2, an NMOS tube Q3, a dummy load R1, a resistor R2, a resistor R3, and a resistor R4, and the PMOS tube Q1, the PMOS tube Q2, and the NMOS tube Q3 all include an S pole, a G pole, and a D pole; The battery has three output terminals, the first output terminal of the battery is connected in series with a PMOS tube Q2, a resistor R3 and a resistor R4 in sequence, the second output terminal of the battery is connected in series with a resistor R2 and an NMOS tube Q3 in sequence, the end of the NMOS tube Q3 at the second output terminal of the battery is grounded, the third output terminal of the battery is connected in series with a PMOS tube Q1, a load switch S1 and a dummy load R1, and the end of the dummy load R1 at the third output terminal of the battery is grounded.
2. A dual DC power supply switching circuit according to claim 1, characterized in that: One end of the resistor R4 away from the resistor R3 is connected between the ground end of the second output end line and the NMOS transistor Q3.
3. The dual DC power supply switching circuit according to claim 1, characterized in that: A diode D1 is provided on the line between the G pole of the PMOS tube Q1 and the load switch S1.
4. The dual DC power supply switching circuit according to claim 1, characterized in that: A load capacitor C1 is provided on a line extending between the load switch S1 and the dummy load R1 , and the load capacitor C1 is provided in parallel with the dummy load R1 .
5. The dual DC power supply switching circuit according to claim 1, characterized in that: The G-pole line of the PMOS tube Q2 is connected between the resistor R2 and the D-pole of the NMOS tube Q3 , and the G-pole line of the NMOS tube Q3 is connected between the resistor R3 and the resistor R4 .
6. The dual DC power supply switching circuit according to claim 1, characterized in that: A first node is provided between the resistor R3 and the resistor R4 , and one end of the first node not connected to the resistor R3 and the resistor R4 is connected to an external power supply.
7. The dual DC power supply switching circuit according to claim 3, characterized in that: A second node is provided between the diode D1 and the PMOS transistor Q1 , and one end of the second node not connected to the diode D1 and the PMOS transistor Q1 is connected to an external power supply.