Direct display resistor debugging device and control device thereof

Abstract

The utility model relates to the technical field of resistance testing, in particular to a direct display resistor debugging device and a control device thereof. The direct display resistor debugging device comprises a machine shell, a plurality of plug ports are installed on the machine shell, a resistor debugging mechanism is installed in the machine shell, the resistor debugging mechanism comprises a chip, a plurality of pins are arranged on the chip, capacitors and / or resistors are connected to the pins, and the capacitors and / or the resistors are connected to the machine shell. Therefore, the resistance value required by the direct display circuit board can be quickly and accurately adjusted, the resistance debugging time is reduced from 1 hour to 10 minutes, and the debugging efficiency is improved by 600%; and for direct display circuit boards with different intervals, the number of chips can be randomly increased or reduced by a multiple of 3.

Description

Technical Field

[0001] The utility model relates to the technical field of resistance testing, in particular to a direct display resistance debugging device and its control device. Background Technique

[0002] At present, the well-known method for debugging a direct display resistance is to continuously replace the resistance to achieve the required resistance value of the direct display circuit board. This method has low efficiency and slow speed. If a potentiometer is used to replace the resistance, the accuracy of the potentiometer cannot meet the requirements of the direct display circuit board, and multiple potentiometers need to be adjusted to meet the usage requirements, with low efficiency and complex adjustment. Content of the Utility Model

[0003] The purpose of the utility model is to solve at least one of the technical problems existing in the prior art, and to provide a direct display resistance debugging device and its control device that can quickly and accurately debug the required resistance value of the direct display circuit board, and is steplessly adjustable in 1024 levels, covering all 2K - 22K resistance ranges.

[0004] To achieve the above purpose, the technical solution adopted by the utility model is as follows: A direct display resistance debugging device includes a housing, on which several jacks are installed. A resistance debugging mechanism is installed inside the housing, and the resistance debugging mechanism includes a chip, on which several pins are provided, and capacitors and / or resistors are connected to the pins.

[0005] Further, the resistance debugging mechanism includes one or more of an R resistance debugging mechanism, a G resistance debugging mechanism, and a B resistance debugging mechanism.

[0006] Further, at least 3 chips are provided on each resistance debugging mechanism.

[0007] Further, the jacks include a jack for communicating with an external power supply and a resistance output jack.

[0008] Further, the jack for communicating with the external power supply and the resistance output jack are arranged opposite to each other.

[0009] Further, the resistance output jack includes one or more of an R resistance output interface, a G resistance output interface, and a B resistance output interface.

[0010] Further, the R resistance output interface, the G resistance output interface, and the B resistance output interface are adjacent and arranged at intervals.

[0011] Further, there are 10 pins. A decoupling capacitor is connected in parallel between the fourth and sixth pins among the 10 pins. A 1k current-limiting resistor is connected in series to each of the second and third pins respectively. A 1Uf capacitor is connected in series between the fifth pin and the ground. The tenth pin is the IIC address selection pin of the chip, and the eighth pin is the SDA pin. A pull-up resistor is connected to the SDA pin during IIC communication.

[0012] A control device for a direct display resistor debugging device includes the above-mentioned direct display resistor debugging device. The direct display resistor debugging device is electrically connected to a direct display lamp board and a host computer for controlling the direct display lamp board.

[0013] Further, the direct display lamp board includes a circuit board and direct display lamps mounted on the circuit board.

[0014] Compared with the prior art, the technical solution of this application has the following beneficial effects:

[0015] The direct display resistor debugging device of this application includes a casing. A plurality of jacks are installed on the casing. A resistor debugging mechanism is installed inside the casing. The resistor debugging mechanism includes a chip. A plurality of pins are provided on the chip, and capacitors and / or resistors are connected to the pins, so that the resistance value required for the direct display circuit board can be adjusted quickly and accurately. The resistor debugging time is reduced from 1 hour to 10 minutes, and the debugging efficiency is increased by 600%. Moreover, for direct display circuit boards with different pitches, the number of chips can be increased or decreased arbitrarily in multiples of 3. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 It is a schematic structural diagram of the direct display resistor debugging device in the preferred embodiment of the present invention;

[0017] Figure 2 It is a schematic circuit diagram of the direct display resistor debugging device in the preferred embodiment of the present invention;

[0018] Figure 3 It is a schematic structural diagram of the chip in the preferred embodiment of the present invention;

[0019] Figure 4 It is a schematic electrical diagram in the preferred embodiment of the present invention.

[0020] Reference numerals: 1, casing; 2, jack; 201, jack for communicating with an external power supply; 202, resistor output jack; 3, resistor debugging mechanism; 4, chip; 5, decoupling capacitor; 6, current-limiting resistor; 7, capacitor; 8, pull-up resistor; 9, circuit board; 10, direct display lamp. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0021] Next, the technical solutions in the embodiments of the present utility model will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present utility model. Obviously, the described embodiments are only a part of the embodiments of the present utility model, rather than all of the embodiments.

[0022] Referring to Figures 1 - 4 As shown, in a preferred embodiment of the present utility model, a direct display resistor debugging device includes a chassis 1, on which a plurality of jacks 2 are installed. A resistor debugging mechanism 3 is installed inside the chassis 1. The resistor debugging mechanism 3 includes a chip 4, and a plurality of pins are provided on the chip 4, and capacitors and / or resistors are connected to the pins, so that the resistance value required for the direct display circuit board can be adjusted quickly and accurately. The resistor debugging time is reduced from 1 hour to 10 minutes, and the debugging efficiency is increased by 600%. Moreover, for direct display circuit boards with different pitches, the number of chips can be arbitrarily increased or decreased in multiples of 3.

[0023] As a preferred embodiment of the present utility model, it may further have the following additional technical features: The resistor debugging mechanism 3 includes an R resistor debugging mechanism 301, a G resistor debugging mechanism 302, and a B resistor debugging mechanism 303, and at least 3 chips are provided on each resistor debugging mechanism 3, so as to realize the resistor debugging of direct display circuit boards with different pitches.

[0024] In this embodiment, the jack 2 includes a jack 201 for communicating with an external power supply and a resistor output jack 202, and the jack 201 for communicating with the external power supply is arranged opposite to the resistor output jack 202. The resistor output jack 202 includes an R resistor output interface, a G resistor output interface, and a B resistor output interface, and the R resistor output interface, the G resistor output interface, and the B resistor output interface are adjacent and arranged at intervals. Thus, it is convenient for the debugger to perform debugging.

[0025] In this embodiment, there are 10 pins. Decoupling capacitors 5 are connected in parallel between the fourth, sixth, and seventh pins among the 10 pins; a 1k current-limiting resistor 6 is respectively connected in series to the second and third pins; a 1Uf capacitor 7 is connected in series between the fifth pin and the ground; the tenth pin is the IIC address selection pin of the chip; the eighth pin is the SDA pin, and a pull-up resistor 8 is connected to the SDA pin during IIC communication. Thus, the acquisition of the resistance of the direct display circuit can be realized.

[0026] Specifically, under normal circumstances, the working voltage of the direct display circuit's acquisition resistor is 3 - 5V, and the maximum current limit from the second and third pins of the chip AD5272 from A to B is 3mA. Therefore, the present utility model uses two 1k current-limiting resistors to avoid damage. Under the direct display lamp board with a P1.86 pitch, for debugging efficiency, the present utility model consists of 9 AD5272 chip a parts. The R, G, and B resistors are each controlled by 3 AD5272 chip parts a. If it is necessary to debug direct display lamp boards with other pitches, the AD5272 chip parts a can be increased in multiples of 3.

[0027] A control device for a direct display resistor debugging device, including the above-mentioned direct display resistor debugging device. The direct display resistor debugging device is electrically connected to a direct display lamp board and a host computer for controlling the direct display lamp board. The direct display lamp board includes a circuit board 9 and direct display lamps 10 installed on the circuit board 9. Specifically, the computer uses a usb to IIC cable to connect to the usb female socket; the host computer inputs corresponding instructions to make the circuit board output corresponding resistance values to the usb external female socket, and is connected to the R, G, and B chips of the direct display circuit board through an external connection cable for debugging.

[0028] The working principle of the present utility model: One 1K resistor is connected in series to each of the second and third pins of the AD5272 digital potentiometer, and the other end is connected to port J1 through differential routing; port J1 is connected to the aviation plug of the housing using twisted pair wires, and finally is electrically connected to the direct display circuit board through wires; then the host computer software communicates with this device through the IIC protocol to make this device output resistance values, thereby achieving the purpose of adjusting the chip sampling resistance value of the direct display circuit board and adjusting the brightness.

[0029] On the premise of not causing conflicts, those skilled in the art can freely combine and superimpose the above-mentioned additional technical features.

[0030] It can be understood that the present utility model is described through some embodiments. Those skilled in the art know that without departing from the spirit and scope of the present utility model, various changes or equivalent replacements can be made to these features and embodiments. Additionally, under the teaching of the present utility model, these features and embodiments can be modified to adapt to specific situations and materials without departing from the spirit and scope of the present utility model. Therefore, the present utility model is not limited by the specific embodiments disclosed herein, and all embodiments falling within the scope of the claims of this application belong to the scope protected by the present utility model.

Claims

1. A direct display resistance debugging device, characterized in that: It comprises a casing, on which a plurality of plug interfaces are installed, a resistance debugging mechanism is installed in the casing, and the resistance debugging mechanism comprises a chip, on which a plurality of pins are arranged, and the pins are connected with capacitors and / or resistors.

2. The direct display resistance debugging device according to claim 1, characterized in that: The resistance debugging mechanism includes one or more of an R resistance debugging mechanism, a G resistance debugging mechanism, and a B resistance debugging mechanism.

3. The direct display resistance debugging device according to claim 2, characterized in that: Each of the resistance debugging mechanisms is provided with at least three chips.

4. The direct display resistance debugging device according to claim 1, characterized in that: The plug interface includes a plug interface for communicating with an external power source and a resistance output plug interface.

5. The direct display resistance debugging device according to claim 4, characterized in that: The plug interface for communicating with the external power source is arranged opposite to the resistance output plug interface.

6. The direct display resistance debugging device according to claim 4, characterized in that: The resistance output plug-in interface includes one or more of an R resistance output interface, a G resistance output interface, and a B resistance output interface.

7. The direct display resistance debugging device according to claim 6, characterized in that: The R resistor output interface, the G resistor output interface, and the B resistor output interface are adjacent to and spaced apart from each other.

8. The direct display resistance debugging device according to claim 1, characterized in that: There are 10 pins, and a decoupling capacitor is connected in parallel between the fourth and sixth pins, a 1k current limiting resistor is connected in series between the second and third pins respectively, a 1Uf capacitor is connected in series between the fifth pin and the ground, the tenth pin is the IIC address selection pin of the chip, and the eighth pin is the SDA pin. A pull-up resistor is connected to the SDA pin of the IIC communication.

9. A control device for a direct display resistance debugging device, characterized in that: It comprises the direct display resistance debugging device as described in any one of claims 1-8, and the direct display resistance debugging device is electrically connected to a direct display light board and a host computer for controlling the direct display light board.

10. The control device of the direct display resistance debugging device according to claim 9, characterized in that: The direct display light board includes a circuit board and a direct display light installed on the circuit board.

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