Sealing structure

Abstract

The utility model discloses a sealing structure. The sealing structure comprises an insulating substrate; the first base island is positioned on the first surface of the insulating substrate and is provided with an IGBT (Insulated Gate Bipolar Translator) and an FRD1; the second base island is located on the first surface of the insulating substrate and is provided with an FRD2; a plurality of pins; the plastic package body covers the first base island, the second base island, the IGBT, the FRD1, the FRD2 and the parts of the plurality of pins; wherein the first base island and the second base island are arranged on the left side and the right side of the insulating substrate, the plurality of pins extend out of the lower side edge of the plastic package body below the first base island and the second base island, and the first pin is connected with a grid electrode of the IGBT; the second pin is connected with the emitting electrode of the IGBT and the anode of the FRD1; the third pin is connected with the first base island, the cathode of the FRD1 and the collector of the IGBT; the fourth pin is connected with the anode of the FRD2, and the fifth pin is connected with the second base island and the cathode of the FRD2. According to the sealing structure, discrete components are integrated in the same plastic package body, so that the product integration level is improved, and the cost is reduced.

Description

Technical Field

[0001] The utility model relates to the technical field of semiconductors, and more specifically, to a co-packaging structure. Background Art

[0002] In an air conditioner power factor correction circuit (Power Factor Correction, PFC), it is usually necessary to use two discrete electrical components, namely an Insulate-Gate Bipolar Transistor (IGBT) and a Fast-recovery diode (FRD), in combination to form the required circuit. By arranging the two components on the same circuit board and realizing electrical connection through the wiring on the circuit board, the two components will respectively occupy the area of the circuit board and need to be connected and assembled to the circuit board separately, which not only affects the integration of the product, but also increases the product cost and the number of materials required for the product. When the two components are on the circuit board, an insulating sheet or insulating film is usually externally disposed on the back of one of the components.

[0003] Therefore, it is necessary to design a co-packaging structure to encapsulate the IGBT and two discrete FRDs in a plastic package, reduce the occupation of the circuit board area, improve the product integration, and integrate the externally disposed insulating sheet or insulating film into the internal of the packaging structure. On the one hand, it takes into account the co-packaging of the IGBT and two FRDs, and on the other hand, it takes into account the electrical insulation between the components. Summary of the Utility Model

[0004] In view of this, the purpose of the utility model is to provide a co-packaging structure, which encapsulates an Insulate-Gate Bipolar Transistor and two diodes in the same plastic package, improves the product integration, reduces the cost, makes the circuit board layout more reasonable and flexible, and has a higher integration, so as to meet various different requirements.

[0005] The present utility model provides a co-packaged structure, comprising: an insulating substrate; a first base island located on a first surface of the insulating substrate, where an insulated gate bipolar transistor and a first diode are provided on the first base island; a second base island located on the first surface of the insulating substrate, where a second diode is provided on the second base island; a plurality of pins; a plastic package covering the first base island, the second base island, the insulated gate bipolar transistor, the first diode, the second diode, and a part of the plurality of pins; wherein, the first base island and the second base island are arranged on the left and right sides of the insulating substrate, the plurality of pins extend from a lower side edge of the plastic package below the first base island and the second base island, a first pin among the plurality of pins is connected to a gate of the insulated gate bipolar transistor; a second pin among the plurality of pins is connected to an emitter of the insulated gate bipolar transistor and an anode of the first diode; a third pin among the plurality of pins is electrically connected to the first base island, a cathode of the first diode, and a collector of the insulated gate bipolar transistor; a fourth pin among the plurality of pins is electrically connected to an anode of the second diode; a fifth pin among the plurality of pins is electrically connected to the second base island and a cathode of the second diode.

[0006] Optionally, the third pin and the fourth pin are electrically connected through a conductive structure outside the co-packaged structure, so that the anode of the second diode is electrically connected to the collector of the insulated gate bipolar transistor and the cathode of the first diode.

[0007] Optionally, the first diode is a fast recovery diode, and the second diode is a fast recovery diode.

[0008] Optionally, a surface of the insulated gate bipolar transistor in contact with the first base island is a collector, a surface of the first diode in contact with the first base island is a cathode, and a surface of the second diode in contact with the second base island is a cathode.

[0009] Optionally, the third pin is welded to the first base island, and the fifth pin is welded to the second base island.

[0010] Optionally, the first pin, the second pin, and the third pin are located below the first base island, and the fourth pin and the fifth pin are located below the second base island.

[0011] Optionally, the insulated gate bipolar transistor is located between the first diode and the second diode.

[0012] Optionally, the first diode is located between the insulated gate bipolar transistor and the second diode.

[0013] Optionally, a notch is provided on one side of the insulating substrate opposite to the pin, and the plastic package body is provided with a through hole matching the notch.

[0014] Optionally, the first pin, the second pin, the third pin, the fourth pin, and the fifth pin have the same width.

[0015] Optionally, the width of the plastic package body is 15 mm to 18 mm.

[0016] Optionally, the center distance between the first pin and the second pin is 2 mm to 4 mm, the center distance between the second pin and the third pin is 4 mm to 5 mm, the center distance between the third pin and the fourth pin is 2 mm to 4 mm, and the center distance between the fourth pin and the fifth pin is 4 mm to 5 mm.

[0017] Optionally, the insulating substrate is a ceramic substrate; the insulating substrate, the first base island, and the second base island form a copper-clad ceramic substrate.

[0018] Optionally, the lengths of the first pin, the second pin, the third pin, the fourth pin, and the fifth pin extending out of the plastic package body are 15 mm to 25 mm.

[0019] Advantages of the present utility model:

[0020] The co-packaging structure provided by the present utility model packages an insulated gate bipolar transistor and two diodes in the same plastic package body, reducing the number of devices, reducing the area occupied on the circuit board, reducing the assembly steps, and lowering the assembly cost.

[0021] Furthermore, in the plastic package body, the insulated gate bipolar transistor and the second diode are independent of each other, enabling the co-packaging structure to have an electrostatic discharge (ESD) protection ability similar to that of the insulated gate bipolar transistor and the second diode when they are separately packaged, effectively enhancing the reliability and stability of the product.

[0022] Furthermore, outside the co-packaging structure, the third pin and the fourth pin are electrically connected, so that the anode of the second diode is electrically connected to the collector of the insulated gate bipolar transistor and the cathode of the first diode, without affecting the ESD protection ability of the insulated gate bipolar transistor and the second diode inside the co-packaging structure.

[0023] Further, the first base island of the co-packaged structure is welded and connected to the third pin through an extension part, and the second base island is welded and connected to the fifth pin through an extension part. The chip (insulated gate bipolar transistor, diode) is connected to the pins through bonding wires, and all of them have mature processes and are easy to implement in the industry.

[0024] Further, the first base island is welded and connected to the third pin, and the second base island is welded and connected to the fifth base island, which can carry a larger current, thereby improving the performance of the co-packaged structure.

[0025] Further, the insulated gate bipolar transistor and the first diode are located on the first base island, the second diode is located on the second base island, and the first diode is located between the insulated gate bipolar transistor and the second diode. Its layout is reasonable and it has good heat dissipation ability.

[0026] Further, the center distance between some pins is relatively large, which fully ensures the withstand voltage performance of the co-packaged structure and enables it to have a withstand voltage ability of more than 650V.

[0027] Further, the length, width, spacing, etc. of each pin in the co-packaged structure can be adjusted within a certain range according to customer requirements, so that the co-packaged structure also has great installation adaptability, and its manufacturing process is simple, low-cost and easy to implement.

[0028] Further, an insulating substrate is built in the co-packaged structure, which avoids the operation of electrically isolating the insulated gate bipolar transistor, the first diode and the second diode by externally attaching an insulating sheet or insulating film, and improves the convenience of use. Description of the Drawings

[0029] Through the following description of the embodiments of the present invention with reference to the drawings, the above and other objects, features and advantages of the present invention will become clearer.

[0030] Figure 1 The circuit diagram of the co-packaged structure showing the first embodiment of the present invention;

[0031] Figure 2 The partially enlarged schematic diagram of the plastic package area in the co-packaged structure showing the first embodiment of the present invention;

[0032] Figure 3 The partially enlarged schematic diagram of the plastic package area in the co-packaged structure showing the second embodiment of the present invention;

[0033] Figure 4 The front view of the co-packaged structure showing the first embodiment of the present invention. Detailed Embodiments

[0034] Various embodiments of the present utility model will be described in more detail below with reference to the accompanying drawings. In the respective drawings, the same elements are denoted by the same or similar reference numerals. For the sake of clarity, the various parts in the drawings are not drawn to scale.

[0035] The present utility model will be further described below in conjunction with the accompanying drawings and embodiments.

[0036] Figure 1 A circuit diagram showing the co-packaged structure of the first embodiment of the present utility model; the co-packaged structure includes an insulated gate bipolar transistor 10, a first diode 20, and a second diode 30. The first diode 20 and the second diode 30 are both, for example, fast recovery diodes. It has five connection terminals on the outside, namely a first pin 110, a second pin 120, a third pin 130, a fourth pin 140, and a fifth pin 150. The third pin 130 and the fourth pin 140 are electrically connected outside the co-packaged structure. Among them, the first pin 110 is connected to the gate G of the insulated gate bipolar transistor 10, the second pin 120 is connected to the emitter E of the insulated gate bipolar transistor 10 and the anode of the first diode 20, the third pin 130 is connected to the collector C of the insulated gate bipolar transistor 10 and the cathode of the first diode 20, the fourth pin 140 is connected to the anode of the second diode 30, and the fifth pin 150 is connected to the cathode of the second diode 30.

[0037] In this co-packaged structure, the insulated gate bipolar transistor 10 and the second diode 30 are independent of each other in the plastic package. The third pin 130 and the fourth pin 140 can be connected by wiring on a circuit board (PCB board) outside the plastic package. The insulated gate bipolar transistor 10, the first diode 20, and the second diode 30 together implement a boost function. Among them, the insulated gate bipolar transistor 10 and the second diode 30 are used as power switching devices in the topology. The first diode 20 is reversely connected in parallel with the insulated gate bipolar transistor 10 to play a protection function to prevent the insulated gate bipolar transistor 10 from being broken down by reverse voltage withstand.

[0038] Figure 2A partially enlarged schematic view of the plastic package body area in the co-packaging structure according to the first embodiment of the present invention is shown; in order to better illustrate the connection and positional relationship of each part in the co-packaging structure, the plastic package body 6 of the co-packaging structure is treated with perspective, and the outline of the plastic package body 6 is marked with a dotted line. The co-packaging structure includes an insulating substrate 3, a first base island 1, a second base island 2, an insulated gate bipolar transistor 10, a first diode 20, a second diode 30, a plurality of pins, and a plastic package body 6. Among them, the plurality of pins include a first pin 110, a second pin 120, a third pin 130, a fourth pin 140, and a fifth pin 150. The first base island 1 and the second base island 2 are located on the first surface of the insulating substrate 3, for example, on the left and right sides of the insulating substrate 3 respectively, and the first base island 1 and the second base island 2 are electrically isolated. The insulated gate bipolar transistor 10 and the first diode 20 are located on the first base island 1, and the second diode 30 is located on the second base island 2. Then, the insulated gate bipolar transistor 10, the first diode 20, and the second diode 30 are electrically isolated from each other, that is, in the plastic package body 6, the insulated gate bipolar transistor 10 and the second diode 30 are independent of each other, so that the co-packaging structure has an ESD protection ability similar to that of the insulated gate bipolar transistor 10 and the second diode 30 packaged separately. A direct copper bond (DBC) ceramic substrate is adopted in the co-packaging structure. The DBC ceramic substrate includes an insulating substrate 3 and a first base island 1, a second base island 2, a first pad 11, a second pad 12, and a third pad 21 located on the first surface of the insulating substrate 3. A notch 4 is provided in the upper area of the insulating substrate 3. The notch 4 is, for example, arc-shaped. The first base island 1 and the second base island 2 avoid the notch 4 in the upper area of the insulating substrate 3. A through hole matching the notch 4 can be formed on the plastic package body 6 for a fixing screw to pass through, so as to fix the co-packaging structure. Of course, it can also achieve the functions of heat conduction and heat dissipation through the fixing screw. The insulating substrate 3 is, for example, a ceramic substrate. Through holes 5 are also provided in the areas on the left and right sides of the notch 4 of the first base island 1 and the second base island 2. The through holes 5, for example, penetrate through the first base island 1 and the second base island 2 and include a plurality of through holes arranged in an array. By providing a plurality of through holes 5, the contact area between the first base island 1, the second base island 2 and the plastic package body 6 can be increased, so that the combination between the plastic package body 6 and the entire DBC ceramic substrate is more reliable and the heat dissipation ability is enhanced.

[0039] The insulated gate bipolar transistor 10 is located on the first base island 1, for example, on the right side of the area below the first base island 1 and near the middle area of the plastic package 6. The first diode 20 is also located on the first base island 1. The first diode 20 is, for example, located on the left side of the insulated gate bipolar transistor 10. The first base island 1 further includes an extension portion towards the lower side edge of the plastic package 6. The first base island 1 is welded and connected to the third pin 130 through this extension portion. The collector C on the back of the insulated gate bipolar transistor 10 is electrically connected to the first base island 1 and is led out through the third pin 130 welded to the first base island 1. In order to reduce the bond wire length and complexity, corresponding first pad 11 and second pad 12 are also provided in the plastic package 6 near its lower side edge and the first base island 1. Specifically, the first pad 11 is located on the left side of the first base island 1, and the second pad 12 is located on the lower side of the first base island 1 and between the first pad 11 and the extension portion of the first base island 1. The gate G on the front of the insulated gate bipolar transistor 10 is connected to the first pad 11 through a bond wire, and the first pad 11 is welded and connected to the first pin 110. The emitter E on the front of the insulated gate bipolar transistor 10 and the anode on the front of the first diode 20 are connected to the second pad 12 through a bond wire, and the second pad 12 is welded and connected to the second pin 120. The back of the first diode 20 is mounted on the first base island 1, and the cathode on the back of the first diode 20 is also electrically connected to the first base island 1. The second base island 2 also includes an extension portion towards the lower side edge of the plastic package 6. The second base island 2 is welded and connected to the fifth pin 150 through this extension portion. The back of the second diode 30 is mounted on the second base island 2, and the cathode on the back of the second diode 30 is electrically connected to the second base island 2 and is led out through the fifth pin 150 welded to the second base island 2. Similarly, a corresponding third pad 21 is also provided in the plastic package 6 near its lower side edge and the second base island 2. Specifically, the third pad 21 is located on the lower side of the second base island 2 and between the extension portion of the first base island 1 and the extension portion of the second base island 2. The anode on the front of the second diode 30 is connected to the third pad 21 through a bond wire, and the third pad 21 is welded and connected to the fourth pin.

[0040] Specifically, the insulated gate bipolar transistor 10, the first diode 20, and the second diode 30 are, for example, bonded to the corresponding base islands through solder paste, solder, or sintered silver. After the bond wire connection is completed, the plastic package 6 covering the insulated gate bipolar transistor 10, the first diode 20, the second diode 30, the first base island 1, the second base island 2, the insulating substrate 3, and parts of the multiple pins is finally formed by potting compound. It can be understood that, in addition to being electrically connected to the respective pins through bond wires, the insulated gate bipolar transistor 10, the first diode 20, and the second diode 30 can also be electrically connected to the respective pins through metal clips (clips).

[0041] The first pin 110, the second pin 120, the third pin 130, the fourth pin 140 and the fifth pin all extend from the lower side of the plastic package 6.

[0042] Figure 3 The partial enlarged schematic diagram of the plastic package area in the co-packaging structure of the second embodiment of the present invention is shown, as Figure 3 shown. In this second embodiment, the layout of the trench gate bipolar transistor 10, the first diode 20, the second diode 30 and the shapes of the first base island 1 and the second base island 2 are adjusted. The rest are similar to those in the first embodiment and will not be described in detail.

[0043] In this second embodiment, the trench gate bipolar transistor 10 is arranged on the left side of the first base island 1, and the first diode 20 is located on the right side of the trench gate bipolar transistor 10, that is, the first diode 20 is located between the trench gate bipolar transistor 10 and the second diode 30. Specifically, when the co-packaging structure works, usually, the heat generation of the insulated gate bipolar transistor 10 and the second diode 30 is greater than that of the first diode 20. By arranging the trench gate bipolar transistor 10 and the second diode 30 on both sides of the first diode 20 respectively, the layout is more reasonable, and the heat accumulation in the plastic package 6 can be reduced, so as to obtain good heat dissipation capacity. The extended part of the first base island 1 extends obliquely downward to the right and extends below the second base island 2; the first pad 11 and the second pad 12 are both located on the lower side of the first base island 1, and the second pad 12 is located between the first pad 11 and the extended part of the first base island 1.

[0044] Figure 4 The front schematic diagram of the co-packaging structure of the first embodiment of the present invention is shown, as Figure 4 shown. This co-packaging structure adopts, for example, single-row straight-through pins. The first pin 110, the second pin 120, the third pin 130, the fourth pin 140 and the fifth pin 150 are arranged in sequence from left to right on the lower side of the plastic package 6. Among them, the first pin 110 and the second pin 120 are, for example, low-voltage pins, and the third pin 130 to the fifth pin 150 are, for example, high-voltage pins.

[0045] Specifically, the first pin 110 to the fifth pin 150 have the same width, for example, but are not limited thereto, and different widths can also be adopted as needed. The center distance between the second pin 120 and the third pin 130 is the same as the center distance between the fourth pin 140 and the fifth pin 150, for example, both are D1, and the distance D1 is, for example, 4 mm to 5 mm; the third pin 130 and the fourth pin 140 need to be electrically connected through an external circuit board, so the center distance D2 between the third pin 130 and the fourth pin 140 can be less than the distance D1, and the distance D2 is, for example, 2 mm to 4 mm; the center distance D3 between the first pin 110 and the second pin 120 is, for example, 2 mm to 4 mm. The lengths H of the first pin 110, the second pin 120, the third pin 130, the fourth pin 140, and the fifth pin 150 extending from the lower side of the plastic package 6 are, for example, 15 mm to 25 mm. The width D4 of the plastic package 6 is, for example, 15 mm to 18 mm. A through hole 7 corresponding to the notch 4 on the insulating substrate 3 is also provided on the plastic package 6. The through hole 7 is, for example, for a fixing screw to pass through, so as to fix the co-packaging structure.

[0046] Furthermore, the copper-clad ceramic substrate of this embodiment further includes a heat sink. The heat sink is located on the second surface (invisible in the figure) of the insulating substrate 3. The material of the heat sink is copper. The heat sink protrudes from the plastic package 6, and the second surface is opposite to the first surface.

[0047] It can be understood that the co-packaging structure in the first embodiment and the second embodiment can also be realized after mirroring, that is, the second base island 2 is on the left side and the first base island 1 is on the right side. Correspondingly, the fifth pin 150, the fourth pin 140, the third pin 130, the second pin 120, and the first pin 110 are arranged in sequence from left to right along the lower side edge of the plastic package 6.

[0048] The co-packaging structure provided by the present utility model encapsulates an insulated gate bipolar transistor and two diodes in the same plastic package, reducing the number of devices, reducing the area occupied on the circuit board, reducing the assembly steps, and lowering the assembly cost.

[0049] Furthermore, in the plastic package, the insulated gate bipolar transistor and the second diode are independent of each other, so that the co-packaging structure has an electrostatic discharge (ESD) protection ability similar to that of the insulated gate bipolar transistor and the second diode packaged separately, effectively enhancing the reliability and stability of the product.

[0050] Further, outside the co-packaged structure, the third pin and the fourth pin are electrically connected, so that the anode of the second diode, the collector of the insulated gate bipolar transistor, and the cathode of the first diode are electrically connected, without affecting the ESD protection capabilities of the insulated gate bipolar transistor and the second diode inside the co-packaged structure.

[0051] Further, the first base island of the co-packaged structure is welded to the third pin through an extension part, and the second base island is welded to the fifth pin through an extension part. The chip (insulated gate bipolar transistor, diode) is connected to the pins through bonding wires, and all of them have mature processes and are easy to implement in the industry.

[0052] Further, the first base island is welded to the third pin, and the second base island is welded to the fifth base island, which can carry a larger current and thus improve the performance of the co-packaged structure.

[0053] Further, the insulated gate bipolar transistor and the first diode are located on the first base island, the second diode is located on the second base island, and the first diode is located between the insulated gate bipolar transistor and the second diode. Its layout is reasonable and it has good heat dissipation ability.

[0054] Further, the center distance between some pins is relatively large, which fully ensures the withstand voltage performance of the co-packaged structure and enables it to have a withstand voltage capacity of more than 650V.

[0055] Further, the length, width, spacing, etc. of each pin in the co-packaged structure can be adjusted within a certain range according to customer requirements, making the co-packaged structure also have great installation adaptability. Its manufacturing process is simple, the cost is low, and it is easy to implement.

[0056] Further, the co-packaged structure is internally provided with an insulating substrate, which avoids the operation of electrically isolating the insulated gate bipolar transistor, the first diode and the second diode by externally attaching an insulating sheet or insulating film, and improves the convenience of use.

[0057] It should be noted that in this article, relational terms such as first and second are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the term "comprising", "including" or any other variant thereof is intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements not only includes those elements, but also includes other elements not expressly listed, or also includes elements inherent to such process, method, article or device. Without further limitation, an element defined by the statement "including a..." does not exclude the existence of additional identical elements in the process, method, article or device including the said element.

[0058] As described above, the embodiments in accordance with the present utility model do not describe all details in detail, nor do they limit the present utility model to the specific embodiments described. Obviously, according to the above description, many modifications and variations can be made. These embodiments are selected and specifically described in this specification in order to better explain the principles and practical applications of the present utility model, so that those skilled in the relevant art can make good use of the present utility model and its modifications based on the present utility model. The present utility model is only limited by the claims and their full scope and equivalents.

Claims

1. A sealing structure, characterized in that: include: Insulating substrate; A first base island is located on a first surface of the insulating substrate, and an insulated gate bipolar transistor and a first diode are arranged on the first base island; A second base island is located on the first surface of the insulating substrate, and a second diode is arranged on the second base island; Multiple pins; A plastic package covering the first base island, the second base island, the insulated gate bipolar transistor, the first diode, the second diode and parts of the plurality of pins; Among them, the first base island and the second base island are arranged on the left and right sides of the insulating substrate, and the multiple pins extend from the lower side of the plastic package below the first base island and the second base island. The first pin among the multiple pins is connected to the gate of the insulated gate bipolar transistor; the second pin among the multiple pins is connected to the emitter of the insulated gate bipolar transistor and the anode of the first diode; the third pin among the multiple pins is electrically connected to the first base island, the cathode of the first diode and the collector of the insulated gate bipolar transistor; the fourth pin among the multiple pins is electrically connected to the anode of the second diode; the fifth pin among the multiple pins is electrically connected to the second base island and the cathode of the second diode.

2. The sealing structure according to claim 1, characterized in that: The third pin and the fourth pin are electrically connected via a conductive structure outside the package structure, so that the anode of the second diode is electrically connected to the collector of the insulated gate bipolar transistor and the cathode of the first diode.

3. The sealing structure according to claim 1, characterized in that: The first diode is a fast recovery diode, and the second diode is a fast recovery diode.

4. The sealing structure according to claim 1, characterized in that: The side of the insulated gate bipolar transistor in contact with the first base island is a collector, the side of the first diode in contact with the first base island is a cathode, and the side of the second diode in contact with the second base island is a cathode.

5. The sealing structure according to claim 1, characterized in that: The third pin is connected to the first base island by welding, and the fifth pin is connected to the second base island by welding.

6. The sealing structure according to claim 1, characterized in that: The first pin, the second pin and the third pin are located under the first base island, and the fourth pin and the fifth pin are located under the second base island.

7. The sealing structure according to claim 1, characterized in that: The insulated gate bipolar transistor is located between the first diode and the second diode.

8. The sealing structure according to claim 1, characterized in that: The first diode is located between the insulated gate bipolar transistor and the second diode.

9. The sealing structure according to claim 1, characterized in that: The insulating substrate is provided with a notch on a side opposite to the pin, and the plastic package body is provided with a through hole matching the notch.

10. The sealing structure according to claim 1, characterized in that: The first pin, the second pin, the third pin, the fourth pin and the fifth pin have the same width.

11. The sealing structure according to claim 1, characterized in that: The width of the plastic package body is 15 mm to 18 mm.

12. The sealing structure according to claim 1, characterized in that: The center distance between the first pin and the second pin is 2mm~4mm, the center distance between the second pin and the third pin is 4mm~5mm, the center distance between the third pin and the fourth pin is 2mm~4mm, and the center distance between the fourth pin and the fifth pin is 4mm~5mm.

13. The sealing structure according to claim 1, characterized in that: The insulating substrate is a ceramic substrate; the insulating substrate, the first base island and the second base island constitute a copper-clad ceramic substrate.

14. The sealing structure according to claim 1, characterized in that: The length of the first pin, the second pin, the third pin, the fourth pin and the fifth pin extending from the plastic package body is 15 mm to 25 mm.

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