Acquisition circuit, device and system for audio and video signals

Abstract

The utility model relates to an acquisition circuit, device and system for audio and video signals, belongs to the technical field of video signal detection and conversion, and aims to solve the problem that the existing acquisition mode is difficult to meet the high-definition video processing requirements of multiple paths and multiple interfaces. The acquisition circuit for audio and video signals comprises a first signal conversion module, a second signal conversion module, a third signal conversion module, an FPGA module, an MCU and a USB output module. The FPGA module is connected with the first signal conversion module, the second signal conversion module, the third signal conversion module, the MCU and the USB output module. The MCU respectively controls the third signal conversion module, the USB output module, the second signal conversion module and the FPGA module; the first signal conversion module receives SDI input audio and video signals; the second signal conversion module receives HDMI and DVI input audio and video signals; and the third signal conversion module receives VGA, YPbPr, S-Video and CVBS input video signals, so that the high-definition video processing requirements of multiple paths and multiple interfaces are met.

Description

Technical Field

[0001] The utility model relates to the technical field of video signal detection and conversion, and particularly relates to an acquisition circuit, a device and a system for audio and video signals. Background Art

[0002] Video is an important carrier of visual information. People's requirements for visual effects are getting higher and higher, and the requirements for video switching devices in some fields are also getting higher and higher. The demand for devices that can achieve fast switching and processing of high-definition videos with multiple channels and multiple interfaces is becoming stronger and stronger.

[0003] The current video switchers can only achieve the switching between videos with single or two video interfaces, and cannot meet the operation of any video interface and support multiple channels at the same time. For example, converting a single HDMI input signal into a USB signal and outputting it to a computer; or converting several analog signal (VGA / YPbPr) interfaces into a USB signal and outputting it to a computer, which is difficult to meet the requirements of fast switching and processing of high-definition videos with multiple channels and multiple interfaces. Summary of the Utility Model

[0004] The purpose of this application is to provide an acquisition circuit, a device and a system for audio and video signals, so as to solve the problem that the existing acquisition methods are difficult to meet the requirements of fast switching and processing of high-definition videos with multiple channels and multiple interfaces.

[0005] To solve the above problems, the following technical solutions are adopted in this application:

[0006] The first aspect of this application provides an acquisition circuit for audio and video signals, including: a first signal conversion module, a second signal conversion module, a third signal conversion module, an FPGA module, an MCU and a USB output module. The FPGA module is respectively connected to the first signal conversion module, the second signal conversion module, the third signal conversion module, the MCU and the USB output module; the MCU controls the third signal conversion module, the USB output module, the second signal conversion module and the FPGA module respectively;

[0007] Among them, the first signal conversion module is used to receive SDI input audio and video signals;

[0008] The second signal conversion module is used to receive HDMI and DVI input audio and video signals;

[0009] The third signal conversion module is used to receive VGA, YPbPr, S-Video and CVBS input video signals.

[0010] Through the first, second, and third signal conversion modules, the conversion of different input signals is realized, enabling the signals to be processed in the FPGA module, reducing the complexity of signal processing, and improving the signal processing efficiency. At the same time, the acquisition circuit supports the input of various audio and video signals such as SDI, HDMI, DVI, VGA, YPbPr, S-Video, and CVBS, with strong compatibility and can meet the usage requirements in various scenarios. The MCU controls the third signal conversion module, USB output module, second signal conversion module, and FPGA module respectively, realizing the intelligent management of the entire acquisition circuit, making the signal acquisition process more stable and improving the reliability of the system.

[0011] Further, the first signal conversion module includes a TVS tube and a first signal conversion chip. The first signal conversion chip is connected to the FPGA module. One end of the TVS tube is grounded, and the other end of the TVS tube is connected to the first signal conversion chip.

[0012] By using a TVS tube as part of the first signal conversion module to direct overvoltage to the ground, timely overvoltage protection can be provided during large voltage impacts, adapting to various electromagnetic interferences and voltage fluctuations, and avoiding damage to related components due to overvoltage.

[0013] Further, the first signal conversion module further includes a filter circuit. The filter circuit is located between the TVS tube and the FPGA module, and one end of the filter circuit is grounded.

[0014] By smoothing the signal through the filter circuit, high-frequency noise and interference in the signal can be effectively removed, improving the signal quality, enhancing the signal stability, reducing signal fluctuations, and thus ensuring that the signal received by the FPGA module is stable and reliable.

[0015] Further, the acquisition circuit for audio and video signals includes a SERDES module. The SERDES module is respectively connected to the first signal conversion chip and the FPGA module.

[0016] The SERDES module has a strong anti-interference ability through differential signal transmission, can effectively reduce the impact of external noise and interference on the signal. At the same time, it realizes the transmission of high-speed serial data, maintains the integrity of the signal, and reduces signal distortion and attenuation during transmission.

[0017] Further, the first signal conversion module further includes a first capacitor. The first capacitor is respectively connected to the first signal conversion chip and the SERDES module.

[0018] The first capacitor can achieve the function of decoupling, reduce the noise and interference on the power line, ensure the stability of the power supply, filter out the high-frequency noise in the signal, improve the purity of the signal, and improve the transmission quality of the signal.

[0019] Further, the acquisition circuit for audio and video signals includes an impedance matching circuit, and the impedance matching circuit is respectively connected to the MCU and the FPGA module.

[0020] Through the impedance matching circuit, the impedance matching between the MCU and the FPGA module can be achieved, reducing signal reflection and loss, reducing the attenuation of the signal during transmission, reducing the bit error rate during signal transmission, ensuring the strength and clarity of the signal, and thus improving the quality of audio and video signals.

[0021] Further, the acquisition circuit for audio and video signals includes a status indicator light, and the status indicator light is used to characterize the operating status of the acquisition circuit for audio and video signals.

[0022] By the status indicator light, the operating status of the acquisition circuit for audio and video signals can be monitored in real time, so that the working condition of the circuit can be intuitively understood. By observing the change of the status indicator light, it can be quickly diagnosed whether there is a fault or abnormality in the acquisition circuit, which is convenient for taking measures in time for troubleshooting and repair.

[0023] Further, the acquisition circuit for audio and video signals includes a DIP switch, one end of the DIP switch is connected to the MCU, and the other end of the DIP switch is grounded.

[0024] Through the DIP switch, the acquisition parameters of audio and video signals can be quickly adjusted according to actual needs. The grounding of the DIP switch can ensure that the circuit can be safely disconnected or current-limited in some cases, reducing potential electrical risks. When the acquisition circuit needs to be updated or upgraded, the design of the DIP switch is convenient for quick replacement.

[0025] The second aspect of the present application provides an acquisition device for audio and video signals, including: a housing with a receiving cavity formed inside, and the acquisition device for audio and video signals according to any one of the above, disposed inside the housing.

[0026] The third aspect of the present application provides an acquisition system for audio and video signals, and the protection system for serial communication includes the above device.

[0027] Compared with the prior art, the beneficial effects of the present application are as follows: Since the FPGA module is respectively connected to the first signal conversion module, the second signal conversion module, the third signal conversion module, the MCU, and the USB output module; the MCU controls the third signal conversion module, the USB output module, the second signal conversion module, and the FPGA module respectively, so as to convert different input signals, enabling the signals to be processed in the FPGA module, reducing the complexity of signal processing, and improving the signal processing efficiency. At the same time, the acquisition circuit supports the input of various audio and video signals such as SDI, HDMI, DVI, VGA, YPbPr, S-Video, and CVBS, with strong compatibility and can meet the usage requirements in various scenarios. Description of the Drawings

[0028] Figure 1 FIG. is a structural block diagram of an acquisition circuit for audio and video signals provided by an embodiment of the present application;

[0029] Figure 2 FIG. is a structural block diagram of another acquisition circuit for audio and video signals provided by an embodiment of the present application;

[0030] Figure 3 FIG. is a circuit diagram of a third signal conversion module provided by an embodiment of the present application;

[0031] Figure 4 FIG. is a circuit diagram of a second signal conversion module provided by an embodiment of the present application;

[0032] Figure 5 FIG. is a circuit diagram of a first signal conversion module provided by an embodiment of the present application;

[0033] Figure 6 FIG. is a circuit diagram of an MCU provided by an embodiment of the present application;

[0034] Figure 7 FIG. is a circuit diagram of a USB output module provided by an embodiment of the present application; and

[0035] Figure 8 FIG. is a circuit diagram of a SERDES module provided by an embodiment of the present application.

[0036] Description of the Reference Numerals:

[0037] 1. First signal conversion module; 11. First signal conversion chip; 12. TVS tube; 13. Filter circuit; 14. First capacitor; 2. Second signal conversion module; 3. Third signal conversion module; 4. FPGA module; 5. MCU; 6. USB output module; 7. SERDES module; 8. Impedance matching circuit; 9. Status indicator; 10. DIP switch. Detailed Embodiments

[0038] The following will describe in detail the specific embodiments of the present application with reference to the accompanying drawings.

[0039] It should be noted that, without conflict, the embodiments in the present application and the technical features in the embodiments can be combined with each other. The detailed description in the specific embodiments should be understood as an explanatory illustration of the gist of the present application and should not be regarded as an improper limitation of the present application.

[0040] It should be understood that the orientation or positional relationship is based on the orientation or positional relationship shown in the accompanying drawings. These orientation terms are only for the convenience of describing the present application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and thus should not be construed as a limitation of the present application.

[0041] Figure 1 It is a structural block diagram of an acquisition circuit for audio and video signals provided by an embodiment of the present application; Figure 3 It is a circuit diagram of a third signal conversion module provided by an embodiment of the present application; Figure 4 It is a circuit diagram of a second signal conversion module provided by an embodiment of the present application; Figure 5 It is a circuit diagram of a first signal conversion module provided by an embodiment of the present application; Figure 6 It is a circuit diagram of an MCU provided by an embodiment of the present application; Figure 7 It is a circuit diagram of a USB output module provided by an embodiment of the present application. As Figures 1 to 7 shown, an embodiment of the present application provides an acquisition circuit for audio and video signals, including: a first signal conversion module 1, a second signal conversion module 2, a third signal conversion module 3, an FPGA module 4, an MCU 5, and a USB output module 6. The FPGA module 4 is respectively connected to the first signal conversion module 1, the second signal conversion module 2, the third signal conversion module 3, the MCU 5, and the USB output module 6; the MCU 5 controls the third signal conversion module 3, the USB output module 6, the second signal conversion module 2, and the FPGA module 4 respectively; the first signal conversion module 1 is used to receive SDI input audio and video signals, the second signal conversion module 2 is used to receive HDMI and DVI input audio and video signals, and the third signal conversion module 3 is used to receive VGA, YPbPr, S-Video, and CVBS input video signals.

[0042] Specifically, Figure 2 It is another structural block diagram of an acquisition circuit for audio and video signals provided by an embodiment of the present application. As Figure 2 shown, the specific embodiments of this technical solution are as follows:

[0043] First, the FPGA module 4 is respectively connected to the first signal conversion module 1, the second signal conversion module 2, the third signal conversion module 3, the MCU 5, and the USB output module 6. The FPGA module 4 is a programmable logic device used to process and convert audio-video signals. The MCU 5 controls the third signal conversion module 3, the USB output module 6, the second signal conversion module 2, and the FPGA module 4 respectively. The first signal conversion module 1 receives the SDI input audio-video signal, converts it into a digital signal, and transmits it to the FPGA module 4 for processing. The second signal conversion module 2 receives the HDMI and DVI input audio-video signals, also converts them into digital signals, and transmits them to the FPGA module 4 for processing. The third signal conversion module 3 receives the VGA, YPbPr, S-Video, and CVBS input video signals, converts them into digital signals, and transmits them to the FPGA module 4 for processing. The FPGA module 4 processes and converts the received audio-video signals and outputs them to the USB output module 6. The USB output module 6 transmits the processed audio-video signals to a computer or other devices through a USB interface.

[0044] Through the first, second, and third signal conversion modules, the conversion of different input signals is realized, enabling the signals to be processed in the FPGA module 4, reducing the complexity of signal processing, and improving the signal processing efficiency. At the same time, the acquisition circuit supports the input of multiple audio-video signals such as SDI, HDMI, DVI, VGA, YPbPr, S-Video, and CVBS, with strong compatibility, and can meet the usage requirements in various scenarios. The MCU 5 controls the third signal conversion module 3, the USB output module 6, the second signal conversion module 2, and the FPGA module 4 respectively, realizing the intelligent management of the entire acquisition circuit, making the signal acquisition process more stable, and improving the reliability of the system.

[0045] In some embodiments, the first signal conversion module 1 includes a TVS tube 12 and a first signal conversion chip 11. The first signal conversion chip 11 is connected to the FPGA module 4. One end of the TVS tube 12 is grounded, and the other end of the TVS tube 12 is connected to the first signal conversion chip 11.

[0046] Specifically, the TVS tube 12 is a fast-response voltage surge protection device that can introduce overvoltage into the ground wire, thereby protecting the subsequent circuit from damage. The first signal conversion chip 11 is an integrated circuit used to convert the input signal into a signal that can be processed by the FPGA module 4. One end of the TVS tube 12 is grounded. When an overvoltage appears in the input signal, the TVS tube 12 can introduce the overvoltage into the ground wire to protect the subsequent circuit. The other end of the TVS tube 12 is connected to the first signal conversion chip 11. The first signal conversion chip 11 can receive the signal from the TVS tube 12 and convert it into a signal that can be processed by the FPGA module 4. Since the first signal conversion chip 11 is connected to the FPGA module 4, the FPGA module 4 receives and processes the signal from the first signal conversion chip 11 to achieve control of the circuit.

[0047] By using the TVS tube 12 as part of the first signal conversion module 1 to direct overvoltage to the ground, timely overvoltage protection can be provided during large voltage surges, adapting to various electromagnetic interferences and voltage fluctuations, and preventing related components from being damaged due to overvoltage.

[0048] In some embodiments, the first signal conversion module 1 further includes a filtering circuit 13. The filtering circuit 13 is located between the TVS tube 12 and the FPGA module 4, and one end of the filtering circuit 13 is grounded.

[0049] Specifically, both the TVS tube 12 and the FPGA module 4 are connected to the first signal conversion module 1, and the filtering circuit 13 is connected between the TVS tube 12 and the FPGA module 4. One end of the filtering circuit 13 is grounded, and the other end is connected between the TVS tube 12 and the FPGA module 4. The output end of the first signal conversion module 1 is connected to the device that needs to receive the signal. When the input signal passes through the TVS tube 12, due to the clamping effect of the TVS tube 12, the voltage of the input signal will be limited within a certain range. The input signal passes through the filtering circuit 13, and the filtering circuit 13 can filter out high-frequency noise and interference signals in the input signal. The signal processed by the filtering circuit 13 will be transmitted to the FPGA module 4, and the FPGA module 4 will process and convert the signal according to the preset program and algorithm, and then output the processed signal to the connected device.

[0050] By smoothing the signal through the filtering circuit 13, high-frequency noise and interference in the signal are effectively removed, the quality of the signal is improved, the stability of the signal is enhanced, and the fluctuation of the signal is reduced, thereby ensuring that the signal received by the FPGA module 4 is stable and reliable.

[0051] Figure 8 The circuit diagram of a SERDES module provided by an embodiment of the present application is as Figure 2 and Figure 8As shown, in some embodiments, the acquisition circuit for audio - video signals includes a SERDES module 7, and the SERDES module 7 is respectively connected to the first signal conversion chip 11 and the FPGA module 4.

[0052] Specifically, the following is a specific embodiment of the "audio - video signal acquisition circuit":

[0053] The acquisition circuit for audio - video signals includes a SERDES module 7, and the SERDES module 7 is respectively connected to the first signal conversion chip 11 and the FPGA module 4.

[0054] The specific implementation is as follows: The first signal conversion chip 11 and the FPGA module 4 are connected through the SERDES module 7. The output end of the SERDES module 7 is connected to the audio - video signal source. The SERDES module 7 has the functions of a serializer and a deserializer. It can convert the parallel signal output by the first signal conversion chip 11 into a serial signal, and at the same time convert the serial signal output by the FPGA module 4 into a parallel signal to achieve signal transmission between the two chips. Under the action of the SERDES module 7, the first signal conversion chip 11 and the FPGA module 4 can achieve efficient and stable data transmission, thus completing the acquisition of audio - video signals.

[0055] The SERDES module 7 uses the differential signal transmission method, has strong anti - interference ability, can effectively reduce the influence of external noise and interference on the signal. At the same time, it realizes the transmission of high - speed serial data, maintains the integrity of the signal, and reduces signal distortion and attenuation during transmission.

[0056] In some embodiments, the first signal conversion module 1 further includes a first capacitor 14, and the first capacitor 14 is respectively connected to the first signal conversion chip 11 and the SERDES module 7.

[0057] Specifically, the first capacitor 14 is connected between the first signal conversion chip 11 and the SERDES module 7. The two ends of the first capacitor 14 are respectively connected to the relevant pins of the first signal conversion chip 11 and the SERDES module 7. The signal between the first signal conversion chip 11 and the SERDES module 7 is filtered through the first capacitor 14 to filter out high - frequency noise and interference signals, thereby improving the quality and stability of the signal. The filtered signal will be transmitted to the SERDES module 7, and the SERDES module 7 will serialize the signal and then transmit it to the FPGA module 4 for further processing. The first capacitor 14 can play a decoupling role, reduce the noise and interference on the power line, ensure the stability of the power supply, filter out the high - frequency noise in the signal, improve the purity of the signal, and improve the signal transmission quality.

[0058] In some embodiments, the acquisition circuit for audio - video signals includes an impedance - matching circuit 8, and the impedance - matching circuit 8 is respectively connected to the MCU 5 and the FPGA module 4.

[0059] Specifically, an impedance - matching circuit 8 is connected between the MCU 5 and the FPGA module 4. One end of the impedance - matching circuit 8 is connected to the MCU 5, and the other end is connected to the FPGA module 4. The impedance - matching circuit 8 performs impedance matching on the signals between the MCU 5 and the FPGA module 4. Since the MCU 5 and the FPGA module 4 may have different output impedances, the impedance - matching circuit 8 can help eliminate signal reflection and loss, thereby improving the signal transmission efficiency and quality. Under the action of the impedance - matching circuit 8, the signal transmission between the MCU 5 and the FPGA module 4 will be more stable and reliable. This helps reduce signal interference and attenuation, ensuring the integrity of the signal during transmission.

[0060] The impedance - matching circuit 8 enables impedance matching between the MCU 5 and the FPGA module 4, reduces signal reflection and loss, reduces signal attenuation during transmission, reduces the bit - error rate during signal transmission, ensures the signal strength and clarity, and thus improves the quality of audio - video signals.

[0061] In some embodiments, the acquisition circuit for audio - video signals includes a status indicator 9, and the status indicator 9 is used to characterize the operating state of the acquisition circuit for audio - video signals.

[0062] Specifically, the status indicator 9 is designed and integrated in the audio - video signal acquisition circuit. The status indicator 9 can be one or more, and can be divided into different colors according to needs, such as red, green, and yellow, to represent different states. The status indicator 9 is connected to the control logic of the audio - video signal acquisition circuit, and the status indicator 9 can be driven by the control signal in the circuit to display the operating state of the acquisition circuit.

[0063] According to the working principle and operating state of the acquisition circuit, the display rules of the status indicator 9 are designed. For example, when the acquisition circuit is in the normal operating state, the status indicator 9 can display green; when the acquisition circuit is in the standby state, the status indicator 9 can display red; when the acquisition circuit has a fault or anomaly, the status indicator 9 can display yellow or red flashing.

[0064] By using the status indicator 9, the operating state of the audio - video signal acquisition circuit can be monitored in real - time, so that the working condition of the circuit can be intuitively understood. By observing the change of the status indicator, it is possible to quickly diagnose whether there is a fault or anomaly in the acquisition circuit, which is convenient for taking timely measures for troubleshooting and repair.

[0065] In some embodiments, the acquisition circuit for audio - video signals includes a DIP switch 10. One end of the DIP switch 10 is connected to the MCU5, and the other end of the DIP switch 10 is grounded.

[0066] Specifically, a DIP switch 10 is designed and integrated in the audio - video signal acquisition circuit. The DIP switch 10 is a dual - in - line plug - in switch with multiple pins and can be used to select or control certain functions of the circuit. One end of the DIP switch 10 is connected to the corresponding pin of the MCU5, and the MCU5 can control the on - off state of the DIP switch 10 through programming to achieve different configurations or controls of the acquisition circuit.

[0067] Connect the other end of the DIP switch 10 to the ground as the reference potential of the circuit, ensuring that the grounded end of the DIP switch 10 has the same potential as other circuit parts and avoiding interference caused by potential differences.

[0068] It should be noted that, according to actual requirements, the pin assignment and connection method of the DIP switch 10 are designed. For example, the pins of the DIP switch 10 can be divided into input terminals and output terminals. The input terminals are connected to the MCU5, and the output terminals are connected to other circuit parts. Through the DIP switch 10, it is possible to quickly adjust the acquisition parameters of the audio - video signals according to actual requirements. Grounding the DIP switch 10 can ensure that the circuit can be safely disconnected or current - limited in some cases, reducing potential electrical risks. When it is necessary to update or upgrade the acquisition circuit, the design of the DIP switch facilitates quick replacement.

[0069] The embodiment of the present application also provides an acquisition device for audio - video signals, including: a housing with a receiving cavity formed inside, and the acquisition device for audio - video signals described in any one of the above, which is arranged inside the housing.

[0070] The embodiment of the present application also provides an acquisition system for audio - video signals, and the protection system for serial communication includes the above - mentioned device.

[0071] The above embodiments are only used to illustrate the technical solutions of the present application and are not intended to limit them. Although the present application has been described in detail with reference to the foregoing embodiments, those skilled in the art can still modify the technical solutions described in the foregoing embodiments, or perform equivalent replacements for some of the technical features. These modifications or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions required to be protected by the present application.

Claims

1. A circuit for collecting audio and video signals, characterized in that: include: A first signal conversion module, a second signal conversion module, a third signal conversion module, an FPGA module, an MCU and a USB output module, wherein the FPGA module is respectively connected to the first signal conversion module, the second signal conversion module, the third signal conversion module, the MCU and the USB output module; and the MCU controls the third signal conversion module, the USB output module, the second signal conversion module and the FPGA module respectively; Wherein, the first signal conversion module is used to receive SDI input audio and video signals; The second signal conversion module is used to receive HDMI and DVI input audio and video signals; The third signal conversion module is used to receive VGA, YPbPr, S-Video and CVBS input video signals.

2. The circuit for collecting audio and video signals according to claim 1, characterized in that: The first signal conversion module includes a TVS tube and a first signal conversion chip. The first signal conversion chip is connected to the FPGA module. One end of the TVS tube is grounded, and the other end of the TVS tube is connected to the first signal conversion chip.

3. The circuit for collecting audio and video signals according to claim 2, characterized in that: The first signal conversion module further includes a filter circuit, which is located between the TVS tube and the FPGA module, and one end of the filter circuit is grounded.

4. The circuit for collecting audio and video signals according to claim 2, characterized in that: The acquisition circuit for audio and video signals includes a SERDES module, and the SERDES module is respectively connected to the first signal conversion chip and the FPGA module.

5. The circuit for collecting audio and video signals according to claim 4, characterized in that: The first signal conversion module also includes a first capacitor, and the first capacitor is respectively connected to the first signal conversion chip and the SERDES module.

6. The circuit for collecting audio and video signals according to claim 1, characterized in that: The acquisition circuit for audio and video signals includes an impedance matching circuit, and the impedance matching circuit is respectively connected to the MCU and the FPGA module.

7. The circuit for collecting audio and video signals according to claim 1, characterized in that: The acquisition circuit for audio and video signals comprises a status indicator light, and the status indicator light is used to indicate the operating state of the acquisition circuit for audio and video signals.

8. The circuit for collecting audio and video signals according to claim 1, characterized in that: The acquisition circuit for audio and video signals includes a DIP switch, one end of the DIP switch is connected to the MCU, and the other end of the DIP switch is grounded.

9. A device for collecting audio and video signals, characterized in that: include: A shell having a receiving cavity formed therein, and a collection circuit for audio and video signals as described in any one of claims 1 to 8 are arranged in the shell.

10. A system for collecting audio and video signals, characterized in that: The system for collecting audio and video signals comprises the device described in claim 9.

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