Zero temperature coefficient generation circuit capable of inhibiting process drift and chip
By introducing the same resistance as the op amp and temperature coefficient into the reference circuit, a negative feedback system is formed and the gate voltage of the MOS tube is automatically adjusted, which solves the accuracy problem of the reference current under process drift and temperature changes, and achieves a stable reference current output, which is suitable for integration within the analog-to-digital hybrid chip to reduce costs.
Patent Information
- Application Number
- CN202422137680.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-08-30
- Publication Date
- 2025-07-01
- Estimated Expiration
- 2034-08-30
AI Technical Summary
The existing reference current circuit is affected by process drift and temperature changes during semiconductor manufacturing, resulting in unstable accuracy. Traditional reference chips are sensitive to process and cannot effectively compensate for temperature changes.
The circuit consisting of a reference circuit, an operational amplifier, a P-type MOS tube and a resistor with the same temperature coefficient is automatically adjusted through a negative feedback system to offset the influence of process drift and temperature changes, and provide a stable reference current.
It improves the process anti-interference and temperature stability of the reference current, reduces process sensitivity, and can be integrated into the analog-to-digital hybrid chip, saving board-level area and cost.
Smart Images
Figure CN223051669U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to the field of semiconductor packaging, and particularly relates to a zero temperature coefficient generating circuit and a chip capable of suppressing process drift. Background Art
[0002] In analog, radio frequency and analog-digital hybrid circuits, the accuracy of the reference voltage and reference current directly affects the upper limit of the circuit performance, and the reference current is affected by process drift during the semiconductor manufacturing process.
[0003] In the CMOS process, the resistance value of the resistor will change with the process. For example, small differences in the manufacturing process will lead to significant deviations, which will directly affect the accuracy of the reference current and cause unstable circuit performance. Using active components to form the reference current will also cause fluctuations in the threshold voltage of the MOS transistor due to process variations, further affecting the accuracy of the reference current. In traditional reference current circuits using active components, it is difficult to ensure the accuracy of the current due to the instability of the threshold voltage.
[0004] Temperature changes will also affect the performance of electronic components. For example, the resistance value of the resistor and the threshold voltage of the MOS transistor will change with temperature.
[0005] The bandgap reference circuit has excellent temperature compensation characteristics and can generate a stable reference voltage with a temperature coefficient close to zero. This reference voltage (Vref) directly affects the stability of the reference current generated by the subsequent circuit. Therefore, a reference chip is usually introduced in the design of analog, radio frequency and analog-digital hybrid circuits to provide a stable reference voltage or current.
[0006] However, most of the existing reference chips are independent modules independent of the analog-digital hybrid chip, are highly sensitive to process drift, and have limited temperature compensation effects. Summary of the Utility Model
[0007] The utility model provides a zero temperature coefficient generating circuit and a chip capable of suppressing process drift. The circuit can improve the process anti-interference ability of the reference current, reduce the sensitivity of the reference current to the process, and at the same time, the circuit can be integrated inside the analog-digital hybrid chip, saving the board-level area and thus saving the module cost. To achieve the purpose of the utility model, the following scheme is adopted:
[0008] A zero temperature coefficient generating circuit capable of suppressing process drift, comprising a reference circuit, an operational amplifier, a first MOS transistor, a second MOS transistor, a first resistor and a second resistor;
[0009] The output terminal of the reference circuit is connected to the inverting input terminal of the operational amplifier to provide a reference voltage; the non-inverting input terminal of the operational amplifier is connected to the drain of the first MOS transistor, and the output terminal of the operational amplifier is connected to the gates of the first MOS transistor and the second MOS transistor; the source of the first MOS transistor is connected to one end of the second resistor, and the drain of the first MOS transistor is connected to one end of the first resistor; the other end of the second resistor is connected to the power supply terminal; the other end of the first resistor is grounded; the source of the second MOS transistor is connected to the power supply terminal, and the drain of the second MOS transistor serves as the output terminal to provide a reference current.
[0010] Preferably, both the first MOS transistor and the second MOS transistor are P-type MOSFETs.
[0011] Further, the first resistor and the second resistor are resistors with the same temperature coefficient.
[0012] Preferably, the reference circuit includes one of a bandgap reference circuit, a current source reference circuit, or a charge pump reference circuit.
[0013] The present invention also includes a chip, and the chip integrates any one of the above zero temperature coefficient generation circuits that can suppress process drift.
[0014] Compared with the prior art, the technical solution of the present invention has the following beneficial effects:
[0015] The present invention can improve the process anti-interference of the reference current, reduce the sensitivity of the reference current to the process, and at the same time, this circuit can be integrated inside the analog-digital hybrid chip, saving the board-level area and thus saving the module cost. Description of the Drawings
[0016] Figure 1 is the circuit diagram of the zero temperature coefficient generation circuit that can suppress process drift of the present invention;
[0017] Figure 2 The circuit diagram of the embodiment of the present invention using a bandgap reference circuit. Detailed Description of the Embodiment
[0018] The embodiments of the present invention will be described in detail below. The examples of the embodiments are shown in the drawings. The example embodiments can be implemented in various forms and should not be construed as limited to the examples described herein; on the contrary, these embodiments are provided so that the present invention will be more comprehensive and complete, and the concept of the example embodiments will be fully conveyed to those skilled in the art. The same or similar reference numerals represent the same or similar elements or elements with the same or similar functions throughout. The embodiments described below with reference to the drawings are exemplary and are only used to explain the present invention and should not be construed as limiting the present invention.
[0019] In the description of the present utility model, it should be noted that unless otherwise clearly specified and defined, the terms "installation", "connection", and "linkage" should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, and it can be the communication inside two components. For those of ordinary skill in the art, the specific meanings of the above terms in the present invention can be understood according to specific situations.
[0020] In an embodiment of the present utility model, it includes a reference circuit, an operational amplifier, a first MOS transistor M1, a second MOS transistor M2, a first resistor R1, and a second resistor R2.
[0021] The reference circuit used in this embodiment is a bandgap reference circuit. The bandgap reference circuit mainly generates a stable reference voltage Vref with a temperature coefficient close to zero through two bipolar transistors with opposite temperature coefficients and an amplifier inside. The output terminal of the bandgap reference circuit is connected to the non-inverting input terminal of the operational amplifier to provide the reference voltage Vref. In other embodiments of the present utility model, the reference circuit can be replaced by a current source reference circuit or a charge pump reference circuit.
[0022] In this embodiment, both the first MOS transistor M1 and the second MOS transistor M2 are P-type MOSFETs. The non-inverting input terminal of the operational amplifier is connected to the drain of the first MOS transistor M1, and the output terminal of the operational amplifier is connected to the gates of the first MOS transistor M1 and the second MOS transistor M2; the source of the first MOS transistor M1 is connected to one end of the second resistor R2, and the drain of the first MOS transistor M1 is connected to one end of the first resistor R1; the other end of the second resistor R2 is connected to the power supply terminal; the other end of the first resistor R1 is grounded; the source of the second MOS transistor M2 is connected to the power supply terminal, and the drain of the second MOS transistor M2 serves as the output terminal to provide the reference current Iref.
[0023] When the operational amplifier is working normally, according to the virtual short principle, the voltages at the two input terminals (non-inverting input terminal and inverting input terminal) of the operational amplifier are equal. The gate of the first MOS transistor M1 is connected to the output terminal of the operational amplifier. Since almost no current flows through the gate, the output terminal of the operational amplifier controls the voltage of the gate of the first MOS transistor M1, and this gate voltage can accurately control the magnitude of the source-drain current of the first MOS transistor M1. At the same time, all the current of the first MOS transistor M1 at the output terminal of the operational amplifier flows downward to the first resistor R1, and the magnitude of the current is:
[0024]
[0025] The accuracy of this current depends on the accuracy of the reference voltage output by the bandgap. However, the threshold voltage (Vth) of the MOS transistor fluctuates with the variation of the manufacturing process, which may lead to the instability of the current. However, due to the overall negative feedback effect of the circuit, the gate voltage of the MOS transistor can be automatically adjusted to compensate for this variation, so that the output current is not affected by the threshold voltage drift.
[0026] Furthermore, when the resistance value of the first resistor R1 under the first MOS transistor M1 changes due to process drift, in order to offset the influence brought by the process drift of the first resistor R1 below, a resistor of the same type (the second resistor R2) is introduced between the source of the first MOS transistor M1 and the power supply. When the process drift causes the resistance of the first resistor R1 to increase, the current passing through the first resistor R1 will decrease. In order to maintain the same current, the operational amplifier will adjust the gate voltage of the first MOS transistor M1 to increase it, thereby increasing the drain-source current passing through the first MOS transistor M1; but at the same time, because the second resistor R2 is introduced, the increase of the second resistor R2 increases the source of the first MOS transistor, so the drain-source voltage of the first MOS transistor M1 will decrease. Therefore, the gate voltage only needs to change by a smaller value to achieve less current output by the MOS, which forms a feedback mechanism, enabling the gate voltage to only need a very small change to achieve the adaptive adjustment of the conduction current of the first MOS transistor M1 and stabilizing the current flowing through the first resistor R1.
[0027] The output terminal of the operational amplifier is connected to the gates of the first MOS transistor M1 and the second MOS transistor M2. Therefore, the output current of the second MOS transistor M2, that is, the reference current Iref, is the copied drain-source current of the first MOS transistor M1. When the gate voltage of the first MOS transistor M1 becomes smaller with the change of the process, that is, the output voltage of the second MOS transistor M2 becomes more stable, thus improving the performance of the output current against process drift. Therefore, in this circuit, the operational amplifier, MOS transistors, and resistors together form a negative feedback system. Through the self-adjusting characteristic, when the output deviates from the expectation, the system will automatically adjust to return to the stable state, which is also applicable to suppressing the situation where the output current accuracy is insufficient due to the change of the resistance value with temperature.
[0028] The circuit design in this embodiment is based on the standard CMOS process and is easy to be compatible with the existing semiconductor process flow. By integrating the present utility model into the analog-digital hybrid chip, the number of external components can be reduced, thereby saving the board-level area and reducing the manufacturing cost of the entire module.
[0029] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and not to limit them. Although the present invention has been described in detail with reference to the preferred embodiments, those of ordinary skill in the art should understand that the technical solutions of the present invention can be modified or equivalently replaced without departing from the spirit and scope of the technical solutions of the present invention, and they should all be covered within the scope of the claims of the present invention.
Claims
1. A zero temperature coefficient generating circuit capable of suppressing process drift, characterized in that: It includes a reference circuit, an operational amplifier, a first MOS tube, a second MOS tube, a first resistor and a second resistor; The output end of the reference circuit is connected to the inverting input end of the operational amplifier to provide a reference voltage; The in-phase input terminal of the operational amplifier is connected to the drain of the first MOS tube, and the output terminal of the operational amplifier is connected to the gate of the first MOS tube and the gate of the second MOS tube; The source of the first MOS tube is connected to one end of the second resistor, and the drain of the first MOS tube is connected to one end of the first resistor; The other end of the second resistor is connected to the power supply end; The other end of the first resistor is grounded; The source of the second MOS tube is connected to the power supply terminal, and the drain of the second MOS tube serves as an output terminal to provide a reference current.
2. A zero temperature coefficient generating circuit capable of suppressing process drift according to claim 1, characterized in that: The first MOS tube and the second MOS tube are both P-type MOSFETs.
3. A zero temperature coefficient generating circuit capable of suppressing process drift according to claim 1, characterized in that: The first resistor and the second resistor are resistors with the same temperature coefficient.
4. A zero temperature coefficient generating circuit capable of suppressing process drift according to claim 1, characterized in that: The reference circuit includes one of a bandgap reference circuit, a current source reference circuit or a charge pump reference circuit.
5. A chip, characterized in that: The invention is integrated with a zero temperature coefficient generating circuit capable of suppressing process drift as claimed in any one of claims 1 to 4.