Edge intelligent gateway for edge cloud collaboration

Abstract

The utility model discloses an edge intelligent gateway used for edge cloud collaboration. The edge intelligent gateway comprises a backboard used for setting a bus, a front panel, a rear panel, an MCU main control board, a PoE board, an AI board, a 485 board, an FAN board and a power supply board. The backboard, the front panel and the rear panel form a plug-in frame for edge cloud collaboration, the interior of the plug-in frame is divided into a first space and a second space by the backboard, and the MCU main control board, the PoE board, the AI board, the 485 board, the FAN board and the power supply board are respectively arranged in the first space or the second space; the MCU main control board, the PoE board, the AI board, the 485 board, the FAN board and the power supply board are connected through a bus. The edge intelligent gateway has the beneficial effects that internal devices of the edge intelligent gateway are compact, the modules, the fan and the power supply are aligned and reasonably arranged, the occupied space of each module is smaller, the space utilization rate is improved, and the overall body is smaller; through a heat dissipation mechanism, the performance of the AI chip and the PoE chip is fully exerted, and the equipment integration and equipment compatibility are improved.

Description

Technical Field

[0001] The utility model relates to the technical field of gateways, and more specifically, to an edge intelligent gateway for edge-cloud collaboration. Background Art

[0002] Edge-cloud collaboration requires the collaboration between the edge side and the central cloud in most deployment and application scenarios of edge computing. How to achieve edge-cloud collaboration and build a new generation of AI intelligent networking and power supply system solutions poses high requirements for the device integration and device compatibility of gateway devices (i.e., the edge side).

[0003] At the same time, with the deepening of the construction of the new power system, the high-proportion access of power electronic devices, and the continuous increase of edge intelligent devices, the requirements for monitoring their operating states are also continuously improving. New design requirements are put forward for the gateway devices in substations. How to reasonably utilize the limited space and meet the expansion of subsequent functional modules has become a problem to be solved. Summary of the Invention

[0004] The utility model provides an edge intelligent gateway for edge-cloud collaboration, which solves the problems that the existing gateway devices need to improve the device integration and device compatibility capabilities, and there are problems in space utilization and function expansion.

[0005] To solve the above problems, the utility model provides an edge intelligent gateway for edge-cloud collaboration, including a backplane for setting a bus, a front panel, a rear panel, an MCU main control board, a PoE board, an AI board, a 485 board, a FAN board and a power supply board;

[0006] The backplane, the front panel and the rear panel form a plug-in frame for the edge-cloud collaboration. The backplane divides the interior of the plug-in frame into a first space and a second space. The MCU main control board, the PoE board, the AI board, the 485 board, the FAN board and the power supply board are respectively arranged in the first space or the second space;

[0007] The MCU main control board, the PoE board, the AI board, the 485 board, the FAN board and the power supply board are respectively connected through a bus.

[0008] The MCU main control board includes a system management chip and a SWITCH chip. The system management chip is connected to the backplane through a bus and GPIO ports, is connected to the management port arranged on the front panel through UART, is connected to a 4G module and a WIFI module through USB and / or PCI-E respectively, and is connected to the keys arranged on the front panel through a general input interface;

[0009] The SWITCH chip is connected to the backplane through the upstream port and the downstream port, connected to the system management chip through MDC / MDIO, and connected to the Ethernet port provided on the front panel through a network cable.

[0010] The PoE board includes a SWITCH module and a PSE module;

[0011] The PSE module includes a microprocessor and multiple PSE chips connected to each other. The microprocessor is connected to the SWITCH module through a serial port, and multiple PSE chips are respectively connected to the SWITCH module to supply power to the SWITCH module.

[0012] The AI board is connected to the backplane through RGMII and is also connected to the MCU main control board through UART.

[0013] The 485 board is connected to the MCU main control board through USB and is connected to the RJ45 interface provided on the front panel through a 485 serial port.

[0014] The MCU main control board and / or the PoE board and / or the AI board and / or the 485 board are set as tooth-shaped bodies including heat dissipation teeth in the same direction.

[0015] The FAN board includes multiple fans, and multiple fans are arranged in the first space;

[0016] The wind directions generated by multiple fans are the same as the direction of the heat dissipation teeth.

[0017] The side of the pluggable chassis is provided with heat dissipation holes in the same direction as the heat dissipation teeth.

[0018] The power supply board includes multiple power modules, and multiple power modules are arranged in the second space;

[0019] Multiple power modules are respectively connected to multiple power interfaces provided on the rear panel.

[0020] It further includes a hard disk expansion board, and the hard disk expansion board is arranged in the second space;

[0021] The hard disk expansion board is connected to the MCU main control board, the PoE board, the AI board, the 485 board, the FAN board and the power supply board through a bus.

[0022] The beneficial effects of the present utility model are as follows: The internal components of the edge intelligent gateway are compact, the modules are aligned and reasonably arranged with the fan and the power supply, each module occupies a smaller body position, improving the space utilization rate, and the overall body is more compact; through the heat dissipation mechanism, the performance of the AI chip and the PoE chip is fully exerted, improving the device integration and device compatibility capabilities; by connecting other peripherals, the problems of lack of monitoring in communication station rooms, difficult operation and maintenance of information communication computer rooms in power supply stations / business halls, and high requirements for terminal network security protection are further solved; the hardware adopts a modular design, which is convenient for system function expansion and system maintenance; through the mixed insertion design of service slots, functions or ports can be flexibly expanded. Description of the Drawings

[0023] In order to more clearly illustrate the technical solutions in the embodiments of the present utility model, the following will briefly introduce the drawings required for the description of the embodiments. Obviously, the following described drawings are only some embodiments of the present utility model, and those skilled in the art can obtain other drawings based on these drawings without creative efforts.

[0024] Figure 1 is a block diagram of an edge intelligent gateway for edge-cloud collaboration provided by an embodiment of the present utility model;

[0025] Figure 2 is a connection schematic diagram of the internal circuit of the backplane provided by an embodiment of the present utility model;

[0026] Figure 3 is a three-dimensional structure diagram of an edge intelligent gateway for edge-cloud collaboration provided by another embodiment of the present utility model;

[0027] Figure 4 is a structural schematic diagram between a system management chip, a SWITCH chip, a backplane and a front panel provided by an embodiment of the present utility model;

[0028] Figure 5 is a block diagram of the PSE module provided by an embodiment of the present utility model;

[0029] Figure 6 is a structural schematic diagram between a system management chip, an AI board, a backplane and a front panel provided by an embodiment of the present utility model;

[0030] Figure 7 is a structural schematic diagram between a system management chip, a 485 board, a backplane and a front panel provided by an embodiment of the present utility model;

[0031] Figure 8 is a structural schematic diagram of the dentate body provided by an embodiment of the present utility model. Detailed Embodiments

[0032] The following will clearly and completely describe the technical solutions in the embodiments of the present utility model in conjunction with the accompanying drawings in the embodiments of the present utility model. Obviously, the described embodiments are only a part of the embodiments of the present utility model, rather than all the embodiments. Based on the embodiments of the present utility model, all other embodiments obtained by those skilled in the art without creative efforts shall fall within the protection scope of the present utility model.

[0033] In the description of the present utility model, it should be understood that the terms "center", "longitudinal", "transverse", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc. indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings. It is only for the convenience of describing the present utility model and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and thus cannot be construed as a limitation of the present utility model. In addition, the terms "first" and "second" are only used for descriptive purposes and cannot be construed as indicating or implying relative importance or implicitly specifying the quantity of the indicated technical features. Thus, the features defined with "first" and "second" may explicitly or implicitly include one or more features. In the description of the present utility model, "a plurality" means two or more, unless otherwise specifically defined.

[0034] In the present utility model, the term "exemplary" is used to mean "serving as an example, illustration, or explanation". Any embodiment described as "exemplary" in the present utility model is not necessarily to be construed as more preferred or more advantageous than other embodiments. The following description is provided to enable any person skilled in the art to make and use the present utility model. In the following description, details are set forth for the purpose of explanation. It should be understood that those skilled in the art can recognize that the present utility model can be implemented without the use of these specific details. In other instances, well-known structures and processes are not described in detail to avoid unnecessary details from obscuring the description of the present utility model. Therefore, the present utility model is not intended to be limited to the embodiments shown, but is to be accorded the widest scope consistent with the principles and features disclosed herein.

[0035] The abbreviations in this case are explained as follows:

[0036] MCU (Microcontroller Unit): Microcontroller Unit, also known as Single Chip Microcomputer or microcontroller;

[0037] PoE (Power over Ethernet): Power supply over Ethernet, a technology that can transmit power and data to devices through twisted-pair cables in an Ethernet network;

[0038] AI (Artificial Intelligence): Artificial Intelligence;

[0039] FAN: Fan;

[0040] GPIO (General-purpose input / output): Abbreviation for general-purpose input / output, with a function similar to P0 - P3 of 8051. Its pins can be freely used by the user through programming. The PIN pins can be used as general-purpose inputs (GPI), general-purpose outputs (GPO), or general-purpose input and outputs (GPIO) according to actual considerations;

[0041] UART (Universal Asynchronous Receiver / Transmitter): Universal asynchronous transceiver is a general-purpose serial data bus used for asynchronous communication. This bus can communicate bidirectionally and can achieve full-duplex transmission and reception. In embedded design, UART is used to communicate with a PC, including with a monitoring debugger and other devices;

[0042] USB (Universal Serial Bus): Universal Serial Bus;

[0043] PCI-E (peripheral component interconnect express): A high-speed serial computer expansion bus standard;

[0044] 4G: The fourth-generation mobile information system;

[0045] WIFI: Mobile hotspot;

[0046] SWITCH: Switch, a network device used for forwarding electrical (optical) signals. It can provide an exclusive electrical signal path for any two network nodes connected to the switch;

[0047] PSE (Power Sourcing Equipment): PoE power supply equipment;

[0048] MDC: Management Data Clock, one of the two pins of the serial communication bus standard management interface in Gigabit Ethernet;

[0049] MDIO (Management Data Input / Output): Management Data Input / Output;

[0050] RGMII (Reduced Gigabit Media Independent Interface): Reduced GMII (Gigabit Media Independent Interface). RGMII all use 4-bit data interfaces, with a working clock of 125 MHz, and transmit data simultaneously on both the rising and falling edges, so the transmission rate can reach 1000 Mbps.

[0051] See Figure 1 and Figure 2 , Figure 1 is a block diagram of an edge intelligent gateway for edge-cloud collaboration provided by an embodiment of the present utility model. Figure 2 is a schematic diagram of the internal wiring of the backplane 1 provided by an embodiment of the present utility model. The edge intelligent gateway includes a backplane 1 for setting the bus, a front panel 8, a rear panel 9, an MCU main control board 2, a PoE board 3, an AI board 4, a 485 board 5, a FAN board 6, and a power board 7; the MCU main control board 2, PoE board 3, AI board 4, 485 board 5, FAN board 6, and power board 7 are respectively connected by a bus.

[0052] In this embodiment, a passive backplane 1 architecture is adopted on the backplane 1, which includes a total of 6 slots, namely the MCU main control board slot 20, PoE board slot 30, AI board slot 40, 485 board slot 50, FAN board slot 60, and power board slot 70. The MCU main control board slot 20, PoE board slot 30, AI board slot 40, 485 board slot 50, FAN board slot 60, and power board slot 70 are respectively connected to the MCU main control board 2, PoE board 3, AI board 4, 485 board 5, FAN board 6, and power board 7 to achieve the connection between the MCU main control board 2, PoE board 3, AI board 4, 485 board 5, FAN board 6, and power board 7 through the bus respectively.

[0053] The backplane 1 bus signals include a 10G high-speed service bus, a 1G service bus, a status management line, an I2C bus, a slot ID line, and a power line.

[0054] 10G high-speed service bus: 1 group of 10G (ASE-T) (2 pairs of differentials);

[0055] 1G service bus: 8 groups of 1G (ASE KR) (32 pairs of differentials);

[0056] Status management line: board presence (5 lines), power-on status (PRN) (5 lines), board reset (RESET) (6 lines), reserved (RESV) (9 lines);

[0057] I2C bus: 1 group (2 lines) (I2C1, I2C2);

[0058] Slot ID line: 1 group (3 lines);

[0059] Power cord: positive electrode P54V and negative electrode GND (PWRG).

[0060] Among them, the MCU main control board 2 manages and controls each service single board mainly through the I2C bus. The system designs 1 group of I2C buses to be connected to each service single board, and the I2C address of each service single board is related to the slot number. When each service board-mounted MCU is powered on, it first reads the slot number SLOT_ID[1:3], and then sets its own I2C address according to the slot number to ensure the uniqueness of the I2C address in the whole system.

[0061] See Figure 3 , Figure 3 See, which is a three-dimensional structure diagram of an edge intelligent gateway for edge-cloud collaboration provided by an embodiment of the present invention. The backplane 1, the front panel 8 and the rear panel 9 form a plug-in frame for the edge-cloud collaboration. The backplane 1 divides the interior of the plug-in frame into a first space and a second space. Among them, a first space is formed between the front panel 8 and the backplane 1, and a second space is formed between the rear panel 9 and the backplane 1. The MCU main control board 2, the PoE board 3, the AI board 4, the 485 board 5, the FAN board 6 and the power board 7 are respectively arranged in the first space or the second space; preferably, the edge intelligent gateway further includes a hard disk expansion board 10, and the hard disk expansion board 10 is arranged in the second space; the hard disk expansion board 10 is connected to the MCU main control board 2, the PoE board 3, the AI board 4, the 485 board 5, the FAN board 6 and the power board 7 through a bus.

[0062] In this embodiment, a 2U standard 19-inch model can be adopted. The front panel 8 is provided with 5 slots, which are the MCU main control slot, the POE board 3 slot, the 485 board 5 slot, the AI board 4 slot and the FAN board 6 slot respectively; the rear panel 9 is provided with 1 power board 7 slot, and 2 power modules can be inserted in parallel to supply power to the device. The whole machine system adopts a side-draft heat dissipation solution. The MCU main control, the POE board 3, the FAN board 6, and the power board 7 need to occupy their respective dedicated slots. The remaining AI board 4 slots and 485 board 5 slots both support inserting any 2 single boards among the AI board 4 and the 485 expansion board, or 2 single boards of the same type. For example, inserting 2 485 boards 5 can realize the expansion of ports. The hardware adopts a modular design, which is convenient for system function expansion and system maintenance; through the mixed insertion design of service slots, functions or ports can be flexibly expanded.

[0063] See Figure 4 , Figure 4It is a schematic structural diagram among the system management chip 21, SWITCH chip 22, backplane 1 and front panel 8 provided by an embodiment of the present utility model; the MCU main control board 2 includes a system management chip 21 and a SWITCH chip 22. The system management chip 21 is connected to the backplane 1 through a bus and GPIO ports, and is connected to the management port console arranged on the front panel 8 through UART, is connected to a 4G module and a WIFI module through USB and / or PCI-E respectively, and is connected to the buttons arranged on the front panel 8 through a general input interface. The SWITCH chip 22 is connected to the backplane 1 through an uplink port and a downlink port, is connected to the system management chip 21 through MDC / MDIO, and is connected to the Ethernet port arranged on the front panel 8 through a network cable.

[0064] In this embodiment, the MCU main control realizes the management of the whole machine system and the aggregation and switching function. The chip preferably adopts an 88F3720 MCU chip. It contains rich high-speed I / Os, including USB 3.0, SATA3.0, PCI-E2.0 and 2.5 GbE (NBASE-T), and supports industrial-grade temperature. In addition, the 88F3720 has a wide range of security and data acceleration engines, is suitable for innovative network, storage and computing applications; also supports advanced power management technologies for switching CPU cores, as well as dynamic voltage and frequency scaling for each core.

[0065] See Figure 5 , Figure 5 It is a structural block diagram of a PSE module provided by an embodiment of the present utility model. The PoE board 3 includes a SWITCH module 31 and a PSE module 32. The PSE module 32 includes a microprocessor and multiple PSE chips connected to each other. The microprocessor is connected to the SWITCH module 31 through a serial port, and multiple PSE chips are respectively connected to the LAN ports of the SWITCH module 31 to provide PoE power supply.

[0066] In this embodiment, the POE board 3 realizes the functions of 24 Gigabit LAN ports and POE power supply, and is composed of a SWITCH module 31 and a PSE module 32. The SWITCH chip selects BCM56150. Among them, 2 groups of 1G and 1 group of 10G uplink ports are respectively connected to 2 Gigabit Ethernet ports and 1 10G optical port corresponding to the front panel 8. In addition, 1 group of 10G and 8 groups of 1G are respectively connected to the backplane 1, and 1 group of 1G and MDC / MDIO are connected to the 88F3720 MCU. The model of the microprocessor of the PSE module 32 is STM32F030C8T6. The PSE module 32 is designed as a snap-on board and is combined with the bottom plate of the SWITCH module 31 through an inter-board connector to finally realize the complete PoE port function. The PSE module 32 realizes the PoE power supply function of the AT standard / BT standard, and the PSE chip is selected as the SK49792 chip to achieve this.

[0067] See Figure 6 , Figure 6 is a schematic structural diagram among the system management chip 21, the AI board 4, the backplane 1, and the front panel 8 provided by an embodiment of the present invention; the AI board 4 is connected to the backplane 1 through 2 groups of 1G Ethernet ports and I2C1, and is also connected to the MCU main control board 2 through UART.

[0068] In this embodiment, the AI board 4 realizes the AI computing power operation function, and is implemented by selecting the Bitmain Sophon SM5-1-M module. This module is an AI computing module with extremely strong computing power, positioned for strong computing power scenarios in edge computing. It is equipped with a third-generation TPU chip BM1684 independently developed by Bitmain. The INT8 computing power is as high as 17.6 TOPS, and the decoding can reach 32 channels of 1080P high-definition hard decoding, and it can simultaneously process and analyze more than 16 channels of high-definition video. The volume is only the size of a credit card and has rich IO interfaces, including PCIE EP, PCIE RC, Ethernet, RS485, RS232, GPIO, SDIO, PWM and other interfaces; the AI board 4 is connected to the backplane 1 through 2 groups of 1G Ethernet ports and I2C1, and is also connected to the front panel 8 through UART for convenient debugging.

[0069] See Figure 7 , Figure 7 is a schematic structural diagram among the system management chip 21, the 485 board 5, the backplane 1, and the front panel 8 provided by an embodiment of the present invention; the 485 board 5 is connected to the system management chip 21 through USB and is connected to the RJ45 interface provided on the front panel 8 through the 485 serial port.

[0070] In this embodiment, the 485 board 5 provides the function of transmitting 16 channels of 485 serial ports transparently to the GE network ports, and each port supports a power supply capacity of 12V / 1A. The 485 board 5 is connected to the backplane 1 through a group of 1G Ethernet ports and I2C1, and is connected to the USB interface of the front panel 8 through USB.

[0071] See Figure 8 , Figure 8 FIG. is a schematic structural diagram of the tooth-shaped body 61 provided by an embodiment of the present invention. The MCU main control board 2 and / or the PoE board 3 and / or the AI board 4 and / or the 485 board 5 are set to include the tooth-shaped body 61 with heat dissipation teeth in the same direction. The FAN board 6 includes a plurality of fans, and the plurality of fans are arranged in the first space; the wind direction generated by the plurality of fans ( Figure 8 shown by the arrow in ) is the same as the direction of the heat dissipation teeth. Heat dissipation holes in the same direction as the heat dissipation teeth are provided on the side surface of the pluggable frame.

[0072] In this embodiment, the chip and the MOS tube use a large-area tooth-shaped heat sink for heat dissipation, and the heat dissipation teeth are consistent with the left and right air duct directions, ensuring excellent heat dissipation effects.

[0073] The power supply board 7 includes a plurality of power supply modules, and the plurality of power supply modules are arranged in the second space; the plurality of power supply modules are respectively connected to a plurality of power supply interfaces arranged on the rear panel 9.

[0074] In this embodiment, the power supply board 7 includes 2 power supply module sockets, supports inserting 2 redundant backup AC / DC power supply modules. The power supply system composed of the power supply board 7 and the power supply modules is arranged in the second space; the AC / DC power supply modules support hot plugging, and their input power supply interfaces are located on the rear panel 9. The input part of the power supply system is composed of 2 redundant AC / DC power supply modules, and after being subjected to Oring merging through the power supply board 7, a group of 54V (maximum 40A) DC power supply is output to the backplane 1. Other single boards obtain DC 54V through the backplane 1, and then perform DC / DC conversion in the board to obtain various required voltages. The POE port is powered by directly taking the 54V power supply of the backplane 1.

[0075] The above are only the preferred embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent replacements, and improvements made within the spirit and principle of the present invention shall be included in the protection scope of the present invention.

Claims

1. An edge intelligent gateway for edge-cloud collaboration, characterized in that: Including backplane, front panel, rear panel, MCU main control board, PoE board, AI board, 485 board, FAN board and power board for setting bus; The backplane, front panel and rear panel form a plug-in frame for the edge-cloud collaboration, the backplane divides the interior of the plug-in frame into a first space and a second space, and the MCU main control board, PoE board, AI board, 485 board, FAN board and power board are respectively arranged in the first space or the second space; The MCU main control board, PoE board, AI board, 485 board, FAN board and power board are respectively connected through buses.

2. The edge intelligent gateway for edge-cloud collaboration according to claim 1, characterized in that: The MCU main control board includes a system management chip and a SWITCH chip, the system management chip is connected to the backplane through a bus and a GPIO port, and is connected to the management port arranged on the front panel through a UART, is respectively connected to a 4G module and a WIFI module through a USB and / or PCI-E, and is connected to a button arranged on the front panel through a universal input interface; The SWITCH chip is connected to the backplane via an uplink port and a downlink port, is connected to the system management chip via MDC / MDIO, and is connected to the Ethernet port arranged on the front panel via a network cable.

3. The edge intelligent gateway for edge-cloud collaboration according to claim 1, characterized in that: The PoE board includes a SWITCH module and a PSE module; The PSE module includes a microprocessor and a plurality of PSE chips connected to each other. The microprocessor is connected to the SWITCH module via a serial port, and the plurality of PSE chips are respectively connected to the SWITCH module to supply power to the SWITCH module.

4. The edge intelligent gateway for edge-cloud collaboration according to claim 1, characterized in that: The AI ​​board is connected to the backplane via RGMII, and is also connected to the MCU main control board via UART.

5. The edge intelligent gateway for edge-cloud collaboration according to claim 1, characterized in that: The 485 board is connected to the MCU main control board via USB, and is connected to the RJ45 interface arranged on the front panel via a 485 serial port.

6. The edge intelligent gateway for edge-cloud collaboration according to claim 1, characterized in that: The MCU main control board and / or the PoE board and / or the AI ​​board and / or the 485 board are configured as toothed bodies including heat dissipation teeth in the same direction.

7. The edge intelligent gateway for edge-cloud collaboration according to claim 6, characterized in that: The FAN board includes a plurality of fans, and the plurality of fans are arranged in the first space; The wind direction generated by the multiple fans is the same as the direction of the heat dissipation teeth.

8. The edge intelligent gateway for edge-cloud collaboration according to claim 7, characterized in that: The side surface of the insertion frame is provided with heat dissipation holes in the same direction as the heat dissipation teeth.

9. The edge intelligent gateway for edge-cloud collaboration according to claim 1, characterized in that: The power board includes a plurality of power modules, and the plurality of power modules are arranged in the second space; The plurality of power modules are respectively connected to a plurality of power interfaces arranged on the rear panel.

10. The edge intelligent gateway for edge-cloud collaboration according to claim 1, characterized in that: Also includes a hard disk expansion board, the hard disk expansion board is arranged in the second space; The hard disk expansion board is connected to the MCU main control board, PoE board, AI board, 485 board, FAN board and power board through a bus.

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