Solar cell and photovoltaic module
By setting a multi-layer structure of a passivation layer and a barrier layer on the silicon substrate of the solar cell, the problem of metal paste burning through the passivation layer is solved, and the passivation performance and optical performance are achieved, and the battery efficiency and current density are improved.
Patent Information
- Application Number
- CN202421671820.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-07-15
- Publication Date
- 2025-07-01
- Estimated Expiration
- 2034-07-15
AI Technical Summary
When the metal paste passivation contact structure is burned through the metal slurry, the metal electrode contacts with the silicon substrate and the increase in recombination, poor passivation performance, and after increasing the thickness of the passivation contact structure, the doped polysilicon layer absorbs severely the parasitic absorption of light and large current density loss.
A film layer structure is arranged on the front and/or the back of the silicon substrate of the solar cell. The film layer structure consists of a passivation layer and at least one barrier layer. The passivation layer and barrier layer both include a tunnel oxide layer and a doped polysilicon layer. The barrier layer is used to block metal paste to ensure that the metal electrode is connected to the doped polysilicon layer without burning through the passivation layer, and the thickness of the passivation layer does not need to be increased.
Effectively control the light absorption of the doped polysilicon layer, taking into account both passivation and optical properties, improve the efficiency and current density of the solar cell, and avoid the recombination problem caused by burning through the passivation layer.
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Figure CN223053363U_ABST
Abstract
Description
Technical Field
[0001] The utility model belongs to the technical field of photovoltaic, and particularly relates to a solar cell and a photovoltaic module. Background Art
[0002] Some existing solar cells are provided with a passivation contact structure. For example, TOPCon (Tunnel Oxide Passivating Contact) cells. A TOPCon cell is a solar cell based on the carrier selective tunneling mechanism. The TOPCon cell uses a tunnel oxide with excellent charge transport characteristics as the charge transport layer on the back of the cell, and then deposits a doped polysilicon thin layer to form a back passivation contact structure, which can effectively reduce surface recombination and metal contact recombination, improve the open-circuit voltage, and improve the energy conversion efficiency.
[0003] However, only one passivation contact structure is provided on the back of the existing solar cell panel, which cannot prevent the metal paste from burning through the passivation contact structure on the back, resulting in an increase in the recombination of the metal electrode and the silicon substrate in the metal region and poor passivation performance. To solve the above problems, the thickness of the passivation contact structure can be increased to avoid the metal paste from burning through the passivation contact structure on the back and ensure the passivation performance. However, after the thickness of the passivation contact structure increases, the parasitic absorption of light by the doped polysilicon layer is serious, resulting in a large loss of current density. Summary of the Utility Model
[0004] An embodiment of the utility model provides a solar cell, aiming to solve the problem that the existing solar cell cannot balance the passivation performance and the optical performance.
[0005] The embodiment of the utility model is implemented as follows. A solar cell includes a silicon substrate and a film layer structure;
[0006] The front and / or back of the silicon substrate is provided with a film layer structure;
[0007] The film layer structure includes a passivation layer and at least one barrier layer sequentially distributed away from the silicon substrate. Both the passivation layer and the at least one barrier layer include a tunneling oxide layer and a doped polysilicon layer sequentially distributed away from the silicon substrate;
[0008] The passivation layer is disposed on the entire back and / or the entire front of the silicon substrate, and the barrier layer is disposed in all regions on one side of the passivation layer away from the silicon substrate.
[0009] Further, the solar cell further includes a front metal electrode and a back metal electrode. The front and back of the silicon substrate respectively have a front conductive type region and a back conductive type region. The front metal electrode is connected to the front conductive type region or to the doped polysilicon layer on the front, and the back metal electrode is connected to the back conductive type region or to the doped polysilicon layer on the back.
[0010] Further, the ratio of the thickness of the doped polysilicon layer of the passivation layer to the thickness of the doped polysilicon layer of the barrier layer is 1:1 to 1:3.
[0011] Further, the crystalline grains of the doped polysilicon layer of the passivation layer are smaller than those of the doped polysilicon layer of the barrier layer.
[0012] Further, the doped polysilicon layer of the passivation layer and the doped polysilicon layer of the barrier layer have the same polarity.
[0013] Further, the solar cell further includes a back antireflection layer disposed on the back of the silicon substrate.
[0014] Further, the solar cell further includes a front antireflection layer disposed on the front of the silicon substrate.
[0015] Further, both the back antireflection layer and the front antireflection layer include at least one of a silicon nitride layer, a silicon oxynitride layer, and a silicon oxide layer.
[0016] In a second aspect, the present application provides a photovoltaic module, including the solar cell as described above.
[0017] The beneficial effects of the present application are as follows. The solar cell of the present application includes a silicon substrate and a film layer structure. The film layer structure is disposed on the front and / or back of the silicon substrate. The film layer structure includes a passivation layer and at least one barrier layer sequentially distributed away from the silicon substrate. Both the passivation layer and the at least one barrier layer include a tunneling oxide layer and a doped polysilicon layer sequentially distributed away from the silicon substrate. The passivation layer is disposed on the entire back and / or entire front of the silicon substrate, and the barrier layer is disposed in all regions on the side of the passivation layer away from the silicon substrate. By setting both the passivation layer and the at least one barrier layer to include a structure of a tunneling oxide layer and a doped polysilicon layer, when pouring metal paste to form metal electrodes subsequently, by the blocking effect of the at least one barrier layer, the metal paste at least does not burn through the passivation layer, and the metal electrode is connected to the doped polysilicon layer. Moreover, the thickness of the passivation layer does not need to be increased, which can effectively control the light absorption of the doped polysilicon layer and balance the passivation performance and optical performance. BRIEF DESCRIPTION OF THE DRAWINGS
[0018] Figure 1 is a schematic structural diagram of a barrier layer of one embodiment of the solar cell provided by the present application;
[0019] Figure 2 It is a schematic structural diagram of a two-layer barrier layer of an embodiment of a solar cell provided by the present application;
[0020] Figure 3 It is a schematic structural diagram of a three-layer barrier layer of an embodiment of a solar cell provided by the present application;
[0021] Figure 4 It is a schematic structural diagram of an embodiment of a solar cell provided by the present application, in which a part of a metal crystal of a back metal electrode is formed in a doped polysilicon layer. Detailed implementation manners
[0022] In order to make the objectives, technical solutions and advantages of the present utility model clearer, the present utility model will be further described in detail below with reference to the accompanying drawings and embodiments. Examples of the embodiments are shown in the accompanying drawings, where the same or similar reference numerals indicate the same or similar elements or elements with the same or similar functions throughout. The embodiments described below by referring to the accompanying drawings are exemplary only for explaining the present utility model and should not be construed as limiting the present utility model. In addition, it should be understood that the specific embodiments described herein are only used to explain the present utility model and are not used to limit the present utility model.
[0023] In the description of the present utility model, it should be understood that the orientation or positional relationship indicated by the terms "length", "width", "upper", "lower", "left", "right", "horizontal", "top", "bottom", etc. is based on the orientation or positional relationship shown in the accompanying drawings, and is only for the convenience of describing the present utility model and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and thus should not be construed as limiting the present utility model.
[0024] In addition, the terms "first" and "second" are only used for descriptive purposes and should not be construed as indicating or implying relative importance or implicitly indicating the number of the technical features indicated. Thus, the features defined with "first" and "second" may explicitly or implicitly include one or more features. In the description of the present utility model, "a plurality" means two or more unless otherwise specifically defined.
[0025] In the description of the present utility model, it should be noted that unless otherwise clearly defined and limited, the terms "installed", "connected" and "connected" should be understood in a broad sense. For example, it may be a fixed connection, a detachable connection or an integral connection; it may be a mechanical connection, an electrical connection or a communication with each other; it may be directly connected or indirectly connected through an intermediate medium, and it may be the internal communication of two elements or the interaction relationship between two elements. For those of ordinary skill in the art, the specific meanings of the above terms in the present utility model can be understood according to specific circumstances.
[0026] In the present utility model, unless otherwise clearly defined and limited, the first feature being "above" or "below" the second feature may include direct contact between the first and second features, or may include the first and second features not being in direct contact but in contact through additional features therebetween. Moreover, the first feature being "above", "over" and "on top of" the second feature includes the first feature being directly above and obliquely above the second feature, or merely indicating that the horizontal height of the first feature is higher than that of the second feature. The first feature being "below", "under" and "beneath" the second feature includes the first feature being directly below and obliquely below the second feature, or merely indicating that the horizontal height of the first feature is less than that of the second feature.
[0027] The following disclosure provides many different embodiments or examples for implementing different structures of the present utility model. To simplify the disclosure of the present utility model, components and settings of specific examples are described below. Of course, they are merely examples and are not intended to limit the present utility model. In addition, the present utility model may repeat reference numerals and / or reference letters in different examples. This repetition is for the purpose of simplification and clarity and does not itself indicate the relationship between the various embodiments and / or settings discussed. In addition, the present utility model provides examples of various specific processes and materials, but those of ordinary skill in the art may be aware of the application of other processes and / or the use of other materials.
[0028] The solar cell of the present application includes a silicon substrate and a film layer structure. The front and / or back of the silicon substrate is provided with a film layer structure. The film layer structure includes a passivation layer and at least one barrier layer sequentially distributed away from the silicon substrate. Both the passivation layer and the at least one barrier layer include a tunneling oxide layer and a doped polysilicon layer sequentially distributed away from the silicon substrate. The passivation layer is disposed on the entire back and / or entire front of the silicon substrate, and the barrier layer is disposed in the entire area of one side of the passivation layer away from the silicon substrate. By setting both the passivation layer and the at least one barrier layer to include a structure of a tunneling oxide layer and a doped polysilicon layer, when pouring metal paste to form metal electrodes subsequently, by the blocking effect of the at least one barrier layer, the metal paste at least does not burn through the passivation layer, the metal electrode is connected to the doped polysilicon layer, and moreover, the thickness of the passivation layer does not need to be increased, which can effectively control the light absorption of the doped polysilicon layer and take into account both the passivation performance and the optical performance.
[0029] Embodiment 1
[0030] As Figures 1 to 4As shown in the figure, an embodiment of the present application provides a solar cell, including a silicon substrate 100 and a film layer structure. The film layer structure is disposed on the front and / or back of the silicon substrate 100. The film layer structure includes a passivation layer 200 and at least one barrier layer 300 that are sequentially distributed away from the silicon substrate 100. Both the passivation layer 200 and at least one barrier layer 300 include a tunneling oxide layer and a doped polysilicon layer that are sequentially distributed away from the silicon substrate 100. The passivation layer 200 is disposed on the entire back and / or entire front of the silicon substrate 100, and the barrier layer 300 is disposed in all regions on one side of the passivation layer 200 away from the silicon substrate 100.
[0031] In implementation, the solar cell provided by the present application refers to a solar cell with a passivated contact structure, such as a TOPCon (Tunnel Oxide Passivating Contact) cell, without limitation.
[0032] The silicon substrate 100 can be an N-type silicon substrate or a P-type silicon substrate. The silicon substrate 100 has a front and a back. Among them, the front of the silicon substrate 100 corresponds to the light-receiving surface of the solar cell. Similarly, the back of the silicon substrate 100 corresponds to the backlight surface of the solar cell.
[0033] The film layer structure can be disposed on the front of the silicon substrate 100, or on the back of the silicon substrate 100, or film layer structures are disposed on both the front and back of the silicon substrate 100.
[0034] The film layer structure includes a passivation layer 200 and at least one barrier layer 300, and the passivation layer 200 and at least one barrier layer 300 are sequentially distributed away from the silicon substrate 100. For example, when the film layer structure is disposed on the front of the silicon substrate 100, the passivation layer 200 and at least one barrier layer 300 are sequentially distributed away from the front of the silicon substrate 100. When the film layer structure is disposed on the back of the silicon substrate 100, the passivation layer 200 and at least one barrier layer 300 are sequentially distributed away from the back of the silicon substrate 100.
[0035] The passivation layer 200 is a passivated contact structure, including a tunneling oxide layer and a doped polysilicon layer. Exemplarily, as Figures 1 to 3 shown, the passivation layer 200 includes a first tunneling oxide layer 210 and a first doped polysilicon layer 220.
[0036] Exemplarily, taking the passivation layer 200 disposed on the back of the silicon substrate 100 as an example, the first tunneling oxide layer 210 is disposed on the back of the silicon substrate 100, and the first doped polysilicon layer 220 is disposed on one side of the first tunneling oxide layer 210 away from the silicon substrate 100.
[0037] During implementation, the passivation layer 200 can be prepared by PECVD (plasma enhanced chemical vapor deposition) or LPCVD (Low Pressure Chemical Vapor Deposition), without limitation.
[0038] In some alternative embodiments, at least one barrier layer 300 is further provided on the basis of the passivation layer 200, and the barrier layer 300 is also a passivated contact structure. Exemplarily, taking the example that one barrier layer 300 is provided on the back surface of the silicon substrate 100, as Figure 1 shown, the barrier layer 300 includes a second tunneling oxide layer 310 and a second doped polysilicon layer 320. Among them, the second tunneling oxide layer 310 is disposed on a side surface of the first doped polysilicon layer 220 away from the first tunneling oxide layer 210, and the second doped polysilicon layer 320 is disposed on a side surface of the second tunneling oxide layer 310 away from the first doped polysilicon layer 220. That is to say, the first tunneling oxide layer 210, the first doped polysilicon layer 220, the second tunneling oxide layer 310, and the second doped polysilicon layer 320 are sequentially disposed from the inside to the outside on the back surface of the silicon substrate 100.
[0039] In some possible embodiments, taking the example that the back surface of the solar cell provided in this application includes two barrier layers 300, among them, the first barrier layer 300 includes a second tunneling oxide layer 310 and a second doped polysilicon layer 320, and the second barrier layer 300 includes a third tunneling oxide layer 330 and a third doped polysilicon layer 340. The structure is as Figure 2 shown, and will not be elaborated here.
[0040] In some other possible embodiments, taking the example that the back surface of the solar cell provided in this application includes three barrier layers 300, among them, the first barrier layer 300 includes a second tunneling oxide layer 310 and a second doped polysilicon layer 320, the second barrier layer 300 includes a third tunneling oxide layer 330 and a third doped polysilicon layer 340, and the third barrier layer 300 includes a fourth tunneling oxide layer 350 and a fourth doped polysilicon layer 360. The structure is as Figure 3 shown, and will not be elaborated here.
[0041] It should be noted that the above embodiments in which the solar cell includes one, two, or three barrier layers 300 are all illustrative examples of the embodiments of this application, rather than specific limitations on this application. In other embodiments, the number of barrier layers 300 can also be set to other numbers, such as 4 layers or 5 layers, etc., without limitation.
[0042] Both the barrier layer 300 and the passivation layer 200 include a tunneling oxide layer and a doped polysilicon layer. That is to say, both the barrier layer 300 and the passivation layer 200 can be prepared by using PECVD (plasma enhanced chemical vapor deposition) or LPCVD (Low Pressure Chemical Vapor Deposition), without limitation.
[0043] Optionally, the doped polysilicon layers of the passivation layer 200 and the barrier layer 300 have the same polarity. That is to say, the passivation layer 200 and the barrier layer 300 can be prepared synchronously, reducing the preparation process steps and improving the preparation efficiency.
[0044] In some possible embodiments, the solar cell provided by the present application further includes a back metal electrode 400 and a front metal electrode (not shown in the figure). In implementation, when no film layer structure is provided on the front side of the silicon substrate 100 and a film layer structure is provided on the back side, the front metal electrode is connected to the front conductive type region (not shown in the figure) on the front side of the silicon substrate 100, and the back metal electrode 400 is connected to the doped polysilicon layer in the film layer structure on the back side of the silicon substrate 100. When a film layer structure is provided on the front side of the silicon substrate 100 and no film layer structure is provided on the back side, the front metal electrode is connected to the doped polysilicon layer in the film layer structure on the front side of the silicon substrate 100, and the back metal electrode 400 is connected to the back conductive type region on the back side of the silicon substrate 100. When film layer structures are provided on both the front and back sides of the silicon substrate 100, the front metal electrode is connected to the doped polysilicon layer in the film layer structure on the front side of the silicon substrate 100, and the back metal electrode 400 is connected to the doped polysilicon layer in the film layer structure on the back side of the silicon substrate 100.
[0045] Both the back metal electrode 400 and the front metal electrode are formed by cooling and solidifying molten metal paste. The molten metal paste can be attached to the designated area by means of pouring, spraying, printing, etc., so as to form finger electrodes or strip busbars, etc. after cooling and solidifying, without limitation.
[0046] In some embodiments, taking the case where the barrier layer 300 is provided with perforations (not shown in the figure) as an example, the perforations are formed by ablation of molten metal paste. For example, after the passivation layer 200 and at least one layer of the barrier layer 300 are formed, the metal paste is poured locally. After the metal paste burns through at least one layer of the barrier layer 300 and cools, a metal electrode is formed. That is to say, the molten metal paste burns through all or part of the barrier layer 300 and then cools to form a front metal electrode or a back metal electrode 400. Exemplarily, the doped polysilicon layer in contact with the metal paste can be the doped polysilicon layer of the passivation layer 200 or the doped polysilicon layer of the barrier layer 300. Since the doped polysilicon layer of the passivation layer 200 is not burned through, the metal paste contacts the doped polysilicon layer after solidification and does not contact the silicon substrate, ensuring the passivation performance.
[0047] Exemplarily, taking the case where a layer of the barrier layer 300 is provided on the back surface of the solar cell as an example, the barrier layer 300 includes a second tunneling oxide layer 310 and a second doped polysilicon layer 320. The metal paste burns through the second tunneling oxide layer 310 and the second doped polysilicon layer 320 to form a through hole, and at the same time, the metal paste solidifies in the through hole to form the back metal electrode 400. Of course, a part of the back metal electrode 400 extends out of the through hole for connection with the outside. At this time, the back metal electrode 400 contacts the first doped polysilicon layer 220 of the passivation layer 200.
[0048] In some embodiments, taking the case where two layers of the barrier layer 300 are provided on the back surface of the solar cell as an example, the first layer of the barrier layer 300 includes a second tunneling oxide layer 310 and a second doped polysilicon layer 320, and the second layer of the barrier layer 300 includes a third tunneling oxide layer 330 and a third doped polysilicon layer 340. The metal paste can burn through the third tunneling oxide layer 330 and the third doped polysilicon layer 340 and then contact the second doped polysilicon layer 320.
[0049] In some possible embodiments, the metal paste burns through the second tunneling oxide layer 310, the second doped polysilicon layer 320, the third tunneling oxide layer 330 and the third doped polysilicon layer 340 and then contacts the first doped polysilicon layer 220.
[0050] In some other embodiments, taking the case where three layers of the barrier layer 300 are provided on the back surface of the solar cell as an example, the first layer of the barrier layer 300 includes a second tunneling oxide layer 310 and a second doped polysilicon layer 320, the second layer of the barrier layer 300 includes a third tunneling oxide layer 330 and a third doped polysilicon layer 340, and the third layer of the barrier layer 300 includes a third tunneling oxide layer 350 and a third doped polysilicon layer 360. The metal paste can burn through the third tunneling oxide layer 350 and the third doped polysilicon layer 360 and then contact the third doped polysilicon layer 340.
[0051] Optionally, after the metal paste burns through the third tunneling oxide layer 330, the third doped polysilicon layer 340, the third tunneling oxide layer 350, and the third doped polysilicon layer 360, it contacts the second doped polysilicon layer 320.
[0052] In some possible embodiments, after the metal paste burns through the second tunneling oxide layer 310, the second doped polysilicon layer 320, the third tunneling oxide layer 330, the third doped polysilicon layer 340, the fourth tunneling oxide layer 350, and the fourth doped polysilicon layer 360, it contacts the first doped polysilicon layer 220, which will not be elaborated here.
[0053] It should be noted that the number of layers of the barrier layer 300 burned through by the above metal paste is an example in the embodiments of the present application, rather than a specific limitation of the present application. In other embodiments, the number of layers of the barrier layer 300 to be burned through can be selected according to actual needs. Among them, the number of layers of the burned-through barrier layer 300 can be controlled by controlling the temperature and burning-through time of the metal paste, which will not be elaborated here.
[0054] In some embodiments, the back metal electrode 400 and the front metal electrode connected to the doped polysilicon layer can be in contact with the surface of the doped polysilicon layer. In some other alternative embodiments, both the back metal electrode 400 and the front metal electrode are formed by cooling after the molten metal paste burns through at least one layer of the barrier layer 300. Some metal crystals of the metal paste penetrate into the doped polysilicon layer of the passivation layer 200 or the barrier layer 300, that is, the metal electrode contacts the doped polysilicon layer and some metal crystals are formed in the doped polysilicon layer, as Figure 4 shown.
[0055] Exemplarily, taking one layer of the barrier layer 300 as an example, after the metal paste burns through the second tunneling oxide layer 310 and the second doped polysilicon layer 320, it contacts the first doped polysilicon layer 220 of the passivation layer 200. At the same time, after the metal paste cools and solidifies, a metal electrode is formed, and some metal crystals of the metal electrode penetrate into the first doped polysilicon layer 220.
[0056] In some other embodiments, taking the example of two layers of the barrier layer 300 provided on the back of the solar cell, the metal paste can burn through the third tunneling oxide layer 330 and the third doped polysilicon layer 340 and then contact the second doped polysilicon layer 320. At the same time, some metal crystals of the metal electrode formed after the metal paste cools penetrate into the second doped polysilicon layer 320.
[0057] Optionally, after the metal paste burns through the second tunneling oxide layer 310, the second doped polysilicon layer 320, the third tunneling oxide layer 330, and the third doped polysilicon layer 340, it contacts the first doped polysilicon layer 220. At the same time, some metal crystals of the metal electrode formed after the metal paste cools penetrate into the first doped polysilicon layer 220.
[0058] And so on, at least one barrier layer 300 is burned through, and at least there is a passivation layer 200 that is not burned through. With the above settings, the metal crystal can help carriers move more easily to the metal electrode, improving the efficiency of the solar cell.
[0059] In some possible embodiments, the passivation layer 200 is disposed on the entire back surface / or the entire front surface of the silicon substrate 100, and the barrier layer 300 is disposed in all regions on the side of the passivation layer 200 away from the silicon substrate 100.
[0060] During implementation, taking the back surface of the silicon substrate 100 as an example, as Figures 1 to 3 shown, the passivation layer 200 covers the entire back surface of the silicon substrate 100, and the barrier layer 300 also covers the entire back surface of the passivation layer 200. When pouring the metal paste, the metal paste at least does not burn through the doped polysilicon layer of the passivation layer 200, so that the back metal electrode 400 formed after the metal paste solidifies contacts the doped polysilicon layer of the passivation layer 200 or the doped polysilicon layer of the barrier layer 300, taking into account both the passivation performance and the optical performance.
[0061] By setting the multi-layer passivation contact structure of the passivation layer 200 and the barrier layer 300, the metal paste burns through at least one barrier layer 300 farthest from the silicon substrate 100 and enters the doped polysilicon layer of the passivation contact structure of the bottom layer (the passivation layer 200 or the passivation layer 200 plus at least one barrier layer 300), but does not burn through the doped polysilicon layer of the passivation layer 200 to reach the underlying tunneling oxide layer, that is, maintaining a good tunneling passivation effect on the back surface. At the same time, through the design of the multi-layer passivation contact structure, the thickness of the doped polysilicon layer is relatively thin, and the relatively thin doped polysilicon layer further reduces the parasitic absorption effect on the long wave, greatly reducing the parasitic absorption effect of the back polysilicon layer on the long wave and improving the circuit current density of the battery.
[0062] The solar cell of the present application includes a silicon substrate 100 and a film layer structure. The film layer structure is disposed on the front and / or back of the silicon substrate 100. The film layer structure includes a passivation layer 200 and at least one barrier layer 300 that are sequentially distributed away from the silicon substrate 100. Both the passivation layer 200 and the at least one barrier layer 300 include a tunneling oxide layer and a doped polysilicon layer that are sequentially distributed away from the silicon substrate 100. The passivation layer 200 is disposed on the entire back and / or entire front of the silicon substrate 100, and the barrier layer 300 is disposed in all regions on one side of the passivation layer 200 away from the silicon substrate 100. By also setting the passivation layer 200 and the at least one barrier layer 300 to include a tunneling oxide layer and a doped polysilicon layer structure, when pouring metal paste to generate metal electrodes subsequently, by the blocking effect of the at least one barrier layer 300, the metal paste at least does not burn through the passivation layer 200, the metal electrode is connected to the doped polysilicon layer, and the thickness of the passivation layer 200 does not need to be increased, which can effectively control the light absorption of the doped polysilicon layer and balance the passivation performance and optical performance.
[0063] In some embodiments, the parasitic absorption of different doped polysilicon layers for long waves is related to their thickness. Generally, the ratio of the thickness of the doped polysilicon layer of the passivation layer 200 to the thickness of the doped polysilicon layer of the barrier layer 300 is 1:1 to 1:3, such as 1:1, 1:2, 1:2.5, or 1:3, etc., without limitation.
[0064] Furthermore, the crystal grains of the doped polysilicon layer of the passivation layer 200 are smaller than the crystal grains of the doped polysilicon layer of the barrier layer 300.
[0065] Since there is a tunneling oxide layer between the two doped polysilicon layers, for example, between the first tunneling oxide layer 210 and the second tunneling oxide layer 310 is the first doped polysilicon layer 220. Similarly, between the second tunneling oxide layer 310 and the third tunneling oxide layer 330 is the second doped polysilicon layer 320, and between the third tunneling oxide layer 330 and the fourth tunneling oxide layer 350 is the third doped polysilicon layer 340, which will not be elaborated here. After the subsequent phosphorus diffusion process, the crystal grains of the previous doped polysilicon layer are smaller than those of the subsequent doped polysilicon layer. For example, the crystal grains of the first doped polysilicon layer 220 are smaller than those of the second doped polysilicon layer 320, and the crystal grains of the second doped polysilicon layer 320 are smaller than those of the third doped polysilicon layer 340. Smaller crystal grains mean lower crystallinity, which can reduce the parasitic absorption effect on long waves.
[0066] Furthermore, the solar cell provided by the present application further includes a back antireflection layer (not shown in the figure) disposed on the back of the silicon substrate 100.
[0067] Optionally, the back antireflection layer may be disposed on a side of the back conductive type region away from the silicon substrate 100. In some other embodiments, after the passivation layer 200 and at least one barrier layer 300 are formed on the back of the silicon substrate 100, a back antireflection layer is further disposed on the outermost barrier layer 300. The outermost barrier layer 300 refers to the barrier layer 300 farthest from the silicon substrate 100. By setting the back antireflection layer, the reflectivity is reduced, thereby increasing the transmittance.
[0068] In some alternative embodiments, the solar cell provided in the present application further includes a front antireflection layer (not shown in the figure). Optionally, the front antireflection layer may be disposed on a side of the front conductive type region away from the silicon substrate 100. In some other embodiments, after the passivation layer 200 and at least one barrier layer 300 are formed on the front of the silicon substrate 100, a front antireflection layer is further disposed on the outermost barrier layer 300.
[0069] Optionally, both the front antireflection layer and the back antireflection layer are antireflection films. The antireflection film is also called an antireflection coating, which is used to reduce or eliminate the reflected light on the optical surfaces such as lenses, prisms, and plane mirrors, thereby increasing the light transmittance of these components and reducing or eliminating the stray light of the system.
[0070] Optionally, the antireflection film may be composed of at least one of a silicon nitride layer, a silicon oxynitride layer, and a silicon oxide layer. For example, the antireflection film may be composed of a layer of silicon nitride layer, a layer of silicon oxynitride layer, and a layer of silicon oxide layer. Among them, the silicon nitride layer, the silicon oxynitride layer, and the silicon oxide layer are sequentially distributed in the direction from close to the silicon substrate 100 to away from the silicon substrate 100, without limitation.
[0071] The front conductive type region and the back conductive type region may be an emitter region and a back surface field region. Generally, an emitter region and a back surface field region may be respectively disposed on the front and back of the silicon substrate 100. Among them, the emitter region refers to the part that extracts electrons from the solar cell. Generally, the emitter region is also regarded as the "positive electrode" of the solar cell. Similarly, the back surface field region is generally an aluminum back surface field in the solar cell. Its main functions include reflecting long waves, reducing light transmission, back surface heavy doping, passivation and gettering, increasing the minority carrier lifetime, and increasing the open circuit voltage, etc. Generally, the back surface field region is also regarded as the "negative electrode" of the solar cell, which will not be elaborated here.
[0072] In some embodiments, the front conductive type region contains dopants of a first conductive type with a relatively low doping concentration. Exemplarily, the dopants of the first conductive type are n-type or p-type dopants. For example, the dopants of the first conductive type can be n-type impurities such as Group V elements (including phosphorus (P), arsenic (As), bismuth (Bi), antimony (Sb), etc.). Or the dopants of the first conductive type can be p-type impurities such as Group III elements (including boron (B), aluminum (Al), gallium (Ga), indium (In), etc.), without limitation.
[0073] Embodiment 2
[0074] In some alternative embodiments, the present application provides a photovoltaic module, including the solar cell as described above.
[0075] Those skilled in the art can clearly understand that for the convenience and brevity of description, the structures and implementation principles of the photovoltaic modules described above can refer to the corresponding structures and implementation principles in the foregoing Embodiment 1, and will not be elaborated herein.
[0076] The solar cell of the present application includes a silicon substrate 100 and a film layer structure. The front and / or back of the silicon substrate 100 is provided with a film layer structure. The film layer structure includes a passivation layer 200 and at least one barrier layer 300 that are sequentially distributed away from the silicon substrate 100. Both the passivation layer 200 and at least one barrier layer 300 include a tunneling oxide layer and a doped polysilicon layer that are sequentially distributed away from the silicon substrate 100. The passivation layer 200 is disposed on the entire back and / or entire front of the silicon substrate 100, and the barrier layer 300 is disposed in all regions on one side of the passivation layer 200 away from the silicon substrate 100. By also setting the passivation layer 200 and at least one barrier layer 300 to include a structure of a tunneling oxide layer and a doped polysilicon layer, when pouring metal paste to form metal electrodes subsequently, by the blocking effect of at least one barrier layer 300, the metal paste at least does not burn through the passivation layer 200, the metal electrode is connected to the doped polysilicon layer, and the thickness of the passivation layer 200 does not need to be increased, which can effectively control the light absorption of the doped polysilicon layer and take into account both the passivation performance and the optical performance.
[0077] The above are only the preferred embodiments of the present utility model and are not intended to limit the present utility model. Any modifications, equivalent replacements, and improvements made within the spirit and principle of the present utility model shall be included within the protection scope of the present utility model.
Claims
1. A solar cell, characterized in that: including a silicon substrate and a film layer structure; The film layer structure is arranged on the front side and / or the back side of the silicon substrate; The film layer structure includes a passivation layer and at least one barrier layer sequentially distributed from the silicon substrate to a direction away from the silicon substrate, and the passivation layer and at least one barrier layer each include a tunneling oxide layer and a doped polysilicon layer sequentially distributed from the silicon substrate to a direction away from the silicon substrate; The passivation layer is disposed on the entire back side and / or the entire front side of the silicon substrate, and the barrier layer is disposed on the entire area of a side surface of the passivation layer away from the silicon substrate.
2. The solar cell according to claim 1, wherein: The solar cell also includes a front metal electrode and a back metal electrode. The front and back sides of the silicon substrate respectively have a front conductive type region and a back conductive type region. The front metal electrode is connected to the front conductive type region or to the doped polysilicon layer on the front side, and the back metal electrode is connected to the back conductive type region or to the doped polysilicon layer on the back side.
3. The solar cell according to claim 1, wherein: The ratio of the thickness of the doped polysilicon layer of the passivation layer to the thickness of the doped polysilicon layer of the barrier layer is 1:1 to 1:
3.
4. The solar cell according to claim 1, wherein: The crystal grains of the doped polysilicon layer of the passivation layer are smaller than the crystal grains of the doped polysilicon layer of the barrier layer.
5. The solar cell according to claim 1, wherein: The doped polysilicon layer of the passivation layer and the doped polysilicon layer of the barrier layer have the same polarity.
6. The solar cell according to any one of claims 1 to 5, characterized in that The solar cell further comprises a back side anti-reflection layer arranged on the back side of the silicon substrate.
7. The solar cell according to claim 6, characterized in that The solar cell further comprises a front anti-reflection layer arranged on the front side of the silicon substrate.
8. The solar cell according to claim 7, wherein: The back anti-reflection layer and the front anti-reflection layer each include at least one of a silicon nitride layer, a silicon oxynitride layer and a silicon oxide layer.
9. A photovoltaic module, characterized in that: The invention comprises the solar cell according to any one of claims 1 to 8.