Solar cell and photovoltaic module

Abstract

The utility model is applicable to the field of photovoltaic technology, and provides a solar cell and a photovoltaic assembly, the solar cell comprises a silicon substrate and a film layer structure, the film layer structure comprises a passivation layer and at least one barrier layer which are sequentially distributed from the silicon substrate to a direction far away from the silicon substrate, each of the passivation layer and the at least one barrier layer comprises a tunneling oxide layer and a doped polycrystalline silicon layer which are sequentially distributed from the silicon substrate to a direction far away from the silicon substrate, the passivation layer is arranged on at least partial region of the back surface and / or the front surface of the silicon substrate, and the barrier layer is arranged on partial region of one side surface, far away from the silicon substrate, of the passivation layer. By arranging the passivation layer and the at least one barrier layer, at least the passivation layer is not burnt through, the metal electrode is not directly connected with the silicon substrate and the thickness of the passivation layer does not need to be increased by utilizing the barrier effect of the at least one barrier layer when the metal slurry is subsequently poured to generate the back metal electrode, so that the light absorption of the doped polycrystalline silicon layer can be effectively controlled; and passivation performance and optical performance are both considered.

Description

Technical Field

[0001] The utility model belongs to the technical field of photovoltaics, and particularly relates to a solar cell and a photovoltaic module. Background Art

[0002] Some existing solar cells are provided with a passivated contact structure. For example, TOPCon (Tunnel Oxide Passivating Contact) cells are solar cells based on the carrier selective tunneling mechanism. TOPCon cells use a tunnel oxide with excellent charge transport characteristics as the charge transport layer on the back of the cell, and then deposit a doped polysilicon thin layer to form a back passivated contact structure, which can effectively reduce surface recombination and metal contact recombination, improve the open-circuit voltage, and improve the energy conversion efficiency.

[0003] However, only one passivated contact structure is provided on the back of the existing solar cell panel, which cannot prevent the metal paste from burning through the passivated contact structure on the back, resulting in an increase in the recombination of the metal electrode and the silicon substrate in the metal region and poor passivation performance. To solve the above problems, the thickness of the passivated contact structure can be increased to avoid the metal paste from burning through the passivated contact structure on the back and ensure the passivation performance. However, when the thickness of the passivated contact structure increases, the parasitic absorption of light by the doped polysilicon layer is serious, resulting in a large loss of current density. Summary of the Utility Model

[0004] An embodiment of the utility model provides a solar cell, aiming to solve the problem that the existing solar cells cannot balance the passivation performance and the optical performance.

[0005] The embodiment of the utility model is implemented as follows. A solar cell includes a silicon substrate and a film layer structure disposed on the front and / or back of the silicon substrate. The film layer structure includes a passivation layer and at least one barrier layer sequentially distributed away from the silicon substrate. Both the passivation layer and the at least one barrier layer include a tunneling oxide layer and a doped polysilicon layer sequentially distributed away from the silicon substrate. The passivation layer is disposed in at least a part of the region on the back and / or front of the silicon substrate, and the barrier layer is disposed in a part of the region on the side of the passivation layer away from the silicon substrate.

[0006] Furthermore, the solar cell further includes a front metal electrode and a back metal electrode. The front and back of the silicon substrate respectively have a front conductive type region and a back conductive type region. The front metal electrode is connected to the front conductive type region or the doped polysilicon layer on the front, and the back metal electrode is connected to the back conductive type region or the doped polysilicon layer on the back.

[0007] Further, the ratio of the thickness of the doped polysilicon layer of the passivation layer to the thickness of the doped polysilicon layer of the barrier layer is 1:1 to 1:3.

[0008] Further, the crystallinity of the doped polysilicon layer of the passivation layer is less than that of the doped polysilicon layer of the barrier layer.

[0009] Further, the polarities of the doped polysilicon layer of the passivation layer and the doped polysilicon layer of the barrier layer are the same.

[0010] Further, the solar cell further includes a back antireflection layer disposed on the back surface of the silicon substrate.

[0011] Further, the solar cell further includes a front antireflection layer disposed on the front surface of the silicon substrate.

[0012] Further, both the back antireflection layer and the front antireflection layer include at least one of a silicon nitride layer, a silicon oxynitride layer, and a silicon oxide layer.

[0013] In a second aspect, the present application provides a photovoltaic module, including the solar cell as described above.

[0014] The beneficial effects of the present application are as follows. The solar cell of the present application includes a silicon substrate and a film layer structure disposed on the front and / or back surfaces of the silicon substrate. The film layer structure includes a passivation layer and at least one barrier layer sequentially distributed away from the silicon substrate. Both the passivation layer and the at least one barrier layer include a tunneling oxide layer and a doped polysilicon layer sequentially distributed away from the silicon substrate. The passivation layer is disposed on at least a part of the back and / or front surface of the silicon substrate, and the barrier layer is disposed on a part of the side surface of the passivation layer away from the silicon substrate. By also setting at least one barrier layer to include a structure of a tunneling oxide layer and a doped polysilicon layer, when pouring metal paste to form a back metal electrode subsequently, due to the blocking effect of the at least one barrier layer, at least the passivation layer is not burned through, and the metal electrode is not directly connected to the silicon substrate. Moreover, the thickness of the passivation layer does not need to be increased, which can effectively control the light absorption of the doped polysilicon layer and balance the passivation performance and optical performance. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 is a schematic structural diagram of a single barrier layer in an embodiment of the solar cell provided by the present application;

[0016] Figure 2 is a schematic structural diagram of two barrier layers in an embodiment of the solar cell provided by the present application;

[0017] Figure 3 is a schematic structural diagram of three barrier layers in an embodiment of the solar cell provided by the present application;

[0018] Figure 4It is a schematic diagram of the structure in which part of the metal crystal of the back metal electrode of a solar cell provided by this application is formed in a doped polysilicon layer. Detailed implementation manners

[0019] In order to make the objectives, technical solutions and advantages of the present utility model clearer, the present utility model will be further described in detail below with reference to the accompanying drawings and embodiments. The examples of the embodiments are shown in the accompanying drawings, in which the same or similar reference numerals denote the same or similar elements or elements with the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary only for explaining the present utility model and should not be construed as a limitation of the present utility model. In addition, it should be understood that the specific embodiments described herein are only used to explain the present utility model and are not used to limit the present utility model.

[0020] In the description of the present utility model, it should be understood that the orientation or positional relationship indicated by the terms "length", "width", "upper", "lower", "left", "right", "horizontal", "top", "bottom", etc. is based on the orientation or positional relationship shown in the accompanying drawings, and is only for the convenience of describing the present utility model and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and thus should not be construed as a limitation of the present utility model.

[0021] In addition, the terms "first" and "second" are only used for descriptive purposes and should not be construed as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Thus, the features defined with "first" and "second" may explicitly or implicitly include one or more features. In the description of the present utility model, the meaning of "a plurality" is two or more unless otherwise specifically defined.

[0022] In the description of the present utility model, it should be noted that unless otherwise clearly defined and limited, the terms "installed", "connected" and "connected" should be understood in a broad sense. For example, it may be a fixed connection, a detachable connection or an integral connection; it may be a mechanical connection, an electrical connection or a communication connection; it may be directly connected or indirectly connected through an intermediate medium, and it may be the internal communication of two elements or the interaction relationship between two elements. For those of ordinary skill in the art, the specific meanings of the above terms in the present utility model can be understood according to specific circumstances.

[0023] In the present utility model, unless otherwise clearly defined and limited, the first feature being "above" or "below" the second feature may include direct contact between the first and second features, or may also include the situation where the first and second features are not in direct contact but in contact through additional features therebetween. Moreover, the first feature being "above", "over" and "on top of" the second feature includes that the first feature is directly above and obliquely above the second feature, or merely indicates that the horizontal height of the first feature is higher than that of the second feature. The first feature being "below", "beneath" and "underneath" the second feature includes that the first feature is directly below and obliquely below the second feature, or merely indicates that the horizontal height of the first feature is lower than that of the second feature.

[0024] The following disclosure provides many different embodiments or examples for implementing different structures of the present utility model. To simplify the disclosure of the present utility model, components and settings of specific examples are described hereinafter. Of course, they are only examples and are not intended to limit the present utility model. In addition, the present utility model may repeat reference numerals and / or reference letters in different examples. Such repetition is for the purpose of simplification and clarity, and does not itself indicate the relationship between various embodiments and / or settings discussed. In addition, the present utility model provides examples of various specific processes and materials, but those of ordinary skill in the art may be aware of the application of other processes and / or the use of other materials.

[0025] The solar cell of the present application includes a silicon substrate and a film layer structure disposed on the front and / or back of the silicon substrate. The film layer structure includes a passivation layer and at least one barrier layer sequentially distributed away from the silicon substrate. Both the passivation layer and the at least one barrier layer include a tunneling oxide layer and a doped polysilicon layer sequentially distributed away from the silicon substrate. The passivation layer is disposed in at least a partial area on the back and / or front of the silicon substrate, and the barrier layer is disposed in a partial area on one side of the passivation layer away from the silicon substrate. By also setting the at least one barrier layer to have a structure including a tunneling oxide layer and a doped polysilicon layer, when pouring metal paste to form a back metal electrode subsequently, due to the blocking effect of the at least one barrier layer, at least the passivation layer is not burned through, the metal electrode is not directly connected to the silicon substrate, and moreover, the thickness of the passivation layer does not need to be increased, which can effectively control the light absorption of the doped polysilicon layer and balance the passivation performance and optical performance.

[0026] Embodiment 1

[0027] As Figures 1 to 4As shown in the figure, an embodiment of the present application provides a solar cell, which includes a silicon substrate 100 and a film layer structure disposed on the front and / or back of the silicon substrate 100. The film layer structure includes a passivation layer 200 and at least one barrier layer 300 sequentially distributed away from the silicon substrate 100. Both the passivation layer 200 and at least one barrier layer 300 include a tunneling oxide layer and a doped polysilicon layer sequentially distributed away from the silicon substrate 100. The passivation layer 200 is disposed on at least a part of the front and / or back of the silicon substrate 100, and the barrier layer 300 is disposed on a part of the side of the passivation layer 200 away from the silicon substrate.

[0028] In implementation, the solar cell provided by the present application refers to a solar cell with a passivated contact structure, such as a TOPCon (Tunnel Oxide Passivating Contact) cell, without limitation.

[0029] The silicon substrate 100 can be an N-type silicon substrate or a P-type silicon substrate. The silicon substrate 100 has a front and a back. Among them, the front of the silicon substrate 100 corresponds to the light-receiving surface of the solar cell. Similarly, the back of the silicon substrate 100 corresponds to the backlight surface of the solar cell.

[0030] The film layer structure can be disposed on the front of the silicon substrate 100, or on the back of the silicon substrate 100, or film layer structures are disposed on both the front and back of the silicon substrate 100.

[0031] The film layer structure includes a passivation layer 200 and at least one barrier layer 300, and the passivation layer 200 and at least one barrier layer 300 are sequentially distributed away from the silicon substrate 100. For example, when the film layer structure is disposed on the front of the silicon substrate 100, the passivation layer 200 and at least one barrier layer 300 are sequentially distributed away from the front of the silicon substrate 100. When the film layer structure is disposed on the back of the silicon substrate 100, the passivation layer 200 and at least one barrier layer 300 are sequentially distributed away from the back of the silicon substrate 100.

[0032] The passivation layer 200 is a passivated contact structure, including a tunneling oxide layer and a doped polysilicon layer. Exemplarily, as Figures 1 to 3 shown, the passivation layer 200 includes a first tunneling oxide layer 210 and a first doped polysilicon layer 220.

[0033] Exemplarily, taking the passivation layer 200 disposed on the back of the silicon substrate 100 as an example, the first tunneling oxide layer 210 is disposed on the back of the silicon substrate 100, and the first doped polysilicon layer 220 is disposed on the side of the first tunneling oxide layer 210 away from the silicon substrate 100.

[0034] During implementation, the passivation layer 200 can be prepared by PECVD (plasma enhanced chemical vapor deposition) or LPCVD (Low Pressure Chemical Vapor Deposition), without limitation.

[0035] In some alternative embodiments, at least one barrier layer 300 is further provided on the basis of the passivation layer 200, and the barrier layer 300 is also a passivated contact structure. Exemplarily, taking the back surface of the silicon substrate 100 being provided with one barrier layer 300 as an example, as Figure 1 shown, the barrier layer 300 includes a second tunneling oxide layer 310 and a second doped polysilicon layer 320. Among them, the second tunneling oxide layer 310 is disposed on a side surface of the first doped polysilicon layer 220 away from the first tunneling oxide layer 210, and the second doped polysilicon layer 320 is disposed on a side surface of the second tunneling oxide layer 310 away from the first doped polysilicon layer 220. That is to say, the first tunneling oxide layer 210, the first doped polysilicon layer 220, the second tunneling oxide layer 310, and the second doped polysilicon layer 320 are sequentially disposed from the inside to the outside on the back surface of the silicon substrate 100.

[0036] In some possible embodiments, taking the back surface of the solar cell provided by the present application including two barrier layers 300 as an example, among them, the first barrier layer 300 includes a second tunneling oxide layer 310 and a second doped polysilicon layer 320, and the second barrier layer 300 includes a third tunneling oxide layer 330 and a third doped polysilicon layer 340. The structure is as Figure 2 shown, without further elaboration.

[0037] In some other possible embodiments, taking the back surface of the solar cell provided by the present application including three barrier layers 300 as an example, among them, the first barrier layer 300 includes a second tunneling oxide layer 310 and a second doped polysilicon layer 320, the second barrier layer 300 includes a third tunneling oxide layer 330 and a third doped polysilicon layer 340, and the third barrier layer 300 includes a fourth tunneling oxide layer 350 and a fourth doped polysilicon layer 360. The structure is as Figure 3 shown, without further elaboration.

[0038] It should be noted that the above embodiments of the solar cell including one, two, or three barrier layers 300 are all illustrative examples of the embodiments of the present application, rather than specific limitations on the present application. In other embodiments, the number of barrier layers 300 can also be set to other numbers, such as 4 layers or 5 layers, etc., without limitation.

[0039] Both the blocking layer 300 and the passivation layer 200 include a tunneling oxide layer and a doped polysilicon layer. That is to say, both the blocking layer 300 and the passivation layer 200 can be prepared by using PECVD (plasma enhanced chemical vapor deposition) or LPCVD (Low Pressure Chemical Vapor Deposition), without limitation.

[0040] Optionally, the doped polysilicon layers of the passivation layer 200 and the blocking layer 300 have the same polarity. That is to say, the passivation layer 200 and the blocking layer 300 can be prepared synchronously, reducing the preparation process steps and improving the preparation efficiency.

[0041] In some possible embodiments, the solar cell provided by the present application further includes a back metal electrode 400 and a front metal electrode (not shown in the figure). During implementation, when there is no film layer structure on the front side of the silicon substrate 100 and a film layer structure is provided on the back side, the front metal electrode is connected to the front conductive type region (not shown in the figure) on the front side of the silicon substrate 100, and the back metal electrode 400 is connected to the doped polysilicon layer in the film layer structure on the back side of the silicon substrate 100. When a film layer structure is provided on the front side of the silicon substrate 100 and no film layer structure is provided on the back side, the front metal electrode is connected to the doped polysilicon layer in the film layer structure on the front side of the silicon substrate 100, and the back metal electrode 400 is connected to the back conductive type region on the back side of the silicon substrate 100. When film layer structures are provided on both the front and back sides of the silicon substrate 100, the front metal electrode is connected to the doped polysilicon layer in the film layer structure on the front side of the silicon substrate 100, and the back metal electrode 400 is connected to the doped polysilicon layer in the film layer structure on the back side of the silicon substrate 100.

[0042] Both the back metal electrode 400 and the front metal electrode are formed by cooling and solidifying molten metal paste. The molten metal paste can be attached to the designated area by means of pouring, spraying, printing, etc., so as to form finger electrodes or strip busbars, etc. after cooling and solidifying, without limitation.

[0043] In some embodiments, taking the blocking layer 300 having a perforation (not shown in the figure) as an example, the perforation is formed by ablation of molten metal paste. For example, after the passivation layer 200 and at least one layer of the blocking layer 300 are formed, molten metal paste is poured into a local area. After the molten metal paste burns through part or all of the blocking layer 300 and contacts the doped polysilicon layer, the doped polysilicon layer in contact with the molten metal paste can be the doped polysilicon layer of the passivation layer 200 or the doped polysilicon layer of the blocking layer 300. Since the doped polysilicon layer of the passivation layer 200 is not burned through, the molten metal paste contacts the doped polysilicon layer without contacting the silicon substrate after solidification, ensuring the passivation performance.

[0044] Exemplarily, taking the example of a blocking layer 300 being provided on the back surface of a solar cell, the blocking layer 300 includes a second tunneling oxide layer 310 and a second doped polysilicon layer 320. The metal paste burns through the second tunneling oxide layer 310 and the second doped polysilicon layer 320 to form a through hole, and at the same time, the metal paste solidifies in the through hole to form a back metal electrode 400. Of course, a part of the back metal electrode 400 extends out of the through hole for external connection. At this time, the back metal electrode 400 contacts the first doped polysilicon layer 220 of the passivation layer 200.

[0045] In some embodiments, taking the example of two blocking layers 300 being provided on the back surface of a solar cell, the first blocking layer 300 includes a second tunneling oxide layer 310 and a second doped polysilicon layer 320, and the second blocking layer 300 includes a third tunneling oxide layer 330 and a third doped polysilicon layer 340. The metal paste can burn through the third tunneling oxide layer 330 and the third doped polysilicon layer 340 and then contact the second doped polysilicon layer 320.

[0046] In some possible embodiments, after the metal paste burns through the second tunneling oxide layer 310, the second doped polysilicon layer 320, the third tunneling oxide layer 330, and the third doped polysilicon layer 340, it contacts the first doped polysilicon layer 220.

[0047] In some other embodiments, taking the example of three blocking layers 300 being provided on the back surface of a solar cell, the first blocking layer 300 includes a second tunneling oxide layer 310 and a second doped polysilicon layer 320, the second blocking layer 300 includes a third tunneling oxide layer 330 and a third doped polysilicon layer 340, and the third blocking layer 300 includes a third tunneling oxide layer 350 and a third doped polysilicon layer 360. The metal paste can burn through the third tunneling oxide layer 350 and the third doped polysilicon layer 360 and then contact the third doped polysilicon layer 340.

[0048] Optionally, after the metal paste burns through the third tunneling oxide layer 330, the third doped polysilicon layer 340, the third tunneling oxide layer 350, and the third doped polysilicon layer 360, it contacts the second doped polysilicon layer 320.

[0049] In some possible embodiments, after the metal paste burns through the second tunneling oxide layer 310, the second doped polysilicon layer 320, the third tunneling oxide layer 330, the third doped polysilicon layer 340, the fourth tunneling oxide layer 350, and the fourth doped polysilicon layer 360, it contacts the first doped polysilicon layer 220, which will not be elaborated here.

[0050] It should be noted that the number of layers of the above metal paste burning through the barrier layer 300 is an example of the embodiments of the present application, rather than a specific limitation of the present application. In other embodiments, the number of layers of the barrier layer 300 to be burned through can be selected according to actual needs. Among them, the number of layers of the burned-through barrier layer 300 can be controlled by controlling the temperature and burning-through time of the metal paste, which will not be elaborated here.

[0051] In some embodiments, the back metal electrode 400 and the front metal electrode being connected to the doped polysilicon layer may be in contact with the surface of the doped polysilicon layer. In some other alternative embodiments, both the back metal electrode 400 and the front metal electrode are formed by cooling after a molten metal paste burns through at least one layer of the barrier layer 300. Part of the metal crystals of the metal paste penetrate into the doped polysilicon layer of the passivation layer 200 or the barrier layer 300, that is, the metal electrode is in contact with the doped polysilicon layer and part of the metal crystals are formed in the doped polysilicon layer, as Figure 4 shown.

[0052] Exemplarily, taking one layer of the barrier layer 300 as an example, the metal paste burns through the second tunneling oxide layer 310 and the second doped polysilicon layer 320 and then contacts the first doped polysilicon layer 220 of the passivation layer 200. At the same time, after the metal paste cools and solidifies, a metal electrode is formed, and part of the metal crystals of the metal electrode penetrate into the first doped polysilicon layer 220.

[0053] In some other embodiments, taking the example of two layers of the barrier layer 300 being provided on the back of the solar cell, the metal paste can burn through the third tunneling oxide layer 330 and the third doped polysilicon layer 340 and then contact the second doped polysilicon layer 320. At the same time, part of the metal crystals of the metal electrode formed after the metal paste cools penetrate into the second doped polysilicon layer 320.

[0054] Optionally, the metal paste burns through the second tunneling oxide layer 310, the second doped polysilicon layer 320, the third tunneling oxide layer 330, and the third doped polysilicon layer 340 and then contacts the first doped polysilicon layer 220. At the same time, part of the metal crystals of the metal electrode formed after the metal paste cools penetrate into the first doped polysilicon layer 220.

[0055] And so on, at least one layer of the barrier layer 300 is burned through, and at least the passivation layer 200 is not burned through. Through the above settings, the metal crystals can help carriers move to the metal electrode more easily, improving the efficiency of the solar cell.

[0056] The solar cell of the present application includes a silicon substrate 100 and a film layer structure disposed on the front and / or back surface of the silicon substrate 100. The film layer structure includes a passivation layer 200 and at least one barrier layer 300 sequentially distributed away from the silicon substrate 100. Both the passivation layer 200 and at least one barrier layer 300 include a tunneling oxide layer and a doped polysilicon layer sequentially distributed away from the silicon substrate 100. The passivation layer 200 is disposed on at least a partial area of the back and / or front surface of the silicon substrate 100, and the barrier layer 300 is disposed on a partial area of the side of the passivation layer 200 away from the silicon substrate 100. By also setting at least one barrier layer 300 to have a structure including a tunneling oxide layer and a doped polysilicon layer, when pouring metal paste to form metal electrodes subsequently, due to the blocking effect of at least one barrier layer 300, at least the passivation layer 200 is not burned through, the metal electrodes are not directly connected to the silicon substrate 100, and the thickness of the passivation layer 200 does not need to be increased, effectively controlling the light absorption of the doped polysilicon layer and taking into account both passivation performance and optical performance.

[0057] In some possible embodiments, the passivation layer 200 is disposed on at least a partial area of the back and / or front surface of the silicon substrate 100. That is to say, on the back and / or front surface of the silicon substrate 100, the passivation layer 200 can be locally disposed or disposed over the entire surface. At the same time, the barrier layer 300 is disposed on a partial area of the passivation layer 200. That is to say, based on the passivation layer 200, the barrier layer 300 is locally disposed, effectively reducing contact recombination.

[0058] Exemplarily, as Figures 1 to 3 shown, the passivation layer 200 covers the entire back surface of the silicon substrate 100, while the barrier layer 300 is locally disposed. For example, at least one barrier layer 300 is disposed at the positions where electrodes need to be set. When pouring metal paste, after the metal paste burns through the barrier layer 300, it enters the doped polysilicon layer of the passivation layer 200, but does not burn through the doped polysilicon layer of the passivation layer 200, so that the back metal electrodes 400 formed after the metal paste solidifies are in contact with the doped polysilicon layer of the passivation layer 200, taking into account both passivation performance and optical performance.

[0059] In some possible embodiments, the local distribution of the barrier layer 300 can also be achieved by etching the barrier layer 300. For example, after depositing the passivation layer 200 and at least one barrier layer 300, local area etching is performed. Exemplarily, taking the area where metal electrodes need to be set as the metal area and the other areas except where metal electrodes need to be set as the non-metal areas, in the non-metal areas, the doped polysilicon is thinned by wet etching. That is to say, only the barrier layer 300 in the metal area is retained, while only the passivation layer 200 is retained in the non-metal areas.

[0060] Localized etching is carried out by using wet etching to thin the doped polysilicon layer in the non-metal region. The reaction stops when the wet etching reaches the passivation layer 200. By controlling the thickness of the passivation layer 200 and the thickness of each barrier layer 300, the doped polysilicon layer in the non-metal region is thinned to the required thickness.

[0061] In some embodiments, when there is a layer of PSG or BSG on the surface after the topmost barrier layer 300 is formed, the area to be wet-etched can be laser-etched and then alkali-etched; or a mask can be deposited on the metal region by screen printing or inkjet, etc., and then etching is carried out. For example, if there is PSG or BSG, acid etching is carried out first and then alkali etching, and at this time the mask is acid-resistant but alkali-sensitive; if there is no PSG or BSG, direct alkali etching is carried out, and at this time the mask is alkali-resistant.

[0062] The metal region is a multi-layered passivated contact structure. The metal paste burns through the passivated contact structure of the top layer (barrier layer 300) and enters the doped polysilicon layer of the passivated contact structure of the bottom layer (passivation layer 200), but does not burn through the doped polysilicon layer of the passivation layer 200 to reach the underlying tunneling oxide layer. The non-metal region is a single passivation layer 200. Through the above settings, only the first tunneling oxide layer 210 and the first doped polysilicon layer 220 are retained in the non-metal region, which not only maintains a good tunneling passivation effect on the back surface, but also the thinner doped polysilicon layer with lower crystallinity further reduces the parasitic absorption effect on long waves, greatly reducing the parasitic absorption effect of the back polysilicon layer on long waves and improving the circuit current density of the battery.

[0063] In some embodiments, the parasitic absorption of different doped polysilicon layers on long waves is related to their thickness. Generally, the ratio of the thickness of the doped polysilicon layer of the passivation layer 200 to the thickness of the doped polysilicon layer of the barrier layer 300 is 1:1 to 1:3, such as 1:1, 1:2, 1:2.5 or 1:3, etc., without limitation.

[0064] Furthermore, the crystallinity of the doped polysilicon layer of the passivation layer 200 is less than the crystallinity of the doped polysilicon layer of the barrier layer 300.

[0065] Since there is a tunneling oxide layer between two doped polysilicon layers. For example, there is a first doped polysilicon layer 220 between the first tunneling oxide layer 210 and the second tunneling oxide layer 310. Similarly, there is a second doped polysilicon layer 320 between the second tunneling oxide layer 310 and the third tunneling oxide layer 330, and there is a third doped polysilicon layer 340 between the third tunneling oxide layer 330 and the fourth tunneling oxide layer 350, which will not be elaborated here. After the subsequent phosphorus diffusion process, the crystallinity of the previous doped polysilicon layer is less than that of the subsequent doped polysilicon layer. For example, the crystallinity of the first doped polysilicon layer 220 is less than that of the second doped polysilicon layer 320, and the crystallinity of the second doped polysilicon layer 320 is less than that of the third doped polysilicon layer 340. Crystallinity represents the size of crystalline grains, and a smaller crystallinity represents smaller crystalline grains, which can reduce the parasitic absorption effect on long waves.

[0066] Furthermore, the solar cell provided by the present application further includes an antireflection layer on the back surface of the silicon substrate 100 (not shown in the figure).

[0067] Optionally, the antireflection layer on the back surface can be disposed on the side of the back surface conductive type region away from the silicon substrate 100. In some other embodiments, after forming the passivation layer 200 and at least one barrier layer 300 on the back surface of the silicon substrate 100, an antireflection layer on the back surface is further disposed on the barrier layer 300. By setting the antireflection layer on the back surface, the reflectivity is reduced, thereby increasing the transmittance.

[0068] In some alternative embodiments, the solar cell provided by the present application further includes an antireflection layer on the front surface (not shown in the figure). Optionally, the antireflection layer on the front surface can be disposed on the side of the front surface conductive type region away from the silicon substrate 100. In some other embodiments, after forming the passivation layer 200 and at least one barrier layer 300 on the front surface of the silicon substrate 100, an antireflection layer on the front surface is further disposed on the outermost barrier layer 300.

[0069] Optionally, both the antireflection layer on the front surface and the antireflection layer on the back surface are antireflection films. The antireflection film is also called an antireflection coating, which is used to reduce or eliminate the reflected light on the optical surfaces such as lenses, prisms, and plane mirrors, thereby increasing the light transmission amount of these components and reducing or eliminating the stray light of the system.

[0070] Optionally, the antireflection film can be composed of at least one of a silicon nitride layer, a silicon oxynitride layer, and a silicon oxide layer. For example, the antireflection film can be composed of a layer of silicon nitride layer, a layer of silicon oxynitride layer, and a layer of silicon oxide layer. Among them, the silicon nitride layer, the silicon oxynitride layer, and the silicon oxide layer are sequentially distributed in the direction from close to the silicon substrate 100 to away from the silicon substrate 100, without limitation.

[0071] The front conductive type region and the back conductive type region can be an emitter region and a back surface field region. Generally, an emitter region and a back surface field region can be respectively provided on the front and back surfaces of the silicon substrate 100. Among them, the emitter region refers to the part that extracts electrons from the solar cell. Generally, the emitter region is also regarded as the "positive electrode" of the solar cell. Similarly, the back surface field region is generally an aluminum back surface field in the solar cell, and its main functions include reflecting long waves, reducing light transmission, back surface heavy doping, passivation and gettering, increasing the minority carrier lifetime, and increasing the open circuit voltage, etc. Generally, the back surface field region is also regarded as the "negative electrode" of the solar cell, which will not be elaborated here.

[0072] In some embodiments, the front conductive type region contains dopants of a first conductive type with a relatively low doping concentration. Exemplarily, the dopants of the first conductive type are n-type or p-type dopants. For example, the dopants of the first conductive type can be n-type impurities such as group V elements (including phosphorus (P), arsenic (As), bismuth (Bi), antimony (Sb), etc.). Or the dopants of the first conductive type can be p-type impurities such as group III elements (including boron (B), aluminum (Al), gallium (Ga), indium (In), etc.), which is not limited.

[0073] Embodiment 2

[0074] In some alternative embodiments, the present application provides a photovoltaic module including the solar cell as described above.

[0075] Those skilled in the art can clearly understand that for the convenience and simplicity of description, the structure and implementation principle of the photovoltaic module described above can refer to the corresponding structure and implementation principle in the first embodiment, which will not be elaborated here.

[0076] The solar cell of the present application includes a silicon substrate 100 and a film layer structure provided on the front and / or back surface of the silicon substrate 100. The film layer structure includes a passivation layer 200 and at least one barrier layer 300 sequentially distributed away from the silicon substrate 100. Both the passivation layer 200 and the at least one barrier layer 300 include a tunneling oxide layer and a doped polysilicon layer sequentially distributed away from the silicon substrate 100. The passivation layer 200 is disposed on at least a part of the back and / or front surface of the silicon substrate 100, and the barrier layer 300 is disposed on a part of the side surface of the passivation layer 200 away from the silicon substrate 100. By also setting the at least one barrier layer 300 to include a tunneling oxide layer and a doped polysilicon layer structure, when pouring metal paste to form metal electrodes subsequently, by using the blocking effect of the at least one barrier layer 300, at least the passivation layer 200 is not burned through, the metal electrodes are not directly connected to the silicon substrate 100, and the thickness of the passivation layer 200 does not need to be increased, which can effectively control the light absorption of the doped polysilicon layer and balance the passivation performance and optical performance.

[0077] The above are only the preferred embodiments of the present utility model, and are not intended to limit the present utility model. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principle of the present utility model shall be included within the protection scope of the present utility model.

Claims

1. A solar cell, characterized in that: The invention comprises a silicon substrate and a film layer structure arranged on the front side and / or the back side of the silicon substrate, wherein the film layer structure comprises a passivation layer and at least one barrier layer which are sequentially distributed from the silicon substrate to a direction away from the silicon substrate, wherein the passivation layer and the at least one barrier layer both comprise a tunneling oxide layer and a doped polysilicon layer which are sequentially distributed from the silicon substrate to a direction away from the silicon substrate, wherein the passivation layer is arranged on at least a partial area of ​​the back side and / or the front side of the silicon substrate, and wherein the barrier layer is arranged on a partial area of ​​a side of the passivation layer which is away from the silicon substrate.

2. The solar cell according to claim 1, wherein: The solar cell also includes a front metal electrode and a back metal electrode. The front and back sides of the silicon substrate respectively have a front conductive type region and a back conductive type region. The front metal electrode is connected to the front conductive type region or to the doped polysilicon layer on the front side, and the back metal electrode is connected to the back conductive type region or to the doped polysilicon layer on the back side.

3. The solar cell according to claim 1, wherein: The ratio of the thickness of the doped polysilicon layer of the passivation layer to the thickness of the doped polysilicon layer of the barrier layer is 1:1 to 1:

3.

4. The solar cell according to claim 1, wherein: The crystallinity of the doped polysilicon layer of the passivation layer is less than that of the doped polysilicon layer of the barrier layer.

5. The solar cell according to claim 1, wherein: The doped polysilicon layer of the passivation layer and the doped polysilicon layer of the barrier layer have the same polarity.

6. The solar cell according to claim 1, wherein: The solar cell further comprises a back side anti-reflection layer arranged on the back side of the silicon substrate.

7. The solar cell according to claim 6, characterized in that The solar cell further comprises a front anti-reflection layer arranged on the front side of the silicon substrate.

8. The solar cell according to claim 7, wherein: The back anti-reflection layer and the front anti-reflection layer each include at least one of a silicon nitride layer, a silicon oxynitride layer and a silicon oxide layer.

9. A photovoltaic module, characterized in that: The invention comprises the solar cell according to any one of claims 1 to 8.

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