Dual-mode communication device

Abstract

The utility model discloses a dual-mode communication device, which relates to the technical field of communication, and comprises a radio frequency front end which is responsible for transmitting and receiving signals and can support multi-channel signal receiving; the baseband processor is compatible with two communication protocols and performs coding and decoding, modulation and demodulation and protocol processing on information; the power supply management chip is used for realizing dynamic voltage adjustment and switching working power supplies required by different working states of the dual-mode communication device; the buffer circuit is used for modulating a signal of an internal working circuit of the dual-mode communication device and the stability of current switching; and the information buffer is used for carrying out data temporary storage on the transmission data of the dual-mode communication device so as to realize temporary backup of the transmission data of the dual-mode communication device. By arranging the dual-mode communication device with the information buffer, transmission signals are backed up and buffered, and the communication stability of the dual-mode communication device is improved.

Description

Technical Field

[0001] The utility model relates to the field of communication technologies, and particularly relates to a dual-mode communication device. Background Art

[0002] Dual-mode communication refers to a technology in which a communication device or module can support two different communication modes for data transmission at the same time. Since the dual-mode communication device needs to switch the communication signal mode, data loss or transmission failure is likely to occur during data transmission. When the existing dual-mode communication device has a signal transmission loss or failure, it is necessary to re-receive the signal for conversion, which affects the working stability of the dual-mode communication device. Summary of the Invention

[0003] The purpose of the utility model is to overcome the deficiencies of the prior art. The utility model provides a dual-mode communication device. By setting a dual-mode communication device with an information buffer, the transmitted signal is backed up and cached, so as to improve the communication stability of the dual-mode communication device.

[0004] The utility model provides a dual-mode communication device, and the dual-mode communication device includes:

[0005] A radio frequency front end, responsible for signal transmission and reception, and capable of supporting multi-channel signal reception;

[0006] A baseband processor, compatible with two communication protocols, and performing encoding / decoding, modulation / demodulation and protocol processing on information;

[0007] A power management chip, used to achieve dynamic voltage adjustment and switch the working power required for different working states of the dual-mode communication device;

[0008] A buffer circuit, used to modulate the signal and the stability of current switching of the internal working circuit of the dual-mode communication device;

[0009] An information buffer, used to temporarily store the transmission data of the dual-mode communication device, and realize the temporary backup of the transmission data of the dual-mode communication device.

[0010] Further, the buffer circuit includes a power buffer circuit and a signal buffer circuit. The power buffer circuit is electrically connected to the power management chip, and the signal buffer circuit is electrically connected to the baseband processor.

[0011] Further, the power buffer circuit is provided with a capacitor and a DC-DC buck-boost unit.

[0012] Further, the information buffer is provided with a high-speed cache area and an encrypted storage area, and the transmission signal output by the baseband processor sequentially passes through the high-speed cache area and the encrypted storage area.

[0013] Furthermore, the high-speed cache area is constructed based on a dual port and performs read and write operations on the transmitted signal based on the dual port.

[0014] Furthermore, the encrypted storage area encrypts the transmission information of the high-speed cache area based on an integrated hardware encryption engine.

[0015] Furthermore, the dual-mode communication device further includes a feedback unit, and the feedback unit is configured in the radio frequency front end.

[0016] Furthermore, the feedback unit is signal-connected to the information buffer.

[0017] Furthermore, the information buffer is provided with a first signal receiving end for receiving a first feedback signal from the feedback unit.

[0018] Furthermore, the information buffer is provided with a second signal receiving end for receiving a second feedback signal from the feedback unit.

[0019] The present utility model provides a dual-mode communication device. By providing an information buffer to back up and cache the transmitted signal, it can repair the transmitted signal in case of loss or failure of the transmitted signal, improving the communication stability of the dual-mode communication device. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Figure 1 is a schematic structural diagram of the dual-mode communication device in an embodiment of the present utility model;

[0021] Figure 2 is a schematic circuit diagram of the dual-mode communication device in an embodiment of the present utility model. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0022] Next, the technical solutions in the embodiments of the present utility model will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present utility model. Obviously, the described embodiments are only a part of the embodiments of the present utility model, rather than all of the embodiments. Based on the embodiments of the present utility model, all other embodiments obtained by those of ordinary skill in the art without making creative efforts belong to the scope of protection of the present utility model.

[0023] Figure 1 shows a schematic structural diagram of the dual-mode communication device in an embodiment of the present utility model, Figure 2The circuit schematic diagram of the dual-mode communication device in the embodiment of the present utility model is shown. The dual-mode communication device includes: a radio frequency front end 5, which is responsible for signal transmission and reception and can support signal reception on multiple channels; a baseband processor 4 configured as the core processing component of the dual-mode communication device, which can be compatible with two communication protocols and perform encoding / decoding, modulation / demodulation, and protocol processing on information; a power management chip 1, which is used to implement dynamic voltage adjustment and switch the operating power required for different operating states of the dual-mode communication device. That is, when the dual-mode communication device is in the standby mode, the internal operating current of the dual-mode communication device can be set to be below 1 mA to improve the energy-saving effect of the dual-mode communication device. A buffer circuit 2, which is used to modulate the stability of the signals and current switching in the internal working circuit of the dual-mode communication device; an information buffer 3, which is used to temporarily store the transmission data of the dual-mode communication device to realize the temporary backup of the transmission data of the dual-mode communication device.

[0024] Specifically, the buffer circuit 2 includes a power buffer circuit 22 and a signal buffer circuit 21. The power buffer circuit 22 is electrically connected to the power management chip 1, and the signal buffer circuit 21 is electrically connected to the baseband processor 4.

[0025] Furthermore, the buffer circuit 2 is used to modulate the stability of the signals and current switching in the internal working circuit of the dual-mode communication device to ensure the normal operation of the dual-mode communication device.

[0026] Furthermore, the working principle of the dual-mode communication device is as follows: after the radio frequency front end 5 converts the signal into a baseband signal, based on the baseband processor 4 for protocol processing, and then optimizes the power supply through the power management chip 1, so that the device can automatically select the optimal mode according to the signal strength, data volume, and power consumption requirements. Based on the baseband processor 4, the adjusted information data is sent to the information buffer 3, and the transmitted information is temporarily cached through the information buffer 3.

[0027] Specifically, the buffer circuit 2 includes a power buffer circuit 22 and a signal buffer circuit 21. The power buffer circuit 22 is electrically connected to the power management chip 1, and the signal buffer circuit 21 is electrically connected to the baseband processor 4. The power buffer circuit 22 is the key to the stability of dual-mode communication. When the power management chip 1 switches the operating power, based on the power buffer circuit 22, the transient impact and voltage fluctuation during power switching can be solved, thereby ensuring the stability of the power management chip 1 for switching the power supply of the internal working circuit of the dual-mode communication device.

[0028] Furthermore, the power buffer circuit 22 is provided with a capacitor and a DC-DC buck-boost unit. In this embodiment, a 10F / 5.5V supercapacitor array is adopted, and the TPS61090 chip is used to achieve a boost from 3.3V to 5V, which can provide a 150ms maintenance time when the main power supply drops, ensuring uninterrupted communication.

[0029] Specifically, the signal buffer circuit 21 is used to achieve impedance matching, noise suppression, and signal amplification to ensure signal integrity during dual-mode switching. Generally, a common-source amplifier topology is used to buffer the radio frequency signals obtained by the radio frequency front end 5, which can provide a high input impedance and a low output impedance to match the subsequent circuit, and can maintain the stability of the dual-mode communication device during signal switching.

[0030] Specifically, the dual-mode communication device further includes an automatic switching detection mechanism. Based on the automatic switching detection mechanism, seamless switching is realized according to the comprehensive signal quality, power supply state, and service requirements through hardware monitoring and software algorithms. That is, according to the radio frequency signals obtained by the front-end radio frequency reception, the radio frequency signals are read and evaluated by a monitoring chip, and combined with the transmission requirements of the radio frequency signals, it is judged whether the radio frequency signals need signal switching, and the working state of the dual-mode communication device is adjusted according to the evaluation results.

[0031] Specifically, the information buffer 3 is provided with a high-speed cache area and an encrypted storage area. The transmission signals output by the baseband processor 4 sequentially pass through the high-speed cache area and the encrypted storage area. The high-speed cache area can meet the high-speed storage requirements of the dual-mode communication module for signal data, enabling the dual-mode communication device to realize the backup and caching of transmission signal data during the signal transmission switching process. The high-speed cache area is constructed based on a dual-port and performs read and write operations on the transmission signals based on the dual-port. In this embodiment, the high-speed cache area supports simultaneous read and write operations, can cache the data packets to be sent, and adopts a pipeline design to achieve parallel processing of data reception and transmission, meeting the signal transmission requirements of the dual-mode communication device.

[0032] Furthermore, the encrypted storage area encrypts the transmission information in the high-speed cache area based on an integrated hardware encryption engine. Through the memory of the integrated hardware encryption engine, the data can be processed by the encryption engine before being written, improving the data transmission security of the dual-mode communication device.

[0033] Specifically, the dual-mode communication device further includes a feedback unit. The feedback unit is configured in the radio frequency front end 5, and the feedback unit is used to detect the sending state of the transmission signal, so as to adjust the signal transmission mode of the dual-mode communication device according to the detection signal of the feedback unit.

[0034] Specifically, the feedback unit is signal - connected to the information buffer 3. When the feedback unit detects the successful transmission status of the transmission signal, the feedback unit generates a first feedback signal. The information buffer 3 is provided with a first signal receiving end for receiving the first feedback signal of the feedback unit, obtains the first feedback signal based on the first signal receiving end, and erases the cached transmission information based on the first feedback signal so as to perform the next transmission signal operation.

[0035] When the feedback unit detects the failed transmission status of the transmission signal, the feedback unit generates a second feedback signal. The information buffer 3 is provided with a second signal receiving end for receiving the second feedback signal of the feedback unit, obtains the second feedback signal based on the second signal receiving end, and outputs the cached transmission information based on the second feedback signal, thereby ensuring the stability of the current signal transmission.

[0036] The embodiment of the present utility model provides a dual - mode communication device. By setting the information buffer 3 to back - up and cache the transmission signal, it can repair the transmission signal in case of loss or failure of the transmission signal, and improve the communication stability of the dual - mode communication device.

[0037] In addition, the above has introduced in detail the dual - mode communication device provided by the embodiment of the present utility model. Specific examples are used in this article to elaborate on the principle and implementation manner of the present utility model. The description of the above embodiments is only used to help understand the method and its core idea of the present utility model; at the same time, for those of ordinary skill in the art, according to the idea of the present utility model, there will be changes in the specific implementation manner and application scope. In summary, the content of this specification should not be construed as a limitation to the present utility model.

Claims

1. A dual-mode communication device, characterized in that, The dual-mode communication device includes: A radio frequency front end, responsible for signal transmission and reception, capable of supporting multi-channel signal reception; A baseband processor, compatible with two communication protocols, and performing encoding / decoding, modulation / demodulation, and protocol processing on information; A power management chip, used to implement dynamic voltage adjustment and switch the operating power required for different operating states of the dual-mode communication device; A buffer circuit, used to modulate the signals of the internal working circuit of the dual-mode communication device and the stability of current switching; An information buffer, used to temporarily store the transmission data of the dual-mode communication device and realize the temporary backup of the transmission data of the dual-mode communication device.

2. The dual-mode communication device according to claim 1, wherein The buffer circuit includes a power buffer circuit and a signal buffer circuit. The power buffer circuit is electrically connected to the power management chip, and the signal buffer circuit is electrically connected to the baseband processor.

3. The dual-mode communication device according to claim 2, wherein The power buffer circuit is provided with a capacitor and a DC-DC buck-boost unit.

4. The dual-mode communication device according to claim 1, wherein The information buffer is provided with a high-speed cache area and an encrypted storage area. The transmission signal output by the baseband processor sequentially passes through the high-speed cache area and the encrypted storage area.

5. The dual-mode communication device according to claim 4, wherein The high-speed cache area is constructed based on a dual port and performs read / write operations on the transmission signal based on the dual port.

6. The dual-mode communication device according to claim 4, wherein, The encrypted storage area encrypts the transmission information in the high-speed cache area based on an integrated hardware encryption engine.

7. The dual-mode communication device according to claim 1, wherein The dual-mode communication device further includes a feedback unit, and the feedback unit is configured in the radio frequency front end.

8. The dual-mode communication device according to claim 7, wherein, The feedback unit is signal-connected to the information buffer.

9. The dual-mode communication device according to claim 8, wherein, The information buffer is provided with a first signal receiving end for receiving the first feedback signal of the feedback unit.

10. The dual-mode communication device according to claim 8, wherein The information buffer is provided with a second signal receiving end for receiving the second feedback signal of the feedback unit.

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