Battery string, battery assembly and photovoltaic system

Abstract

The utility model is suitable for the technical field of solar cells, and provides a cell string, a cell assembly and a photovoltaic system. The cell string comprises a plurality of solder strips and a plurality of slice cells, the solder strips are connected with two adjacent slice cells, and the slice cells are formed by cutting a whole solar cell; the slice battery comprises two first edges and two second edges, the length of the first edges is larger than that of the second edges, and the two first edges correspond to the first edge area and the second edge area respectively; the resistivity of the silicon substrate in the first edge region is greater than or equal to 30 omega.cm, and / or the resistivity of the silicon substrate in the second edge region is greater than or equal to 30 omega.cm. According to the battery string provided by the embodiment of the invention, the resistivity of the silicon substrate in the edge region corresponding to at least one long edge in the slice batteries forming the battery string is greater than or equal to 30 omega.cm, so that edge recombination of the slice batteries can be reduced, and the power generation efficiency of a battery assembly formed by the battery string is improved.

Description

Technical Field

[0001] This application relates to the technical field of solar cells, and in particular, to a battery string, a battery module, and a photovoltaic system. Background Art

[0002] Solar cells can convert sunlight into electrical energy. Usually, a whole solar cell is cut into sliced cells, and then multiple sliced cells are connected into a battery string using welding tapes. However, the edge recombination of sliced cells is relatively large, resulting in a low photoelectric conversion efficiency of the sliced cells, and thus a low power generation efficiency of the battery string formed by the battery string. Based on this, how to improve the power generation efficiency of the battery module formed by the battery string has become an urgent problem to be solved. Summary of the Utility Model

[0003] This application provides a battery string, a battery module, and a photovoltaic system, aiming to solve the technical problem of how to improve the power generation efficiency of the battery module formed by the battery string in the prior art.

[0004] The battery string of the embodiment of this application includes a plurality of welding tapes and a plurality of sliced cells. The welding tapes connect two adjacent sliced cells, and the sliced cells are formed by cutting a whole solar cell; the sliced cells include two first sides and two second sides, the length of the first side is greater than the length of the second side, and the two first sides respectively correspond to a first edge region and a second edge region;

[0005] The resistivity of the silicon substrate in the first edge region is greater than or equal to 30 Ω·cm, and / or the resistivity of the silicon substrate in the second edge region is greater than or equal to 30 Ω·cm.

[0006] This application also provides a battery module, including the battery string of any one of the above.

[0007] This application also provides a photovoltaic system, including the battery module of the above.

[0008] In the battery string, battery module, and photovoltaic system of the embodiment of this application, since the resistivity of the silicon substrate in the edge region corresponding to at least one long side of the sliced cells forming the battery string is greater than or equal to 30 Ω·cm, the edge recombination of the sliced cells can be reduced, and the power generation efficiency of the battery module formed by the battery string can be improved.

[0009] The additional aspects and advantages of this application will be partially given in the following description, partially become obvious from the following description, or be understood through the practice of this application. Description of the Drawings

[0010] Figure 1 It is a schematic structural diagram of a battery string provided by an embodiment of this application;

[0011] Figure 2 It is a schematic structural diagram of a battery string provided by an embodiment of the present application;

[0012] Description of main component symbols:

[0013] Battery string 1000, sliced battery 100, first side 11, first edge region 111, second edge region 112, second side 12, middle region 13. Detailed implementation manners

[0014] In order to make the objectives, technical solutions and advantages of the present application clearer, the present application will be further described in detail below with reference to the accompanying drawings and embodiments. Examples of the embodiments are shown in the accompanying drawings, where the same or similar reference numerals indicate the same or similar elements or elements with the same or similar functions from beginning to end. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present application and should not be construed as a limitation to the present application. In addition, it should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0015] In the description of the present application, it should be understood that the orientation or positional relationship indicated by terms such as "upper", "lower", "back", "front", etc. is based on the orientation or positional relationship shown in the accompanying drawings, and is only for the convenience of describing the present application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be construed as a limitation to the present application.

[0016] In the present application, unless otherwise clearly specified and defined, the first feature being "above" or "below" the second feature may include the first and second features being in direct contact, or may include the first and second features not being in direct contact but being in contact through other features therebetween. Moreover, the first feature being "above", "over" and "on" the second feature includes the first feature being directly above and obliquely above the second feature, or merely indicating that the horizontal height of the first feature is higher than that of the second feature. The first feature being "below", "under" and "beneath" the second feature includes the first feature being directly below and obliquely below the second feature, or merely indicating that the horizontal height of the first feature is lower than that of the second feature.

[0017] The following disclosure provides many different embodiments or examples for implementing different structures of the present application. To simplify the disclosure of the present application, the components and settings of specific examples are described below. Of course, they are only examples and are not intended to limit the present application. In addition, the present application may repeat reference numerals and / or reference letters in different examples. This repetition is for the purpose of simplification and clarity, and does not itself indicate the relationship between the various embodiments and / or settings discussed. In addition, the present application provides examples of various specific processes and materials, but those of ordinary skill in the art can be aware of the application of other processes and / or the use scenarios of other materials.

[0018] In the present application, since the resistivity of the silicon substrate in the edge region corresponding to at least one long side of the sliced cells forming the battery string is greater than or equal to 30 Ω·cm, the edge recombination of the sliced cells can be reduced, and the power generation efficiency of the battery module formed by the battery string can be improved.

[0019] Embodiment 1

[0020] The battery string 1000 of the embodiment of the present application includes a plurality of solder tapes and a plurality of sliced cells 100. The solder tapes connect two adjacent sliced cells 100. The sliced cells 100 are formed by cutting a whole solar cell; the sliced cells 100 include two first sides 11 and two second sides 12. The length of the first side 11 is greater than the length of the second side 12. The two first sides 11 respectively correspond to a first edge region 111 and a second edge region 112;

[0021] The resistivity of the silicon substrate in the first edge region 111 is greater than or equal to 30 Ω·cm, and / or the resistivity of the silicon substrate in the second edge region 112 is greater than or equal to 30 Ω·cm.

[0022] In the battery string 1000 of the embodiment of the present application, since the resistivity of the silicon substrate in the edge region corresponding to at least one long side of the sliced cells 100 forming the battery string 1000 is greater than or equal to 30 Ω·cm, the edge recombination of the sliced cells 100 can be reduced, and the power generation efficiency of the battery module formed by the battery string 1000 can be improved.

[0023] Specifically, the number of solder tapes can be 1, 2, 3, 4 or other numbers. To more clearly show the structure of the sliced cells 100, the solder tapes in the drawings are not shown.

[0024] Specifically, the sliced cells 100 can be formed by bisecting, trisecting, quadrisecting or other proportional divisions of a whole solar cell. The specific division ratio of the whole solar cell into the sliced cells 100 is not limited herein. In this article, the sliced cells 100 are taken as half cells for explanation and illustration.

[0025] Specifically, when the sliced cell 100 is cut from a whole solar cell into two equal parts, four equal parts, or other even equal parts, the cutting line passes through the center point of the whole solar cell and is parallel to the edge of the whole solar cell. When the sliced cell 100 is cut from a whole solar cell into three equal parts, five equal parts, or other odd equal parts, the cutting line is axisymmetric, and the axis of symmetry passes through the center point of the whole solar cell and is parallel to the edge of the whole solar cell.

[0026] Specifically, the number of sliced cells 100 in the battery string 1000 can be 1, 2, 3, 4, or other numbers. In Figure 1 the example of Figure 2 the number of sliced cells 100 is 3. In

[0027] the example of

[0028] It can be understood that the whole solar cell is usually square. The four corners of the square whole solar cell can include chamfers, rounded corners, right angles, or other types of corners. Therefore, the sliced cell 100 cut from the whole solar cell is rectangular. For the rectangular sliced cell 100, the lengths of two adjacent sides must be different.

[0029] Specifically, the sliced cell 100 includes two first sides 11 and two second sides 12. The two first sides 11 are opposite to each other, the two second sides 12 are opposite to each other, and the first side 11 and the second side 12 are adjacent. The length of the first side 11 is greater than the length of the second side 12. Therefore, the first side 11 is the long side of the rectangular sliced cell 100, and the second side 12 is the short side of the rectangular sliced cell 100. The two first sides 11 respectively correspond to the first edge region 111 and the second edge region 112. Therefore, both the first edge region 111 and the second edge region 112 are the edge regions corresponding to the long side.

[0030] Specifically, the resistivity of the silicon substrate in the first edge region 111 is greater than or equal to 30 Ω·cm. For example, it is 30 Ω·cm, 32 Ω·cm, 35 Ω·cm, 38 Ω·cm, 50 Ω·cm, 80 Ω·cm, 100 Ω·cm. The specific value of the resistivity of the silicon substrate in the first edge region 111 is not limited herein.

[0031] Specifically, the resistivity of the silicon substrate in the second edge region 112 is greater than or equal to 30 Ω·cm. For example, it is 30 Ω·cm, 32 Ω·cm, 35 Ω·cm, 38 Ω·cm, 50 Ω·cm, 80 Ω·cm, 100 Ω·cm. The specific value of the resistivity of the silicon substrate in the second edge region 112 is not limited herein.

[0032] Specifically, the resistivity of the silicon substrate in the first edge region 111 and the resistivity of the silicon substrate in the second edge region 112 may be the same or different.

[0033] In this embodiment, the resistivity of the silicon substrate in the first edge region 111 is greater than or equal to 30 Ω·cm, and the resistivity of the silicon substrate in the second edge region 112 is greater than or equal to 30 Ω·cm. In this way, the edge recombination of the sliced cell 100 can be further reduced, and the power generation efficiency of the battery module formed by the battery string 1000 can be further improved.

[0034] It can be understood that in other embodiments, it may also be that the resistivity of the silicon substrate in the first edge region 111 is greater than or equal to 30 Ω·cm, and the resistivity of the silicon substrate in the second edge region 112 is less than 30 Ω·cm; it may also be that the resistivity of the silicon substrate in the first edge region 111 is less than 30 Ω·cm, and the resistivity of the silicon substrate in the second edge region 112 is greater than or equal to 30 Ω·cm.

[0035] It can be understood that as long as the resistivity of the silicon substrate in one of the first edge region 111 and the second edge region 112 is greater than or equal to 30 Ω·cm, the edge recombination of the sliced cell 100 can be reduced, and the power generation efficiency of the battery module formed by the battery string 1000 can be improved. If the resistivity of the silicon substrates in both the first edge region 111 and the second edge region 112 is greater than or equal to 30 Ω·cm, the effect of reducing edge recombination and improving the power generation efficiency of the module can be better.

[0036] Specifically, the sliced cell 100 includes a silicon substrate. In this application, the silicon substrate is a single-crystalline silicon substrate. It can be understood that in other embodiments, the silicon substrate may also be a polycrystalline silicon substrate, which is not limited herein.

[0037] Please note that the "resistivity" in this article refers to the average resistivity of the silicon substrate in this region.

[0038] In this embodiment, the silicon substrate is square, and the four corners of the silicon substrate are all chamfered. It can be understood that in other embodiments, the silicon substrate may be rectangular, circular, oval, triangular or other shapes; the corners of the silicon substrate may be rounded, sharp or other shapes; the shapes of multiple corners of the silicon substrate may be the same or different.

[0039] Specifically, the first edge region 111 and the second edge region 112 respectively refer to the spatial regions extending from one of the two first sides 11 to the other of the two first sides 11. Viewed from the thickness direction of the silicon substrate, the first edge region 111 extends inward from the first side 11, as Figure 1 and Figure 2 shown. That is to say, the first edge region 111 is not only formed on the surface of the silicon substrate, but the first edge region 111 is a spatial region with a thickness.

[0040] Specifically, the thickness of the silicon substrate can be 30 μm - 300 μm. For example, it can be 30 μm, 40 μm, 50 μm, 60 μm, 70 μm, 80 μm, 90 μm, 100 μm, 150 μm, 200 μm, 250 μm, 300 μm. In this way, it can be avoided that the thickness of the silicon substrate is too small, resulting in too low a concentration of photo-generated carriers, and it can also be avoided that the thickness of the silicon substrate is too thick, resulting in too high a cost of the battery.

[0041] Specifically, the conductivity type of the silicon substrate in all regions of the first edge region 111 can be N-type or P-type. It can also be that in a part of the region of the first edge region 111, the conductivity type of the silicon substrate is N-type, and in another part of the region of the first edge region 111, the conductivity type of the silicon substrate is P-type.

[0042] Similarly, the conductivity type of the silicon substrate in all regions of the second edge region 112 can be N-type or P-type. It can also be that in a part of the region of the second edge region 112, the conductivity type of the silicon substrate is N-type, and in another part of the region of the second edge region 112, the conductivity type of the silicon substrate is P-type.

[0043] Specifically, the conductivity type of the region being N-type means that the conductivity type presented by the region is N-type. This does not represent a limitation on the type of doping elements in the region. Further, in some embodiments, the region may not include P-type doping elements and includes N-type doping elements, such that the conductivity type of the region presents as N-type. In other embodiments, the region may also include P-type doping elements and N-type doping elements, and the concentration of N-type doping elements is greater than the concentration of P-type doping elements, such that the conductivity type of the region presents as N-type.

[0044] Specifically, the conductivity type of the region being P-type means that the conductivity type presented by the region is P-type. This does not represent a limitation on the type of doping elements in the region. Further, in some embodiments, the region may not include N-type doping elements and includes P-type doping elements, such that the conductivity type of the region presents as P-type. In other embodiments, the region may also include P-type doping elements and N-type doping elements, and the concentration of P-type doping elements is greater than the concentration of N-type doping elements, such that the conductivity type of the region presents as P-type.

[0045] In some embodiments, the N-type doping element includes at least one element from Group V elements and Group VI elements. Specifically, the Group V elements include nitrogen, phosphorus, arsenic, antimony, and bismuth. Specifically, the Group VI elements include oxygen, sulfur, selenium, tellurium, and polonium. That is to say, the N-type doping element includes at least one of nitrogen, phosphorus, arsenic, antimony, bismuth, oxygen, sulfur, selenium, tellurium, and polonium. In this way, a variety of N-type doping elements are provided, making the N-type doping elements more flexible and capable of adapting to more actual production scenarios.

[0046] In some embodiments, the P-type doping element includes at least one element from Group III elements. Specifically, the Group III elements include boron, aluminum, gallium, indium, and thallium. That is to say, the P-type doping element includes at least one of boron, aluminum, gallium, indium, and thallium. In this way, a variety of P-type doping elements are provided, making the P-type doping elements more flexible and capable of adapting to more actual production scenarios.

[0047] In some embodiments, the acceptor impurity concentration in the first edge region 111 is less than the acceptor impurity concentration in the second edge region 112.

[0048] In this way, the recombination caused by copper contamination can be further reduced, which is beneficial to improving the photoelectric conversion efficiency of the wafer cell 100 made based on a silicon substrate.

[0049] Specifically, the acceptor impurity refers to the P-type doping element. The donor impurity refers to the N-type doping element.

[0050] It can be understood that since the acceptor impurity concentration in the first edge region 111 is less than the acceptor impurity concentration in the second edge region 112, the P-type doping element, such as Group III elements, can be reduced in the first edge region 111, thereby reducing the recombination pairs formed by the Group III elements and oxygen in the first edge region 111 and the recombination caused by the doping element itself, and further improving the conversion efficiency.

[0051] It can be understood that since the acceptor impurity concentration in the second edge region 112 is less than the donor impurity concentration in the second edge region 112, the second edge region 112 exhibits an N-type.

[0052] In some embodiments, the donor impurity concentration in the first edge region 111 is less than the donor impurity concentration in the second edge region 112, and the donor impurity concentration in the first edge region 111 is less than the acceptor impurity concentration in the first edge region 111.

[0053] In this way, it is ensured that the conduction type of the first edge region 111 of the silicon substrate is P-type, and the conduction type of the second edge region 112 is N-type.

[0054] In some embodiments, the sliced cell 100 is a half cell, and the ratio of the acceptor impurity concentration in the second edge region 112 to the acceptor impurity concentration in the first edge region 111 is 1.01 - 10. For example, it can be 1.01, 1.02, 1.05, 1.1, 1.5, 1.8, 2, 3, 5, 8, 9, 10.

[0055] In this way, the ratio of the acceptor impurity concentration in the second edge region 112 to the acceptor impurity concentration in the first edge region 111 is within a suitable range and greater than 1, which can avoid a relatively flat crystallization interface, slow drawing speed, and low production rate caused by too small a ratio, and can also avoid the crystallization interface being more concave towards the melt, large thermal stress, and easy wire breakage into polycrystals caused by too large a ratio.

[0056] In some embodiments, the sliced cell 100 is a half cell, and the acceptor impurity concentration in the first edge region 111 is less than or equal to 10 15 atoms / cm 3 . For example, it can be 1×10 15 atoms / cm 3 、0.8×10 15 atoms / cm 3 、0.5×10 15 atoms / cm 3 、0.1×10 15 atoms / cm 3 and so on.

[0057] In this way, the acceptor impurity concentration in the first edge region 111 is within a suitable range, which can avoid more recombination pairs formed with oxygen and more recombination caused by the doping elements themselves due to too high an acceptor impurity concentration in the first edge region 111, and is beneficial to improving the conversion efficiency.

[0058] Specifically, the two surfaces of the silicon substrate in the thickness direction are the first surface and the second surface respectively. It can be that the first surface is the light-facing surface and the second surface is the backlight-facing surface; or it can be that the first surface is the backlight-facing surface and the second surface is the light-facing surface. This is not limited here.

[0059] Specifically, the sliced cell 100 may include a first doping layer. The first doping layer is disposed on the first surface of the silicon substrate. Specifically, "the first doping layer is disposed on the first surface of the silicon substrate" may mean that the first doping layer is formed by diffusion on the first surface; or it may mean that the first doping layer is formed by deposition on the first surface. The specific form of the first doping layer disposed on the first surface of the silicon substrate is not limited here.

[0060] In some embodiments, the conductivity type of the first doping layer is N-type, a high-low junction is formed between the regions with the N-type conductivity type, and a PN junction is formed between the regions with the P-type conductivity type.

[0061] In some embodiments, the first doped layer has a P-type conductivity type, a PN junction is formed between the region with an N-type conductivity type, and a high-low junction is formed between the regions with a P-type conductivity type.

[0062] Specifically, the sliced cell 100 may further include a first passivation and antireflection layer and a first electrode. The first passivation and antireflection layer is stacked on the first doped layer. The first electrode passes through the first passivation and antireflection layer and is connected to the first doped layer. The first passivation and antireflection layer includes at least one of an alumina layer, a silicon nitride layer, a silicon oxide layer, and a silicon oxynitride layer. The first electrode includes at least one of a copper electrode, an aluminum electrode, and a silver electrode.

[0063] Specifically, the sliced cell 100 may further include a second passivation and antireflection layer and a second electrode. The second passivation and antireflection layer is disposed on the second surface of the silicon substrate. The second electrode passes through the second passivation and antireflection layer and is connected to the silicon substrate. The second passivation and antireflection layer includes at least one of an alumina layer, a silicon nitride layer, a silicon oxide layer, and a silicon oxynitride layer. The second electrode includes at least one of a copper electrode, an aluminum electrode, and a silver electrode.

[0064] In some embodiments, the first doped layer is a diffusion doped layer.

[0065] In this way, a diffusion process can be used to dope impurities into the silicon substrate, so as to form the first doped layer in the silicon substrate, which is easy to achieve a high concentration of the first doped layer, a deep junction depth with the silicon substrate, and less surface damage.

[0066] It can be understood that in other embodiments, the first doped layer may also be an ion implantation doped layer. In this way, the number of doped atoms and the doping depth can be better controlled, and the lateral diffusion effect is small, and the required temperature is low.

[0067] In some embodiments, the first doped layer is a doped polysilicon layer or a doped amorphous silicon layer, and a first passivation layer is provided between the first doped layer and the silicon substrate. The first passivation layer is an intrinsic amorphous silicon layer or a silicon oxide layer.

[0068] In this way, the first passivation layer stacked on the silicon substrate and the first doped layer form a passivated contact structure, providing a passivation effect for the sliced cell 100. The first passivation layer can allow the majority carriers to tunnel into the first doped layer, while blocking the recombination of minority carriers, so as to realize the lateral transport of the majority carriers in the first doped layer and be collected by the metal electrodes of the sliced cell 100, thereby reducing the recombination in the metal contact region and being beneficial to improving the open circuit voltage and short circuit current of the sliced cell 100.

[0069] In one example, the first doped layer is a doped polysilicon layer, and an intrinsic amorphous silicon layer is provided between the first doped layer and the silicon substrate; in another example, the first doped layer is a doped polysilicon layer, and a silicon oxide layer is provided between the first doped layer and the silicon substrate; in yet another example, the first doped layer is a doped amorphous silicon layer, and an intrinsic amorphous silicon layer is provided between the first doped layer and the silicon substrate; in another example, the first doped layer is a doped amorphous silicon layer, and a silicon oxide layer is provided between the first doped layer and the silicon substrate.

[0070] It can be understood that the first passivation layer is formed with a hole structure. The first doped layer passes through the first passivation layer to form a high-low junction or a PN junction with the silicon substrate. The PN junction and the high-low junction formed by the first doped layer and the single-crystalline silicon substrate are both heterojunctions.

[0071] In some embodiments, the first doped layer is a doped polysilicon layer, a first passivation layer is provided between the first doped layer and the silicon substrate, the first passivation layer is an intrinsic amorphous silicon layer or a silicon oxide layer, an internal diffusion layer is formed on the silicon substrate, and a high-low junction is formed between the internal diffusion layer and the doped polysilicon, and a high-low junction or a PN junction is formed between the internal diffusion layer and the silicon substrate.

[0072] In this way, a better passivation effect is provided for the sliced cell 100, and further, the recombination in the metal contact region can be reduced, which is beneficial to further improving the open-circuit voltage and short-circuit current of the sliced cell 100.

[0073] It can be understood that since the internal diffusion layer is formed by the doped polysilicon layer diffusing through the first passivation layer to the silicon substrate, the internal diffusion layer has the same conductivity type as the doped polysilicon layer. Therefore, a high-low junction is formed between the internal diffusion layer and the doped polysilicon layer. When the conductivity type of the internal diffusion layer is N-type, a high-low junction is formed between the internal diffusion layer and the N-type region of the silicon substrate, and a PN junction is formed with the P-type region of the silicon substrate; when the conductivity type of the internal diffusion layer is P-type, a PN junction is formed between the internal diffusion layer and the N-type region of the silicon substrate, and a high-low junction is formed with the P-type region of the silicon substrate.

[0074] In some embodiments, the sliced cell 100 includes a second doped layer, and the second doped layer is disposed on the second surface of the silicon substrate; when the conductivity type of the first doped layer is N-type, the conductivity type of the second doped layer is P-type; or, when the conductivity type of the first doped layer is P-type, the conductivity type of the second doped layer is N-type.

[0075] In this way, doped layers are formed on both the first surface and the second surface of the silicon substrate, thereby forming a PN junction or a high-low junction, so that both surfaces of the sliced cell 100 in the thickness direction can receive light for power generation, which is beneficial to improving the photoelectric conversion efficiency of the sliced cell 100.

[0076] Please note that the explanations and descriptions regarding the second doped layer can refer to the explanations and descriptions regarding the first doped layer. To avoid redundancy, they will not be elaborated here.

[0077] In some embodiments, a passivation layer is formed on the cut surface of the sliced cell 100.

[0078] Thus, the recombination at the cut surface can be reduced, the photoelectric conversion efficiency can be improved, and thus the power generation efficiency of the component formed by the cell string 1000 can be improved.

[0079] Specifically, the passivation layer includes at least one of aluminum oxide, silicon nitride, silicon oxynitride, and silicon oxide.

[0080] Embodiment Two

[0081] In some embodiments, the first edge region 111 is farther from the center of the whole solar cell than the second edge region 112, and the resistivity of the silicon substrate in the first edge region 111 is greater than or equal to the resistivity of the silicon substrate in the second edge region 112.

[0082] Thus, the doping concentration in the first edge region 111 can be reduced, so as to reduce the recombination pairs formed by the doping elements and oxygen and the recombination caused by the doping elements themselves, and improve the conversion efficiency.

[0083] Embodiment Three

[0084] In some embodiments, the resistivity of the silicon substrate in the first edge region 111 is greater than 100 Ω·cm. For example, it is 100 Ω·cm, 120 Ω·cm, 150 Ω·cm, 200 Ω·cm, 400 Ω·cm, 500 Ω·cm, 502 Ω·cm, 550 Ω·cm, 600 Ω·cm, 700 Ω·cm, 800 Ω·cm, 900 Ω·cm, etc.

[0085] Thus, since the resistivity of the first edge region 111 is high, there are fewer doping elements in the first edge region 111, so that the doping concentration can be reduced, and the recombination pairs formed by the doping elements and oxygen and the recombination caused by the doping elements themselves can be reduced. It is possible to avoid excessive doping concentration and serious recombination caused by too small resistivity of the silicon substrate in the first edge region 111.

[0086] Embodiment Four

[0087] In some embodiments, the ratio of the resistivity of the silicon substrate in the first edge region 111 to the resistivity of the silicon substrate in the second edge region 112 is greater than or equal to 1.2. For example, it is 1.2, 1.5, 1.8, 2, 3, 4, 7, 8, etc.

[0088] In this way, the resistivity of the first edge region 111 is much greater than that of the second edge region 112, which is beneficial to reducing recombination and improving the conversion efficiency. It can be understood that the resistivity of the first edge region 111 being much greater than that of the second edge region 112 means that the doping concentration of the first edge region 111 is lower than that of the second edge region 112. Therefore, doping elements can be reduced in the first edge region 111, thereby reducing the recombination pairs formed by the doping elements and oxygen and the recombination caused by the doping elements themselves, and further improving the conversion efficiency.

[0089] Example Five

[0090] In some embodiments, the sliced cell 100 includes an intermediate region 13. The intermediate region 13 is located between the first edge region 111 and the second edge region 112. The resistivity of the silicon substrate in the intermediate region 13 is less than or equal to the resistivity of the silicon substrate in the first edge region 111 and greater than or equal to the resistivity of the silicon substrate in the second edge region 112.

[0091] In this way, the resistivity of the silicon substrate of the sliced cell 100 gradually decreases from the edge to the center of the entire solar cell, which is beneficial to reducing recombination and improving the conversion efficiency.

[0092] Example Six

[0093] In some embodiments, the resistivity of the intermediate region 13 is greater than or equal to 50 Ω·cm. For example, it is 50 Ω·cm, 51 Ω·cm, 55 Ω·cm, 60 Ω·cm, 80 Ω·cm, 100 Ω·cm, 200 Ω·cm.

[0094] In this way, the resistivity of the intermediate region 13 is within a suitable range, which can further improve the surrounding field passivation effect in the sliced cell 100 and is beneficial to further improving the carrier transport. It can avoid poor field passivation effect caused by too small resistivity.

[0095] Example Seven

[0096] In some embodiments, the length of the first edge region 111 is the length of the first side 11, and the width of the first edge region 111 is 1 / 10 - 1 / 3 of the length of the second side 12. For example, it is 0.1, 0.12, 0.15, 0.18, 0.2, 0.22, 0.25, 0.28, 0.3, 0.33.

[0097] In this way, the width of the first edge region 111 is within a suitable range, so that the relative area of the first edge region 111 and the sliced battery 100 is within a suitable range. It can avoid the situation that the relative area of the first edge region 111 is too small due to the too small width of the first edge region 111, resulting in a poor edge passivation effect. It can also avoid the situation that the relative area of the first edge region 111 is too large due to the too large width of the first edge region 111, resulting in an overall too high resistivity of the silicon substrate of the sliced battery 100 and poor conductivity.

[0098] Example Eight

[0099] In some embodiments, the length of the second edge region 112 is the length of the first side 11, and the width of the second edge region 112 is 1 / 10 - 1 / 3 of the length of the second side 12. For example, it can be 0.1, 0.12, 0.15, 0.18, 0.2, 0.22, 0.25, 0.28, 0.3, 0.33.

[0100] In this way, the width of the second edge region 112 is within a suitable range, so that the relative area of the second edge region 112 and the sliced battery 100 is within a suitable range. It can avoid the situation that the relative area of the second edge region 112 is too small due to the too small width of the second edge region 112, resulting in a poor edge passivation effect. It can also avoid the situation that the relative area of the second edge region 112 is too large due to the too large width of the second edge region 112, resulting in an overall too high resistivity of the silicon substrate of the sliced battery 100 and poor conductivity.

[0101] Specifically, the widths of the first edge region 111 and the second edge region 112 can be the same or different.

[0102] Example Nine

[0103] In some embodiments, the battery string 1000 includes a plurality of battery groups. Each battery group includes a first chamfered battery, a non-chamfered battery, and a second chamfered battery arranged in sequence; the resistivity of the silicon substrate of the first chamfered battery is greater than that of the non-chamfered battery; the resistivity of the silicon substrate of the second chamfered battery is greater than that of the non-chamfered battery.

[0104] In this way, since the average resistivity of the silicon substrates of the first chamfered battery and the second chamfered battery is greater than that of the non-chamfered battery, the carrier recombination can be reduced. Thus, the generated current of the first chamfered battery and the second chamfered battery can be increased, and the current matching effect between the chamfered battery and the non-chamfered battery is better.

[0105] It can be understood that the current of the first chamfered cell and the second chamfered cell, which are usually located at the edge of the whole solar cell, is less than that of the non-chamfered cell located in the middle of the whole solar cell. When connecting the first chamfered cell, the non-chamfered cell, and the second chamfered cell with different currents in series in the battery string 1000, current matching is required. By increasing the power generation current of the chamfered cell for current matching, the current of the battery string 1000 can be higher, and the power generation efficiency of the battery module formed by the battery string 1000 can be higher.

[0106] Specifically, the number of non-chamfered cells can be 1, 2, 3, or other numbers. There is no limitation here.

[0107] It can be understood that since the four corners of the whole solar cell are usually chamfered, the order of the sliced cells 100 is usually not adjusted when making the battery string 1000. Therefore, the first chamfered cell, the non-chamfered cell, and the second chamfered cell are cut from the same whole solar cell.

[0108] Please note that the "resistivity" in this article refers to the average resistivity of the silicon substrate in this area. That is, the average resistivity of the silicon substrate of the first chamfered cell is greater than that of the non-chamfered cell; the average resistivity of the silicon substrate of the second chamfered cell is greater than that of the non-chamfered cell.

[0109] Specifically, the average resistivity means that at any point on the silicon substrate of the sliced cell 100, points are taken at regular intervals in the same direction to measure the resistivity, and the average value of the measured resistivities is calculated.

[0110] Furthermore, the direction along which the points are taken can be any direction. Preferably, the direction along which the points are taken is parallel to the first side 11.

[0111] Furthermore, the distance between adjacent test points is 2 mm - 10 mm. For example, it can be 2 mm, 3 mm, 4 mm, 5 mm, 6 mm, 7 mm, 8 mm, 9 mm, 10 mm. In this way, the distance between adjacent test points is within a suitable range, which can avoid the too small difference and meaningless data caused by too small a distance, and can also avoid the too large difference and the average value obtained not being sufficient to accurately represent the average resistivity caused by too large a distance.

[0112] Furthermore, the number of test points is 5 - 20. For example, it can be 5, 8, 10, 12, 15, 18, 20. In this way, the number of test points is within a suitable range, which can avoid the average value obtained not being sufficient to accurately represent the average resistivity caused by too small a number, and can also avoid too much testing and calculation amount and low efficiency caused by too large a number.

[0113] In this embodiment, the distance between adjacent test points is 5 mm, and the number of test points is 10.

[0114] Example Ten

[0115] The battery assembly of the embodiment of the present application includes the battery string 1000 of any one of Embodiments One to Nine.

[0116] For the battery assembly of the embodiment of the present application, since the resistivity of the silicon substrate in the edge region corresponding to at least one long side of the sliced battery 100 forming the battery string 1000 is greater than or equal to 30 Ω·cm, the edge recombination of the sliced battery 100 can be reduced, and the power generation efficiency of the battery assembly formed by the battery string 1000 can be improved.

[0117] In this embodiment, the battery assembly may further include a metal frame, a backsheet, a photovoltaic glass, and an encapsulant film. The encapsulant film can be filled between the front and back of the solar cell, as well as between the photovoltaic glass and adjacent solar cells. As a filler, it can be a transparent colloid with good light transmittance and aging resistance. For example, the encapsulant film can be an EVA encapsulant film or a POE encapsulant film, and specific selection can be made according to the actual situation, which is not limited herein.

[0118] The photovoltaic glass can cover the encapsulant film on the front of the solar cell. The photovoltaic glass can be ultra-white glass, which has a high light transmittance, high transparency, and excellent physical, mechanical, and optical properties. For example, the light transmittance of the ultra-white glass can reach more than 92%, and it can protect the solar cell without significantly affecting the efficiency of the solar cell. At the same time, the encapsulant film can bond the photovoltaic glass and the solar cell together, and the presence of the encapsulant film can seal and insulate the solar cell and prevent water and moisture.

[0119] The backsheet can be attached to the encapsulant film on the back of the solar cell. The backsheet can protect and support the solar cell, and has reliable insulation, water resistance, and aging resistance. There are multiple choices for the backsheet, which can usually be tempered glass, plexiglass, aluminum alloy TPT composite film, etc., and specific settings can be made according to the specific situation, which is not limited herein. The whole composed of the backsheet, the solar cell, the encapsulant film, and the photovoltaic glass can be arranged on the metal frame. The metal frame is the main external support structure of the entire battery assembly and can stably support and install the battery assembly. For example, the battery assembly can be installed at the required installation position through the metal frame.

[0120] Example Eleven

[0121] The photovoltaic system of the embodiment of the present application includes the battery assembly of Example Ten.

[0122] In the photovoltaic system according to the embodiment of the present application, since the resistivity of the silicon substrate in the edge region corresponding to at least one long side of the sliced cell 100 forming the cell string 1000 is greater than or equal to 30 Ω·cm, the edge recombination of the sliced cell 100 can be reduced, and the power generation efficiency of the cell module formed by the cell string 1000 can be improved.

[0123] In this embodiment, the photovoltaic system can be applied in a photovoltaic power station, such as a ground power station, a rooftop power station, a water surface power station, etc., and can also be applied to devices or apparatuses that use solar energy for power generation, such as a user solar power supply, a solar street lamp, a solar vehicle, a solar building, etc. Of course, it can be understood that the application scenarios of the photovoltaic system are not limited to this, that is to say, the photovoltaic system can be applied in all fields that require solar power generation. Taking the photovoltaic power generation system network as an example, the photovoltaic system can include a photovoltaic array, a busbar box, and an inverter. The photovoltaic array can be an array combination of multiple cell modules. For example, multiple cell modules can form multiple photovoltaic arrays. The photovoltaic array is connected to the busbar box, and the busbar box can collect the current generated by the photovoltaic array. The collected current flows through the inverter and is converted into alternating current required by the mains power grid and then connected to the mains network to achieve solar power supply.

[0124] Next, the cell module formed by the cell string 1000 based on the related art will be used as a comparative example and compared with the cell module formed by the cell string 1000 of the present application. In one comparative example, for the cell module in the related art, the photoelectric conversion efficiency is 24.2%. In an example of the present application, for the cell module formed by the cell string 1000 of the present application, the photoelectric conversion efficiency is 24.5%. Obviously, the cell module formed by the cell string 1000 of the present application has a higher photoelectric conversion efficiency and a higher power generation efficiency.

[0125] In the description of this specification, the descriptions with reference to terms such as "some embodiments", "schematic embodiments", "examples", "specific examples", or "some examples" mean that the specific features, structures, materials, or characteristics described in connection with the embodiments or examples are included in at least one embodiment or example of the present application. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiments or examples. Moreover, the specific features, structures, materials, or characteristics described can be combined in a suitable manner in any one or more embodiments or examples.

[0126] In addition, the above are only the preferred embodiments of the present application and are not intended to limit the present application. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principle of the present application shall be included in the protection scope of the present application.

Claims

1. A battery string, characterized in that, It includes a plurality of welding tapes and a plurality of sliced cells. The welding tapes connect two adjacent sliced cells, and the sliced cells are formed by cutting a whole solar cell; The sliced cell includes two first sides and two second sides, the length of the first side is greater than the length of the second side, and the two first sides respectively correspond to a first edge region and a second edge region; The resistivity of the silicon substrate in the first edge region is greater than or equal to 30 Ω·cm, and / or the resistivity of the silicon substrate in the second edge region is greater than or equal to 30 Ω·cm.

2. The battery string according to claim 1, wherein The first edge region is farther from the center of the whole solar cell than the second edge region, and the resistivity of the silicon substrate in the first edge region is greater than the resistivity of the silicon substrate in the second edge region.

3. The battery string according to claim 2, wherein The resistivity of the silicon substrate in the first edge region is greater than 100 Ω·cm.

4. The battery string according to claim 2, characterized in that, The ratio of the resistivity of the silicon substrate in the first edge region to the resistivity of the silicon substrate in the second edge region is greater than or equal to 1.

2.

5. The battery string according to claim 2, wherein The sliced cell includes an intermediate region located between the first edge region and the second edge region. The resistivity of the silicon substrate in the intermediate region is less than or equal to the resistivity of the silicon substrate in the first edge region and greater than or equal to the resistivity of the silicon substrate in the second edge region.

6. The battery string according to claim 5, characterized in that, The resistivity of the intermediate region is greater than 50 Ω·cm.

7. The battery string according to claim 1, characterized in that, The length of the first edge region is the length of the first side, and the width of the first edge region is 1 / 10 - 1 / 3 of the length of the second side.

8. The battery string according to claim 1, wherein, The length of the second edge region is the length of the first side, and the width of the second edge region is 1 / 10 - 1 / 3 of the length of the second side.

9. The battery string according to claim 1, characterized in that The battery string includes a plurality of battery groups. The battery group includes a first chamfered cell, a non-chamfered cell, and a second chamfered cell arranged in sequence; The resistivity of the silicon substrate in the first chamfered cell is greater than the resistivity of the silicon substrate in the non-chamfered cell; The resistivity of the silicon substrate in the second chamfered cell is greater than the resistivity of the silicon substrate in the non-chamfered cell.

10. A battery assembly, characterized in that, It includes the battery string according to any one of claims 1 - 9.

11. A photovoltaic system, characterized in that, It includes the battery assembly according to claim 10.

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